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684 Commits

Author SHA1 Message Date
Chris Lattner
f28479d600 The prologue/epilogue related method calls have no reason to return a value, 
make them return void.

This allows us to avoid some costly MBB.size() calls

llvm-svn: 11448
 2004-02-14 19:49:54 +00:00
Chris Lattner
1248c8a7f7 finegrainify namespacification, fix 80col prob 
llvm-svn: 11445
 2004-02-14 06:00:36 +00:00
Chris Lattner
c87772961e Urg, right. These need an input value... 
llvm-svn: 11443
 2004-02-14 04:47:23 +00:00
Chris Lattner
69b716e81c Codegen llvm.memset into rep stos[bwd]. Simplify code for llvm.memcpy 
llvm-svn: 11442
 2004-02-14 04:46:05 +00:00
Chris Lattner
6890963e48 add 'rep stos[bwd]' instructions 
llvm-svn: 11441
 2004-02-14 04:45:37 +00:00
Alkis Evlogimenos
a31a767307 Use newly added next() and prior() utility functions. 
llvm-svn: 11430
 2004-02-14 01:18:34 +00:00
Chris Lattner
bc565b2a6c There is no need to emit a shift if the size is constant, which is common 
llvm-svn: 11420
 2004-02-13 23:36:47 +00:00
Alkis Evlogimenos
6d6ab846af Remove getAllocatedRegNum(). Use getReg() instead. 
llvm-svn: 11393
 2004-02-13 21:01:20 +00:00
Chris Lattner
d1c4f4c833 Add support for the rep movs[bwd] instructions, and emit them when code 
generating the llvm.memcpy intrinsic.

llvm-svn: 11351
 2004-02-12 17:53:22 +00:00
Alkis Evlogimenos
94cab18bdc Change interface so that we can add to the end of a basic block 
without getting an assertion from ilist that we are dereferencing
ilist<T>::end().

llvm-svn: 11345
 2004-02-12 08:11:04 +00:00
Alkis Evlogimenos
b755d35fd2 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340
 2004-02-12 02:27:10 +00:00
Chris Lattner
2a50f8218a s/getOpCode/getOpcode 
llvm-svn: 11332
 2004-02-11 19:26:28 +00:00
Chris Lattner
db2c8941a5 Add #include 
llvm-svn: 11285
 2004-02-10 21:18:55 +00:00
Chris Lattner
c9f1da7374 Remove uses of MachineOperand::isVirtualRegister 
llvm-svn: 11281
 2004-02-10 20:55:47 +00:00
Chris Lattner
d58b38eeca Don't use MachineOperator::is(Phys|Virt)Register 
llvm-svn: 11276
 2004-02-10 20:31:28 +00:00
Chris Lattner
421302bc54 Tighten up checks 
llvm-svn: 11274
 2004-02-10 20:25:13 +00:00
Chris Lattner
16690fad3d Adjust to the changed StructType interface. In particular, getElementTypes() is gone. 
llvm-svn: 11228
 2004-02-09 04:37:31 +00:00
Chris Lattner
8e4aa43710 Add a new (hidden) option that is useful for profiling. 
llvm-svn: 11218
 2004-02-09 01:47:10 +00:00
Alkis Evlogimenos
676e5b8997 Modify the two address instruction pass to remove the duplicate 
operand of the instruction and thus simplify the register allocation.

llvm-svn: 11124
 2004-02-04 22:17:40 +00:00
Brian Gaeke
dcab84ecf1 Take away the default iostream argument of createMachineFunctionPrinterPass(), 
at Chris's request.

llvm-svn: 11120
 2004-02-04 21:41:01 +00:00
Alkis Evlogimenos
a5458ae146 IMULri* instructions do not require their first two registers operands 
to be the same (IOW they are not two address instructions).

llvm-svn: 11117
 2004-02-04 17:21:04 +00:00
Chris Lattner
92211eb77d Generate ftst instructions for comparison against zero 
llvm-svn: 11098
 2004-02-03 18:54:04 +00:00
Chris Lattner
7b6e8f1f70 Add the ftst instruction 
llvm-svn: 11095
 2004-02-03 07:27:50 +00:00
Chris Lattner
8b623358ff Add support for one argument OneArgFP instructions 
llvm-svn: 11094
 2004-02-03 07:27:34 +00:00
Chris Lattner
06f08a26ac No need to declare implicit uses/defs of ST0 
llvm-svn: 11081
 2004-02-02 19:57:45 +00:00
Chris Lattner
71c12c8e0d Generate the fchs instruction to negate a floating point number 
llvm-svn: 11078
 2004-02-02 19:31:38 +00:00
Chris Lattner
36367e8c90 Add support for OneArgFPRW instructions, fix a couple of typeos 
llvm-svn: 11077
 2004-02-02 19:23:15 +00:00
Chris Lattner
963082346c Codegen -0.0 correctly. Do not use fldz! This is another -0.0 == +0.0 problem, arg. 
llvm-svn: 11070
 2004-02-02 18:56:30 +00:00
Alkis Evlogimenos
3c94357980 FpMOV is also a move instruction. 
llvm-svn: 11055
 2004-02-01 08:22:16 +00:00
Chris Lattner
f5b5d1f2f8 Add some comments sketching out how this is to work eventually. 
llvm-svn: 11026
 2004-01-30 22:25:18 +00:00
Chris Lattner
543fbaa973 Add a new flag, which is only used for symmetry. 
llvm-svn: 11025
 2004-01-30 22:24:18 +00:00
Chris Lattner
6f4945b965 Add (currently disabled) support to the instruction selector to only insert 
FP_REG_KILL instructions at the end of blocks involved with critical edges.

Fix a bug where FP_REG_KILL instructions weren't inserted in fall through
unconditional branches.  Perhaps this will fix some linscan problems?

llvm-svn: 11019
 2004-01-30 22:13:44 +00:00
Chris Lattner
a14e705677 Eliminate the isStringCompatible function, using ConstantArray::isString. 
It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away.

llvm-svn: 10853
 2004-01-14 17:14:42 +00:00
Alkis Evlogimenos
44747c570a Output mov %REG = 0 instead of xor %REG, %REG, %REG to clear a 
register so that LiveVariable analysis is not confused.

llvm-svn: 10773
 2004-01-12 07:22:45 +00:00
Chris Lattner
c37577eb9f Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering 
implementation from the TargetMachine directly.

llvm-svn: 10636
 2003-12-28 21:23:38 +00:00
Alkis Evlogimenos
24b3159dfc Add TargetInstrInfo::isMoveInstr() to support coalescing in register 
allocation.

llvm-svn: 10633
 2003-12-28 17:35:08 +00:00
Chris Lattner
c487970d6b Whoops, don't try to lower non intrinsic calls 
llvm-svn: 10632
 2003-12-28 09:53:23 +00:00
Chris Lattner
1791047661 implement support for the intrinsic lowering functionality 
llvm-svn: 10629
 2003-12-28 09:47:19 +00:00
Alkis Evlogimenos
0e892b6337 Move FP_REG_KILL closer to the return instruction. 
llvm-svn: 10567
 2003-12-21 16:47:43 +00:00
Alkis Evlogimenos
7b61337ce6 Move FP_REG_KILL closer to the actual branch instruction. 
llvm-svn: 10563
 2003-12-20 17:28:15 +00:00
Alkis Evlogimenos
41bd8284e3 Remove floating point killer pass. This is now implemented in the 
instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.

llvm-svn: 10562
 2003-12-20 16:22:59 +00:00
Chris Lattner
ef1bfa35d0 Finally, _actually delete the machine code_ for a function, after it has 
been emitted.  Also, since the FPK pass is causing memory access violations,
disable it.

llvm-svn: 10559
 2003-12-20 10:20:19 +00:00
Chris Lattner
ea52ffdb10 Fix memory leak in the stackifier, due to the machinebasicblocks not holding 
instructions on an ilist

llvm-svn: 10556
 2003-12-20 10:12:17 +00:00
Chris Lattner
544d512d4f Finegrainify namespacification 
Minor cleanups to killer pass

llvm-svn: 10555
 2003-12-20 09:58:55 +00:00
Chris Lattner
d3676d0774 A minor cleanup for better encapsulation 
llvm-svn: 10545
 2003-12-20 02:03:14 +00:00
Chris Lattner
1cb1efedb3 Rip JIT specific stuff out of TargetMachine, as per PR176 
llvm-svn: 10542
 2003-12-20 01:22:19 +00:00
Alkis Evlogimenos
29127b8825 Change interface of MachineOperand as follows: 
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461
 2003-12-14 13:24:17 +00:00
Alkis Evlogimenos
b96436e679 Change preserve all claim to just preserve live variables and phielimination. 
llvm-svn: 10460
 2003-12-14 10:14:23 +00:00
Alkis Evlogimenos
5ca15c8f5e Add a floating point killer pass. This pass runs before register 
allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.

llvm-svn: 10446
 2003-12-13 05:36:22 +00:00
John Criswell
93c209e4ac Modified cast so that it converts the int to a long before casting to 
a pointer.  This evades a warning emitted by GCC when we cast from
unsigned int (32 bit) to void * (64 bit) on SparcV9.

llvm-svn: 10435
 2003-12-12 19:57:48 +00:00