RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-30 00:24:00 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
21,224 Commits 4 Branches 5 Tags
Commit Graph

21224 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Chris Lattner
b0b4e53b55 Accept and ignore prefetches for now 
llvm-svn: 24678
 2005-12-12 22:51:16 +00:00
Chris Lattner
ea3d25b64a Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.ll 
llvm-svn: 24677
 2005-12-12 22:27:43 +00:00
Chris Lattner
31de4bc6e3 Testcase for a problem that reid ran into 
llvm-svn: 24676
 2005-12-12 22:27:22 +00:00
Evan Cheng
6c9f9ea7ec Add some sub patterns. 
llvm-svn: 24675
 2005-12-12 21:54:05 +00:00
Evan Cheng
76923d3512 When SelectLEAAddr() fails, it shouldn't cause the side effect of having the 
base or index operands being selected.

llvm-svn: 24674
 2005-12-12 21:49:40 +00:00
Evan Cheng
cf34770b28 For ISD::RET, if # of operands >= 2, try selection the real data dep. operand 
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)

llvm-svn: 24673
 2005-12-12 20:32:18 +00:00
Andrew Lenharth
0a966ac994 fix FP selects 
llvm-svn: 24672
 2005-12-12 20:30:09 +00:00
Chris Lattner
08c38b28db remove some never-completed and now-obsolete code. 
llvm-svn: 24671
 2005-12-12 20:12:20 +00:00
Evan Cheng
145318aefb Add a few more add / store patterns. e.g. ADD32mi8. 
llvm-svn: 24670
 2005-12-12 19:45:23 +00:00
Evan Cheng
e7f40a3b8b Bug fix: finding the correct incoming chain for pattern with nested src operand. And a minor change to make output code slightly more readible. 
llvm-svn: 24669
 2005-12-12 19:37:43 +00:00
Andrew Lenharth
7b9648492b restore a more restricted select 
llvm-svn: 24668
 2005-12-12 17:43:52 +00:00
Chris Lattner
d61c654e67 Implement a little hack for parity with GCC on crafty. This speeds up 
186.crafty by about 16% (from 15.109s to 13.045s) on my system.

This turns allocas with unions/casts into scalars.  For example crafty has
something like this:

    union doub {
      unsigned short i[4];
      long long d;
    };
int f(long long a) {
  return ((union doub){.d=a}).i[1];
}

Instead of generating loads and stores to an alloca, we now promote the
whole thing to a scalar long value.

This implements: Transforms/ScalarRepl/AggregatePromote.ll

llvm-svn: 24667
 2005-12-12 07:19:13 +00:00
Chris Lattner
20ac616376 new testcase: sra should be able to eliminate all of these alloca's, despite 
the presense of pointer casts

llvm-svn: 24666
 2005-12-12 07:18:59 +00:00
Chris Lattner
f514dbda60 Send an indicator to llvm-testresults if the build failed 
llvm-svn: 24665
 2005-12-11 19:55:39 +00:00
Chris Lattner
dc802c4f4c Fix typo :( 
llvm-svn: 24664
 2005-12-11 18:43:13 +00:00
Chris Lattner
a54452fd4f Minor tweak to get isel opt 
llvm-svn: 24663
 2005-12-11 09:05:13 +00:00
Chris Lattner
6f047565cb add selectcc 
llvm-svn: 24662
 2005-12-11 08:35:54 +00:00
Chris Lattner
6d4db7c732 Remove type casts that are no longer needed 
llvm-svn: 24661
 2005-12-11 07:45:47 +00:00
Chris Lattner
762fb5e2f2 Realize the constant pool & global addrs must always be ptr type 
llvm-svn: 24660
 2005-12-11 07:45:04 +00:00
Chris Lattner
d27c96f723 Fix the JIT failures from last night. 
llvm-svn: 24659
 2005-12-11 07:37:41 +00:00
Andrew Lenharth
c432a93381 FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself 
llvm-svn: 24658
 2005-12-11 03:54:31 +00:00
Nate Begeman
a0e26b25f4 Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Evan Cheng
191d0954ff Use SDTCisPtrTy type property for store address. 
llvm-svn: 24656
 2005-12-10 01:59:36 +00:00
Evan Cheng
c8ebe5f6eb Stop emitting a redudant type check for complex pattern node. 
llvm-svn: 24655
 2005-12-10 01:57:33 +00:00
Evan Cheng
56f62789d7 * Added X86 store patterns. 
* Added X86 dec patterns.

llvm-svn: 24654
 2005-12-10 00:48:20 +00:00
Evan Cheng
0b7a482921 Added new getNode and getTargetNode variants for X86 stores. 
llvm-svn: 24653
 2005-12-10 00:37:58 +00:00
Evan Cheng
8300ae66d1 For instructions which produce no result, e.g. store, chain's Resno == 0. 
llvm-svn: 24652
 2005-12-10 00:09:17 +00:00
Nate Begeman
5c6a84b5fc Add support patterns to many load and store instructions which will 
hopefully use patterns in the near future.

llvm-svn: 24651
 2005-12-09 23:54:18 +00:00
Chris Lattner
ee29c75c65 Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load 
must be a pointer.  This removes a type check out of the code generated by
tblgen for load matching.

llvm-svn: 24650
 2005-12-09 22:58:42 +00:00
Chris Lattner
aaec1f6faa Add a new SDTCisPtrTy constraint, which indicates that an operand must have 
the same type as the pointer type for a target.

llvm-svn: 24649
 2005-12-09 22:57:42 +00:00
Evan Cheng
6610545b7e Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al 
llvm-svn: 24648
 2005-12-09 22:48:48 +00:00
Evan Cheng
9586e87904 * Do not allow nodes which produce chain results (e.g. loads) to be folded if 
it has more than one real use (non-chain uses).
* Record folded chain producing node in CodeGenMap.
* Do not fold a chain producing node if it has already been selected as an
  operand of a chain use.

llvm-svn: 24647
 2005-12-09 22:45:35 +00:00
Chris Lattner
3b6d02d4fc Avoid emitting two tabs when switching to a named section 
llvm-svn: 24646
 2005-12-09 19:28:49 +00:00
Chris Lattner
cdeeb94947 Teach the PPC backend about the ctor and dtor list when not using __main and 
linking the entire program into one bc file.

llvm-svn: 24645
 2005-12-09 18:24:29 +00:00
Chris Lattner
8f28525f54 Teach legalize how to promote sext_inreg to fix a problem Andrew pointed 
out to me.

llvm-svn: 24644
 2005-12-09 17:32:47 +00:00
Evan Cheng
18134d8c96 Prevent folding of instructions which produce chains that have more than 1 real use 
llvm-svn: 24643
 2005-12-09 06:06:08 +00:00
Evan Cheng
1d7435f478 * Make sure complex pattern operands are selected first since their select 
functions can return false and causing the instruction pattern match to fail.
* Code clean up.

llvm-svn: 24642
 2005-12-09 00:48:42 +00:00
Andrew Lenharth
ae37aa2550 it helps if your conditionals are not reversed 
llvm-svn: 24641
 2005-12-09 00:45:42 +00:00
Chris Lattner
e27671119a improve code insertion in two ways: 
1. Only forward subst offsets into loads and stores, not into arbitrary
   things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
   allowing us to fold the cast away (improving cases when the cast is
   from an alloca or global).

This hasn't been fully tested, but does appear to further reduce register
pressure and improve code.  Lets let the testers grind on it a bit. :)

llvm-svn: 24640
 2005-12-08 08:00:12 +00:00
Chris Lattner
9d9313e3c1 Add another important case we miss 
llvm-svn: 24639
 2005-12-08 07:13:28 +00:00
Evan Cheng
e121d9f3d7 Added support for ComplexPattern. 
llvm-svn: 24638
 2005-12-08 04:28:48 +00:00
Evan Cheng
6eb25df63a Added explicit type field to ComplexPattern. 
llvm-svn: 24637
 2005-12-08 02:15:07 +00:00
Evan Cheng
ed205f20a5 * Added an explicit type field to ComplexPattern. 
* Renamed MatchingNodes to RootNodes.

llvm-svn: 24636
 2005-12-08 02:14:08 +00:00
Evan Cheng
1712ee5ab9 * Added intelligence to X86 LEA addressing mode matching routine so it returns 
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.

llvm-svn: 24635
 2005-12-08 02:01:35 +00:00
Evan Cheng
d11d31e0bd Added support for ComplexPattern. These are patterns that require C++ pattern 
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.

llvm-svn: 24634
 2005-12-08 02:00:36 +00:00
Nate Begeman
589dff9a20 Fix a crash where ConstantVec nodes were being generated with the wrong 
type when the target did not support them.  Also teach Legalize how to
expand ConstantVecs.

This allows us to generate

_test:
        lwz r2, 12(r3)
        lwz r4, 8(r3)
        lwz r5, 4(r3)
        lwz r6, 0(r3)
        addi r2, r2, 4
        addi r4, r4, 3
        addi r5, r5, 2
        addi r6, r6, 1
        stw r2, 12(r3)
        stw r4, 8(r3)
        stw r5, 4(r3)
        stw r6, 0(r3)
        blr

For:

void %test(%v4i *%P) {
        %T = load %v4i* %P
        %S = add %v4i %T, <int 1, int 2, int 3, int 4>
        store %v4i %S, %v4i * %P
        ret void
}

On PowerPC.

llvm-svn: 24633
 2005-12-07 19:48:11 +00:00
Chris Lattner
055ecd8533 Only transform (sext (truncate x)) -> (sextinreg x) if before legalize or 
if the target supports the resultant sextinreg

llvm-svn: 24632
 2005-12-07 18:02:05 +00:00
Chris Lattner
5df0bce13a X86 doesn't support sextinreg for 8-bit things either. 
llvm-svn: 24631
 2005-12-07 17:59:14 +00:00
Chris Lattner
8f17c95cc2 Teach the dag combiner to turn a truncate/sign_extend pair into a sextinreg 
when the types match up.  This allows the X86 backend to compile:

sbyte %toggle_value(sbyte* %tmp.1) {
        %tmp.2 = load sbyte* %tmp.1
        ret sbyte %tmp.2
}

to this:

_toggle_value:
        mov %EAX, DWORD PTR [%ESP + 4]
        movsx %EAX, BYTE PTR [%EAX]
        ret

instead of this:

_toggle_value:
        mov %EAX, DWORD PTR [%ESP + 4]
        movsx %EAX, BYTE PTR [%EAX]
        movsx %EAX, %AL
        ret

noticed in Shootout/objinst.

-Chris

llvm-svn: 24630
 2005-12-07 07:11:03 +00:00
Chris Lattner
2fbfb322b1 Remove a now-dead map, patch by Saem Ghani, thanks! 
llvm-svn: 24629
 2005-12-07 05:41:44 +00:00