5752 Commits

Author SHA1 Message Date
Misha Brukman
848c759b41 * Remove function to find "main" in a Module, there's a method for that
* Removing extraneous empty space and empty comment lines

llvm-svn: 12014
2004-02-29 23:09:10 +00:00
Chris Lattner
6728dfdfe8 Fix -debug-pass=Executions, which relied on Function, Module, and BasicBlock
being annotable

llvm-svn: 12013
2004-02-29 22:37:04 +00:00
Chris Lattner
9736130083 Fix bug: test/Regression/Transforms/LowerInvoke/2004-02-29-PHICrash.llx
... which tickled the lowerinvoke pass because it used the BCE routines.

llvm-svn: 12012
2004-02-29 22:24:41 +00:00
Chris Lattner
33b5dd0463 Add an assert
llvm-svn: 12010
2004-02-29 22:01:51 +00:00
Chris Lattner
37418d74a1 Add back #include I messed up
llvm-svn: 12009
2004-02-29 21:40:53 +00:00
Chris Lattner
b82a16f3a5 Urg, forgot to check this in.
llvm-svn: 12007
2004-02-29 21:03:08 +00:00
Chris Lattner
4c7ed6793e Remove public header. It's been moved to lib/Target/SparcV9
llvm-svn: 12004
2004-02-29 19:13:20 +00:00
Chris Lattner
fe38629411 Move the private MachineInstrAnnot.h into a private directory.
llvm-svn: 12003
2004-02-29 19:12:51 +00:00
Chris Lattner
b73a182845 Remove use of an ugly header
llvm-svn: 12002
2004-02-29 19:04:31 +00:00
Chris Lattner
0acd73e11f Move methods out of .h file
llvm-svn: 12001
2004-02-29 19:02:39 +00:00
Alkis Evlogimenos
e186d8eb2f Add instruction name description.
llvm-svn: 11998
2004-02-29 18:44:03 +00:00
Alkis Evlogimenos
8d8f872b3d Use correct template for SHLD and SHRD instructions so that the memory
operand size is correctly specified.

llvm-svn: 11997
2004-02-29 09:19:40 +00:00
Alkis Evlogimenos
10f4523e9a Improve allocation order:
1) For 8-bit registers try to use first the ones that are parts of the
   same register (AL then AH). This way we only alias 2 16/32-bit
   registers after allocating 4 8-bit variables.

2) Move EBX as the last register to allocate. This will cause less
   spills to happen since we will have 8-bit registers available up to
   register excaustion (assuming we use the allocation order). It
   would be nice if we could push all of the 8-bit aliased registers
   towards the end but we much prefer to keep callee saved register to
   the end to avoid saving them on entry and exit of the function.

For example this gives a slight reduction of spills with linear scan
on 164.gzip.

Before:

11221 asm-printer           - Number of machine instrs printed
  975 spiller               - Number of loads added
  675 spiller               - Number of stores added
  398 spiller               - Number of register spills

After:

11182 asm-printer           - Number of machine instrs printed
  952 spiller               - Number of loads added
  652 spiller               - Number of stores added
  386 spiller               - Number of register spills

llvm-svn: 11996
2004-02-29 09:17:01 +00:00
Alkis Evlogimenos
7ecfe0a839 A big X86 instruction rename. The instructions are renamed to make
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory

llvm-svn: 11995
2004-02-29 08:50:03 +00:00
Brian Gaeke
8303cb575e Remove dead member variables of SparcV9SchedInfo and TargetSchedInfo
llvm-svn: 11994
2004-02-29 08:40:03 +00:00
Chris Lattner
a7db4ff17a Eliminate the X86-specific BMI functions, using BuildMI instead.
Replace uses of addZImm with addImm.

llvm-svn: 11992
2004-02-29 07:22:16 +00:00
Chris Lattner
e8e0bafbba Fix a miscompilation of 197.parser that occurs when you have single basic
block loops.

llvm-svn: 11990
2004-02-29 07:10:16 +00:00
Chris Lattner
bcc0df60ef Fix PR255: [tailduplication] Single basic block loops are very rare
Note that this is a band-aid put over a band-aid.  This just undisables
tail duplication in on very specific case that it seems to work in.

llvm-svn: 11989
2004-02-29 06:41:20 +00:00
Chris Lattner
c2977ac665 Adjust to change in TII ctor arguments
llvm-svn: 11987
2004-02-29 06:31:44 +00:00
Chris Lattner
b5f0e162c7 Eliminate the distinction between "real" and "unreal" instructions
llvm-svn: 11986
2004-02-29 06:31:16 +00:00
Chris Lattner
cfc8f02250 These two virtual methods are never called.
llvm-svn: 11984
2004-02-29 05:59:33 +00:00
Chris Lattner
dd752eec34 Remove a TON of flags that noone cares about
llvm-svn: 11983
2004-02-29 05:58:30 +00:00
Chris Lattner
d80ff1bdc0 Noone calls these virtual methods
llvm-svn: 11982
2004-02-29 05:58:16 +00:00
Chris Lattner
dded7ad224 This is the only file in the system that uses this enum. eliminate it.
llvm-svn: 11981
2004-02-29 05:57:59 +00:00
Chris Lattner
7cb71a20ca Implement initial prolog/epilog code insertion methods.
llvm-svn: 11979
2004-02-29 05:18:30 +00:00
Chris Lattner
8b7ac81d2e int64_t -> int
llvm-svn: 11977
2004-02-29 05:07:02 +00:00
Alkis Evlogimenos
0f96b44e0e Use correct template for ADC instruction with memory operands.
llvm-svn: 11974
2004-02-29 02:18:17 +00:00
Chris Lattner
800f720e7b Add an instruction selector capable of selecting 'ret void'
llvm-svn: 11973
2004-02-29 00:27:00 +00:00
Alkis Evlogimenos
6815402082 SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them
to denote this fact.

llvm-svn: 11972
2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
e8dac99a43 Floating point loads/stores act on memory operands. Rename them to
denote this fact.

llvm-svn: 11971
2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
1d71a15be9 Rename instruction templates to be easier to the human eye to
parse. The name is now I (operand size)*. For example:

Im32 -> instruction with 32-bit memory operands.

Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
          operands.

llvm-svn: 11970
2004-02-28 23:09:03 +00:00
Alkis Evlogimenos
6038a89025 Uncomment instructions that take both an immediate and a memory
operand but their sizes differ.

llvm-svn: 11969
2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
f208a0fd81 Each instruction now has both an ImmType and a MemType. This describes
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).

llvm-svn: 11967
2004-02-28 22:02:05 +00:00
Brian Gaeke
d551a8b5fe Fix typo in comment
llvm-svn: 11966
2004-02-28 21:55:18 +00:00
Chris Lattner
a854ddd528 Implement switch->br and br->switch folding by ripping out the switch->switch
and br->br code and generalizing it.  This allows us to compile code like this:

int test(Instruction *I) {
  if (isa<CastInst>(I))
    return foo(7);
  else if (isa<BranchInst>(I))
    return foo(123);
  else if (isa<UnwindInst>(I))
    return foo(1241);
  else if (isa<SetCondInst>(I))
    return foo(1);
  else if (isa<VAArgInst>(I))
    return foo(42);
  return foo(-1);
}

into:

int %_Z4testPN4llvm11InstructionE("struct.llvm::Instruction"* %I) {
entry:
        %tmp.1.i.i.i.i.i.i.i = getelementptr "struct.llvm::Instruction"* %I, long 0, ubyte 4            ; <uint*> [#uses=1]
        %tmp.2.i.i.i.i.i.i.i = load uint* %tmp.1.i.i.i.i.i.i.i          ; <uint> [#uses=2]
        %tmp.2.i.i.i.i.i.i = seteq uint %tmp.2.i.i.i.i.i.i.i, 27                ; <bool> [#uses=0]
        switch uint %tmp.2.i.i.i.i.i.i.i, label %endif.0 [
                 uint 27, label %then.0
                 uint 2, label %then.1
                 uint 5, label %then.2
                 uint 14, label %then.3
                 uint 15, label %then.3
                 uint 16, label %then.3
                 uint 17, label %then.3
                 uint 18, label %then.3
                 uint 19, label %then.3
                 uint 32, label %then.4
        ]
...

As well as handling the cases in 176.gcc and many other programs more effectively.

llvm-svn: 11964
2004-02-28 21:28:10 +00:00
Chris Lattner
3583890ab7 Change this so that LLC actually tries to run the code generator, though it will
immediately abort due to lack of an instruction selector. :)

llvm-svn: 11963
2004-02-28 20:21:45 +00:00
Chris Lattner
529a354ea4 SparcV8 now builds.
llvm-svn: 11960
2004-02-28 19:54:00 +00:00
Chris Lattner
5effdb67b7 fine grainify namespacification
llvm-svn: 11959
2004-02-28 19:53:18 +00:00
Chris Lattner
3852b0c3b8 Finegrainify namespacification
llvm-svn: 11958
2004-02-28 19:52:49 +00:00
Chris Lattner
88268605ec Tab completion is our friend.
llvm-svn: 11957
2004-02-28 19:45:39 +00:00
Chris Lattner
013aa47975 Clean up rules
llvm-svn: 11956
2004-02-28 19:43:40 +00:00
Chris Lattner
d2bb7e91b0 Bring this directory into "it actually compiles" land
llvm-svn: 11955
2004-02-28 19:37:18 +00:00
Chris Lattner
3f70429d28 Fix multiple inclusion problem
llvm-svn: 11954
2004-02-28 19:31:32 +00:00
Chris Lattner
69ab9e0840 if there is already a prototype for malloc/free, use it, even if it's incorrect.
Do not just inject a new prototype.

llvm-svn: 11951
2004-02-28 18:51:45 +00:00
Alkis Evlogimenos
977dbaadf7 Do not generate instructions with mismatched memory/immediate sized
operands. The X86 backend doesn't handle them properly right now.

llvm-svn: 11944
2004-02-28 06:01:43 +00:00
Chris Lattner
7872171767 Rename AddUsesToWorkList -> AddUsersToWorkList, as that is what it does.
Create a new AddUsesToWorkList method
optimize memmove/set/cpy of zero bytes to a noop.

llvm-svn: 11941
2004-02-28 05:22:00 +00:00
Chris Lattner
192d8413d3 Turn 'free null' into nothing
llvm-svn: 11940
2004-02-28 04:57:37 +00:00
Misha Brukman
0b846ae65c Right, it's really Extractor, not Extraction.
llvm-svn: 11939
2004-02-28 03:37:58 +00:00
Misha Brukman
f14fbb1a0b A pass that uses the generic CodeExtractor to rip out *every* loop in every
function, as long as the loop isn't the only one in that function. This should
help debugging passes easier with BugPoint.

llvm-svn: 11936
2004-02-28 03:33:01 +00:00
Misha Brukman
26e90f8776 A generic code extractor: given a list of BasicBlocks, it will rip them out into
a new function, taking care of inputs and outputs.

llvm-svn: 11935
2004-02-28 03:26:20 +00:00