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Author SHA1 Message Date
Chris Lattner
d6214281c5 add PTX backend info 
llvm-svn: 144711
 2011-11-15 22:23:46 +00:00
Jim Grosbach
d573473cb8 ARM VFP assembly parsing for VADD and VSUB two-operand forms. 
llvm-svn: 144710
 2011-11-15 22:15:10 +00:00
Jim Grosbach
e991d79b50 ARM accept an immediate offset in memory operands w/o the '#'. 
llvm-svn: 144709
 2011-11-15 22:14:41 +00:00
Chris Lattner
a7ceec1f82 some notes. 
llvm-svn: 144708
 2011-11-15 22:13:27 +00:00
Pete Cooper
8441c08e0b Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used 
by later instructions.

Only done for DEC64m right now.

Fixes <rdar://problem/6172640>

llvm-svn: 144705
 2011-11-15 21:57:53 +00:00
Jim Grosbach
8f360855cf ARM enclosing curly braces optional on one-register VLD/VST instruction lists. 
'vld1.f32 d4, [r7]' should be parsed as equivalent to 'vld1.f32 {d4}, [r7]'

rdar://10450488.

llvm-svn: 144701
 2011-11-15 21:45:55 +00:00
Akira Hatanaka
4ca3e2bdad Update section "MIPS Target Improvements" in the llvm 3.0 release notes. 
llvm-svn: 144699
 2011-11-15 21:33:05 +00:00
Jim Grosbach
3c205132ff ARM size suffix on VFP single-precision 'vmov' is optional. 
rdar://10435114

llvm-svn: 144698
 2011-11-15 21:18:35 +00:00
Devang Patel
11c550b1e5 Insert modified DBG_VALUE into LiveDbgValueMap. 
llvm-svn: 144696
 2011-11-15 21:03:58 +00:00
Jim Grosbach
f68b81adb7 Fix typo. 
llvm-svn: 144695
 2011-11-15 21:01:30 +00:00
Jim Grosbach
4d0ad5a4e0 ARM alternate size suffices for VTRN instructions. 
rdar://10435076

llvm-svn: 144694
 2011-11-15 20:49:46 +00:00
Owen Anderson
f71db061ba Fix a misplaced paren bug. 
llvm-svn: 144692
 2011-11-15 20:30:41 +00:00
Jim Grosbach
8987b277cb ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns. 
Yet more of rdar://10435076.

llvm-svn: 144691
 2011-11-15 20:29:42 +00:00
Jim Grosbach
f0690cd90c ARM assembly parsing for two-operand form of 'mul' instruction. 
rdar://10449856.

llvm-svn: 144689
 2011-11-15 20:14:51 +00:00
Jim Grosbach
8b1d4c989c ARM assembly parsing for two-operand form of 'mul' instruction. 
Ongoing rdar://10435114.

llvm-svn: 144688
 2011-11-15 20:02:06 +00:00
Jim Grosbach
e4933acaa7 Testcase for r144684. 
llvm-svn: 144685
 2011-11-15 19:56:17 +00:00
Jim Grosbach
6dbfffcbf7 Thumb2 two-operand 'mul' instruction wide encoding parsing. 
rdar://10449724

llvm-svn: 144684
 2011-11-15 19:55:16 +00:00
Owen Anderson
35f049f1fb Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and VMOVv4f32. 
llvm-svn: 144683
 2011-11-15 19:55:00 +00:00
Jim Grosbach
df951fa128 Thumb2 assembly parsing for mul.w in IT block fix. 
When the 3rd operand is not a low-register, and the first two operands are
the same low register, the parser was incorrectly trying to use the 16-bit
instruction encoding.

rdar://10449281

llvm-svn: 144679
 2011-11-15 19:29:45 +00:00
Benjamin Kramer
4a8534a158 StringRefize and simplify. 
llvm-svn: 144675
 2011-11-15 19:12:09 +00:00
Rafael Espindola
95f4e0c409 We currently use a callback to handle an IL pass deleting a BB that still 
has a reference to it. Unfortunately, that doesn't work for codegen passes
since we don't get notified of MBB's being deleted (the original BB stays).

Use that fact to our advantage and after printing a function, check if
any of the IL BBs corresponds to a symbol that was not printed. This fixes
pr11202.

llvm-svn: 144674
 2011-11-15 19:08:46 +00:00
Akira Hatanaka
040e92857f Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bit 
registers and instructions when ABI is N64.

llvm-svn: 144666
 2011-11-15 18:53:55 +00:00
Akira Hatanaka
a6c12123f1 Set nomacro before emitting the sequence of instructions that set global pointer 
register.

llvm-svn: 144665
 2011-11-15 18:44:44 +00:00
Akira Hatanaka
666a872159 Simplify function PassByValArg64. 
llvm-svn: 144664
 2011-11-15 18:42:25 +00:00
Akira Hatanaka
60491e224c Remove function printMipsSymbolRef. 
llvm-svn: 144663
 2011-11-15 18:38:35 +00:00
Benjamin Kramer
ea43fbc528 Remove Value::getNameStr. It has been deprecated for a while and provides no additional value over getName(). 
llvm-svn: 144657
 2011-11-15 18:30:12 +00:00
Benjamin Kramer
de467fc4df Missed some users of Value::getNameStr. 
llvm-svn: 144656
 2011-11-15 18:30:06 +00:00
Akira Hatanaka
4cbb3e4ca4 Delete files. 
llvm-svn: 144655
 2011-11-15 18:22:48 +00:00
Akira Hatanaka
ef7310d4a2 Remove MipsMCSymbolRefExpr. 
llvm-svn: 144654
 2011-11-15 18:20:08 +00:00
Jim Grosbach
61c3f1b35b ARM parsing datatype suffix variants for register-writeback VLD1/VST1 instructions. 
rdar://10435076

llvm-svn: 144650
 2011-11-15 17:49:59 +00:00
Jim Grosbach
176025e803 Tidy up. 80 columns. 
llvm-svn: 144649
 2011-11-15 16:46:22 +00:00
Benjamin Kramer
a2f57dee6d Remove all remaining uses of Value::getNameStr(). 
llvm-svn: 144648
 2011-11-15 16:27:03 +00:00
Benjamin Kramer
3eeef2e739 Twinify GraphWriter a little bit. 
llvm-svn: 144647
 2011-11-15 16:26:38 +00:00
Jakob Stoklund Olesen
7b29a27e02 Check all overlaps when looking for used registers. 
A function using any RC alias is enough to enable the ExeDepsFix pass.

llvm-svn: 144636
 2011-11-15 08:20:43 +00:00
Jay Foad
e81b476d52 Make use of MachinePointerInfo::getFixedStack. 
llvm-svn: 144635
 2011-11-15 07:51:13 +00:00
Jay Foad
ce22ec7def Remove some unnecessary includes of PseudoSourceValue.h. 
llvm-svn: 144634
 2011-11-15 07:50:46 +00:00
Jay Foad
ebf2ec40e0 Fix typo in comment. 
llvm-svn: 144633
 2011-11-15 07:50:05 +00:00
Jay Foad
b4bb79247a Make use of MachinePointerInfo::getFixedStack. This removes all mention 
of PseudoSourceValue from lib/Target/.

llvm-svn: 144632
 2011-11-15 07:34:52 +00:00
Jay Foad
7d05fea7f8 Remove some unnecessary includes of PseudoSourceValue.h. 
llvm-svn: 144631
 2011-11-15 07:24:32 +00:00
Jakob Stoklund Olesen
606d4e999b Revert r144611 and r144613. 
These tests are actually correct, clang was miscompiling ExeDepsFix::processUses.

Evan fixed the miscompilation in r144628.

llvm-svn: 144630
 2011-11-15 07:13:03 +00:00
Craig Topper
320d3ef477 Fix PR11370 for real. Prevents converting 256-bit FP instruction to AVX2 256-bit integer instructions when AVX2 isn't enabled. 
llvm-svn: 144629
 2011-11-15 06:39:01 +00:00
Evan Cheng
40f68c968e Set SeenStore to true to prevent loads from being moved; also eliminates a non-deterministic behavior. 
llvm-svn: 144628
 2011-11-15 06:26:51 +00:00
Chandler Carruth
fdcba17bec Rather than trying to use the loop block sequence *or* the function 
block sequence when recovering from unanalyzable control flow
constructs, *always* use the function sequence. I'm not sure why I ever
went down the path of trying to use the loop sequence, it is
fundamentally not the correct sequence to use. We're trying to preserve
the incoming layout in the cases of unreasonable control flow, and that
is only encoded at the function level. We already have a filter to
select *exactly* the sub-set of blocks within the function that we're
trying to form into a chain.

The resulting code layout is also significantly better because of this.
In several places we were ending up with completely unreasonable control
flow constructs due to the ordering chosen by the loop structure for its
internal storage. This change removes a completely wasteful vector of
basic blocks, saving memory allocation in the common case even though it
costs us CPU in the fairly rare case of unnatural loops. Finally, it
fixes the latest crasher reduced out of GCC's single source. Thanks
again to Benjamin Kramer for the reduction, my bugpoint skills failed at
it.

llvm-svn: 144627
 2011-11-15 06:26:43 +00:00
Craig Topper
a584521daa Properly qualify AVX2 specific parts of execution dependency table. Also enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370. 
llvm-svn: 144622
 2011-11-15 05:55:35 +00:00
NAKAMURA Takumi
c26f35afea include/llvm/Support/Compiler.h: Invalidate LLVM_ATTRIBUTE_WEAK on cygming for now. 
It triggers generating insane executables with both binutils-2.19.1(msysgit) and 2.22.51.20111013(cygwin).

llvm-svn: 144621
 2011-11-15 05:24:26 +00:00
Jakob Stoklund Olesen
a0ceee932a Really fix test. 
llvm-svn: 144613
 2011-11-15 03:17:01 +00:00
Jakob Stoklund Olesen
a4ad7080ff Allow for depencendy-breaking instructions before cvt*. 
This should unbreak clang-x86_64-darwin10-RA, but I can't actually
reproduce the failure.

llvm-svn: 144611
 2011-11-15 02:29:48 +00:00
Evan Cheng
47d8f8af84 Add vmov.f32 to materialize f32 immediate splats which cannot be handled by 
integer variants. rdar://10437054

llvm-svn: 144608
 2011-11-15 02:12:34 +00:00
Jim Grosbach
2ac98a24aa ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions. 
rdar://10435076

llvm-svn: 144606
 2011-11-15 01:46:57 +00:00
Nick Lewycky
3858fb95b7 Move WEAK marking to the declaration. 
llvm-svn: 144603
 2011-11-15 01:23:22 +00:00