180112 Commits

Author SHA1 Message Date
Matt Arsenault
d7a136621f LoopLoadElim: Respect convergent
llvm-svn: 363162
2019-06-12 13:50:47 +00:00
Jeremy Morse
39ea14b833 [DebugInfo] Add a test that fell out of an earlier commit
r362951 was supposed to contain this test, however it didn't get committed
due to operator error. This was originally part of D59431.

llvm-svn: 363161
2019-06-12 13:41:56 +00:00
Matt Arsenault
5173fc6da9 LoopDistribute/LAA: Respect convergent
This case is slightly tricky, because loop distribution should be
allowed in some cases, and not others. As long as runtime dependency
checks don't need to be introduced, this should be OK. This is further
complicated by the fact that LoopDistribute partially ignores if LAA
says that vectorization is safe, and then does its own runtime pointer
legality checks.

Note this pass still does not handle noduplicate correctly, as this
should always be forbidden with it. I'm not going to bother trying to
fix it, as it would require more effort and I think noduplicate should
be removed.

https://reviews.llvm.org/D62607

llvm-svn: 363160
2019-06-12 13:34:19 +00:00
Nico Weber
c78f801842 gn build: Add Mips target
llvm-svn: 363159
2019-06-12 13:25:58 +00:00
Matt Arsenault
f5c69e04e3 LoopDistribute/LAA: Add tests to catch regressions
I broke 2 of these with a patch, but were not covered by existing
tests.

https://reviews.llvm.org/D63035

llvm-svn: 363158
2019-06-12 13:15:59 +00:00
Sam Parker
f620b44099 [NFC] Add HardwareLoops lit.local.cfg file
Set Transforms/HardwareLoops/ARM/ tests as unsupported if there isn't
an arm target.

llvm-svn: 363157
2019-06-12 12:54:19 +00:00
Sam Parker
b0ff7b3fbd Attempt to fix non-Arm buildbots
Adding REQUIRES: arm to failing tests

llvm-svn: 363156
2019-06-12 12:47:35 +00:00
Nico Weber
83d4b2da11 Fix a Wunused-lambda-capture warning.
The capture was added in the first commit of https://reviews.llvm.org/D61934
when it was used. In the reland, the use was removed but the capture
wasn't removed.

llvm-svn: 363155
2019-06-12 12:46:46 +00:00
Nico Weber
2b1c2395d2 gn build: add RISCV target
Patch from David L. Jones <dlj@google.com>, with minor tweaks by me.

Differential Revision: https://reviews.llvm.org/D61821

llvm-svn: 363154
2019-06-12 12:41:03 +00:00
Simon Pilgrim
79d89ca498 [X86][AVX] Tests showing missing concat(shuffle,shuffle) -> shuffle(concat) folds. NFCI.
llvm-svn: 363153
2019-06-12 12:40:03 +00:00
Nico Weber
9777aac7a0 gn build: Merge r363122
llvm-svn: 363152
2019-06-12 12:27:04 +00:00
Ben Dunbobbin
f8f5e41b40 [Legacy LTO] Fix build bots: r363140: Fix export name
llvm-svn: 363151
2019-06-12 12:17:49 +00:00
Sam Parker
498a300a6e [ARM] Implement TTI::isHardwareLoopProfitable
Implement the backend target hook to drive the HardwareLoops pass.
The low-overhead branch extension for Arm M-class cores is flexible
enough that we don't have to ensure correctness at this point, except
checking that the loop counter variable can be stored in LR - a
32-bit register. For it to be profitable, we want to avoid loops that
contain function calls, or any other instruction that alters the PC.
    
This implementation uses TargetLoweringInfo, to query type and
operation actions, looks at intrinsic calls and also performs some
manual checks for remainder/division and FP operations.
    
I think this should be a good base to start and extra details can be
filled out later.

Differential Revision: https://reviews.llvm.org/D62907

llvm-svn: 363149
2019-06-12 12:00:42 +00:00
Ayke van Laethem
0e2df1660a [bindings/go][NFC] Format code with go fmt
Run go fmt (version 1.12) over the Go bindings. This cleans up lots of
inconsistencies in the code, it does not change the code in a functional
way.

Differential Revision: https://reviews.llvm.org/D63057

llvm-svn: 363148
2019-06-12 11:59:09 +00:00
Sam Parker
3c77c139cf [NFC][SCEV] Add NoWrapFlag argument to InsertBinOp
'Use wrap flags in InsertBinop' (rL362687) was reverted due to
miscompiles. This patch introduces the previous change to pass
no-wrap flags but now only FlagAnyWrap is passed.

Differential Revision: https://reviews.llvm.org/D61934

llvm-svn: 363147
2019-06-12 11:53:55 +00:00
James Henderson
3023ed9850 [docs][llvm-symbolizer] Fix typo and grammar error
llvm-svn: 363145
2019-06-12 11:41:43 +00:00
Nico Weber
e9a0448218 Share /machine: handling code with llvm-cvtres too
r363016 let lld-link and llvm-lib share the /machine: parsing code.
This lets llvm-cvtres share it as well.

Making llvm-cvtres depend on llvm-lib seemed a bit strange (it doesn't
need llvm-lib's dependencies on BinaryFormat and BitReader) and I
couldn't find a good place to put this code. Since it's just a few
lines, put it in lib/Object for now.

Differential Revision: https://reviews.llvm.org/D63120

llvm-svn: 363144
2019-06-12 11:32:43 +00:00
Xing GUO
848f59e047 [DOC] Fix load instructions' syntax, function definition.
Summary: In this patch, I updated `load` instruction syntax and fixed function definition. Besides, I re-named some variables to make them obey SSA rule.

Reviewers: MaskRay

Reviewed By: MaskRay

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63186

llvm-svn: 363142
2019-06-12 11:24:22 +00:00
Simon Pilgrim
19f2a39cd4 [XCore] CombineSTORE - Use allowsMemoryAccess wrapper. NFCI.
Noticed in D63075 - there was a allowsMisalignedMemoryAccesses call to check for unaligned loads and a check for aligned legal type loads - which is exactly what allowsMemoryAccess does.

llvm-svn: 363141
2019-06-12 11:08:29 +00:00
Ben Dunbobbin
33ef399ccf [ThinLTO]LTO]Legacy] Fix dependent libraries support by adding querying of the IRSymtab
Dependent libraries support for the legacy api was committed in a
broken state (see: https://reviews.llvm.org/D60274). This was missed
due to the painful nature of having to integrate the changes into a
linker in order to test. This change implements support for dependent
libraries in the legacy LTO api:

- I have removed the current api function, which returns a single
string, and   added functions to access each dependent library
specifier individually.

- To reduce the testing pain, I have made the api functions as thin as
possible to   maximize coverage from llvm-lto.

- When doing ThinLTO the system linker will load the modules lazily
when scanning   the input files. Unfortunately, when modules are
lazily loaded there is no access   to module level named metadata. To
fix this I have added api functions that allow   querying the IRSymtab
for the dependent libraries. I hope to expand the api in the   future
so that, eventually, all the information needed by a client linker
during   scan can be retrieved from the IRSymtab.

Differential Revision: https://reviews.llvm.org/D62935

llvm-svn: 363140
2019-06-12 11:07:56 +00:00
James Henderson
9d4306679a [docs] Fix typo
llvm-svn: 363138
2019-06-12 10:48:33 +00:00
Simon Pilgrim
005170f5cd [XCore] LowerLOAD/LowerSTORE - Use allowsMemoryAccess wrapper. NFCI.
Noticed in D63075 - there was a allowsMisalignedMemoryAccesses call to check for unaligned loads and a check for aligned legal type loads - which is exactly what allowsMemoryAccess does.

llvm-svn: 363137
2019-06-12 10:46:50 +00:00
James Henderson
339634cc14 [llvm-nm] Fix docs and help text for --print-size
The --print-size help text and documentation claimed that the size was
printed instead of the address, but this is incorrect. It is printed as
well as the address. This patch fixes this issue.

Reviewed by: MaskRay, mtrent, ruiu

Differential Revision: https://reviews.llvm.org/D63142

llvm-svn: 363136
2019-06-12 10:44:41 +00:00
Orlando Cazalet-Hyams
36848c0d04 Revert "[DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop even after completion"
This reverts commit 1a0f7a2077b70c9864faa476e15b048686cf1ca7.
See phabricator thread for D60831.

llvm-svn: 363132
2019-06-12 08:34:51 +00:00
Dylan McKay
5892dcede7 [AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests
When these tests were originally written, the middle end would introduce
an unnecessary copy from r24:r23->GPR16->r24:r23, and these tests
mistakenly relied on it.

The most optimal codegen for the functions in the test cases before this patch
would be NOPs. This is because the first i16 argument always gets the same register
allocation as an i16 return value in the AVR calling convention.

These tests broke in r362963 when the codegen was improved and the
redundant copy was eliminated. After this, the test functions
were lowered to their optimal form - a 'ret' and nothing else.

This patch prepends an extra i16 operand to each of the test functions
so that a 16-bit copy must be inserted for the program to be correct.

llvm-svn: 363131
2019-06-12 08:31:07 +00:00
Sjoerd Meijer
8733a60c96 [AArch64] Merge globals when optimising for size
Extern global merging is good for code-size. There's definitely potential for
performance too, but there's one regression in a benchmark that needs
investigating, so that's why we enable it only when we optimise for size for
now.

Patch by Ramakota Reddy and Sjoerd Meijer.

Differential Revision: https://reviews.llvm.org/D61947

llvm-svn: 363130
2019-06-12 08:28:35 +00:00
Nikolai Kosjar
7dbf452627 gitignore: Ignore Qt Creator project configuration files. NFC
llvm-svn: 363129
2019-06-12 08:28:31 +00:00
Craig Topper
e4ce834ce9 [X86] Add VCMPSSZrr_Intk and VCMPSDZrr_Intk to isNonFoldablePartialRegisterLoad.
The non-masked versions are already in there. I'm having some
trouble coming up with a way to test this right now. Most load
folding should happen during isel so I'm not sure how to get
peephole pass to do it.

llvm-svn: 363125
2019-06-12 06:29:53 +00:00
Alex Bradbury
d474c37619 [RISCV] Fix inline-asm.ll test by adding nounwind attribute
This test failed since CFI directive support was added in r361320.

llvm-svn: 363123
2019-06-12 05:32:30 +00:00
Hsiangkai Wang
8937023816 [RISCV] Add CFI directives for RISCV prologue/epilog.
In order to generate correct debug frame information, it needs to
generate CFI information in prologue and epilog.

Differential Revision: https://reviews.llvm.org/D61773

llvm-svn: 363120
2019-06-12 03:04:22 +00:00
Hsiangkai Wang
8afec865a1 [NFC] Correct comments in RegisterCoalescer.
Differential Revision: https://reviews.llvm.org/D63124

llvm-svn: 363119
2019-06-12 02:58:04 +00:00
Kai Luo
79b2f06446 [PowerPC][NFC] Added test for sext/shl combination after isel.
llvm-svn: 363118
2019-06-12 02:45:27 +00:00
Cameron McInally
08e993ca7f [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll
X86/avx512vl-intrinsics-fast-isel.ll is only partially complete.

llvm-svn: 363114
2019-06-12 00:18:54 +00:00
Philip Reames
444a117ed7 Fix a bug in getSCEVAtScope w.r.t. non-canonical loops
The issue is that if we have a loop with multiple predecessors outside the loop, the code was expecting to merge them and only return if equal, but instead returned the first one seen.

I have no idea if this actually tripped anywhere.  I noticed it by accident when reading the code and have no idea how to go about constructing a test case.

llvm-svn: 363112
2019-06-11 23:21:24 +00:00
Philip Reames
931f560d47 Generalize icmp matching in IndVars' eliminateTrunc
We were only matching RHS being a loop invariant value, not the inverse. Since there's nothing which appears to canonicalize loop invariant values to RHS, this means we missed cases.

Differential Revision: https://reviews.llvm.org/D63112

llvm-svn: 363108
2019-06-11 22:43:25 +00:00
Sanjay Patel
9db50a3254 [Analysis] add isSplatValue() for vectors in IR
We have the related getSplatValue() already in IR (see code just above the proposed addition).
But sometimes we only need to know that the value is a splat rather than capture the splatted
scalar value. Also, we have an isSplatValue() function already in SDAG.

Motivation - recent bugs that would potentially benefit from improved splat analysis in IR:
https://bugs.llvm.org/show_bug.cgi?id=37428
https://bugs.llvm.org/show_bug.cgi?id=42174

Differential Revision: https://reviews.llvm.org/D63138

llvm-svn: 363106
2019-06-11 22:25:18 +00:00
Jinsong Ji
0ea02e1312 [PowerPC][NFC]Remove sms-simple.ll test temporarily.
Looks like a MachinePipeliner algorithm problem found by
sanitizer-x86_64-linux-fast.
I will backout this test first while investigating the problem to
unblock buildbot.

==49637==ERROR: AddressSanitizer: heap-buffer-overflow on address
0x614000002e08 at pc 0x000004364350 bp 0x7ffe228a3bd0 sp 0x7ffe228a3bc8
READ of size 4 at 0x614000002e08 thread T0
    #0 0x436434f in
llvm::SwingSchedulerDAG::checkValidNodeOrder(llvm::SmallVector<llvm::NodeSet,
8u> const&) const
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:3736:11
    #1 0x4342cd0 in llvm::SwingSchedulerDAG::schedule()
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:486:3
    #2 0x434042d in
llvm::MachinePipeliner::swingModuloScheduler(llvm::MachineLoop&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:385:7
    #3 0x433eb90 in
llvm::MachinePipeliner::runOnMachineFunction(llvm::MachineFunction&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:207:5
    #4 0x428b7ea in
llvm::MachineFunctionPass::runOnFunction(llvm::Function&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachineFunctionPass.cpp:73:13
    #5 0x4d1a913 in llvm::FPPassManager::runOnFunction(llvm::Function&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1648:27
    #6 0x4d1b192 in llvm::FPPassManager::runOnModule(llvm::Module&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1685:16
    #7 0x4d1c06d in runOnModule
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1752:27
    #8 0x4d1c06d in llvm::legacy::PassManagerImpl::run(llvm::Module&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1865
    #9 0xa48ca3 in compileModule(char**, llvm::LLVMContext&)
/b/sanitizer-x86_64-linux-fast/build/llvm/tools/llc/llc.cpp:611:8
    #10 0xa4270f in main
/b/sanitizer-x86_64-linux-fast/build/llvm/tools/llc/llc.cpp:365:22
    #11 0x7fec902572e0 in __libc_start_main
(/lib/x86_64-linux-gnu/libc.so.6+0x202e0)
    #12 0x971b69 in _start
(/b/sanitizer-x86_64-linux-fast/build/llvm_build_asan/bin/llc+0x971b69)

llvm-svn: 363105
2019-06-11 22:09:33 +00:00
Jordan Rupprecht
da23aa20fe [docs] Add "GNU binutils Replacements" section to command guide
Summary:
This splits out a section in the command guide for llvm tools that can be used as replacements for GNU tools. For pages that didn't exist, I added stub pages that can be individually filled in by followup patches.

Tested by running `ninja docs-llvm-html` and inspecting locally.

Reviewers: jhenderson, MaskRay, grimar, alexshap

Reviewed By: jhenderson, MaskRay, grimar

Subscribers: smeenai, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63014

llvm-svn: 363100
2019-06-11 21:13:01 +00:00
Amara Emerson
9b31bc723f [GlobalISel] Add a G_JUMP_TABLE opcode.
This opcode generates a pointer to the address of the jump table
specified by the source operand, which is a jump table index.

It will be used in conjunction with an upcoming G_BRJT opcode to support
jump table codegen with GlobalISel.

Differential Revision: https://reviews.llvm.org/D63111

llvm-svn: 363096
2019-06-11 19:58:06 +00:00
Alina Sbirlea
193da55f93 [MemorySSA] When applying updates, clean unnecessary Phis.
Summary: After applying a set of insert updates, there may be trivial Phis left over. Clean them up.

Reviewers: george.burgess.iv

Subscribers: jlebar, Prazek, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63033

llvm-svn: 363094
2019-06-11 19:09:34 +00:00
Cameron McInally
d484729fd7 [NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll
llvm-svn: 363093
2019-06-11 18:55:13 +00:00
Alina Sbirlea
536de2714e Only passes that preserve MemorySSA must mark it as preserved.
Summary:
The method `getLoopPassPreservedAnalyses` should not mark MemorySSA as
preserved, because it's being called in a lot of passes that do not
preserve MemorySSA.
Instead, mark the MemorySSA analysis as preserved by each pass that does
preserve it.
These changes only affect the new pass mananger.

Reviewers: chandlerc

Subscribers: mehdi_amini, jlebar, Prazek, george.burgess.iv, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62536

llvm-svn: 363091
2019-06-11 18:27:49 +00:00
Amy Huang
b00b579f45 Deduplicate S_CONSTANTs in LLD.
Summary: Deduplicate S_CONSTANTS when linking, if they have the same value.

Reviewers: rnk

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63151

llvm-svn: 363089
2019-06-11 18:02:39 +00:00
Jinsong Ji
983e632f04 [PowerPC] Enable MachinePipeliner for P9 with -ppc-enable-pipeliner
Implement necessary target hooks to enable MachinePipeliner for P9 only.
The pass is off by default, can be enabled with -ppc-enable-pipeliner for P9.

Differential Revision: https://reviews.llvm.org/D62164

llvm-svn: 363085
2019-06-11 17:40:39 +00:00
Cameron McInally
7a07bb1dad [NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll
llvm-svn: 363084
2019-06-11 17:05:36 +00:00
Jonas Devlieghere
6359609b7d [Path] Set FD to -1 in moved-from TempFile
When moving a temp file, explicitly set the file descriptor to -1 so we
can never accidentally close the moved-from TempFile.

Differential revision: https://reviews.llvm.org/D63087

llvm-svn: 363083
2019-06-11 16:42:42 +00:00
Cameron McInally
e131342efa [InstCombine] Handle -(X-Y) --> (Y-X) for unary fneg when NSZ
Differential Revision: https://reviews.llvm.org/D62612

llvm-svn: 363082
2019-06-11 16:21:21 +00:00
James Henderson
f743742a51 [docs][llvm-nm] Add darwin as --format option
llvm-svn: 363081
2019-06-11 15:58:10 +00:00
Cameron McInally
0b227e0180 [InstCombine] Update fptrunc (fneg x)) -> (fneg (fptrunc x) for unary FNeg
Differential Revision: https://reviews.llvm.org/D62629

llvm-svn: 363080
2019-06-11 15:45:41 +00:00
Sander de Smalen
2392666841 Fix docs build issue introduced by r363035
Replacing '.. code-block:: llvm' by '::' is a quick fix to the
build warning/error: Could not lex literal_block as "llvm".

llvm-svn: 363079
2019-06-11 15:28:13 +00:00