Andrew Lenharth
e14b9bfddf
add support for custom lowering SINT_TO_FP
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llvm-svn: 24531
2005-11-30 06:43:03 +00:00
Chris Lattner
50a5a428e3
Add a link to the doxygen tarball
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llvm-svn: 24530
2005-11-30 06:35:34 +00:00
Chris Lattner
87f3b29634
copy the doxygen tarball into the HTML directory after building it
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llvm-svn: 24529
2005-11-30 06:31:28 +00:00
Chris Lattner
7dfd25992c
minor cleanup
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llvm-svn: 24528
2005-11-30 05:26:03 +00:00
Reid Spencer
3bac59d2f0
Fix a problem with llvm-ranlib that (on some platforms) caused the archive
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file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.
Patch provided by Evan Jones
llvm-svn: 24527
2005-11-30 05:21:10 +00:00
Chris Lattner
fdc786b18f
Fix a bug in a recent patch that broke shifts
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llvm-svn: 24526
2005-11-30 05:11:18 +00:00
Evan Cheng
bc51bc83b6
Added support to STORE and shifts to DAG to DAG isel.
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llvm-svn: 24525
2005-11-30 02:51:20 +00:00
Evan Cheng
08ab45044b
Fixed a bug introduced by my last commit: TargetGlobalValues should key on
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GlobalValue * and index pair. Update getGlobalAddress() for symmetry.
llvm-svn: 24524
2005-11-30 02:49:21 +00:00
Evan Cheng
025dab1137
Added an index field to GlobalAddressSDNode so it can represent X+12, etc.
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llvm-svn: 24523
2005-11-30 02:04:11 +00:00
Evan Cheng
16b8b9d532
Fixed a minor bug: - -offset != offset iff offset == MININT
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llvm-svn: 24522
2005-11-30 01:59:00 +00:00
Nate Begeman
ebafe9c6d8
Represent the encoding of the SPR instructions as they actually are, so
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that we can use the correct SPR numbers in the InstrInfo.td file. This is
necessary to support VRsave.
llvm-svn: 24521
2005-11-29 22:42:50 +00:00
Evan Cheng
f412b7ba0c
Add more X86 ISel patterns.
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llvm-svn: 24520
2005-11-29 19:38:52 +00:00
Evan Cheng
5395a80640
Better error message when unrecognized opcode is seen.
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llvm-svn: 24519
2005-11-29 18:44:58 +00:00
Nate Begeman
9a781caa20
Hook up one type, v4f32, to the VR RegisterClass for now.
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llvm-svn: 24517
2005-11-29 08:17:20 +00:00
Nate Begeman
16a1c53abc
Add the remainder of the AltiVec 4 x float instructions. Further
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enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.
llvm-svn: 24516
2005-11-29 08:04:45 +00:00
Chris Lattner
22327b9d12
Add support for a new STRING and LOCATION node for line number support, patch
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contributed by Daniel Berlin, with a few cleanups here and there by me.
llvm-svn: 24515
2005-11-29 06:21:05 +00:00
Nate Begeman
e4d7c1b7dd
Add the new vector types to tablegen
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llvm-svn: 24514
2005-11-29 06:19:38 +00:00
Chris Lattner
47feb1ecbb
No targets support line number info yet.
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llvm-svn: 24513
2005-11-29 06:16:21 +00:00
Chris Lattner
f9ea6dbf66
Add support for a new STRING and LOCATION node for line number support, patch
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contributed by Daniel Berlin, with a few cleanups here and there by me.
llvm-svn: 24512
2005-11-29 06:15:39 +00:00
Nate Begeman
a1c2df2471
Add the majority of the vector machien value types we expect to support,
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and make a few changes to the legalization machinery to support more than
16 types.
llvm-svn: 24511
2005-11-29 05:45:29 +00:00
Evan Cheng
c23716c268
Fixed a comment bug:
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createPPCPatternInstructionSelector -> createPPCISelPattern
llvm-svn: 24510
2005-11-29 04:59:46 +00:00
Chris Lattner
93089e48a9
Add "SCC" to the lexicon. Patch provided by Marco Matthies, thanks!
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llvm-svn: 24509
2005-11-29 01:34:50 +00:00
Chris Lattner
8154ba119b
Fix PR670 and test/Regression/Transforms/Mem2Reg/2005-11-28-Crash.ll
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llvm-svn: 24508
2005-11-29 01:07:12 +00:00
Chris Lattner
10bc24c5b2
new testcase for pr670
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llvm-svn: 24507
2005-11-29 01:06:51 +00:00
Chris Lattner
d02532e2a2
add Evan and Jim. Please edit your entries as desired.
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llvm-svn: 24506
2005-11-29 00:57:06 +00:00
Chris Lattner
c90cd9e5e8
refix typo
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llvm-svn: 24505
2005-11-29 00:42:30 +00:00
Chris Lattner
2e375c1847
don't say this is i128, because it isn't yet. Hopefully nate will change
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this to be something sane, but in the mean time it is unused, so safe to
make something bogus.
llvm-svn: 24504
2005-11-29 00:41:40 +00:00
Chris Lattner
7bc9c0d389
revert my change for the time being, which broke the build
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llvm-svn: 24503
2005-11-29 00:24:08 +00:00
John Criswell
755971ee20
Fixed a punctuation error.
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llvm-svn: 24502
2005-11-28 23:25:41 +00:00
Chris Lattner
9e47c9a37a
fix a typo :)
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llvm-svn: 24501
2005-11-28 22:42:15 +00:00
Andrew Lenharth
1ffbe58972
a few more comments on the interfaces and functions
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llvm-svn: 24500
2005-11-28 18:10:59 +00:00
Andrew Lenharth
cad1d52b64
Added documented rsprofiler interface. Also remove new profiler passes, the
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old ones have been updated to implement the interface.
llvm-svn: 24499
2005-11-28 18:00:38 +00:00
John Criswell
6992d365bf
Add the remove() function from the C library.
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llvm-svn: 24498
2005-11-28 15:49:15 +00:00
Jeff Cohen
9c75e03471
Teach Visual Studio about new files.
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llvm-svn: 24497
2005-11-28 06:46:36 +00:00
Jeff Cohen
b171dee053
Fix VC++ warning.
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llvm-svn: 24496
2005-11-28 06:45:57 +00:00
Chris Lattner
0edc0fd222
Add a missed optimization
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llvm-svn: 24495
2005-11-28 04:52:39 +00:00
Chris Lattner
018d43db95
Use std:: where appropriate
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llvm-svn: 24494
2005-11-28 02:30:22 +00:00
Andrew Lenharth
311ec68cf4
Random sampling (aka Arnold and Ryder) profiling. This is still preliminary, but it works on spec on x86 and alpha. The idea is to allow profiling passes to remember what profiling they inserted, then a random sampling framework is inserted which consists of duplicated basic blocks (without profiling), such that at each backedge in the program and entry into every function, the framework chooses whether to use the instrumented code or the instrumentation free code. The goal of such a framework is to make it reasonably cheap to do random sampling of very expensive profiling products (such as load-value profiling).
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The code is organized into 3 parts (2 passes)
1) a linked set of profiling passes, which implement an analysis group (linked, like alias analysis are). These insert profiling into the program, and remember what they inserted, so that at a later time they can be queried about any instruction.
2) a pass that handles inserting the random sampling framework. This also has options to control how random samples are choosen. Currently implemented are Global counters, register allocated global counters, and read cycle counter (see? there was a reason for it).
The profiling passes are almost identical to the existing ones (block, function, and null profiling is supported right now), and they are valid passes without the sampling framework (hence the existing passes can be unified with the new ones, not done yet).
Some things are a bit ugly still, but that should be fixed up soon enough.
Other todo? making the counter values not "magic 2^16 -1" values, but dynamically choosable.
llvm-svn: 24493
2005-11-28 00:58:09 +00:00
Nate Begeman
84cac055ad
Small tweaks noticed while on the plane.
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llvm-svn: 24492
2005-11-26 22:39:34 +00:00
Andrew Lenharth
2700c92469
since reg2mem requires it, might as well mention that it preserves it
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llvm-svn: 24491
2005-11-25 16:04:54 +00:00
Duraid Madina
9c2283e7c7
add support for dynamic_stackalloc to the dag isel (thanks andrew ;)
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next up: support argument passing in memory, not just registers
llvm-svn: 24490
2005-11-25 07:49:25 +00:00
Nate Begeman
687456dd7a
Some first bits of AltiVec stuff: Instruction Formats, Encodings, and
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Registers. Apologies to Jim if the scheduling info so far isn't accurate.
There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.
llvm-svn: 24489
2005-11-23 05:29:52 +00:00
Andrew Lenharth
79ee761b69
Reg2Mem is something a pass may depend on, so allow that
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llvm-svn: 24488
2005-11-22 22:14:23 +00:00
Andrew Lenharth
939cd99914
turns out, demotion and invokes and critical edges don't mix
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llvm-svn: 24487
2005-11-22 21:45:19 +00:00
Andrew Lenharth
8b7596a557
Fix warning, the better way. Really, this is what this instruction is for, so use it
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llvm-svn: 24486
2005-11-22 20:59:00 +00:00
Andrew Lenharth
5de23ee89a
Fix warning
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llvm-svn: 24485
2005-11-22 20:56:05 +00:00
Nate Begeman
a90bb6d9b1
Check in code to scalarize arbitrarily wide packed types for some simple
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vector operations (load, add, sub, mul).
This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
on ppc as:
_foo:
lfs f0, 12(r3)
lfs f1, 8(r3)
lfs f2, 4(r3)
lfs f3, 0(r3)
fadds f0, f0, f0
fadds f1, f1, f1
fadds f2, f2, f2
fadds f3, f3, f3
stfs f0, 12(r3)
stfs f1, 8(r3)
stfs f2, 4(r3)
stfs f3, 0(r3)
blr
llvm-svn: 24484
2005-11-22 18:16:00 +00:00
Andrew Lenharth
33e8022557
massive DAGISel patch. lots and lots more stuff compiles now
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llvm-svn: 24483
2005-11-22 04:20:06 +00:00
Nate Begeman
d2f6fcf327
Rather than attempting to legalize 1 x float, make sure the SD ISel never
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generates it. Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.
The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.
llvm-svn: 24482
2005-11-22 01:29:36 +00:00
Chris Lattner
3efe6171f1
Use HasDotTypeDotSizeDirective instead of forELF
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llvm-svn: 24481
2005-11-21 23:06:54 +00:00