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5663 Commits

Author SHA1 Message Date
Chris Lattner
e7c638e989 Correctly add an array marker on a node when appropriate! 
llvm-svn: 12055
 2004-03-01 19:02:54 +00:00
Misha Brukman
f93e6ab769 * Add implementation of ExtractBasicBlock() 
* Add comments to ExtractLoop()

llvm-svn: 12053
 2004-03-01 18:28:34 +00:00
Chris Lattner
4d192a2674 Add this back, as its absence introduces assertions, and it seems to work now 
that Instructions are annotable again

llvm-svn: 12045
 2004-03-01 15:28:27 +00:00
Tanya Lattner
b22016f21b fix bug in previous checkin 
llvm-svn: 12044
 2004-03-01 15:05:17 +00:00
Brian Gaeke
b78f8498f0 TargetCacheInfo has been removed; its only uses were to propagate a constant 
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.

llvm-svn: 12043
 2004-03-01 06:43:29 +00:00
Tanya Lattner
27c08f11bf Adding new Modulo Scheduling graph files. 
llvm-svn: 12031
 2004-03-01 02:50:57 +00:00
Tanya Lattner
55de04447c Removing old graph files with new graph files that I wrote. Updated ModuloScheduling pass, but still in progress. 
llvm-svn: 12030
 2004-03-01 02:50:01 +00:00
Chris Lattner
9bf85f216b Expand on my note-to-self 
llvm-svn: 12029
 2004-03-01 02:44:44 +00:00
Chris Lattner
8c1d67b55f Handle passing constant integers to functions much more efficiently. Instead 
of generating this code:

        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        call Y

we now generate:
        mov DWORD PTR [%ESP], 4
        mov DWORD PTR [%ESP + 4], 123
        call Y

Which hurts the eyes less.  :)

Considering that register pressure around call sites is already high (with all
of the callee clobber registers n stuff), this may help a lot.

llvm-svn: 12028
 2004-03-01 02:42:43 +00:00
Chris Lattner
c686a9ab37 Fix a minor code-quality issue. When passing 8 and 16-bit integer constants 
to function calls, we would emit dead code, like this:

int Y(int, short, double);
int X() {
  Y(4, 123, 4);
}

--- Old
X:
        sub %ESP, 20
        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
***     mov %AX, 123
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        fld QWORD PTR [.CPIX_0]
        fstp QWORD PTR [%ESP + 8]
        call Y
        mov %EAX, 0
        # IMPLICIT_USE %EAX %ESP
        add %ESP, 20
        ret

Now we emit:
X:
        sub %ESP, 20
        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        fld QWORD PTR [.CPIX_0]
        fstp QWORD PTR [%ESP + 8]
        call Y
        mov %EAX, 0
        # IMPLICIT_USE %EAX %ESP
        add %ESP, 20
        ret

Next up, eliminate the mov AX and movsx entirely!

llvm-svn: 12026
 2004-03-01 02:34:08 +00:00
Chris Lattner
2749c25a5c Disable tail duplication in a case that breaks on Olden/tsp 
llvm-svn: 12021
 2004-03-01 01:12:13 +00:00
Misha Brukman
848c759b41 * Remove function to find "main" in a Module, there's a method for that 
* Removing extraneous empty space and empty comment lines

llvm-svn: 12014
 2004-02-29 23:09:10 +00:00
Chris Lattner
6728dfdfe8 Fix -debug-pass=Executions, which relied on Function, Module, and BasicBlock 
being annotable

llvm-svn: 12013
 2004-02-29 22:37:04 +00:00
Chris Lattner
9736130083 Fix bug: test/Regression/Transforms/LowerInvoke/2004-02-29-PHICrash.llx 
... which tickled the lowerinvoke pass because it used the BCE routines.

llvm-svn: 12012
 2004-02-29 22:24:41 +00:00
Chris Lattner
33b5dd0463 Add an assert 
llvm-svn: 12010
 2004-02-29 22:01:51 +00:00
Chris Lattner
37418d74a1 Add back #include I messed up 
llvm-svn: 12009
 2004-02-29 21:40:53 +00:00
Chris Lattner
b82a16f3a5 Urg, forgot to check this in. 
llvm-svn: 12007
 2004-02-29 21:03:08 +00:00
Chris Lattner
4c7ed6793e Remove public header. It's been moved to lib/Target/SparcV9 
llvm-svn: 12004
 2004-02-29 19:13:20 +00:00
Chris Lattner
fe38629411 Move the private MachineInstrAnnot.h into a private directory. 
llvm-svn: 12003
 2004-02-29 19:12:51 +00:00
Chris Lattner
b73a182845 Remove use of an ugly header 
llvm-svn: 12002
 2004-02-29 19:04:31 +00:00
Chris Lattner
0acd73e11f Move methods out of .h file 
llvm-svn: 12001
 2004-02-29 19:02:39 +00:00
Alkis Evlogimenos
e186d8eb2f Add instruction name description. 
llvm-svn: 11998
 2004-02-29 18:44:03 +00:00
Alkis Evlogimenos
8d8f872b3d Use correct template for SHLD and SHRD instructions so that the memory 
operand size is correctly specified.

llvm-svn: 11997
 2004-02-29 09:19:40 +00:00
Alkis Evlogimenos
10f4523e9a Improve allocation order: 
1) For 8-bit registers try to use first the ones that are parts of the
   same register (AL then AH). This way we only alias 2 16/32-bit
   registers after allocating 4 8-bit variables.

2) Move EBX as the last register to allocate. This will cause less
   spills to happen since we will have 8-bit registers available up to
   register excaustion (assuming we use the allocation order). It
   would be nice if we could push all of the 8-bit aliased registers
   towards the end but we much prefer to keep callee saved register to
   the end to avoid saving them on entry and exit of the function.

For example this gives a slight reduction of spills with linear scan
on 164.gzip.

Before:

11221 asm-printer           - Number of machine instrs printed
  975 spiller               - Number of loads added
  675 spiller               - Number of stores added
  398 spiller               - Number of register spills

After:

11182 asm-printer           - Number of machine instrs printed
  952 spiller               - Number of loads added
  652 spiller               - Number of stores added
  386 spiller               - Number of register spills

llvm-svn: 11996
 2004-02-29 09:17:01 +00:00
Alkis Evlogimenos
7ecfe0a839 A big X86 instruction rename. The instructions are renamed to make 
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory

llvm-svn: 11995
 2004-02-29 08:50:03 +00:00
Brian Gaeke
8303cb575e Remove dead member variables of SparcV9SchedInfo and TargetSchedInfo 
llvm-svn: 11994
 2004-02-29 08:40:03 +00:00
Chris Lattner
a7db4ff17a Eliminate the X86-specific BMI functions, using BuildMI instead. 
Replace uses of addZImm with addImm.

llvm-svn: 11992
 2004-02-29 07:22:16 +00:00
Chris Lattner
e8e0bafbba Fix a miscompilation of 197.parser that occurs when you have single basic 
block loops.

llvm-svn: 11990
 2004-02-29 07:10:16 +00:00
Chris Lattner
bcc0df60ef Fix PR255: [tailduplication] Single basic block loops are very rare 
Note that this is a band-aid put over a band-aid.  This just undisables
tail duplication in on very specific case that it seems to work in.

llvm-svn: 11989
 2004-02-29 06:41:20 +00:00
Chris Lattner
c2977ac665 Adjust to change in TII ctor arguments 
llvm-svn: 11987
 2004-02-29 06:31:44 +00:00
Chris Lattner
b5f0e162c7 Eliminate the distinction between "real" and "unreal" instructions 
llvm-svn: 11986
 2004-02-29 06:31:16 +00:00
Chris Lattner
cfc8f02250 These two virtual methods are never called. 
llvm-svn: 11984
 2004-02-29 05:59:33 +00:00
Chris Lattner
dd752eec34 Remove a TON of flags that noone cares about 
llvm-svn: 11983
 2004-02-29 05:58:30 +00:00
Chris Lattner
d80ff1bdc0 Noone calls these virtual methods 
llvm-svn: 11982
 2004-02-29 05:58:16 +00:00
Chris Lattner
dded7ad224 This is the only file in the system that uses this enum. eliminate it. 
llvm-svn: 11981
 2004-02-29 05:57:59 +00:00
Chris Lattner
7cb71a20ca Implement initial prolog/epilog code insertion methods. 
llvm-svn: 11979
 2004-02-29 05:18:30 +00:00
Chris Lattner
8b7ac81d2e int64_t -> int 
llvm-svn: 11977
 2004-02-29 05:07:02 +00:00
Alkis Evlogimenos
0f96b44e0e Use correct template for ADC instruction with memory operands. 
llvm-svn: 11974
 2004-02-29 02:18:17 +00:00
Chris Lattner
800f720e7b Add an instruction selector capable of selecting 'ret void' 
llvm-svn: 11973
 2004-02-29 00:27:00 +00:00
Alkis Evlogimenos
6815402082 SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them 
to denote this fact.

llvm-svn: 11972
 2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
e8dac99a43 Floating point loads/stores act on memory operands. Rename them to 
denote this fact.

llvm-svn: 11971
 2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
1d71a15be9 Rename instruction templates to be easier to the human eye to 
parse. The name is now I (operand size)*. For example:

Im32 -> instruction with 32-bit memory operands.

Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
          operands.

llvm-svn: 11970
 2004-02-28 23:09:03 +00:00
Alkis Evlogimenos
6038a89025 Uncomment instructions that take both an immediate and a memory 
operand but their sizes differ.

llvm-svn: 11969
 2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
f208a0fd81 Each instruction now has both an ImmType and a MemType. This describes 
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).

llvm-svn: 11967
 2004-02-28 22:02:05 +00:00
Brian Gaeke
d551a8b5fe Fix typo in comment 
llvm-svn: 11966
 2004-02-28 21:55:18 +00:00
Chris Lattner
a854ddd528 Implement switch->br and br->switch folding by ripping out the switch->switch 
and br->br code and generalizing it.  This allows us to compile code like this:

int test(Instruction *I) {
  if (isa<CastInst>(I))
    return foo(7);
  else if (isa<BranchInst>(I))
    return foo(123);
  else if (isa<UnwindInst>(I))
    return foo(1241);
  else if (isa<SetCondInst>(I))
    return foo(1);
  else if (isa<VAArgInst>(I))
    return foo(42);
  return foo(-1);
}

into:

int %_Z4testPN4llvm11InstructionE("struct.llvm::Instruction"* %I) {
entry:
        %tmp.1.i.i.i.i.i.i.i = getelementptr "struct.llvm::Instruction"* %I, long 0, ubyte 4            ; <uint*> [#uses=1]
        %tmp.2.i.i.i.i.i.i.i = load uint* %tmp.1.i.i.i.i.i.i.i          ; <uint> [#uses=2]
        %tmp.2.i.i.i.i.i.i = seteq uint %tmp.2.i.i.i.i.i.i.i, 27                ; <bool> [#uses=0]
        switch uint %tmp.2.i.i.i.i.i.i.i, label %endif.0 [
                 uint 27, label %then.0
                 uint 2, label %then.1
                 uint 5, label %then.2
                 uint 14, label %then.3
                 uint 15, label %then.3
                 uint 16, label %then.3
                 uint 17, label %then.3
                 uint 18, label %then.3
                 uint 19, label %then.3
                 uint 32, label %then.4
        ]
...

As well as handling the cases in 176.gcc and many other programs more effectively.

llvm-svn: 11964
 2004-02-28 21:28:10 +00:00
Chris Lattner
3583890ab7 Change this so that LLC actually tries to run the code generator, though it will 
immediately abort due to lack of an instruction selector. :)

llvm-svn: 11963
 2004-02-28 20:21:45 +00:00
Chris Lattner
529a354ea4 SparcV8 now builds. 
llvm-svn: 11960
 2004-02-28 19:54:00 +00:00
Chris Lattner
5effdb67b7 fine grainify namespacification 
llvm-svn: 11959
 2004-02-28 19:53:18 +00:00
Chris Lattner
3852b0c3b8 Finegrainify namespacification 
llvm-svn: 11958
 2004-02-28 19:52:49 +00:00