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cconv
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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compactbranches
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Summary:
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2016-04-14 13:43:17 +00:00 |
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Fast-ISel
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fix CHECK_DAG -> CHECK-DAG
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2016-03-28 22:00:38 +00:00 |
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llvm-ir
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Summary:
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2016-04-14 13:43:17 +00:00 |
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mips32r6
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[mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6
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2014-05-09 09:46:21 +00:00 |
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mips64r6
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[mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6
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2014-05-09 09:46:21 +00:00 |
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msa
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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2008-06-05-Carry.ll
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2008-07-03-SRet.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
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2015-02-27 19:29:02 +00:00 |
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2008-07-06-fadd64.ll
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2008-07-07-Float2Int.ll
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2008-07-07-FPExtend.ll
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2008-07-07-IntDoubleConvertions.ll
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2008-07-15-InternalConstant.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
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2015-03-13 18:20:45 +00:00 |
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2008-07-15-SmallSection.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
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2015-03-13 18:20:45 +00:00 |
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2008-07-16-SignExtInReg.ll
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2008-07-22-Cstpool.ll
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2008-07-23-fpcmp.ll
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2008-07-29-icmp.ll
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2008-07-31-fcopysign.ll
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2008-08-01-AsmInline.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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2008-08-03-fabs64.ll
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2008-08-03-ReturnDouble.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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2008-08-04-Bitconvert.ll
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2008-08-06-Alloca.ll
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2008-08-07-CC.ll
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2008-08-07-FPRound.ll
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2008-08-08-bswap.ll
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2008-08-08-ctlz.ll
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2008-10-13-LegalizerBug.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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2008-11-10-xint_to_fp.ll
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Now that we have a soft-float attribute, use it instead of the
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2015-05-08 00:57:22 +00:00 |
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2009-11-16-CstPoolLoad.ll
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Move the Mips target to storing the ABI in the TargetMachine rather
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2015-01-26 17:33:46 +00:00 |
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2010-07-20-Switch.ll
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[MC] Use .p2align instead of .align
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2016-01-26 00:03:25 +00:00 |
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2010-11-09-CountLeading.ll
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2010-11-09-Mul.ll
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2011-05-26-BranchKillsVreg.ll
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2012-12-12-ExpandMemcpy.ll
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Revert "Change memcpy/memset/memmove to have dest and source alignments."
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2015-11-19 05:56:52 +00:00 |
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2013-11-18-fp64-const0.ll
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[mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64
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2014-06-12 11:55:58 +00:00 |
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abicalls.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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abiflags32.ll
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Move the Mips target to storing the ABI in the TargetMachine rather
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2015-01-26 17:33:46 +00:00 |
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abiflags-xx.ll
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[mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI is
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2014-07-14 09:40:29 +00:00 |
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addc.ll
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addi.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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addressing-mode.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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adjust-callstack-sp.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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align16.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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alloca16.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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alloca.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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analyzebranch.ll
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[mips] MIPS32R6 compact branch support
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2016-03-14 16:24:05 +00:00 |
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and1.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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asm-large-immediate.ll
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[mips][ias] Explicitly disable IAS on asm-large-immediate.ll.
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2015-11-13 13:02:31 +00:00 |
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assertzext-trunc.ll
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[mips] Sign-extend i32 values truncated from previously zero-extended i32 values.
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2016-04-13 15:07:45 +00:00 |
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atomic.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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atomicCmpSwapPW.ll
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[mips] Fix emitAtomicCmpSwapPartword to handle 64 bit pointers correctly
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2016-04-13 16:02:25 +00:00 |
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atomicops.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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beqzc1.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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beqzc.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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biggot.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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blez_bgez.ll
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Revert "[mips] Promote the result of SETCC nodes to GPR width."
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2016-03-01 20:25:43 +00:00 |
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blockaddr.ll
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Revert r237789 - [mips] The naming convention for private labels is ABI dependant.
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2015-05-20 14:18:59 +00:00 |
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br-jmp.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brconeq.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brconeqk.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brconeqz.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brconge.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brcongt.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brconle.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brconlt.ll
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[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
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2016-04-22 11:18:40 +00:00 |
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brconne.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brconnek.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brconnez.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brdelayslot.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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brind.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brsize3.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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brsize3a.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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bswap.ll
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[mips] Promote i32 arguments to i64 for the N32/N64 ABI and fix <64-bit structs...
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2014-11-07 16:54:21 +00:00 |
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buildpairextractelementf64.ll
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[mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64 moves
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2014-07-14 12:41:31 +00:00 |
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cache-intrinsic.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
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call-optimization.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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cannot-copy-registers.ll
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[mips][microMIPS] Fix for "Cannot copy registers" assertion
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2016-04-13 06:17:21 +00:00 |
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cfi_offset.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
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check-adde-redundant-moves.ll
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[mips] Account for constant-zero operands in ADDE nodes.
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2015-02-27 09:01:39 +00:00 |
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check-noat.ll
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ci2.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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cmov.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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cmplarge.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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const1.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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const4a.ll
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[MC] Use .p2align instead of .align
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2016-01-26 00:03:25 +00:00 |
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const6.ll
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[MC] Use .p2align instead of .align
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2016-01-26 00:03:25 +00:00 |
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const6a.ll
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[MC] Use .p2align instead of .align
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2016-01-26 00:03:25 +00:00 |
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const-mult.ll
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[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
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2016-04-19 23:51:52 +00:00 |
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constantfp0.ll
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countleading.ll
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Revert "[mips] Promote the result of SETCC nodes to GPR width."
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2016-03-01 20:25:43 +00:00 |
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cprestore.ll
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ctlz-v.ll
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[mips] Promote i32 arguments to i64 for the N32/N64 ABI and fix <64-bit structs...
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2014-11-07 16:54:21 +00:00 |
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ctlz.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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cttz-v.ll
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[mips] Promote i32 arguments to i64 for the N32/N64 ABI and fix <64-bit structs...
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2014-11-07 16:54:21 +00:00 |
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dagcombine_crash.ll
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Use FileCheck for test
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2015-04-13 18:47:19 +00:00 |
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DbgValueOtherTargets.test
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delay-slot-fill-forward.ll
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[mips] Do not place users of $ra in the delay slot of call instructions.
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2015-05-14 13:17:56 +00:00 |
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delay-slot-kill.ll
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Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions.
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2015-08-04 14:26:35 +00:00 |
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disable-tail-merge.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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div_rem.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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div.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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divrem.ll
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[mips] Sign-extend i32 values truncated from previously zero-extended i32 values.
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2016-04-13 15:07:45 +00:00 |
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divu_remu.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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divu.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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double2int.ll
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dsp-patterns-cmp-vselect.ll
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dsp-patterns.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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dsp-r1.ll
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[mips][mips64r6] madd/maddu/msub/msubu are not available on MIPS32r6/MIPS64r6
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2014-06-12 10:54:16 +00:00 |
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dsp-r2.ll
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dsp-vec-load-store.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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dynamic-stack-realignment.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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eh-dwarf-cfa.ll
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eh-return32.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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eh-return64.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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eh.ll
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Enhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInst
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2015-12-21 22:00:51 +00:00 |
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ehframe-indirect.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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elf_eflags.ll
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emergency-spill-slot-near-fp.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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emit-big-cst.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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emutls_generic.ll
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[MC] Use .p2align instead of .align
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2016-01-26 00:03:25 +00:00 |
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ex2.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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extins.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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f16abs.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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fabs.ll
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fastcc.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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fcmp.ll
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[mips] MIPS32R6 compact branch support
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2016-03-14 16:24:05 +00:00 |
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fcopysign-f32-f64.ll
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[mips] Do not use SLL for ANY_EXTEND nodes as the high bits are undefined.
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2016-02-29 15:58:12 +00:00 |
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fcopysign.ll
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[mips] Make isel select the correct DEXT variant up front.
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2016-02-29 15:26:54 +00:00 |
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fixdfsf.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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fmadd1.ll
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[MIPS]Multiple and add instructions for Mips are currently available in mips32r2/mips64r2 and later but should also be available in mips4, mips5, and mips64. This patch fixes the requested features and updates the corresponding test files.
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2015-02-25 15:24:37 +00:00 |
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fneg.ll
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fp16-promote.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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fp16instrinsmc.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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fp16mix.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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fp16static.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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fp64a.ll
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[mips] Account for endianess when expanding BuildPairF64/ExtractElementF64 nodes.
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2014-10-16 15:41:51 +00:00 |
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fp-indexed-ls.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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fp-spill-reload.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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fpbr.ll
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[mips] Make Static a default relocation model for MIPS codegen
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2016-04-11 15:24:23 +00:00 |
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fpneeded.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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fpnotneeded.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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fpxx.ll
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Move the Mips target to storing the ABI in the TargetMachine rather
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2015-01-26 17:33:46 +00:00 |
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frame-address.ll
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frem.ll
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global-address.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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global-pointer-reg.ll
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gpreg-lazy-binding.ll
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[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
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gprestore.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
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helloworld.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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hf1_body.ll
|
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC.
|
2015-10-21 12:44:14 +00:00 |
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hf16_1.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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hf16call32_body.ll
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[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC.
|
2015-10-21 12:44:14 +00:00 |
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hf16call32.ll
|
[mips][ias] Accept $31 or $ra in hf16call32.ll. IAS prints the latter.
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2015-11-16 14:16:45 +00:00 |
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hfptrcall.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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i32k.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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i64arg.ll
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[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
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imm.ll
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indirectcall.ll
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init-array.ll
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Replace -use-init-array with -use-ctors.
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2014-09-02 13:54:53 +00:00 |
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inlineasm64.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
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inlineasm_constraint_m.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
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inlineasm_constraint_R.ll
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[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
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inlineasm_constraint_ZC.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
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inlineasm_constraint.ll
|
[mips][ias] Explicitly disable IAS on tests that depend on not assembling.
|
2015-11-26 11:23:03 +00:00 |
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inlineasm-assembler-directives.ll
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[mips][ias] Replace invalid assembly insn in test since IAS parses inline assembly.
|
2015-11-13 11:44:00 +00:00 |
|
inlineasm-cnstrnt-bad-I-1.ll
|
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
|
2014-05-22 11:46:58 +00:00 |
|
inlineasm-cnstrnt-bad-J.ll
|
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
|
2014-05-22 11:46:58 +00:00 |
|
inlineasm-cnstrnt-bad-K.ll
|
|
|
|
inlineasm-cnstrnt-bad-L.ll
|
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
|
2014-05-22 11:46:58 +00:00 |
|
inlineasm-cnstrnt-bad-N.ll
|
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
|
2014-05-22 11:46:58 +00:00 |
|
inlineasm-cnstrnt-bad-O.ll
|
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
|
2014-05-22 11:46:58 +00:00 |
|
inlineasm-cnstrnt-bad-P.ll
|
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
|
2014-05-22 11:46:58 +00:00 |
|
inlineasm-cnstrnt-reg64.ll
|
[mips][ias] Allow whitespace after commas in inlineasm*.ll tests.
|
2015-11-16 14:14:59 +00:00 |
|
inlineasm-cnstrnt-reg.ll
|
[mips][ias] Allow whitespace after commas in inlineasm*.ll tests.
|
2015-11-16 14:14:59 +00:00 |
|
inlineasm-operand-code.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
inlineasmmemop.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
insn-zero-size-bb.ll
|
Enhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInst
|
2015-12-21 22:00:51 +00:00 |
|
int-to-float-conversion.ll
|
|
|
|
internalfunc.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
interrupt-attr-64-error.ll
|
[mips] Check for the correct error message in tests for interrupt attributes.
|
2015-10-26 14:24:30 +00:00 |
|
interrupt-attr-args-error.ll
|
[mips] Check for the correct error message in tests for interrupt attributes.
|
2015-10-26 14:24:30 +00:00 |
|
interrupt-attr-error.ll
|
[mips] Check for the correct error message in tests for interrupt attributes.
|
2015-10-26 14:24:30 +00:00 |
|
interrupt-attr.ll
|
[mips] Interrupt attribute support for mips32r2+.
|
2015-10-26 12:38:43 +00:00 |
|
jtstat.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
l3mc.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
largeimm1.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
largeimmprinting.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
lazy-binding.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
lb1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
lbu1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
lcb2.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
lcb3c.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
lcb4a.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
lcb5.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
|
lh1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
lhu1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
lit.local.cfg
|
Reduce verbiage of lit.local.cfg files
|
2014-06-09 22:42:55 +00:00 |
|
llcarry.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
load-store-left-right.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
longbranch.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
lw16-base-reg.ll
|
[mips][microMIPS] Fix for "Cannot copy registers" assertion
|
2016-04-13 06:17:21 +00:00 |
|
machineverifier.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
madd-msub.ll
|
[mips] Correct operand order in DSP's mthi/mtlo
|
2016-01-12 15:15:14 +00:00 |
|
mature-mc-support.ll
|
|
|
|
mbrsize4a.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
memcpy.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
micromips-addiu.ll
|
[mips][microMIPS] Revert commits r264245 and r264248.
|
2016-04-02 23:06:13 +00:00 |
|
micromips-addu16.ll
|
[mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator
|
2015-03-04 15:47:42 +00:00 |
|
micromips-and16.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
micromips-andi.ll
|
[mips][microMIPS] Revert commits r264245 and r264248.
|
2016-04-02 23:06:13 +00:00 |
|
micromips-atomic1.ll
|
Revert r265817
|
2016-04-08 18:15:37 +00:00 |
|
micromips-atomic.ll
|
[mips][microMIPS] This patch implements functionality in MIPS delay slot
|
2014-11-21 22:04:35 +00:00 |
|
micromips-compact-branches.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
micromips-compact-jump.ll
|
[mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRC
|
2015-02-13 17:51:27 +00:00 |
|
micromips-delay-slot-jr.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
|
2015-03-13 18:20:45 +00:00 |
|
micromips-delay-slot.ll
|
[mips][microMIPS] Delay slot filler modifications
|
2016-03-23 10:29:38 +00:00 |
|
micromips-directives.ll
|
|
|
|
micromips-gp-rc.ll
|
[mips][microMIPS] Revert commits r264245 and r264248.
|
2016-04-02 23:06:13 +00:00 |
|
micromips-jal.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
micromips-li.ll
|
[mips][microMIPS] Implement CodeGen support for LI16 instruction.
|
2014-12-11 13:56:23 +00:00 |
|
micromips-load-effective-address.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
micromips-not16.ll
|
[mips][microMIPS] Make usage of NOT16 by code generator
|
2015-03-11 20:28:31 +00:00 |
|
micromips-or16.ll
|
[mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated.
|
2016-03-04 17:34:31 +00:00 |
|
micromips-rdhwr-directives.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
micromips-shift.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
micromips-subu16.ll
|
[mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator
|
2015-03-04 15:47:42 +00:00 |
|
micromips-sw-lw-16.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
micromips-xor16.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
mips16_32_1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16_32_3.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16_32_4.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16_32_5.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16_32_6.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16_32_7.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16_32_8.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
|
mips16_32_9.ll
|
|
|
|
mips16_32_10.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16_fpret.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16-hf-attr-2.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16-hf-attr.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16ex.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips16fpe.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mips64-f128-call.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
mips64-f128.ll
|
Summary:
|
2016-04-14 13:43:17 +00:00 |
|
mips64-libcall.ll
|
Now that we have a soft-float attribute, use it instead of the
|
2015-05-08 00:57:22 +00:00 |
|
mips64-sret.ll
|
Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes.
|
2015-02-26 12:29:48 +00:00 |
|
mips64directive.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
mips64ext.ll
|
Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes.
|
2015-02-26 12:29:48 +00:00 |
|
mips64extins.ll
|
[mips] Make isel select the correct DEXT variant up front.
|
2016-02-29 15:26:54 +00:00 |
|
mips64fpimm0.ll
|
Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes.
|
2015-02-26 12:29:48 +00:00 |
|
mips64fpldst.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
mips64imm.ll
|
|
|
|
mips64instrs.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
mips64intldst.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
mips64lea.ll
|
|
|
|
mips64muldiv.ll
|
[mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, ddiv, divu, ddivu for MIPS32r6/MIPS64.
|
2014-06-12 10:44:10 +00:00 |
|
mips64shift.ll
|
[mips] Optimize code generation for 64-bit variable shift instructions.
|
2015-04-21 10:49:03 +00:00 |
|
mips64signextendsesf.ll
|
Now that we have a soft-float attribute, use it instead of the
|
2015-05-08 00:57:22 +00:00 |
|
mips64sinttofpsf.ll
|
Now that we have a soft-float attribute, use it instead of the
|
2015-05-08 00:57:22 +00:00 |
|
mips-shf-gprel.s
|
[MC][ELF] Handle MIPS specific .sdata and .sbss directives
|
2016-02-11 06:45:54 +00:00 |
|
mipslopat.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
misha.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mno-ldc1-sdc1.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
mul.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mulll.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
mulull.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
nacl-align.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
|
nacl-branch-delay.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
nacl-reserved-regs.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
named-register-n32.ll
|
Move the Mips target to storing the ABI in the TargetMachine rather
|
2015-01-26 17:33:46 +00:00 |
|
named-register-n64.ll
|
[mips] Add support for accessing $gp as a named register.
|
2015-01-09 17:21:30 +00:00 |
|
named-register-o32.ll
|
[mips] Add support for accessing $gp as a named register.
|
2015-01-09 17:21:30 +00:00 |
|
neg1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
no-odd-spreg-msa.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
no-odd-spreg.ll
|
[mips] Do not emit '.module [no]oddspreg' unless we really need to.
|
2014-07-21 10:45:47 +00:00 |
|
nomips16.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
not1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
null-streamer.ll
|
[Mips] Add a target streamer when creating a null streamer.
|
2014-06-23 19:43:40 +00:00 |
|
null.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
o32_cc_byval.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
o32_cc_vararg.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
o32_cc.ll
|
[mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64 moves
|
2014-07-14 12:41:31 +00:00 |
|
octeon_popcnt.ll
|
[mips] Sign-extend i32 values truncated from previously zero-extended i32 values.
|
2016-04-13 15:07:45 +00:00 |
|
octeon.ll
|
Revert "[mips] Promote the result of SETCC nodes to GPR width."
|
2016-03-01 20:25:43 +00:00 |
|
optimize-fp-math.ll
|
|
|
|
optimize-pic-o0.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
or1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
powif64_16.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
prevent-hoisting.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
private.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
ra-allocatable.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
rdhwr-directives.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
rem.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
remat-immed-load.ll
|
Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes.
|
2015-02-26 12:29:48 +00:00 |
|
remu.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
return_address.ll
|
|
|
|
return-vector.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
rotate.ll
|
|
|
|
s2rem.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sb1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sel1c.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sel2c.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
select.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
selectcc.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
seleq.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
seleqk.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selgek.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selgt.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selle.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selltk.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selne.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selnek.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selpat.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selTBteqzCmpi.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
selTBtnezCmpi.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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selTBtnezSlti.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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setcc-se.ll
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|
|
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seteq.ll
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[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
|
2016-04-22 11:18:40 +00:00 |
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seteqz.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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setge.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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setgek.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
setle.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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setlt.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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setltk.ll
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[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
|
2016-04-22 11:18:40 +00:00 |
|
setne.ll
|
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
|
2016-04-22 11:18:40 +00:00 |
|
setuge.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
setugt.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
setule.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
setult.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
setultk.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sh1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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shift-parts.ll
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|
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simplebr.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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sint-fp-store_pattern.ll
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sitofp-selectcc-opt.ll
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AsmPrinter: Use emitGlobalConstantFP to emit elements of constant data
|
2015-12-08 02:37:48 +00:00 |
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sll1.ll
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sll2.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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small-section-reserve-gp.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
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spill-copy-acreg.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
sr1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sra1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sra2.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
srl1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
srl2.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
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stack-alignment.ll
|
|
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stackcoloring.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
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stacksize.ll
|
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|
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start-asm-file.ll
|
Move the Mips target to storing the ABI in the TargetMachine rather
|
2015-01-26 17:33:46 +00:00 |
|
stchar.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
stldst.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sub1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
sub2.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
swzero.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
|
2015-02-27 19:29:02 +00:00 |
|
tail16.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
tailcall.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
tls16_2.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
tls16.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
tls-alias.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
|
2015-09-11 03:22:04 +00:00 |
|
tls-models.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
tls.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
tnaked.ll
|
|
|
|
trap1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
trap.ll
|
|
|
|
uitofp.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
ul1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
unalignedload.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
|
vector-load-store.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
vector-setcc.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
weak.ll
|
|
|
|
xor1.ll
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
zeroreg.ll
|
[mips] Make Static a default relocation model for MIPS codegen
|
2016-04-11 15:24:23 +00:00 |
