Tanya Lattner 6814933ea6 Handle perfect shuffle case that generates a vrev for vectors of floats. ...

Add test case.

llvm-svn: 131582

2011-05-18 21:44:54 +00:00

..

Alpha

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

ARM

Handle perfect shuffle case that generates a vrev for vectors of floats.

2011-05-18 21:44:54 +00:00

Blackfin

Don't completely eliminate identity copies that also modify super register liveness.

2011-03-31 17:55:25 +00:00

CBackend

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CellSPU

don't test for codegen of 'store undef'

2011-04-09 02:31:26 +00:00

CPP

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Generic

Move test for appropriate directory.

2011-05-17 19:06:43 +00:00

MBlaze

Add scheduling information for the MBlaze backend.

2011-04-11 22:31:52 +00:00

Mips

Remove LLVM IR metadata in test case committed in r130847.

2011-05-04 18:28:36 +00:00

MSP430

Fix register-dependent test in MSP430.

2011-05-04 01:01:39 +00:00

PowerPC

FileCheckize and break dependence on coalescing order.

2011-05-04 19:02:01 +00:00

PTX

PTX: add flag to disable mad/fma selection

2011-05-18 15:42:23 +00:00

SPARC

Fix more register and coalescing dependencies.

2011-05-04 19:02:11 +00:00

SystemZ

Fix SystemZ tests

2011-03-31 23:02:12 +00:00

Thumb

Move this test to CodeGen/Thumb. rdar://problem/9416774

2011-05-11 19:41:28 +00:00

Thumb2

Since I can't reproduce the failures from 131261, re-trying with a

2011-05-13 00:51:54 +00:00

X86

Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible.

2011-05-18 19:59:50 +00:00

XCore

Fix register-dependent XCore tests

2011-05-04 01:01:41 +00:00