Sander de Smalen 412b309025 [AArch64][SVE] Asm: Add AND_ZI instructions and aliases ...

Summary: Adds support for the SVE AND instruction with vector and logical-immediate operands, and their corresponding aliases.

Reviewers: fhahn, rengolin, samparker, echristo, aadg, kristof.beyls

Reviewed By: fhahn

Subscribers: aemerson, javed.absar, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D42295

llvm-svn: 324343

2018-02-06 13:13:21 +00:00

..

SVE

[AArch64][SVE] Asm: Add AND_ZI instructions and aliases

2018-02-06 13:13:21 +00:00

adrp-relocation.s

[AArch64] Update a comment in a test

2017-07-25 19:57:26 +00:00

alias-addsubimm.s

[AArch64] [Assembler] option to disable negative immediate conversions

2017-03-28 10:02:56 +00:00

alias-logicalimm.s

[AArch64] [Assembler] option to disable negative immediate conversions

2017-03-28 10:02:56 +00:00

arm32-elf-relocs.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

arm64-adr.s

…

arm64-advsimd.s

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

arm64-aliases.s

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

arm64-arithmetic-encoding.s

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

arm64-arm64-fixup.s

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arm64-basic-a64-instructions.s

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arm64-be-datalayout.s

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arm64-bitfield-encoding.s

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arm64-branch-encoding.s

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arm64-condbr-without-dots.s

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arm64-crypto.s

[AArch64] Tie source and destination operands for AESMC/AESIMC.

2017-07-29 20:35:28 +00:00

arm64-diagno-predicate.s

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arm64-diags.s

Re-commit: [TableGen] AsmMatcher: Fix bug with reported diagnostic for operand.

2017-12-14 16:09:48 +00:00

arm64-directive_loh.s

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arm64-elf-reloc-condbr.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

arm64-elf-relocs.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

arm64-fp-encoding-error.s

AArch64: disallow "fmov sD, #-0.0" during assembly.

2015-04-07 22:49:47 +00:00

arm64-fp-encoding.s

[AArch64] Add ARMv8.2-A FP16 scalar instructions

2015-11-27 13:04:48 +00:00

arm64-ilp32.s

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

arm64-large-relocs.s

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arm64-leaf-compact-unwind.s

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

arm64-logical-encoding.s

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arm64-mapping-across-sections.s

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arm64-mapping-within-section.s

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arm64-memory.s

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arm64-nv-cond.s

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arm64-optional-hash.s

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arm64-separator.s

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arm64-simd-ldst.s

…

arm64-small-data-fixups.s

[tests] Use llvm-readobj instead of macho-dump.

2015-07-28 21:58:08 +00:00

arm64-spsel-sysreg.s

AArch64: TableGenerate system instruction operands.

2016-07-05 21:23:04 +00:00

arm64-system-encoding.s

[AArch64] CCSIDR2 system register

2017-12-20 08:56:41 +00:00

arm64-target-specific-sysreg.s

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arm64-tls-modifiers-darwin.s

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arm64-tls-relocs.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

arm64-v128_lo-diagnostics.s

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arm64-variable-exprs.s

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arm64-vector-lists.s

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arm64-verbose-vector-case.s

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arm64v8.1-diagno-predicate.s

[AArch64] Refactor LSE support as feature separate from V8.1a support.

2016-11-30 22:25:24 +00:00

armv8.1a-atomic.s

AArch64: fix typo in SMIN far atomics and add tests

2015-06-02 18:37:20 +00:00

armv8.1a-lor.s

[AArch64] LORID_EL1 register must be treated as read-only

2015-04-20 16:54:37 +00:00

armv8.1a-lse.s

[AArch64] Add V8_2aOps feature to Cortex-A55 and 75

2017-09-18 14:46:14 +00:00

armv8.1a-pan.s

[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for

2015-10-05 13:42:31 +00:00

armv8.1a-rdma.s

Defer asm errors to post-statement failure

2016-09-16 18:30:20 +00:00

armv8.1a-vhe.s

[AArch64] Add v8.1a "Virtualization Host Extensions"

2015-04-16 15:38:58 +00:00

armv8.2a-at.s

[AArch64] Add ARMv8.2-A new AT instruction variants

2015-11-26 15:34:44 +00:00

armv8.2a-dotprod-errors.s

[AArch64] Assembler support for the ARMv8.2a dot product instructions

2017-08-09 14:59:54 +00:00

armv8.2a-dotprod.s

[ARM][AArch64] Cortex-A75 and Cortex-A55 support

2017-08-21 08:43:06 +00:00

armv8.2a-mmfr2.s

[AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 register

2015-11-26 15:26:10 +00:00

armv8.2a-persistent-memory.s

[AArch64] Add ARMv8.2-A persistent memory instruction

2015-11-26 15:28:47 +00:00

armv8.2a-statistical-profiling.s

[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2

2017-12-20 11:02:42 +00:00

armv8.2a-uao.s

[AArch64] Add ARMv8.2-A UAO PSTATE bit

2015-11-26 15:32:30 +00:00

armv8.3a-complex.s

[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2

2017-12-20 11:02:42 +00:00

armv8.3a-diagnostics.s

[AArch64] Enable ARMv8.3-A pointer authentication

2017-08-11 13:14:00 +00:00

armv8.3a-ID_ISAR6_EL1.s

[AArch64] IDSAR6 register assembler support

2017-08-31 08:36:45 +00:00

armv8.3a-js.s

[ARM][AArch64] v8.3-A Javascript Conversion

2017-08-22 11:08:21 +00:00

armv8.3a-rcpc.s

[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2

2017-12-20 11:02:42 +00:00

armv8.3a-signed-pointer.s

[AArch64] Enable ARMv8.3-A pointer authentication

2017-08-11 13:14:00 +00:00

basic-a64-diagnostics.s

[AArch64] CCSIDR2 system register

2017-12-20 08:56:41 +00:00

basic-a64-instructions.s

[AArch64] armv8-A doesn't have CRC.

2017-05-03 20:33:52 +00:00

basic-pic.s

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

case-insen-reg-names.s

[AArch64] AsmParser should be case insensitive about accepting vector register names.

2015-06-08 21:32:16 +00:00

cfi.s

[AsmPrinterDwarf] Add support for .cfi_restore directive

2017-11-02 12:00:58 +00:00

coff-align.s

[AArch64, COFF] Interpret .align as power of two for COFF as well

2017-07-19 20:14:24 +00:00

coff-basic.ll

[COFF, ARM64] Add support for Windows ARM64 COFF format

2017-06-27 23:58:19 +00:00

coff-debug.ll

Tighten up DIFile verifier for checksums

2018-01-11 22:03:43 +00:00

coff-gnu.s

[COFF, ARM64] Use '//' as comment character in assembly files in GNU environments

2017-08-13 19:42:05 +00:00

coff-relocations.s

[COFF, ARM64] Fix symbol offsets in ADRP/ADD/LDR/STR relocations

2017-07-26 11:19:17 +00:00

crc.s

[AArch64] Add V8_2aOps feature to Cortex-A55 and 75

2017-09-18 14:46:14 +00:00

csdb.s

[ARM][AArch64] Add CSDB speculation barrier instruction

2018-02-06 09:24:47 +00:00

cyclone-movi-bug.s

AArch64: work around how Cyclone handles "movi.2d vD, #0".

2017-12-18 10:36:00 +00:00

darwin-reloc-addsubimm.s

[AArch64] Fix encoding for lsl #12 in add/sub immediates

2016-09-19 11:10:18 +00:00

directive-arch-negative.s

[AArch64] armv8-A doesn't have CRC.

2017-05-03 20:33:52 +00:00

directive-arch.s

Move the armv8.1-a ras test to a negative with noras test as ras is

2016-09-19 21:55:04 +00:00

directive-cpu-err.s

AArch64: diagnose unrecognized features in .cpu directive.

2017-05-15 19:42:15 +00:00

directive-cpu.s

[AArch64] Refactor LSE support as feature separate from V8.1a support.

2016-11-30 22:25:24 +00:00

dot-req-case-insensitive.s

…

dot-req-diagnostics.s

…

dot-req.s

[AArch64] Asm: Fix parsing of register aliases that have a name starting with 'z'

2017-12-20 09:45:45 +00:00

elf_osabi_flags.s

Restore test coverage for other than ELFOSABI_NONE

2015-09-24 23:01:16 +00:00

elf-extern.s

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

elf-globaladdress.ll

Update tests to not be as dependent on section numbers.

2015-04-15 15:59:37 +00:00

elf-objdump.s

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elf-reloc-addsubimm.s

[AArch64] Fix encoding for lsl #12 in add/sub immediates

2016-09-19 11:10:18 +00:00

elf-reloc-ldrlit.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

elf-reloc-ldstunsimm.s

Update tests to not be as dependent on section numbers.

2015-04-15 15:59:37 +00:00

elf-reloc-movw.s

Update tests to not be as dependent on section numbers.

2015-04-15 15:59:37 +00:00

elf-reloc-pcreladdressing.s

Update tests to not be as dependent on section numbers.

2015-04-15 15:59:37 +00:00

elf-reloc-tstb.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

elf-reloc-uncondbrimm.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

error-location-during-layout.s

[Assembler] Better error messages for .org directive

2016-12-14 10:43:58 +00:00

error-location-ldr-pseudo.s

[ARM,AArch64] Store source location of asm constant pool entries

2015-11-16 16:25:47 +00:00

error-location-post-layout.s

[Assembler] Add location info to unary expressions.

2017-03-10 13:08:20 +00:00

error-location.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

expr-shr.s

[MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin.

2015-04-28 01:37:11 +00:00

fixup-out-of-range.s

[COFF, ARM64] Fix symbol offsets in ADRP/ADD/LDR/STR relocations

2017-07-26 11:19:17 +00:00

fullfp16-diagnostics.s

[AArch64] Fix FP16 vector instructions that should only accept low registers

2015-12-09 14:32:11 +00:00

fullfp16-neon-neg.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

gicv3-regs-diagnostics.s

…

gicv3-regs.s

[AArch64] Fix spelling of ICH_ELRSR_EL2 system register

2018-02-06 09:39:04 +00:00

ilp32-diagnostics.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

inline-asm-modifiers.s

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

inst-directive-diagnostic.s

[MC][AArch64] Cleanup end-of-line parsing in AArch64 AsmParser.

2016-11-08 18:31:04 +00:00

inst-directive.s

Followup to 258750; update this test to use .p2align .

2016-01-26 00:17:24 +00:00

invalid-instructions-spellcheck.s

[AArch64] Enable the mnemonic spell checker

2017-07-13 15:29:13 +00:00

jump-table.s

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

label-arithmetic-darwin.s

[AArch64] Allow label arithmetic with add/sub/cmp

2016-10-11 09:17:47 +00:00

label-arithmetic-diags-darwin.s

Add a common error checking for some invalid expressions.

2017-06-22 17:25:35 +00:00

label-arithmetic-diags-elf.s

Add @LINE to checks in a test.

2017-07-06 19:09:35 +00:00

label-arithmetic-elf.s

[AArch64] Allow label arithmetic with add/sub/cmp

2016-10-11 09:17:47 +00:00

ldr-pseudo-diagnostics.s

[AArch64] ldr= pseudo-instruction silently ignored if register invalid

2015-11-16 10:25:19 +00:00

ldr-pseudo-obj-errors.s

[AArch64] Better errors for out-of-range fixups

2016-04-01 09:14:50 +00:00

ldr-pseudo.s

[MC] Fix constant pools with DenseMap sentinel values

2017-05-30 09:37:11 +00:00

lit.local.cfg

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macho-adrp-missing-reloc.s

[AArch64] Force relocations for all ADRP instructions

2017-07-19 20:14:32 +00:00

macho-adrp-page.s

[AArch64] Force relocations for all ADRP instructions

2017-07-19 20:14:32 +00:00

mapping-across-sections.s

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mapping-within-section.s

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neon-2velem.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-3vdiff.s

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neon-aba-abd.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-across.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-add-pairwise.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-add-sub-instructions.s

Fix some broken CHECK lines.

2017-01-22 20:28:56 +00:00

neon-bitwise-instructions.s

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neon-compare-instructions.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-crypto.s

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neon-diagnostics.s

[AArch64] Assembler support for the ARMv8.2a dot product instructions

2017-08-09 14:59:54 +00:00

neon-extract.s

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neon-facge-facgt.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-frsqrt-frecp.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-halving-add-sub.s

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neon-max-min-pairwise.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-max-min.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-mla-mls-instructions.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-mov.s

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neon-mul-div-instructions.s

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neon-perm.s

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neon-rounding-halving-add.s

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neon-rounding-shift.s

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neon-saturating-add-sub.s

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neon-saturating-rounding-shift.s

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neon-saturating-shift.s

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neon-scalar-abs.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-scalar-add-sub.s

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neon-scalar-by-elem-mla.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-scalar-by-elem-mul.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-scalar-by-elem-saturating-mla.s

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neon-scalar-by-elem-saturating-mul.s

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neon-scalar-compare.s

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neon-scalar-cvt.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-scalar-dup.s

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neon-scalar-extract-narrow.s

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neon-scalar-fp-compare.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-scalar-mul.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-scalar-neg.s

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neon-scalar-recip.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-scalar-reduce-pairwise.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-scalar-rounding-shift.s

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neon-scalar-saturating-add-sub.s

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neon-scalar-saturating-rounding-shift.s

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neon-scalar-saturating-shift.s

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neon-scalar-shift-imm.s

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neon-scalar-shift.s

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neon-shift-left-long.s

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neon-shift.s

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neon-simd-copy.s

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neon-simd-ldst-multi-elem.s

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neon-simd-ldst-one-elem.s

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neon-simd-misc.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-simd-post-ldst-multi-elem.s

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neon-simd-shift.s

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

neon-sxtl.s

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neon-tbl.s

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neon-uxtl.s

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nofp-crypto-diagnostic.s

[AArch64] Crypto requires FP.

2017-04-05 10:44:38 +00:00

noneon-diagnostics.s

[AArch64] Improve short-form diags on long-form Match_InvalidOperand.

2015-08-19 17:40:19 +00:00

optional-hash.s

Remove redundant -mattr options from llvm-objdump commands.

2016-06-16 15:47:19 +00:00

ras-extension.s

[AArch64] Add V8_2aOps feature to Cortex-A55 and 75

2017-09-18 14:46:14 +00:00

shift_extend_op_w_symbol.s

Attempt to make the Windows bots green after r290609.

2016-12-27 18:02:27 +00:00

single-slash.s

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

tls-add-shift.s

AArch64: Set shift bit of TLSLE HI12 add instruction

2016-09-29 01:05:48 +00:00

tls-relocs.s

[AArch64] ILP32 Backend Relocation Support

2017-05-02 22:01:48 +00:00

trace-regs-diagnostics.s

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trace-regs.s

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