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llvm-mirror/test/CodeGen/ARM
History
Joerg Sonnenberger 5200dee212 Reapply r374743 with a fix for the ocaml binding 
Add a pass to lower is.constant and objectsize intrinsics

This pass lowers is.constant and objectsize intrinsics not simplified by
earlier constant folding, i.e. if the object given is not constant or if
not using the optimized pass chain. The result is recursively simplified
and constant conditionals are pruned, so that dead blocks are removed
even for -O0. This allows inline asm blocks with operand constraints to
work all the time.

The new pass replaces the existing lowering in the codegen-prepare pass
and fallbacks in SDAG/GlobalISEL and FastISel. The latter now assert
on the intrinsics.

Differential Revision: https://reviews.llvm.org/D65280

llvm-svn: 374784
2019-10-14 16:15:14 +00:00
..
CGP
[ARM][CGP] Allow signext arguments
2019-09-30 07:52:10 +00:00
GlobalISel
[ARM] VFPv2 only supports 16 D registers.
2019-09-17 21:42:38 +00:00
ParallelDSP
[TableGen] Fix a bug that MCSchedClassDesc is interfered between different SchedModel
2019-10-11 08:36:54 +00:00
Windows
[ARM] Add support for MSVC stack cookie checking
2019-07-07 18:57:31 +00:00
2006-11-10-CycleInDAG.ll
…
2007-01-19-InfiniteLoop.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
2007-03-07-CombinerCrash.ll
…
2007-03-13-InstrSched.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2007-03-21-JoinIntervalsCrash.ll
…
2007-03-27-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-03-30-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-04-02-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-04-03-PEIBug.ll
…
2007-04-03-UndefinedSymbol.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2007-04-30-CombinerCrash.ll
…
2007-05-03-BadPostIndexedLd.ll
…
2007-05-07-tailmerge-1.ll
…
2007-05-09-tailmerge-2.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-05-14-InlineAsmCstCrash.ll
…
2007-05-14-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-05-22-tailmerge-3.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-05-23-BadPreIndexedStore.ll
…
2007-08-15-ReuseBug.ll
…
2008-02-04-LocalRegAllocBug.ll
…
2008-02-29-RegAllocLocal.ll
…
2008-03-05-SxtInRegBug.ll
…
2008-03-07-RegScavengerAssert.ll
…
2008-04-04-ScavengerAssert.ll
…
2008-04-10-ScavengerAssert.ll
…
2008-04-11-PHIofImpDef.ll
…
2008-05-19-LiveIntervalsBug.ll
…
2008-05-19-ScavengerAssert.ll
…
2008-07-17-Fdiv.ll
…
2008-07-24-CodeGenPrepCrash.ll
…
2008-08-07-AsmPrintBug.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2008-09-17-CoalescerBug.ll
…
2008-11-18-ScavengerAssert.ll
…
2009-02-16-SpillerBug.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-02-22-SoftenFloatVaArg.ll
…
2009-02-27-SpillerBug.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-03-07-SpillerBug.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2009-03-09-AddrModeBug.ll
…
2009-04-06-AsmModifier.ll
…
2009-04-08-AggregateAddr.ll
…
2009-04-08-FloatUndef.ll
…
2009-04-08-FREM.ll
…
2009-04-09-RegScavengerAsm.ll
…
2009-05-05-DAGCombineBug.ll
…
2009-05-07-RegAllocLocal.ll
…
2009-05-11-CodePlacementCrash.ll
…
2009-05-18-InlineAsmMem.ll
[ARM] Avoid using ARM instructions in Thumb mode
2017-01-31 14:35:01 +00:00
2009-06-02-ISelCrash.ll
…
2009-06-04-MissingLiveIn.ll
…
2009-06-15-RegScavengerAssert.ll
…
2009-06-19-RegScavengerAssert.ll
…
2009-06-22-CoalescerBug.ll
…
2009-06-30-RegScavengerAssert2.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert3.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert4.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert5.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-07-01-CommuteBug.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-07-09-asm-p-constraint.ll
…
2009-07-18-RewriterBug.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
2009-07-22-ScavengerAssert.ll
…
2009-07-22-SchedulerAssert.ll
…
2009-07-29-VFP3Registers.ll
…
2009-08-02-RegScavengerAssert-Neon.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-08-04-RegScavengerAssert-2.ll
…
2009-08-04-RegScavengerAssert.ll
…
2009-08-15-RegScavenger-EarlyClobber.ll
…
2009-08-15-RegScavengerAssert.ll
…
2009-08-21-PostRAKill2.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
2009-08-21-PostRAKill3.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
2009-08-21-PostRAKill.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-08-26-ScalarToVector.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2009-08-27-ScalarToVector.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2009-08-29-ExtractEltf32.ll
…
2009-08-29-TooLongSplat.ll
…
2009-08-31-LSDA-Name.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-08-31-TwoRegShuffle.ll
…
2009-09-09-AllOnes.ll
…
2009-09-09-fpcmp-ole.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-09-10-postdec.ll
…
2009-09-13-InvalidSubreg.ll
…
2009-09-13-InvalidSuperReg.ll
…
2009-09-20-LiveIntervalsBug.ll
…
2009-09-21-LiveVariablesBug.ll
…
2009-09-22-LiveVariablesBug.ll
…
2009-09-23-LiveVariablesBug.ll
…
2009-09-24-spill-align.ll
…
2009-09-27-CoalescerBug.ll
…
2009-09-28-LdStOptiBug.ll
…
2009-10-02-NEONSubregsBug.ll
…
2009-10-16-Scope.ll
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
2016-04-15 15:57:41 +00:00
2009-10-27-double-align.ll
Re-land MachineInstr: Reason locally about some memory objects before going to AA.
2017-08-30 14:57:12 +00:00
2009-10-30.ll
…
2009-11-01-NeonMoves.ll
…
2009-11-02-NegativeLane.ll
…
2009-11-07-SubRegAsmPrinting.ll
[ARM] preserve test intent by removing undef
2018-05-17 18:09:56 +00:00
2009-11-13-CoalescerCrash.ll
…
2009-11-13-ScavengerAssert2.ll
…
2009-11-13-ScavengerAssert.ll
…
2009-11-13-VRRewriterCrash.ll
…
2009-11-30-LiveVariablesBug.ll
…
2009-12-02-vtrn-undef.ll
…
2010-03-04-eabi-fp-spill.ll
…
2010-03-04-stm-undef-addr.ll
…
2010-03-18-ldm-rtrn.ll
…
2010-04-09-NeonSelect.ll
…
2010-04-13-v2f64SplitArg.ll
…
2010-04-14-SplitVector.ll
…
2010-04-15-ScavengerDebugValue.ll
Remove the obsolete offset parameter from @llvm.dbg.value
2017-07-28 20:21:02 +00:00
2010-05-14-IllegalType.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2010-05-17-FastAllocCrash.ll
…
2010-05-18-LocalAllocCrash.ll
…
2010-05-18-PostIndexBug.ll
…
2010-05-19-Shuffles.ll
…
2010-05-20-NEONSpillCrash.ll
…
2010-05-21-BuildVector.ll
…
2010-06-11-vmovdrr-bitcast.ll
…
2010-06-21-LdStMultipleBug.ll
…
2010-06-21-nondarwin-tc.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2010-06-25-Thumb2ITInvalidIterator.ll
Canonicalize the representation of empty an expression in DIGlobalVariableExpression
2017-08-30 18:06:51 +00:00
2010-06-29-PartialRedefFastAlloc.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
2010-06-29-SubregImpDefs.ll
…
2010-07-26-GlobalMerge.ll
…
2010-08-04-EHCrash.ll
…
2010-08-04-StackVariable.ll
Remove the obsolete offset parameter from @llvm.dbg.value
2017-07-28 20:21:02 +00:00
2010-09-21-OptCmpBug.ll
…
2010-10-25-ifcvt-ldm.ll
…
2010-11-15-SpillEarlyClobber.ll
…
2010-11-29-PrologueBug.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
2010-12-07-PEIBug.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
2010-12-08-tpsoft.ll
[llvm-readobj] Change -long-option to --long-option in tests. NFC
2019-05-01 05:27:20 +00:00
2010-12-15-elf-lcomm.ll
[llvm-readobj] Change -t to --symbols in tests. NFC
2019-05-01 09:28:24 +00:00
2010-12-17-LocalStackSlotCrash.ll
…
2011-01-19-MergedGlobalDbg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2011-02-04-AntidepMultidef.ll
[ARM] Run ARMParallelDSP in the IRPasses phase
2019-03-14 10:57:40 +00:00
2011-02-07-AntidepClobber.ll
…
2011-03-10-DAGCombineCrash.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
2011-03-15-LdStMultipleBug.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
2011-03-23-PeepholeBug.ll
Revert [MBP] Disable aggressive loop rotate in plain mode
2019-08-29 19:03:58 +00:00
2011-04-07-schediv.ll
…
2011-04-11-MachineLICMBug.ll
…
2011-04-12-AlignBug.ll
…
2011-04-12-FastRegAlloc.ll
…
2011-04-15-AndVFlagPeepholeBug.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
2011-04-15-RegisterCmpPeephole.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
2011-04-26-SchedTweak.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
2011-04-27-IfCvtBug.ll
…
2011-05-04-MultipleLandingPadSuccs.ll
[Verifier] Add verification for TBAA metadata
2016-12-11 20:07:15 +00:00
2011-06-09-TailCallByVal.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
2011-06-16-TailCallByVal.ll
…
2011-06-29-MergeGlobalsAlign.ll
Revert "Use private linkage for MergedGlobals variables" on Darwin.
2016-11-11 17:50:09 +00:00
2011-07-10-GlobalMergeBug.ll
…
2011-08-02-MergedGlobalDbg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2011-08-12-vmovqqqq-pseudo.ll
…
2011-08-25-ldmia_ret.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
2011-08-29-ldr_pre_imm.ll
…
2011-08-29-SchedCycle.ll
…
2011-09-09-OddVectorDivision.ll
…
2011-09-19-cpsr.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2011-09-28-CMovCombineBug.ll
…
2011-10-26-ExpandUnalignedLoadCrash.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2011-10-26-memset-inline.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2011-10-26-memset-with-neon.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2011-11-07-PromoteVectorLoadStore.ll
…
2011-11-09-BitcastVectorDouble.ll
…
2011-11-09-IllegalVectorFPIntConvert.ll
…
2011-11-14-EarlyClobber.ll
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
2011-11-28-DAGCombineBug.ll
…
2011-11-29-128bitArithmetics.ll
…
2011-11-30-MergeAlignment.ll
…
2011-12-14-machine-sink.ll
…
2011-12-19-sjlj-clobber.ll
…
2012-01-23-PostRA-LICM.ll
…
2012-01-24-RegSequenceLiveRange.ll
…
2012-01-26-CoalescerBug.ll
…
2012-01-26-CopyPropKills.ll
…
2012-02-01-CoalescerBug.ll
…
2012-03-05-FPSCR-bug.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2012-03-13-DAGCombineBug.ll
…
2012-03-26-FoldImmBug.ll
…
2012-04-02-TwoAddrInstrCrash.ll
…
2012-04-10-DAGCombine.ll
…
2012-04-24-SplitEHCriticalEdge.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
2012-05-04-vmov.ll
…
2012-05-10-PreferVMOVtoVDUP32.ll
…
2012-05-29-TailDupBug.ll
…
2012-06-12-SchedMemLatency.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
2012-08-04-DtripleSpillReload.ll
…
2012-08-08-legalize-unaligned.ll
…
2012-08-09-neon-extload.ll
…
2012-08-13-bfi.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2012-08-23-legalize-vmull.ll
…
2012-08-27-CopyPhysRegCrash.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2012-08-30-select.ll
Don't conditionalize Neon instructions, even in IT blocks.
2017-06-22 12:11:38 +00:00
2012-09-18-ARMv4ISelBug.ll
…
2012-09-25-InlineAsmScalarToVectorConv2.ll
[SelectionDAG] Remove exit-on-error flag from test (PR27765)
2016-06-14 07:30:20 +00:00
2012-09-25-InlineAsmScalarToVectorConv.ll
…
2012-10-04-AAPCS-byval-align8.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
2012-10-04-FixedFrame-vs-byval.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
2012-10-04-LDRB_POST_IMM-Crash.ll
…
2012-10-18-PR14099-ByvalFrameAddress.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
2012-11-14-subs_carry.ll
…
2013-01-21-PR14992.ll
…
2013-02-27-expand-vfma.ll
…
2013-04-05-Small-ByVal-Structs-PR15293.ll
…
2013-04-16-AAPCS-C4-vs-VFP.ll
…
2013-04-16-AAPCS-C5-vs-VFP.ll
…
2013-04-18-load-overlap-PR14824.ll
…
2013-04-21-AAPCS-VA-C.1.cp.ll
…
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll
…
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
…
2013-05-05-IfConvertBug.ll
…
2013-05-07-ByteLoadSameAddress.ll
…
2013-05-13-AAPCS-byval-padding2.ll
…
2013-05-13-AAPCS-byval-padding.ll
…
2013-05-13-DAGCombiner-undef-mask.ll
DAG: Fix extract_subvector combine for a single element
2018-06-11 21:27:41 +00:00
2013-05-31-char-shift-crash.ll
…
2013-06-03-ByVal-2Kbytes.ll
…
2013-07-29-vector-or-combine.ll
[ARM] preserve test intent by removing undef
2018-02-10 15:14:00 +00:00
2013-10-11-select-stalls.ll
…
2013-11-08-inline-asm-neon-array.ll
…
2014-01-09-pseudo_expand_implicit_reg.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
2014-02-05-vfp-regs-after-stack.ll
…
2014-02-21-byval-reg-split-alignment.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
2014-05-14-DwarfEHCrash.ll
…
2014-07-18-earlyclobber-str-post.ll
…
2014-08-04-muls-it.ll
[ARM] Comply with rules on ARMv8-A thumb mode partial deprecation of IT.
2019-06-18 20:55:09 +00:00
2015-01-21-thumbv4t-ldstr-opt.ll
…
2016-05-01-RegScavengerAssert.ll
[ARM] Fix Scavenger assert due to underestimated stack size
2016-05-08 05:11:54 +00:00
2016-08-24-ARM-LDST-dbginfo-bug.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2018-02-13-PR36079.ll
[LegalizeDAG] Fix legalization of SETCC
2018-02-16 09:35:16 +00:00
a15-mla.ll
…
a15-partial-update.ll
[BreakFalseDeps] ignore function with minsize attribute
2019-09-23 17:01:01 +00:00
a15-SD-dep.ll
[ARM] Add new feature to enable optimizing the VFP registers
2018-07-20 16:49:28 +00:00
a15.ll
…
aapcs-hfa-code.ll
[ARM] Cortex-M4 schedule
2019-05-15 12:41:58 +00:00
aapcs-hfa.ll
…
acle-intrinsics-rot.ll
[ARM] Rotated operand patterns for *xtb16
2018-08-22 12:58:36 +00:00
acle-intrinsics-v5.ll
[ARM] ACLE Chapter 9 intrinsics
2017-05-04 07:31:28 +00:00
acle-intrinsics.ll
[ARM] ACLE Chapter 9 intrinsics
2017-05-04 07:31:28 +00:00
add-like-or.ll
ARM: convert ORR instructions to ADD where possible on Thumb.
2018-06-20 12:09:44 +00:00
addrmode.ll
…
addrspacecast.ll
…
addsubcarry-promotion.ll
[DAGCombine][ARM][X86] (sub Carry, X) -> (addcarry (sub 0, X), 0, Carry) fold
2019-09-18 20:48:27 +00:00
addsubo-legalization.ll
[TargetLowering] Simplify expansion of S{ADD,SUB}O
2019-09-30 07:58:50 +00:00
adv-copy-opt.ll
…
aeabi-read-tp.ll
ARM: support -mlong-calls with AEABI TLS on ELF
2017-01-29 16:46:22 +00:00
aggregate-padding.ll
[ARM] Fix over-alignment in arguments that are HA of 128-bit vectors
2018-07-30 08:49:30 +00:00
alias_align.ll
[DAGCombine] Fix alignment for offset loads/stores
2018-06-21 08:30:07 +00:00
alias_store.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
aliases.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
align-sp-adjustment.ll
Revert "[ARM] Mark LEApcrel instructions as isAsCheapAsAMove"
2017-05-16 17:59:07 +00:00
align.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
alloc-no-stack-realign.ll
[DAGCombine] Disable finding better chains for stores at O0
2017-11-28 04:07:59 +00:00
alloca-align.ll
ARM: use correct offset from base pointer (r6) in call frame regions.
2018-12-07 13:43:55 +00:00
alloca.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
analyze-branch-bkpt.ll
ARM: Use BKPT instead of TRAP to implement llvm.debugtrap.
2018-10-24 18:10:38 +00:00
and-cmpz.ll
[ARM] Adjust AND immediates to make them cheaper to select.
2018-08-10 21:21:53 +00:00
and-load-combine.ll
[DAG] Refactor DAGCombiner::ReassociateOps
2019-04-29 17:50:10 +00:00
apcs-vfp.ll
…
arg-copy-elide.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
argaddr.ll
…
arguments2.ll
…
arguments3.ll
…
arguments4.ll
…
arguments5.ll
…
arguments6.ll
…
arguments7.ll
…
arguments8.ll
…
arguments_f64_backfill.ll
…
arguments-nosplit-double.ll
NFC: I simply added CHECK-LABEL to prevent false matches in the tests.
2017-07-07 13:41:33 +00:00
arguments-nosplit-i64.ll
NFC: I simply added CHECK-LABEL to prevent false matches in the tests.
2017-07-07 13:41:33 +00:00
arguments.ll
…
arm32-round-conv.ll
…
arm32-rounding.ll
[ARM] Replace fp-only-sp and d16 with fp64 and d32.
2019-05-28 16:13:20 +00:00
arm-abi-attr.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
arm-and-tst-peephole.ll
Revert [MBP] Disable aggressive loop rotate in plain mode
2019-08-29 19:03:58 +00:00
arm-asm.ll
…
arm-eabi.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
arm-frame-lowering-no-terminator.ll
ARM: Avoid dereferencing end() in ARMFrameLowering::emitEpilogue
2016-08-21 00:08:10 +00:00
arm-frameaddr.ll
…
arm-insert-subvector.ll
[ARM] Check for assembler instructions in test.
2017-08-23 11:53:24 +00:00
arm-macho-tail.ll
ARM: use an external relocation for calls from MachO ARM mode.
2017-08-18 19:13:56 +00:00
arm-modifier.ll
…
arm-negative-stride.ll
…
arm-position-independence-jump-table.ll
[ARM] Place jump table as the first operand in additions
2017-11-13 11:56:48 +00:00
arm-position-independence.ll
[ARM] Make RWPI use movw/movt when available
2017-02-07 13:07:12 +00:00
arm-returnaddr.ll
…
arm-shrink-wrapping-linux.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
arm-shrink-wrapping.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
arm-storebytesmerge.ll
[ARM] Replace fp-only-sp and d16 with fp64 and d32.
2019-05-28 16:13:20 +00:00
arm-ttype-target2.ll
…
arm-vld1.ll
[NEON] Support VLD1xN intrinsics in AArch32 mode (LLVM part)
2018-06-02 16:40:03 +00:00
arm-vlddup-update.ll
[NEON] Fix combining of vldx_dup intrinsics with updating of base addresses
2018-07-05 08:59:49 +00:00
arm-vlddup.ll
[NEON] Support vldNq intrinsics in AArch32 (LLVM part)
2018-06-27 13:57:52 +00:00
arm-vst1.ll
[NEON] Support VST1xN intrinsics in AArch32 mode (LLVM part)
2018-06-10 09:27:27 +00:00
ARMLoadStoreDBG.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
armv4.ll
Fix ARMv4 support
2017-08-28 20:20:47 +00:00
armv8.2a-fp16-vector-intrinsics.ll
[ARM][FIX] Add missing f16.lane.vldN/vstN lowering
2019-04-23 09:36:39 +00:00
atomic-64bit.ll
ARM: Better codegen for 64-bit compares.
2016-03-21 18:00:02 +00:00
atomic-cmp.ll
Revert [MBP] Disable aggressive loop rotate in plain mode
2019-08-29 19:03:58 +00:00
atomic-cmpxchg.ll
Revert [MBP] Disable aggressive loop rotate in plain mode
2019-08-29 19:03:58 +00:00
atomic-load-store.ll
…
atomic-op.ll
Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg
2019-04-10 18:00:41 +00:00
atomic-ops-m33.ll
ARM: use acquire/release instruction variants when available.
2018-12-17 15:05:32 +00:00
atomic-ops-v8.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
atomicrmw_minmax.ll
…
available_externally.ll
…
avoid-cpsr-rmw.ll
[ARM] Thumb2: favor R4-R7 over R12/LR in allocation order when opt for minsize
2019-07-03 09:58:52 +00:00
bfc.ll
…
bfi.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
bfx.ll
[ARM] Add additional matching for UBFX instructions
2016-06-01 12:01:01 +00:00
bic.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
bicZext.ll
…
big-endian-eh-unwind.ll
…
big-endian-neon-bitconv.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
big-endian-neon-extend.ll
…
big-endian-neon-fp16-bitconv.ll
[ARM] Add bitcast/extract_subvec. of fp16 vectors
2019-04-29 10:28:07 +00:00
big-endian-neon-trunc-store.ll
…
big-endian-ret-f64.ll
…
big-endian-vector-callee.ll
[ARM] Split 128-bit vectors in BUILD_VECTOR lowering
2016-12-14 20:44:38 +00:00
big-endian-vector-caller.ll
…
bit-reverse-to-rbit.ll
…
bits.ll
…
bool-ext-inc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap16.ll
[ARM] Regenerate BSWAP16 tests
2019-08-01 11:12:10 +00:00
bswap-inline-asm.ll
…
build-attributes-encoding.s
[llvm-readobj] Change -long-option to --long-option in tests. NFC
2019-05-01 05:27:20 +00:00
build-attributes-fn-attr0.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr1.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr2.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr3.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr4.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr5.ll
Reapply r284571 (with the new tests fixed).
2016-10-19 13:43:02 +00:00
build-attributes-fn-attr6.ll
Don't update NoTrappingFPMath and FPDenormalMode in resetTargetOptions
2019-07-19 10:37:37 +00:00
build-attributes-optimization-minsize.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes-optimization-mixed.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes-optimization-optnone.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes-optimization-optsize.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes-optimization.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes.ll
[ARM] VFPv2 only supports 16 D registers.
2019-09-17 21:42:38 +00:00
bx_fold.ll
…
byval_load_align.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
byval-align.ll
…
cache-intrinsic.ll
…
call_nolink.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
call-noret-minsize.ll
…
call-noret.ll
…
call-tc.ll
[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently
2016-12-15 09:38:59 +00:00
call.ll
Don't print (PLT) on arm.
2016-06-16 16:09:53 +00:00
carry.ll
Address buildbot fallout from r259065
2016-01-28 18:59:04 +00:00
cbz-implicit-it-range.ll
[ARM] Account for implicit IT when calculating inline asm size
2018-10-08 09:38:28 +00:00
cfi-alignment.ll
…
clang-section.ll
Add support for #pragma clang section
2017-06-05 10:09:13 +00:00
clz.ll
[ARM] Lower llvm.ctlz.i32 to a libcall when clz is not available.
2018-08-22 21:47:14 +00:00
cmn.ll
[ARM] Make InstrEmitter mark CPSR defs dead for Thumb1.
2018-10-26 19:32:24 +00:00
cmp1-peephole-thumb.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
cmp2-peephole-thumb.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
cmp.ll
ARM: use target-specific SUBS node when combining cmp with cmov.
2018-12-03 11:16:21 +00:00
cmpxchg-idioms.ll
Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFromPredecessors: Also sink function calls without used results (PR41259)"
2019-06-17 07:47:28 +00:00
cmpxchg-O0-be.ll
ARM: fix big-endian 64-bit cmpxchg.
2017-06-30 19:51:02 +00:00
cmpxchg-O0.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
cmpxchg-weak.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cmpxchg.mir
Fixed typos in tests: s/CHEKC/CHECK/
2019-02-25 13:41:59 +00:00
coalesce-dbgvalue.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
coalesce-subregs.ll
…
code-placement.ll
Revert [MBP] Disable aggressive loop rotate in plain mode
2019-08-29 19:03:58 +00:00
codemodel.ll
[Targets] Add errors for tiny and kernel codemodel on targets that don't support them
2018-12-07 12:10:23 +00:00
coff-no-dead-strip.ll
test: fix ARM tests harder
2018-01-20 01:26:46 +00:00
combine-movc-sub.ll
…
combine-vmovdrr.ll
…
commute-movcc.ll
…
compare-call.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
constant-island-crash.ll
[Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables
2016-11-01 13:37:41 +00:00
constant-island-movwt.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
constant-islands-cfg.mir
[ARM] Fix for buildbots
2019-09-17 14:21:36 +00:00
constant-islands-split-IT.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
constant-islands.ll
…
constantfp.ll
Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.
2017-07-01 02:55:22 +00:00
constantpool-align.ll
[SDAG] Use ABI type alignment for constant pools when optimizing for size
2016-10-17 12:54:07 +00:00
constantpool-promote-dbg.ll
Remove irrelevant references to legacy git repositories from
2019-01-15 16:18:52 +00:00
constantpool-promote-duplicate.ll
ARM: track globals promoted to coalesced const pool entries
2017-09-07 04:00:13 +00:00
constantpool-promote-ldrh.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
constantpool-promote.ll
[ARM] Fix correctness checks in promoteToConstantPool.
2018-09-28 20:27:31 +00:00
constants.ll
…
copy-by-struct-i32.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
copy-cpsr.ll
…
copy-paired-reg.ll
…
cortex-a57-misched-alu.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-basic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-ldm-wrback.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
cortex-a57-misched-ldm.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
cortex-a57-misched-stm-wrback.ll
[CodeGen] Add dependency printer
2017-07-12 15:30:59 +00:00
cortex-a57-misched-stm.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-vadd.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-vfma.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-vldm-wrback.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
cortex-a57-misched-vldm.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
cortex-a57-misched-vstm-wrback.ll
[CodeGen] Add dependency printer
2017-07-12 15:30:59 +00:00
cortex-a57-misched-vstm.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-vsub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortexr52-misched-basic.ll
[ARM] Enable misched for R52.
2018-04-27 11:29:49 +00:00
crash-greedy-v6.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
crash-greedy.ll
[NFC] Make tests more robust for new optimizations
2019-05-25 14:10:20 +00:00
crash-O0.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
crash-on-pow2-shufflevector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
crash-shufflevector.ll
…
crash.ll
…
crc32.ll
…
cse-call.ll
[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)
2017-08-22 11:02:37 +00:00
cse-flags.ll
…
cse-ldrlit.ll
…
cse-libcalls.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
csr-split.ll
[NFC][Regalloc] Add testcases for D66576
2019-08-26 05:06:30 +00:00
ctor_order.ll
[IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format
2019-05-15 02:35:32 +00:00
ctors_dtors.ll
[IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format
2019-05-15 02:35:32 +00:00
cttz_vector.ll
[ARM] Regenerate cttz tests
2018-10-14 16:49:04 +00:00
cttz.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
cxx-tlscc.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
dag-combine-ldst.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
dagcombine-anyexttozeroext.ll
Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT"
2019-08-13 09:33:25 +00:00
dagcombine-concatvector.ll
…
darwin-eabi.ll
ARM: switch armv7em MachO triple to hard-float defaults and libcalls.
2018-07-19 12:44:51 +00:00
darwin-tls-preserved.ll
ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.
2017-04-19 18:07:54 +00:00
darwin-tls.ll
ARM: put extern __thread stubs in a special section.
2016-04-25 21:12:04 +00:00
data-in-code-annotations.ll
…
dbg-range-extension.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
dbg.ll
…
DbgValueOtherTargets.test
…
debug-frame-large-stack.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
debug-frame-no-debug.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
debug-frame-vararg.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
debug-frame.ll
[ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1.
2019-03-20 19:40:45 +00:00
debug-info-arg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-blocks.ll
Remove the obsolete BlockByRefStruct flag from LLVM IR
2019-09-18 22:38:56 +00:00
debug-info-branch-folding.ll
[ARM] preserve test intent by removing undef
2018-05-16 21:57:00 +00:00
debug-info-d16-reg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-no-frame.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-qreg.ll
[ARM] make test immune to scalarization improvements; NFC
2018-12-14 18:47:04 +00:00
debug-info-s16-reg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-sreg2.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-segmented-stacks.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debugtrap.ll
ARM: Use BKPT instead of TRAP to implement llvm.debugtrap.
2018-10-24 18:10:38 +00:00
default-float-abi.ll
Add support for musl-libc on ARM Linux.
2016-06-24 21:14:33 +00:00
default-reloc.ll
Fix default reloc model on ARM.
2016-05-28 10:41:15 +00:00
demanded-bits-and.ll
[ARM] Handle all-ones mask explicitly in targetShrinkDemandedConstant.
2018-08-22 20:13:45 +00:00
deprecated-asm.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
deps-fix.ll
Separate ExecutionDepsFix into 4 parts:
2018-01-22 10:05:23 +00:00
disable-fp-elim.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
disable-tail-calls.ll
…
div.ll
[ARM] Add support for armv7ve triple in llvm (PR31358).
2017-02-09 23:29:14 +00:00
divmod-eabi.ll
ARM: use divmod libcalls on embedded MachO platforms too.
2017-05-08 20:00:14 +00:00
divmod-hwdiv.ll
[ARM] Check for correct HW div when lowering divmod
2017-04-18 08:32:27 +00:00
divmod.ll
ARM: use divmod libcalls on embedded MachO platforms too.
2017-05-08 20:00:14 +00:00
domain-conv-vmovs.ll
…
dsp-loop-indexing.ll
[LSR] Generate cross iteration indexes
2019-02-07 13:32:54 +00:00
dsp-mlal.ll
[ARM] Automatically generate dsp-mlal.ll . NFC
2019-08-22 23:43:48 +00:00
dwarf-eh.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
dwarf-unwind.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
dyn-stackalloc.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
early-cfi-sections.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
eh-dispcont.ll
[ARM] Fix registers clobbered by SjLj EH on soft-float targets
2016-10-11 10:06:59 +00:00
eh-resume-darwin.ll
ARMv7k: base ABI decision on v7k Arch rather than watchos OS.
2016-01-27 19:32:29 +00:00
ehabi-filters.ll
…
ehabi-handlerdata-nounwind.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
ehabi-handlerdata.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
ehabi-no-landingpad.ll
…
ehabi-unwind.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
ehabi.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
elf-lcomm-align.ll
…
emit-big-cst.ll
…
emutls1.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
emutls_generic.ll
[MinGW] [ARM] Add stubs for potential automatic dllimported variables
2018-08-31 08:00:25 +00:00
emutls.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
execute-only-big-stack-frame.ll
[ARM] Allow execute only code on Cortex-m23
2018-09-28 08:55:19 +00:00
execute-only-section.ll
[ARM] Allow execute only code on Cortex-m23
2018-09-28 08:55:19 +00:00
execute-only.ll
[ARM] Allow execute only code on Cortex-m23
2018-09-28 08:55:19 +00:00
expand-pseudos.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
extload-knownzero.ll
…
extloadi1.ll
…
fabs-neon.ll
…
fabs-to-bfc.ll
…
fabss.ll
…
fadds.ll
…
fast-isel-align.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
fast-isel-binary.ll
…
fast-isel-br-const.ll
…
fast-isel-br-phi.ll
…
fast-isel-call-multi-reg-return.ll
…
fast-isel-call.ll
[ARM] Code-generation infrastructure for MVE.
2019-06-25 16:48:46 +00:00
fast-isel-cmp-imm.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fast-isel-conversion.ll
…
fast-isel-crash2.ll
…
fast-isel-crash.ll
…
fast-isel-deadcode.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
fast-isel-ext.ll
…
fast-isel-fold.ll
…
fast-isel-frameaddr.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
fast-isel-GEP-coalesce.ll
…
fast-isel-icmp.ll
…
fast-isel-indirectbr.ll
…
fast-isel-inline-asm.ll
…
fast-isel-intrinsic.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
fast-isel-ldr-str-arm.ll
…
fast-isel-ldr-str-thumb-neg-index.ll
…
fast-isel-ldrh-strh-arm.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
fast-isel-load-store-verify.ll
…
fast-isel-mvn.ll
…
fast-isel-pic.ll
…
fast-isel-pie.ll
Use shouldAssumeDSOLocal.
2016-06-20 17:45:33 +00:00
fast-isel-pred.ll
…
fast-isel-redefinition.ll
…
fast-isel-remat-same-constant.ll
…
fast-isel-ret.ll
…
fast-isel-select.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
fast-isel-shift-materialize.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
fast-isel-shifter.ll
…
fast-isel-static.ll
…
fast-isel-update-valuemap-for-extract.ll
…
fast-isel-vaddd.ll
…
fast-isel-vararg.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
fast-isel.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
fast-tail-call.ll
…
fastcc-vfp.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-thumb-litpool.ll
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00
favor-low-reg-for-Osize.ll
[ARM] Thumb2: favor R4-R7 over R12/LR in allocation order when opt for minsize
2019-07-03 09:58:52 +00:00
fcmp-xo.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
fcopysign.ll
…
fdivs.ll
…
fence-singlethread.ll
Enhance synchscope representation
2017-07-11 22:23:00 +00:00
fixunsdfdi.ll
…
flag-crash.ll
…
float-helpers.s
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
floorf.ll
…
fmacs.ll
[ARM][NFCI] Do not fuse VADD and VMUL, continued (1/2)
2018-10-17 07:26:35 +00:00
fmdrr-fmrrd.ll
…
fmscs.ll
…
fmuls.ll
…
fnattr-trap.ll
…
fnegs.ll
…
fnmacs.ll
…
fnmscs.ll
[ARM] Add missing selection patterns for vnmla
2017-09-22 09:50:52 +00:00
fnmul.ll
easing the constraint for isNegatibleForFree and GetNegatedExpression
2018-06-14 20:54:13 +00:00
fnmuls.ll
…
fold-const.ll
…
fold-sext-sextload.ll
[ARM][NFC] Make tests immune to better div optimizations
2018-10-30 22:08:13 +00:00
fold-stack-adjust.ll
Bug fix on function epilog optimization (ARM backend)
2019-09-03 09:51:19 +00:00
fold-zext-zextload.ll
[ARM][NFC] Make tests immune to better div optimizations
2018-10-30 22:08:13 +00:00
formal.ll
…
fp16-args.ll
…
fp16-frame-lowering.ll
[ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer
2019-03-01 14:20:28 +00:00
fp16-fullfp16.ll
[ARM] Select fp16 fma
2019-05-26 11:34:30 +00:00
fp16-insert-extract.ll
[ARM] Add FP16 vector insert/extract patterns
2019-06-04 09:39:55 +00:00
fp16-instructions.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
fp16-intrinsic-vector-1op.ll
[ARM] Support for v4f16 and v8f16 vectors
2018-03-19 13:35:25 +00:00
fp16-intrinsic-vector-2op.ll
[ARM] Support for v4f16 and v8f16 vectors
2018-03-19 13:35:25 +00:00
fp16-litpool2-arm.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
fp16-litpool3-arm.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
fp16-litpool-arm.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
fp16-litpool-thumb.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
fp16-load-store.ll
[ARM] Fix selection of VLDR.16 instruction with imm offset
2019-03-04 09:17:38 +00:00
fp16-no-condition.ll
[ARM] Make fullfp16 instructions not conditionalisable.
2019-02-25 10:39:53 +00:00
fp16-promote.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
fp16-v3.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
fp16-vector-argument.ll
[ARM] Add bitcast/extract_subvec. of fp16 vectors
2019-04-29 10:28:07 +00:00
fp16-vld.ll
[ARM] FP16: support vld1.16 for vector loads with post-increment
2018-12-03 08:26:34 +00:00
fp16-vldlane-vstlane.ll
[ARM] Add FP16 vector insert/extract patterns
2019-06-04 09:39:55 +00:00
fp16-vminmaxnm-safe.ll
[ARM] FP16 vmaxnm/vminnm scalar instructions
2018-04-13 15:34:26 +00:00
fp16-vminmaxnm-vector.ll
[ARM] FP16: support the vector vmin and vmax variants
2018-08-08 07:20:15 +00:00
fp16-vminmaxnm.ll
[ARM] FP16 vmaxnm/vminnm scalar instructions
2018-04-13 15:34:26 +00:00
fp16.ll
NFC - Various typo fixes in tests
2018-07-04 13:28:39 +00:00
fp_convert.ll
…
fp-arg-shuffle.ll
…
fp-fast.ll
…
fp-only-sp.ll
[ARM] Replace fp-only-sp and d16 with fp64 and d32.
2019-05-28 16:13:20 +00:00
fp.ll
…
fparith.ll
…
fpcmp_ueq.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fpcmp-f64-neon-opt.ll
…
fpcmp-opt.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
fpcmp.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
fpconsts.ll
…
fpconv.ll
[ARM] Replace fp-only-sp and d16 with fp64 and d32.
2019-05-28 16:13:20 +00:00
fpmem.ll
…
fpoffset_overflow.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fpow.ll
…
fpowi.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
fpscr-intrinsics.ll
[ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each other""
2017-03-07 11:17:53 +00:00
fptoint.ll
…
fpvcvtr.ll
[ARM] Add LLVM tests for the vcvtr builtins
2018-02-17 19:59:29 +00:00
frame-register.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
fsubs.ll
…
ftrunc.ll
[DAGCombine] (float)((int) f) --> ftrunc (PR36617)
2018-04-20 15:07:55 +00:00
func-argpassing-endian.ll
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
2018-07-17 09:45:35 +00:00
fusedMAC.ll
[ARM] Do not fuse VADD and VMUL, continued (2/2)
2018-10-17 10:05:44 +00:00
gep-optimization.ll
…
ghc-tcreturn-lowered.ll
…
global-merge-1.ll
[GlobalMerge] Set the alignment on merged global structs
2018-06-06 14:48:32 +00:00
global-merge-addrspace.ll
…
global-merge-alignment.ll
[GlobalMerge] Set the alignment on merged global structs
2018-06-06 14:48:32 +00:00
global-merge-dllexport.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
global-merge-external-2.ll
[GlobalMerge] Fix GlobalMerge on bss external global variables.
2018-08-30 00:49:50 +00:00
global-merge-external.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
global-merge.ll
[GlobalMerge] Exit early if only one global is to be merged
2018-05-19 18:00:02 +00:00
globals.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
gnu_mcount_nc.ll
Reland "[ARM] push LR before __gnu_mcount_nc"
2019-08-16 23:30:16 +00:00
gpr-paired-spill-thumbinst.ll
…
gpr-paired-spill.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
gv-stubs-crash.ll
…
half.ll
[ARM] Explicit lowering of half <-> double conversions.
2019-06-25 11:24:50 +00:00
hardfloat_neon.ll
…
hello.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
hfa-in-contiguous-registers.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis.ll
…
hints.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
2019-07-24 22:57:22 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
2019-07-24 22:57:22 +00:00
i1.ll
[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)
2017-08-22 11:02:37 +00:00
iabs.ll
…
ifconv-kills.ll
…
ifconv-regmask.ll
…
ifcvt1.ll
…
ifcvt2.ll
…
ifcvt3.ll
…
ifcvt4.ll
Codegen: Tail Merge: Be less aggressive with special cases.
2016-08-10 18:36:18 +00:00
ifcvt5.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
ifcvt6.ll
…
ifcvt7.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll
[ARM] preserve test intent by removing undef
2018-05-16 22:20:33 +00:00
ifcvt11.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
ifcvt12.ll
…
ifcvt_canFallThroughTo.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_diamond_unanalyzable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_forked_diamond_unanalyzable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_simple_bad_zero_prob_succ.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_simple_unanalyzable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_triangleSameCvtNext.mir
[IfConversion] Disallow TBB == FBB for valid triangles
2019-09-26 06:35:55 +00:00
ifcvt_triangleWoCvtToNextEdge.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt-branch-weight-bug.ll
[ARM] Remove icmp undef from reduced tests
2019-03-15 11:14:59 +00:00
ifcvt-branch-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
ifcvt-callback.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
ifcvt-dead-def.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
ifcvt-diamond-unanalyzable-common.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
ifcvt-iter-indbr.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
ifcvt-regmask-noreturn.ll
…
ifcvt-size.mir
[IfCvt][ARM] Optimise diamond if-conversion for code size
2019-10-10 09:58:28 +00:00
illegal-bitfield-loadstore.ll
[ARM] Adjust AND immediates to make them cheaper to select.
2018-08-10 21:21:53 +00:00
illegal-vector-bitcast.ll
…
imm-peephole-arm.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
imm-peephole-thumb.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
imm.ll
…
immcost.ll
[ARM] ADD with a negative offset can become SUB for free
2016-09-09 13:35:36 +00:00
inc-of-add.ll
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
2019-07-03 09:41:35 +00:00
indexed-mem.ll
[DAGCombine] Enable more pre-indexed stores
2019-01-23 09:11:49 +00:00
indirect-hidden.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
indirect-reg-input.ll
…
indirectbr-2.ll
…
indirectbr-3.ll
[IfConversion] Maintain the CFG when predicating/merging blocks in IfConvert*
2017-08-11 06:57:08 +00:00
indirectbr.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
inline-asm-clobber.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
inline-asm-i-constraint-i1.ll
[TargetLowering] Extend bool args to inline-asm according to getBooleanType
2019-05-22 16:16:15 +00:00
inline-asm-multilevel-gep.ll
[TargetLowering] Handle multi depth GEPs w/ inline asm constraints
2019-05-13 17:27:44 +00:00
inline-diagnostics.ll
…
inlineasm2.ll
…
inlineasm3.ll
[ARM] Skip inline asm memory operands in DAGToDAGISel
2016-07-20 09:48:24 +00:00
inlineasm4.ll
…
inlineasm-64bit.ll
Fix uninitialized read in ARM's PrintAsmOperand
2018-07-30 16:45:40 +00:00
inlineasm-error-t-toofewregs.ll
[ARM] Fix redirect in inline assembly test
2018-02-15 19:17:55 +00:00
inlineasm-global.ll
…
inlineasm-imm-arm.ll
…
inlineasm-imm-thumb2.ll
…
inlineasm-imm-thumb.ll
…
inlineasm-ldr-pseudo.ll
[ARM] Fixup tests to take into account mov translation. NFC.
2016-05-12 21:22:37 +00:00
inlineasm-operand-implicit-cast.ll
[ARM] Replace fp-only-sp and d16 with fp64 and d32.
2019-05-28 16:13:20 +00:00
inlineasm-output-template.ll
[AsmPrinter] refactor to support %c w/ GlobalAddress'
2019-04-26 18:45:04 +00:00
inlineasm-switch-mode-oneway-from-arm.ll
…
inlineasm-switch-mode-oneway-from-thumb.ll
Revert r265817
2016-04-08 18:15:37 +00:00
inlineasm-switch-mode.ll
[llvm-objdump] Switch between ARM/Thumb based on mapping symbols.
2019-06-20 00:29:40 +00:00
inlineasm-X-allocation.ll
[ARM] VFPv2 only supports 16 D registers.
2019-09-17 21:42:38 +00:00
inlineasm-X-constraint.ll
Pass the test file in through stdin instead of by filename.
2016-04-26 03:43:49 +00:00
inlineasm.ll
[ARM] Support inline assembler constraints for MVE.
2019-06-25 16:49:32 +00:00
insn-sched1.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
int-to-fp.ll
…
integer_insertelement.ll
…
interrupt-attr.ll
ARM: use r7 as the frame-pointer on all MachO targets.
2016-04-11 22:27:40 +00:00
interval-update-remat.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
interwork.ll
[ARM] Add ".code 32" to functions in the ARM instruction set
2016-09-13 12:18:15 +00:00
intrinsics-coprocessor.ll
[ARM] Avoid using ARM instructions in Thumb mode
2017-01-31 14:35:01 +00:00
intrinsics-crypto.ll
…
intrinsics-memory-barrier.ll
…
intrinsics-overflow.ll
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
2019-02-22 12:23:31 +00:00
intrinsics-v8.ll
…
invalid-target.ll
[ADT] Normalize empty triple components
2018-08-08 22:23:57 +00:00
invalidated-save-point.ll
[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.
2017-06-06 08:16:19 +00:00
invoke-donothing-assert.ll
…
ipra-exact-definition.ll
[IPRA] Don't rely on non-exact function definitions
2019-07-19 09:59:26 +00:00
ipra-no-csr.ll
[IPRA][ARM] Disable no-CSR optimisation for ARM
2019-08-02 10:23:17 +00:00
ipra-r0-returned.ll
[IPRA][ARM] Make use of the "returned" parameter attribute
2019-07-22 08:44:36 +00:00
ipra-reg-usage.ll
RegUsageInfoCollector: Skip AMDGPU entry point functions
2019-07-05 23:33:43 +00:00
ipra.ll
Reland: Fix and test inter-procedural register allocation for ARM
2019-08-05 09:04:10 +00:00
isel-v8i32-crash.ll
…
ispositive.ll
…
jump-table-islands-split.ll
…
jump-table-islands.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
jump-table-tbh.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
jumptable-label.ll
…
krait-cpu-div-attribute.ll
…
large-stack.ll
…
large-vector.ll
ARM: don't try to over-align large vectors as arguments.
2018-05-03 12:54:25 +00:00
ldaex-stlex.ll
…
ldc2l.ll
[ARM] Add backend support for load/store intrinsics.
2016-05-31 12:39:30 +00:00
ldm-base-writeback.ll
[ARM] Transform LDMs into writeback form to save code size
2016-06-07 11:47:24 +00:00
ldm-stm-base-materialization.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
ldm-stm-i256.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
ldm.ll
…
ldr_ext.ll
…
ldr_frame.ll
Fix some erroneous lit test failures due to unlucky name of working directory.
2016-02-17 16:35:18 +00:00
ldr_post.ll
…
ldr_pre.ll
…
ldr.ll
…
ldrcppic.ll
[ARM] Add MemOperand to LDRcp to enable DCE.
2018-11-09 23:09:17 +00:00
ldrd-memoper.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
ldrd.ll
[ARM][NFC] codegen tests cleanup: remove dangling check prefixes
2018-11-23 10:08:39 +00:00
ldrex-frame-size.ll
[ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.
2019-06-26 23:46:51 +00:00
ldst-f32-2-i32.ll
[DAGCombiner] Exploiting more about the transformation of TransformFPLoadStorePair function
2019-07-02 02:54:52 +00:00
ldstrex-m.ll
ARM: use acquire/release instruction variants when available.
2018-12-17 15:05:32 +00:00
ldstrex.ll
ARM: fix Thumb2 CodeGen for ldrex with folded frame-index.
2018-09-07 09:21:25 +00:00
legalize-fneg.ll
[LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types
2019-02-11 22:10:08 +00:00
legalize-unaligned-load.ll
Delete Default and JITDefault code models
2017-08-03 02:16:21 +00:00
lit.local.cfg
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
litpool-licm.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
llrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
llround-conv.ll
[CodeGen] Add lround/llround builtins
2019-05-16 13:15:27 +00:00
load_i1_select.ll
[ARM] Allow CMPZ transforms even if the input has multiple uses.
2018-06-08 21:16:56 +00:00
load_store_multiple.ll
[ARM] Fix isRenamable flag setting on expanded VSTMDIA opcode.
2017-12-14 18:06:25 +00:00
load_store_opt_clobber_cpsr.mir
[CodeGen] Fix forward scan in MachineBasicBlock::computeRegisterLiveness.
2018-11-14 00:39:29 +00:00
load_store_opt_kill.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
load_store_opt_reg_limit.mir
[ARM][ARMLoadStoreOptimizer]
2018-09-24 10:42:22 +00:00
load-address-masked.ll
…
load-arm.ll
ARM: add extra test for addrmode folding.
2017-05-03 16:54:30 +00:00
load-combine-big-endian.ll
[DAG] Refactor DAGCombiner::ReassociateOps
2019-04-29 17:50:10 +00:00
load-combine.ll
[DAG] Refactor DAGCombiner::ReassociateOps
2019-04-29 17:50:10 +00:00
load-global2.ll
[arm] Fix Unnecessary reloads from GOT.
2017-11-13 20:45:38 +00:00
load-global.ll
…
load-store-flags.ll
…
load.ll
[ARM] Use sub for negative offset load/store in thumb1
2019-01-29 10:40:31 +00:00
local-call.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
log2_not_readnone.ll
…
long_shift.ll
[ARM] Favour PL/MI over GE/LT when possible
2019-07-04 08:58:58 +00:00
long-setcc.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
long.ll
…
longMAC.ll
[ARM] Return true in enableMultipleCopyHints().
2018-02-16 09:51:01 +00:00
loop-align-cortex-m.ll
[LSR] Generate cross iteration indexes
2019-02-07 13:32:54 +00:00
loop-indexing.ll
[ARM] Run ARMParallelDSP in the IRPasses phase
2019-03-14 10:57:40 +00:00
loopvectorize_pr33804.ll
[LoopVectorizer] Add more testcases for PR33804.
2017-09-18 17:28:15 +00:00
lowerMUL-newload.ll
Regenerate test.
2019-01-07 12:21:13 +00:00
lrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
lround-conv.ll
[CodeGen] Add lround/llround builtins
2019-05-16 13:15:27 +00:00
lsr-code-insertion.ll
ARM: override cost function to re-enable ConstantHoisting (& fix it).
2016-04-13 23:08:27 +00:00
lsr-icmp-imm.ll
[Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0)
2016-09-09 12:52:24 +00:00
lsr-scale-addr-mode.ll
[ARM] Assign cost of scaling for Cortex-R52
2016-10-18 09:08:54 +00:00
lsr-setupcost.ll
[LSR] Attempt to increase the accuracy of LSR's setup cost
2019-03-07 13:44:40 +00:00
lsr-undef-in-binop.ll
[SCEV][LSR] Prevent using undefined value in binops
2019-07-03 09:36:32 +00:00
lsr-unfolded-offset.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
machine-copyprop.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
machine-cse-cmp.ll
[DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B)
2018-07-28 00:27:25 +00:00
machine-licm.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
machine-verifier.mir
[ARM] Add MachineVerifier logic for some Thumb1 instructions.
2019-03-15 21:44:49 +00:00
macho-embedded-float.ll
Fixed typos in tests: s/CEHCK/CHECK/
2019-02-25 13:12:33 +00:00
macho-extern-hidden.ll
Use isTargetMachO instead of isTargetDarwin.
2016-08-24 19:02:29 +00:00
macho-frame-offset.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
MachO-subtypes.ll
[llvm-readobj] Change -long-option to --long-option in tests. NFC
2019-05-01 05:27:20 +00:00
macho-trap.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
mature-mc-support.ll
[LLC] Add an inline assembly diagnostics handler.
2017-02-03 11:14:39 +00:00
mem.ll
…
memcpy-inline.ll
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
2018-12-13 09:56:19 +00:00
memcpy-ldm-stm.ll
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
2018-12-13 09:56:19 +00:00
memcpy-no-inline.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memfunc.ll
[IR] Allow increasing the alignment of dso-local globals.
2018-10-31 23:03:58 +00:00
memset-inline.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
MergeConsecutiveStores.ll
…
metadata-default.ll
…
metadata-short-enums.ll
…
metadata-short-wchar.ll
…
minmax.ll
…
minsize-call-cse.ll
[ARM] Prefer indirect calls in minsize mode
2016-07-15 07:55:21 +00:00
minsize-imms.ll
…
minsize-litpools.ll
…
misched-copy-arm.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
misched-fp-basic.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
misched-fusion-aes.ll
[DAGCombiner] [CodeGenPrepare] More comprehensive GEP splitting
2019-06-17 10:54:12 +00:00
misched-fusion-lit.ll
[ARM] Add new target feature to fuse literal generation
2018-07-27 18:16:47 +00:00
misched-int-basic-thumb2.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
misched-int-basic.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
mls.ll
…
movcc-double.ll
…
movt-movw-global.ll
…
movt.ll
[ARM] Add Cortex-M35P
2019-02-26 12:02:12 +00:00
msr-it-block.ll
[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic
2017-02-10 17:41:08 +00:00
mul_const.ll
…
mul.ll
…
mulhi.ll
…
mult-alt-generic-arm.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
mvn.ll
…
named-reg-alloc.ll
…
named-reg-notareg.ll
…
negate-i1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
negative-offset.ll
…
neon_arith1.ll
…
neon_cmp.ll
…
neon_div.ll
ARM: fix vectorized division on WoA
2017-01-27 03:41:53 +00:00
neon_fpconv.ll
…
neon_ld1.ll
…
neon_ld2.ll
…
neon_minmax.ll
…
neon_shift.ll
…
neon_spill.ll
…
neon_vabs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
neon_vshl_minint.ll
…
neon-dot-product.ll
[ARM] Codegen for v8.2A dot product intrinsics
2018-04-27 12:50:40 +00:00
neon-fma.ll
…
neon-spfp.ll
…
neon-v8.1a.ll
…
nest-register.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
nnan-fsub.ll
Move three folds for FADD, FSUB and FMUL in the DAG combiner away from Unsafe to more aligned checks that reflect context
2019-07-10 18:23:26 +00:00
no_redundant_trunc_for_cmp.ll
DAG: avoid duplicated truncating for sign extended operand
2016-07-29 23:33:48 +00:00
no-arm-mode.ll
[ARM] Emit error when ARM exec mode is not available.
2017-08-09 15:39:10 +00:00
no-cfi.ll
Canonicalize the representation of empty an expression in DIGlobalVariableExpression
2017-08-30 18:06:51 +00:00
no-cmov2bfi.ll
[ARM] Fix computeKnownBits for ARMISD::CMOV
2017-03-23 16:47:47 +00:00
no-fpscr-liveness.ll
LiveIntervalAnalysis: Fix alias regunit reserved definition
2017-09-01 18:36:26 +00:00
no-fpu.ll
[ARM] Code-generation infrastructure for MVE.
2019-06-25 16:48:46 +00:00
no-tail-call.ll
…
none-macho-v4t.ll
…
none-macho.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
nonreserved-callframe-with-basereg.mir
ARM: use correct offset from base pointer (r6) in call frame regions.
2018-12-07 13:43:55 +00:00
noopt-dmb-v7.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
nop_concat_vectors.ll
…
noreturn-csr-skip.mir
Reapply ARM: Do not spill CSR to stack on entry to noreturn functions
2018-04-07 10:57:03 +00:00
noreturn.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
null-streamer.ll
…
O3-pipeline.ll
Reapply r374743 with a fix for the ocaml binding
2019-10-14 16:15:14 +00:00
opt-shuff-tstore.ll
…
optimize-dmbs-v7.ll
…
optselect-regclass.ll
…
out-of-registers.ll
…
overflow-intrinsic-optimizations.ll
[ARM] Fix PR37382: Don't optimize mul.with.overflow on thumbv6m.
2018-07-02 21:05:26 +00:00
pack.ll
…
peephole-bitcast.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
peephole-phi.mir
Fixed typos in tests: s/CHEKC/CHECK/
2019-02-25 13:41:59 +00:00
pei-swiftself.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
phi.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
pic.ll
Don't print (PLT) on arm.
2016-06-16 16:09:53 +00:00
pie.ll
Add a use of shouldAssumeDSOLocal to ARM.
2016-05-31 15:31:55 +00:00
plt-relative-reloc.ll
CodeGen: Use PLT relocations for relative references to unnamed_addr functions.
2016-04-22 20:40:10 +00:00
popcnt.ll
[NFC] Fixed arm/aarch64 test
2019-06-11 11:09:25 +00:00
pow.75.ll
[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))
2019-02-08 19:50:58 +00:00
pow.ll
[DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x))
2018-09-05 17:01:56 +00:00
pr3502.ll
…
pr13249.ll
…
pr18364-movw.ll
…
pr25317.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
pr25838.ll
[LivePhysRegs] Fix handling of return instructions.
2018-02-06 23:00:17 +00:00
pr26669.ll
[SjLjEHPrepare] Don't grab pointers to functions in doInitialization
2016-02-19 03:13:40 +00:00
pr32545.ll
[SDAG] Fix visitAND optimization to deal with vector extract case again.
2017-04-06 19:05:41 +00:00
pr32578.ll
Revert [MBP] Disable aggressive loop rotate in plain mode
2019-08-29 19:03:58 +00:00
pr34045-2.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr34045.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr35103.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr36577.ll
[DAGCombiner] form 'not' ops ahead of shifts (PR39657)
2018-11-22 19:24:10 +00:00
pr39060.ll
[ARM] Fix for PR39060
2018-09-26 10:56:00 +00:00
pr39571.ll
[DAGCombiner] Fix load-store forwarding of indexed loads.
2018-11-12 14:05:40 +00:00
pr42062.ll
[ARM][FIX] Ran out of registers due tail recursion
2019-06-03 08:58:05 +00:00
pr42638-VMOVRRDCombine.ll
[ARM][DAGCOMBINE][FIX] PerformVMOVRRDCombine
2019-07-18 10:05:56 +00:00
PR15053.ll
…
PR32721_ifcvt_triangle_unanalyzable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
PR35379.ll
[ARM] Fix PR35379 - incorrect unwind information when compiling with -Oz
2018-01-08 14:47:19 +00:00
preferred-align.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
prefetch.ll
…
prera-ldst-aliasing.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
prera-ldst-insertpt.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
print-memb-operand.ll
…
print-registers.ll
Fix "Q" and "R" inline assembly template modifiers for big-endian Arm
2018-08-30 10:28:23 +00:00
private.ll
…
proc-resource-sched.ll
Adjust MachineScheduler to use ProcResource counts
2019-05-10 16:54:32 +00:00
r7-fixed-darwin.ll
ARM-Darwin: keep the frame register reserved even if not updated.
2019-10-04 12:29:32 +00:00
rbit.ll
[SelectionDAG] Add support for BITREVERSE constant folding
2017-01-16 13:39:00 +00:00
readcyclecounter.ll
…
readonly-aliases.ll
ARM: handle checking aliases with out-of-bounds GEPs
2018-10-24 00:00:52 +00:00
readtp.ll
Add newline to end of test file. NFC.
2017-09-14 14:48:59 +00:00
reg_sequence.ll
[ARM] tighten test checks; NFC
2019-04-17 16:51:09 +00:00
register-scavenger-exceptions.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
regpair_hint_phys.ll
…
relax-per-target-feature.ll
[MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixup
2018-06-06 09:40:06 +00:00
rem_crash.ll
llvm/test/CodeGen/ARM/rem_crash.ll: Avoid unsupported targets to specify explicit triple.
2016-03-03 22:38:39 +00:00
ret0.ll
…
ret_arg1.ll
…
ret_arg2.ll
…
ret_arg3.ll
…
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
…
ret_f64_arg_split.ll
…
ret_f64_arg_stack.ll
…
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
…
ret_i128_arg2.ll
…
ret_sret_vector.ll
…
ret_void.ll
…
returned-ext.ll
Revert "Disable this-return argument forwarding on ARM/AArch64"
2016-07-20 04:13:01 +00:00
returned-trunc-tail-calls.ll
…
rev.ll
(Re)generate various tests. NFC
2019-10-08 16:16:26 +00:00
ror.ll
[ARM] Regenerate rotation tests
2019-07-29 09:48:07 +00:00
rotate.ll
…
sadd_sat.ll
Revert 374373: [Codegen] Alter the default promotion for saturating adds and subs
2019-10-11 20:33:03 +00:00
sat-to-bitop.ll
[ARM] Favour PL/MI over GE/LT when possible
2019-07-04 08:58:58 +00:00
saxpy10-a9.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
sbfx.ll
…
sched-it-debug-nodes.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
sdiv-pow2-arm-size.ll
[ARM] Don't expand sdiv when optimising for minsize
2018-11-30 08:14:28 +00:00
sdiv-pow2-thumb-size.ll
[ARM] Don't expand sdiv when optimising for minsize
2018-11-30 08:14:28 +00:00
section-name.ll
…
section.ll
…
segmented-stacks-dynamic.ll
Fix ARMv4 support
2017-08-28 20:20:47 +00:00
segmented-stacks.ll
[X86,ARM] Retain split-stack prolog check for sibling calls
2018-06-26 14:11:30 +00:00
select_const.ll
[ARM] Adjust AND immediates to make them cheaper to select.
2018-08-10 21:21:53 +00:00
select_xform.ll
[ARM] Return true in enableMultipleCopyHints().
2018-02-16 09:51:01 +00:00
select-imm.ll
[ARM] Optimize expressions like "return x != 0;" for Thumb1.
2019-04-02 00:01:23 +00:00
select-undef.ll
…
select.ll
[DAGCombiner][X86][ARM] Teach visitMULO to fold multiplies with 0 to 0 and no carry.
2019-09-08 19:24:39 +00:00
setcc-logic.ll
[DAGCombiner] allow hoisting vector bitwise logic ahead of truncates
2018-12-16 14:57:04 +00:00
setcc-type-mismatch.ll
…
setjmp_longjmp.ll
[ARM] Restore the right frame pointer register in Int_eh_sjlj_longjmp
2017-09-28 19:04:30 +00:00
shift_minsize.ll
[SelectionDAG] Codesize: don't expand SHIFT to SHIFT_PARTS
2019-01-31 08:07:30 +00:00
shift_parts.ll
Reapply: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32
2019-08-22 10:29:20 +00:00
shift-combine.ll
NFC - Various typo fixes in tests
2018-07-04 13:28:39 +00:00
shift-i64.ll
[ARM] Favour PL/MI over GE/LT when possible
2019-07-04 08:58:58 +00:00
shifter_operand.ll
ARM: don't mangle DAG constant if it has more than one use
2016-01-29 19:18:46 +00:00
shuffle.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
sincos.ll
[TargetLowering] Android has sincos functions
2018-09-18 13:18:21 +00:00
single-issue-r52.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
sjlj-prepare-critical-edge.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
sjljeh-swifterror.ll
SjLjEHPrepare: Don't reg-to-mem swifterror values
2018-03-14 15:44:07 +00:00
sjljehprepare-lower-empty-struct.ll
[ARM] Fix SJLJ exception handling when manually chosen on a platform where it isn't default
2017-09-28 19:04:14 +00:00
smml.ll
[DebugInfo][If-Converter] Update call site info during the optimization
2019-10-08 15:43:12 +00:00
smul.ll
[ARM] Add missing patterns for DSP muls
2019-01-08 10:12:36 +00:00
softfp-constant-comparison.ll
[ARM] VFPv2 only supports 16 D registers.
2019-09-17 21:42:38 +00:00
softfp-fabs-fneg.ll
[ARM][NFC] codegen tests cleanup: remove dangling check prefixes
2018-11-23 10:08:39 +00:00
space-directive.ll
…
special-reg-acore.ll
…
special-reg-mcore.ll
[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic
2017-02-10 17:41:08 +00:00
special-reg-v8m-base.ll
…
special-reg-v8m-main.ll
[ARM] Unify handling of M-Class system registers
2017-07-19 12:57:16 +00:00
special-reg.ll
…
spill-q.ll
[ARM] preserve test intent by removing undef
2018-05-16 22:20:11 +00:00
splitkit.ll
SplitKit: Fix liveness recomputation in some remat cases.
2018-02-02 00:08:19 +00:00
ssat-lower.ll
…
ssat-upper.ll
…
ssat-v4t.ll
[ARM] Saturation instructions are DSP-only
2016-07-25 22:25:25 +00:00
ssat.ll
[ARM] Saturation instructions are DSP-only
2016-07-25 22:25:25 +00:00
ssp-data-layout.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
ssub_sat.ll
Revert 374373: [Codegen] Alter the default promotion for saturating adds and subs
2019-10-11 20:33:03 +00:00
stack_guard_remat.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stack-alignment.ll
…
stack-frame.ll
…
stack-guard-reassign.ll
[CodeGen] Don't resolve the stack protector frame accesses until PEI
2019-07-25 22:23:48 +00:00
stack-protector-bmovpcb_call.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
stack-size-section.ll
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
2018-06-22 10:53:47 +00:00
stackpointer.ll
…
static-addr-hoisting.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
stc2.ll
[ARM] Add backend support for load/store intrinsics.
2016-05-31 12:39:30 +00:00
stm.ll
…
str_post.ll
…
str_pre-2.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
str_pre.ll
…
str_trunc.ll
…
struct_byval_arm_t1_t2.ll
[ARM] Return true in enableMultipleCopyHints().
2018-02-16 09:51:01 +00:00
struct_byval.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
struct-byval-frame-index.ll
[ARM] Remove icmp undef from reduced tests
2019-03-15 11:14:59 +00:00
sub-cmp-peephole.ll
DAG combiner: fold (select, C, X, undef) -> X
2018-11-16 23:13:38 +00:00
sub-from-const-hoisting.ll
[NFC][ARM] Add a test that potentially causes endless combine loop with D62266
2019-05-30 21:41:21 +00:00
sub-of-not.ll
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
2019-07-03 09:41:35 +00:00
sub.ll
[ARM] Add v8m.base pattern for add negative imm
2019-02-11 11:35:42 +00:00
subreg-remat.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
subtarget-features-long-calls.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
subtarget-no-movt.ll
[ARM] Thumb2: ConstantMaterializationCost
2019-01-31 08:38:06 +00:00
swift-atomics.ll
…
swift-ios.ll
Swift Calling Convention: swiftcc for ARM.
2016-04-05 22:44:44 +00:00
swift-return.ll
More swift calling convention tests
2016-10-28 17:21:05 +00:00
swift-vldm.ll
ARM: Introduce conservative load/store optimization mode
2016-03-02 19:20:00 +00:00
swifterror.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
swiftself.ll
[ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns'
2017-02-08 22:30:47 +00:00
switch-minsize.ll
[SDAGBuilder] Don't create a binary tree for switches in minsize mode
2016-09-08 13:12:22 +00:00
sxt_rot.ll
[ARM] Improve sxta{b|h} and uxta{b|h} tests
2016-08-10 09:34:34 +00:00
t2-imm.ll
…
t2-shrink-ldrpost.ll
[ARM] Shrink post-indexed LDR and STR to LDM/STM
2016-06-07 12:13:34 +00:00
t2abs-killflags.ll
…
tail-call-builtin.ll
Revert "CodeGen: ensure that libcalls are always AAPCS CC"
2016-09-07 03:17:19 +00:00
tail-call-float.ll
[ARM] Relax restriction on variadic functions for tailcall optimization
2016-11-17 10:56:58 +00:00
tail-call-scheduling.ll
[ARM] Glue register copies to tail calls.
2019-05-06 23:21:59 +00:00
tail-call-weak.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
tail-call.ll
[CodeGen] Enable tail calls for functions with NonNull attributes.
2018-09-26 10:46:18 +00:00
tail-dup-bundle.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
tail-dup-kill-flags.ll
…
tail-dup.ll
…
tail-merge-branch-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
tail-opts.ll
[BranchFolding] Tail common all identical unreachable blocks
2017-02-14 21:02:24 +00:00
tailcall-mem-intrinsics.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
taildup-branch-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
test-sharedidx.ll
…
this-return.ll
Revert "Disable this-return argument forwarding on ARM/AArch64"
2016-07-20 04:13:01 +00:00
thread_pointer.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
thumb1_return_sequence.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
thumb1-div.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
thumb1-ldst-opt.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
thumb1-varalloc.ll
[ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.
2019-06-26 23:46:51 +00:00
thumb2-it-block.ll
[NFC] Use stdin for some tests instead of positional argument.
2017-06-29 14:51:54 +00:00
thumb2-size-opt.ll
ARM: check alignment before transforming ldr -> ldm (or similar).
2016-09-19 09:11:09 +00:00
thumb2-size-reduction-internal-flags.ll
…
thumb_indirect_calls.ll
Fix additional cases of more that two dashes for options in tests.
2019-04-29 18:58:52 +00:00
thumb-alignment.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
thumb-big-stack.ll
RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs
2019-03-19 19:01:34 +00:00
thumb-litpool.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
thumb-stub.ll
Avoid a load for local functions.
2016-06-01 21:57:11 +00:00
tls1.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
tls2.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
tls3.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
tls-models.ll
[ARM][NFC] codegen tests cleanup: remove dangling check prefixes
2018-11-23 10:08:39 +00:00
trap-unreachable.ll
[CodeGen] Add a -trap-unreachable option for debugging
2018-02-12 11:06:27 +00:00
trap.ll
ARM: Use BKPT instead of TRAP to implement llvm.debugtrap.
2018-10-24 18:10:38 +00:00
trunc_ldr.ll
…
truncstore-dag-combine.ll
Fix some erroneous lit test failures due to unlucky name of working directory.
2016-02-17 16:35:18 +00:00
tst_teq.ll
…
tst-peephole.mir
[ARM] Don't form "ands" when it isn't scheduled correctly.
2019-03-22 20:49:15 +00:00
twoaddrinstr.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
uadd_sat.ll
Revert 374373: [Codegen] Alter the default promotion for saturating adds and subs
2019-10-11 20:33:03 +00:00
uint64tof64.ll
…
umulo-32.ll
[SDAG] Expand pow2 mulo using shifts
2019-03-12 16:57:25 +00:00
umulo-64-legalisation-lowering.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
umulo-128-legalisation-lowering.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
unaligned_load_store_vector.ll
ARM: be conservative when asked load/store alignment of weird type.
2018-05-21 12:43:54 +00:00
unaligned_load_store_vfp.ll
…
unaligned_load_store.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
undef-sext.ll
…
undefined.ll
…
unfold-shifts.ll
[ARM] and, or, xor and add with shl combine
2017-11-02 10:43:10 +00:00
unord.ll
…
unschedule-first-call.ll
[ScheduleDAG] Don't schedule node with physical register interference
2017-08-01 00:28:40 +00:00
unwind-fp.ll
[ARM] Fix unwind information for floating point registers
2018-09-19 13:25:31 +00:00
unwind-init.ll
…
urem-opt-size.ll
[ARM] Code size optimisation to lower udiv+urem to udiv+mls instead of a
2016-10-03 10:12:32 +00:00
usat-lower.ll
…
usat-upper.ll
…
usat-v4t.ll
[ARM] Saturation instructions are DSP-only
2016-07-25 22:25:25 +00:00
usat.ll
[ARM] Lower unsigned saturation to USAT
2017-12-20 11:13:57 +00:00
useaa.ll
[ARM] Cortex-M4 schedule
2019-05-15 12:41:58 +00:00
usub_sat.ll
Revert 374373: [Codegen] Alter the default promotion for saturating adds and subs
2019-10-11 20:33:03 +00:00
uxt_rot.ll
[ARM] Improve sxta{b|h} and uxta{b|h} tests
2016-08-10 09:34:34 +00:00
uxtb.ll
Regenerate UXTB tests
2019-07-27 18:44:15 +00:00
v1-constant-fold.ll
…
v6-jumptable-clobber.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
v6m-smul-with-overflow.ll
Fix signed multiplication with overflow fallback.
2017-04-26 13:41:43 +00:00
v6m-umul-with-overflow.ll
DAG: correctly legalize UMULO.
2017-06-20 15:01:38 +00:00
v7k-abi-align.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
v7k-libcalls.ll
[ARM] Use aapcs_vfp for ___truncdfhf2 on v7k.
2016-06-24 00:08:01 +00:00
v7k-sincos.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
v8m-tail-call.ll
[ARM] Avoid spilling lr with Thumb1 tail calls.
2018-08-08 20:03:10 +00:00
v8m.base-jumptable_alignment.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
va_arg.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
vaba.ll
…
vabd.ll
…
vabs.ll
[ARM][NEON] Add support for ISD::ABS lowering
2017-05-08 10:37:34 +00:00
vadd.ll
…
vararg_no_start.ll
…
varargs-spill-stack-align-nacl.ll
…
vargs_align.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vargs.ll
…
vbits.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vbsl-constant.ll
…
vbsl.ll
…
vceq.ll
[ARM] Regenerate vector comparison tests
2019-03-29 17:35:11 +00:00
vcge.ll
[SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC
2019-04-05 14:56:21 +00:00
vcgt.ll
[ARM] Regenerate vector comparison tests
2019-03-29 17:35:11 +00:00
vcnt.ll
[ARM] Expand vector ctlz_zero_undef so it becomes ctlz.
2016-04-26 05:04:37 +00:00
vcombine.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
vcvt_combine.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
vcvt-cost.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vcvt-v8.ll
…
vcvt.ll
[LegalizeVectorTypes][X86][ARM][AArch64][PowerPC] Don't use SplitVecOp_TruncateHelper for FP_TO_SINT/UINT.
2018-11-26 21:12:39 +00:00
vdiv_combine.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
vdup.ll
[DAGCombine] Prune unnused nodes.
2019-03-29 17:35:56 +00:00
vector-DAGCombine.ll
[LegalizeVectorTypes] Don't use SplitVecOp_TruncateHelper if we're heading towards scalarizing the type.
2018-11-23 02:32:13 +00:00
vector-extend-narrow.ll
[ARM][NFC] Make tests immune to better div optimizations
2018-10-30 22:08:13 +00:00
vector-load.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
vector-promotion.ll
Don't conditionalize Neon instructions, even in IT blocks.
2017-06-22 12:11:38 +00:00
vector-spilling.ll
[DAGCombiner] [CodeGenPrepare] More comprehensive GEP splitting
2019-06-17 10:54:12 +00:00
vector-store.ll
ARM: handle post-indexed NEON ops where the offset isn't the access width.
2017-04-20 19:54:02 +00:00
vext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vfcmp.ll
[ARM][NFC] Replaced tab characters in test file vfcmp.ll.
2018-08-07 08:05:15 +00:00
vfloatintrinsics.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vfp-libcalls.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
vfp-reg-stride.ll
[ARM] Replace processor check with feature
2018-08-09 16:13:24 +00:00
vfp-regs-dwarf.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
vfp.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
vget_lane.ll
…
vhadd.ll
…
vhsub.ll
…
vicmp-64.ll
Improve ARM lowering for "icmp <2 x i64> eq".
2016-10-18 21:03:40 +00:00
vicmp.ll
…
virtregrewriter-subregliveness.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vld1.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld2.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld3.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vld4.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vld-vst-upgrade.ll
…
vlddup.ll
[DAGCombiner] loosen restrictions for moving shuffles after vector binop
2019-04-03 13:42:06 +00:00
vldlane.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vldm-liveness.ll
[ARM] Check correct instructions for load/store rescheduling.
2017-03-01 22:56:20 +00:00
vldm-liveness.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
vldm-sched-a9.ll
[ARM] Run ARMParallelDSP in the IRPasses phase
2019-03-14 10:57:40 +00:00
vldmia-sched.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
vminmax.ll
[CodeGen] Teach LLVM how to lower @llvm.{min,max}num to {MIN,MAX}NAN
2016-04-14 07:13:24 +00:00
vminmaxnm-safe.ll
…
vminmaxnm.ll
…
vmla.ll
…
vmls.ll
…
vmov.ll
…
vmul.ll
[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.
2016-12-16 18:44:08 +00:00
vneg.ll
…
vpadal.ll
…
vpadd.ll
[ARM] Adjust how NEON shifts are lowered
2019-07-15 10:44:50 +00:00
vpminmax.ll
…
vqadd.ll
…
vqdmul.ll
…
vqshl.ll
…
vqshrn.ll
…
vqsub.ll
…
vrec.ll
…
vrev.ll
…
vrint.ll
[NEON] Support intrinsic for scalar and vector versions of the VRINTN instruction
2018-04-13 12:45:12 +00:00
vsel-fp16.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
vsel.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
vselect_imax.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vshift.ll
…
vshiftins.ll
…
vshl.ll
…
vshll.ll
[SelectionDAG] Teach simplifyDemandedBits to handle shifts by constant splat vectors
2017-09-25 19:26:08 +00:00
vshrn.ll
…
vsra.ll
…
vst1.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vst2.ll
…
vst3.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vst4.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vstlane.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vsub.ll
…
vtbl.ll
[ARM] Use TableGen patterns to select vtbl. NFC.
2017-04-19 20:39:39 +00:00
vtrn.ll
[ARM][NFC] Replaced tab-characters in test file vtrn.ll
2018-08-08 14:42:11 +00:00
vuzp.ll
[ARM] Adjust how NEON shifts are lowered
2019-07-15 10:44:50 +00:00
vzip.ll
[DAGCombiner] narrow shuffle of concatenated vectors
2019-04-12 16:31:56 +00:00
warn-stack.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
weak2.ll
…
weak.ll
…
wide-compares.ll
[ARM] Fix CPSR liveness in tMOVCCr_pseudo lowering.
2018-11-07 21:08:13 +00:00
widen-vmovs.ll
[ARM] Do not test for CPUs, use SubtargetFeatures. Also remove 2 flags.
2016-07-06 11:22:11 +00:00
wrong-t2stmia-size-opt.ll
…
xray-armv6-attribute-instrumentation.ll
[XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text
2017-09-04 05:34:58 +00:00
xray-armv7-attribute-instrumentation.ll
[XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text
2017-09-04 05:34:58 +00:00
xray-tail-call-sled.ll
[xray] Add XRay support for Mach-O in CodeGen
2016-11-23 02:07:04 +00:00
zero-cycle-zero.ll
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
2016-04-19 23:51:52 +00:00
zext-logic-shift-load.ll
[DAGCombiner] Fold (zext (and/or/xor (shl/shr (load x), cst), cst))
2018-04-07 23:36:10 +00:00
zextload_demandedbits.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00