Chris Lattner
30e82431b3
IA64 supports this operation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21228 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 18:55:36 +00:00
Chris Lattner
5eef9f3bc9
ORo sets CR0
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21227 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 15:03:48 +00:00
Chris Lattner
6b4ea2cfa2
Revert the previous patch, which I didn't mean to check in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21226 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 15:03:41 +00:00
Chris Lattner
26d4fdb968
Fix a minor bug (ORo didn't mark that it set CR0).
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Refactor how . instructions are handled. In particular, instead of passing
the RC flag all the way up the inheritance hierarchy, just make a new tblgen
class 'DOT' which can be added to an instruction definition.
For example, instead of this:
-def AND : XForm_6<31, 28, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-let Defs = [CR0] in
-def ANDo : XForm_6<31, 28, 1, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
- "and. $rA, $rS, $rB">;
We now have this:
+def AND : XForm_6<31, 28, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
"and $rA, $rS, $rB">;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21225 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 15:01:39 +00:00
Duraid Madina
21478e55db
hmm, should probably change addImm() to take 64-bit arguments one day anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 07:16:39 +00:00
Nate Begeman
c7bd4827cd
Add recording variants of ISD::AND and ISD::OR. This kills almost 1000
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(1.5%) instructions in 186.crafty
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21222 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 06:34:10 +00:00
Duraid Madina
5ef2ec9929
assorted fixes:
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* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
* fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
* fix nasty thinko - didn't use two-address form of conditional add
for extending bools to integers, so occasionally there would be
garbage in the result. it's amazing how often zeros are just
sitting around in registers ;) - this should fix a bunch of tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21221 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 05:55:56 +00:00
Nate Begeman
709c806a1e
Fix another fixme: factor out the constant fp generation code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21207 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 06:06:10 +00:00
Nate Begeman
c5b1cd22b5
Fix 64 bit argument loading that straddles the args in regs / args on stack
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boundary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21206 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 05:53:14 +00:00
Nate Begeman
340f290783
Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not
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have to inform the register allocator it might be stepped on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21202 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 03:59:42 +00:00
Nate Begeman
27499e3f1b
Make sure that BRCOND branches can be converted into long branches too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21198 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 01:48:29 +00:00
Nate Begeman
a0e3e9474f
Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21197 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 01:14:13 +00:00
Chris Lattner
51d2ed976f
rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more
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correct. Remove the EmitComparison retvalue, as it is always the first arg.
Fix a place where we incorrectly passed in the setcc opcode instead of the
setcc number, causing us to miscompile crafty. Crafty now works!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21195 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 01:03:31 +00:00
Nate Begeman
706471e291
fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21193 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 23:35:05 +00:00
Chris Lattner
9184bfbbf4
Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap.
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This caused the "use before a def" assertion on some programs.
With this patch, 254.gap now passes with the PPC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21191 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 22:05:17 +00:00
Chris Lattner
91277ea45c
do not set the root to null if an argument is dead
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21188 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 21:23:24 +00:00
Nate Begeman
cd08e4cb7e
Add rlwnm instruction for variable rotate
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Generate rotate left/right immediate
Generate code for brcondtwoway
Use new livein/liveout functionality
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21187 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 20:09:12 +00:00
Chris Lattner
27ee3a332d
Fix a crash on 173.applu by asking for a constant bigger than 32-bits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21185 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 19:47:21 +00:00
Chris Lattner
f429a3e0f6
Switch this instruction selector over to using liveins and liveouts, eliminating
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implicit defs on entry to the function. yaay :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21184 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 16:32:30 +00:00
Chris Lattner
4c52f0ec8c
Use live out sets for return values instead of imp_defs, which is cleaner and faster.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21181 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 15:23:56 +00:00
Duraid Madina
e00e5ded51
ok, the "ia64 has a boatload of registers" joke stopped being funny today ;)
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* fix overallocation of integer (stacked) registers: we can't allocate
registers for local use if they are required as output registers
this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21178 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 11:53:00 +00:00
Nate Begeman
af4ab1b103
Optimize FSEL a bit for fneg arguments. This fixes the recently added test
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case so that we emit
_test_fneg_sel:
.LBB_test_fneg_sel_0: ;
fsel f1, f1, f3, f2
blr
instead of:
_test_fneg_sel:
.LBB_test_fneg_sel_0: ;
fneg f0, f1
fneg f0, f0
fsel f1, f0, f3, f2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21177 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 09:33:07 +00:00
Chris Lattner
67ac5f459e
Fix CodeGen/SparcV9/2005-05-09-GEP-Crash.ll a crash on some specfp program
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lets hope this doesn't break other programs with induced entropy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21174 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 06:27:14 +00:00
Chris Lattner
da4d4694a8
This target does not support/want ISD::BRCONDTWOWAY
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21164 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:22:37 +00:00
Chris Lattner
644db4ec5f
This target does not yet support ISD::BRCONDTWOWAY
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21163 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:22:30 +00:00
Nate Begeman
e88aa5b4d1
64b: Expand S/UREM
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32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
Pattern match fsub a, mul(b, c) as fnmsub
Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21161 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:05:51 +00:00
Nate Begeman
a9532d5dde
Fix 64b shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21159 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 23:45:01 +00:00
Nate Begeman
f3f2d6d378
Match Mac OS X 64 bit calling conventions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21157 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 21:26:05 +00:00
Andrew Lenharth
a32b9e31c6
collect a few statistics, factor constants (constant loading and mult), fix logic operation pattern matchs, supress FP div when int dividing by a constant
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21156 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 17:28:49 +00:00
Duraid Madina
6dcceb5ecb
fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)
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fix hack in division (clean up frcpa instruction)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21153 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 10:01:48 +00:00
Nate Begeman
7e7fadd2ea
Optimized code sequences for setcc reg, 0
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Optimized code sequence for (a < 0) ? b : 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21150 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 20:30:01 +00:00
Andrew Lenharth
d3355e22a7
Alpha zero extends setcc results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21149 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 20:11:32 +00:00
Chris Lattner
cbd06fc3d7
PowerPC zero extends setcc results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 19:41:49 +00:00
Chris Lattner
6659bd7592
X86 zero extends setcc results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21146 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 19:41:46 +00:00
Andrew Lenharth
2966e84a8d
fix a small optimization opertunity and make gcc happy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21143 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 18:15:28 +00:00
Andrew Lenharth
320174f009
fixup magic constant making code. tested by thousands of random divisions.... by 10000. ok, so random divisors would be good too, but this at least fixes some things
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21140 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 17:19:16 +00:00
Andrew Lenharth
9bf59d7ed2
lowercase instructions, makes diff happier
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21139 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 17:17:48 +00:00
Andrew Lenharth
273a1f956f
It wasn't happy about this either
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21133 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 14:18:13 +00:00
Andrew Lenharth
706be918ca
Yea, it wasn't happy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21132 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 13:55:53 +00:00
Duraid Madina
e6a0b6cbda
teach asmprinter to print s8/s14 operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 12:34:36 +00:00
Duraid Madina
f55e403ef9
codegen immediate forms of add/sub/shift
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21130 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 12:33:38 +00:00
Duraid Madina
18c0c6bcc4
add immediate forms of add, sub, shift
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21129 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 12:32:24 +00:00
Nate Begeman
7ddecb4186
Pattern match bitfield insert, which helps shift long by immediate, among
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other things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21127 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 23:51:40 +00:00
Nate Begeman
020ef42c19
Fix some shift bugs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21126 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 22:42:08 +00:00
Alkis Evlogimenos
aeca558788
Make these 64 bit constants so that this compiles on x86-32 as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21125 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 22:09:40 +00:00
Andrew Lenharth
a565c275b5
added sdiv by 2^k and works for neg divisors also
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21124 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 22:03:13 +00:00
Andrew Lenharth
f77f395043
fix copy/paste errors, and add imm support to SxADDQ and SxSUBQ
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21121 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 20:59:59 +00:00
Chris Lattner
6d027f2e6f
Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not
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properly sign extending the top of the result of a 64-bit shift right by
a constant > 32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21120 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 20:59:35 +00:00
Andrew Lenharth
4b8ac1559a
Added Nate's div by constant stuff, also scaled operations!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21116 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 20:25:34 +00:00
Chris Lattner
ce91ec9ae6
Fix a namespace issue, reported by Vladimir Merzliakov!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21115 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 19:45:39 +00:00