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1666 Commits

Author SHA1 Message Date
Evan Cheng
c3f44b0d63 Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55679 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-03 00:03:49 +00:00
Evan Cheng
acff339e39 Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55623 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-02 06:51:36 +00:00
Owen Anderson
667d8f7607 Add initial support for fast isel of instructions that have inputs pinned to physical registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55545 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-29 17:45:56 +00:00
Dan Gohman
99b218218c Add a target callback for FastISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 23:21:34 +00:00
Gabor Greif
d80360ae2e just a brain dump for a small tool 
that brings us to 80-col violations
or tabs.

Usage:
  visit-violations <file>

At the moment it outputs editor invocations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55509 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 23:15:28 +00:00
Gabor Greif
ba36cb5242 erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 21:40:38 +00:00
Owen Anderson
b5dbcb538b Add support for fast-isel of opcodes that require use of extract_subreg. Because of how extract_subreg is treated, it requires special case handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55480 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 18:06:12 +00:00
Dan Gohman
833ddf8430 Update a comment to reflect recent changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55418 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-27 16:18:22 +00:00
Dan Gohman
10df0fa73e Basic FastISel support for floating-point constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55401 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-27 01:09:54 +00:00
Gabor Greif
99a6cb92d1 disallow direct access to SDValue::ResNo, provide a getter instead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 22:36:50 +00:00
Dan Gohman
72d63af3f7 Refactor a bunch of FastISelEmitter code into a helper class, and 
put each major step in a separate function. This makes the high
level sequence of events easier to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55385 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 21:21:20 +00:00
Cedric Venet
c93457053c - small bug corrected: incorrect iterator type. 
- fix to please VS: add a return after an assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55380 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 19:49:04 +00:00
Owen Anderson
70647e81e3 We need to check that the return type is correct, even in cases where we don't 
have a return type that differs from the operand types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55376 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 18:50:00 +00:00
Chris Lattner
9783d62422 code simplification, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55363 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 07:01:28 +00:00
Chris Lattner
073ff02e0d stabilize more printing, this doesn't cause a problem 
in the example attached to PR2590, but is a problem in general.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55361 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 06:50:46 +00:00
Chris Lattner
943c0e6fba stablize SubRegsSet printing, part of PR2590 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55360 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 06:49:06 +00:00
Chris Lattner
690d80eefe Stabilize 'getDwarfRegNumFull' output to not depend on random memory 
orders, part of PR2590


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55359 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 06:43:25 +00:00
Owen Anderson
abb1f16881 Throw the switch to allow FastISel to emit instructions whose return types different from their inputs. Next step: adding lowering pattens in FastISel that actually use these newly available opcodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55349 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 01:22:59 +00:00
Owen Anderson
71669e51e5 Enhance TableGen to emit code for FastISel of opcodes with variadic return types without slowing down opcodes that are not variadic. No such opcodes are currently generated, but in theory it should be a matter of just hitting the switch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55347 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 00:42:26 +00:00
Owen Anderson
0f84e4e310 Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return 
type down.  This is not currently used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55345 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 23:58:18 +00:00
Owen Anderson
7b2e579546 Deepen the map structure tablegen uses to compute FastISel patterns, in preparation for having patterns 
with return types that differ from their input types.  This is not yet used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55344 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 23:43:09 +00:00
Owen Anderson
6d0c25ec3a Add support for fast isel of (integer) immediate materialization pattens, and use them to support 
bitcast of constants in fast isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55325 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 20:20:32 +00:00
Dan Gohman
f350b277f3 Move the point at which FastISel taps into the SelectionDAGISel 
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.

Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.

To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-23 02:25:05 +00:00
Dan Gohman
0bfb75277f Add a few comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55157 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-22 00:28:15 +00:00
Dan Gohman
22bb31103d Factor out the predicate check code from DAGISelEmitter.cpp 
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-22 00:20:26 +00:00
Dan Gohman
d5fe57d2f9 Basic fast-isel support for instructions with constant int operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55099 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 01:41:07 +00:00
Dan Gohman
520b50c00d Remove the code that limited FastISel to certain fixed signatures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55096 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 00:35:26 +00:00
Dan Gohman
c7f72de3b4 Begin making more use of the FastISelEmitter class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55093 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 00:19:05 +00:00
Dan Gohman
83babdea5d Remove an obsolete todo comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55080 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 21:47:28 +00:00
Dan Gohman
1e0ee4bc38 Factor the code for determining the target-specific instruction 
namespace out of the isel emitters and into common code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55079 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 21:45:57 +00:00
Dan Gohman
bb466331e7 Simplify FastISel's constructor argument list, make the FastISel 
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 21:05:57 +00:00
Dan Gohman
ba6783ec8c Fix the string for MVT::isVoid. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55034 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 01:44:30 +00:00
Dan Gohman
cf711aa5b6 For now, restrict FastISel to instructions that only involve one 
register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55008 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 20:58:14 +00:00
Dan Gohman
d1d2ee8ccb Factor out the code to scan an instruction's operands into a 
helper function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55007 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 20:56:30 +00:00
Dan Gohman
379cad44ec Add more comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55004 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 20:36:33 +00:00
Dan Gohman
56e0f87dcc Fix indentation in FastISel tablegen-emitted code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55003 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 20:31:38 +00:00
Dan Gohman
f4137b5f40 Add more checking to filter out more kinds of things that 
FastISel doesn't support yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55002 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 20:30:54 +00:00
Dan Gohman
567263462f 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54998 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 18:07:49 +00:00
Dan Gohman
04b7dfb233 Add a few doxygen comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54997 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 18:06:12 +00:00
Dan Gohman
88c6b57ef0 Remove an unneeded #include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54996 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 17:53:16 +00:00
Devang Patel
4869456c29 Compress manpages. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54971 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 01:17:41 +00:00
Owen Anderson
22ae999082 Speed up addRegisterDead by adding more fast checks before performing the expensive 
subregister query, and by increasing the size of the subregister hashtable so
that there are fewer collisions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54781 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 18:34:18 +00:00
Daniel Dunbar
8bd79a8cae Update makellvm to return correct result code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54756 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-13 20:43:56 +00:00
Dan Gohman
b0cf29c5cf Initial checkin of the new "fast" instruction selection support. See 
the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54751 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-13 20:19:35 +00:00
Dan Gohman
ea9587bf41 Oops, check in these files too, for the FastISel -> Fast rename. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54750 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-13 19:55:00 +00:00
Chris Lattner
6bd9f586d9 remove obsolete files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54630 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-11 06:12:45 +00:00
Bill Wendling
a37599bc7a Add ARM to the targets to build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54386 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 23:52:28 +00:00
Mon P Wang
e3b3a7241c Added support for overloading intrinsics (atomics) based on pointers 
to different address spaces.  This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54195 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-30 04:36:53 +00:00
Bill Wendling
11274cc48f Don't build with 4.0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54137 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-28 18:45:36 +00:00
Dan Gohman
475871a144 Rename SDOperand to SDValue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-27 21:46:04 +00:00