346 Commits

Author SHA1 Message Date
Shiva Chen
24abe71d71 [DebugInfo] Examine all uses of isDebugValue() for debug instructions.
Because we create a new kind of debug instruction, DBG_LABEL, we need to
check all passes which use isDebugValue() to check MachineInstr is debug
instruction or not. When expelling debug instructions, we should expel
both DBG_VALUE and DBG_LABEL. So, I create a new function,
isDebugInstr(), in MachineInstr to check whether the MachineInstr is
debug instruction or not.

This patch has no new test case. I have run regression test and there is
no difference in regression test.

Differential Revision: https://reviews.llvm.org/D45342

Patch by Hsiangkai Wang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331844 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-09 02:42:00 +00:00
Adrian Prantl
26b584c691 Remove \brief commands from doxygen comments.
We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

  for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

Differential Revision: https://reviews.llvm.org/D46290

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331272 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-01 15:54:18 +00:00
Nico Weber
0f38c60baf IWYU for llvm-config.h in llvm, additions.
See r331124 for how I made a list of files missing the include.
I then ran this Python script:

    for f in open('filelist.txt'):
        f = f.strip()
        fl = open(f).readlines()

        found = False
        for i in xrange(len(fl)):
            p = '#include "llvm/'
            if not fl[i].startswith(p):
                continue
            if fl[i][len(p):] > 'Config':
                fl.insert(i, '#include "llvm/Config/llvm-config.h"\n')
                found = True
                break
        if not found:
            print 'not found', f
        else:
            open(f, 'w').write(''.join(fl))

and then looked through everything with `svn diff | diffstat -l | xargs -n 1000 gvim -p`
and tried to fix include ordering and whatnot.

No intended behavior change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331184 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-30 14:59:11 +00:00
Jonas Paulsson
a83aa7ca2e [MachineScheduler] NFC refactoring
This patch makes tryCandidate() virtual and some utility functions like
tryLess(), tryGreater(), ... externally available (used to be static).

This makes it possible for a target to derive a new MachineSchedStrategy from
GenericScheduler and reuse most parts.

It was necessary to wrap functions with the same names in
AMDGPU/SIMachineScheduler in a local namespace.

Review: Andy Trick, Florian Hahn
https://reviews.llvm.org/D43329

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329884 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-12 07:21:39 +00:00
Mandeep Singh Grang
8ba42a9352 [CodeGen] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: bogner, rnk, MatzeB, RKSimon

Reviewed By: rnk

Subscribers: JDevlieghere, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D45133

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329435 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-06 18:08:42 +00:00
David Blaikie
9d9a46a465 Fix layering of MachineValueType.h by moving it from CodeGen to Support
This is used by llvm tblgen as well as by LLVM Targets, so the only
common place is Support for now. (maybe we need another target for these
sorts of things - but for now I'm at least making them correct & we can
make them better if/when people have strong feelings)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328395 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-23 23:58:25 +00:00
Jonas Paulsson
31f3439809 [MachineScheduler] Dump SUnits before calling SchedImpl->initialize()
This is a NFC simple patch that changes the DEBUG dumping in the
MachineScheduler so that the dumping of the built SUnits is done before the
SchedImpl->initialize() is called.

This is better on SystemZ, since it has a strategy that does some dumping at
the start of the region, and it is not possible to easily read it if it is
output above a long list of SU.

Review: Javed Absar
https://reviews.llvm.org/D44089

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326716 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-05 16:31:49 +00:00
Francis Visoiu Mistrih
f751ac3a9c Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::print"
This reverts commit r324681.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325505 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-19 15:08:49 +00:00
Francis Visoiu Mistrih
331b6f31af [CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::print
MBB.print wasn't printing it, but the MIRPrinter is printing it. The
goal is to unify that as much as possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324681 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-08 23:42:27 +00:00
Yaxun Liu
73f6582e91 CodeGen: Fix assertion in ScheduleDAGMILive::scheduleMI due to llvm.dbg.value
Fix a bug in ScheduleDAGMILive::scheduleMI which causes BotRPTracker not tracking CurrentBottom in some rare cases involving llvm.dbg.value.

This issues causes amdgcn target to assert when compiling some user codes with -g.

Differential Revision: https://reviews.llvm.org/D42394


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323214 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-23 16:04:53 +00:00
Matthias Braun
d318139827 MachineFunction: Return reference from getFunction(); NFC
The Function can never be nullptr so we can return a reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320884 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-15 22:22:58 +00:00
Yaxun Liu
06d39e2dc8 Recommit CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value
The regression on ppc64 was not due to this commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320788 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-15 03:56:57 +00:00
Yaxun Liu
92d81a8d46 Revert CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value
This commit might have caused regression on ppc64. Revert it to verify that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320712 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-14 16:12:04 +00:00
Yaxun Liu
084f87947f CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value
Two issues were found about machine inst scheduler when compiling ProRender
with -g for amdgcn target:

GCNScheduleDAGMILive::schedule tries to update LiveIntervals for DBG_VALUE, which it
should not since DBG_VALUE is not mapped in LiveIntervals.

when DBG_VALUE is the last instruction of MBB, ScheduleDAGInstrs::buildSchedGraph and
ScheduleDAGMILive::scheduleMI does not move RPTracker properly, which causes assertion.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D41132


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320650 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-13 22:38:09 +00:00
Matthias Braun
fa621d294f Rename LiveIntervalAnalysis.h to LiveIntervals.h
Headers/Implementation files should be named after the class they
declare/define.

Also eliminated an `#include "llvm/CodeGen/LiveIntervalAnalysis.h"` in
favor of `class LiveIntarvals;`

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320546 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-13 02:51:04 +00:00
Francis Visoiu Mistrih
ca0df55065 [CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319665 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 17:18:51 +00:00
Francis Visoiu Mistrih
accb337c76 [CodeGen] Rename functions PrintReg* to printReg*
LLVM Coding Standards:
  Function names should be verb phrases (as they represent actions), and
  command-like function should be imperative. The name should be camel
  case, and start with a lower case letter (e.g. openFile() or isFoo()).

Differential Revision: https://reviews.llvm.org/D40416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319168 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-28 12:42:37 +00:00
David Blaikie
e3a9b4ce3a Fix a bunch more layering of CodeGen headers that are in Target
All these headers already depend on CodeGen headers so moving them into
CodeGen fixes the layering (since CodeGen depends on Target, not the
other way around).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318490 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-17 01:07:10 +00:00
David Blaikie
48319238e4 Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
This header includes CodeGen headers, and is not, itself, included by
any Target headers, so move it into CodeGen to match the layering of its
implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317647 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-08 01:01:31 +00:00
Jonas Paulsson
1862283718 [MachineScheduler] Minor refactoring.
Duplicated code found in three places put into a new static function:

/// Given a Count of resource usage and a Latency value, return true if a
/// SchedBoundary becomes resource limited.
static bool checkResourceLimit(unsigned LFactor, unsigned Count,
                               unsigned Latency) {
  return (int)(Count - (Latency * LFactor)) > (int)LFactor;
}

Review: Florian Hahn, Matthias Braun
https://reviews.llvm.org/D39235

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316560 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-25 08:23:33 +00:00
Aaron Ballman
1d03d382c1 Reverting r315590; it did not include changes for llvm-tblgen, which is causing link errors for several people.
Error LNK2019 unresolved external symbol "public: void __cdecl `anonymous namespace'::MatchableInfo::dump(void)const " (?dump@MatchableInfo@?A0xf4f1c304@@QEBAXXZ) referenced in function "public: void __cdecl `anonymous namespace'::AsmMatcherEmitter::run(class llvm::raw_ostream &)" (?run@AsmMatcherEmitter@?A0xf4f1c304@@QEAAXAEAVraw_ostream@llvm@@@Z) llvm-tblgen D:\llvm\2017\utils\TableGen\AsmMatcherEmitter.obj 1


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315854 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-15 14:32:27 +00:00
Don Hinton
5298935fe7 [dump] Remove NDEBUG from test to enable dump methods [NFC]
Summary:
Add LLVM_FORCE_ENABLE_DUMP cmake option, and use it along with
LLVM_ENABLE_ASSERTIONS to set LLVM_ENABLE_DUMP.

Remove NDEBUG and only use LLVM_ENABLE_DUMP to enable dump methods.

Move definition of LLVM_ENABLE_DUMP from config.h to llvm-config.h so
it'll be picked up by public headers.

Differential Revision: https://reviews.llvm.org/D38406

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315590 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-12 16:16:06 +00:00
Justin Bogner
1842f4a81b CodeGen: Minor cleanups to use MachineInstr::getMF. NFC
Since r315388 we have a shorter way to say this, so we'll replace
MI->getParent()->getParent() with MI->getMF() in a few places.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315390 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10 23:50:49 +00:00
Javed Absar
1f4dc266e2 [MiSched] - Simplify ProcResEntry access
Reviewed by: @MatzeB
Differential Revision: https://reviews.llvm.org/D38447



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314775 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 09:35:04 +00:00
Javed Absar
dccccced43 [Misched]: Remove double call getMicroOpFactor.NFC.
Reviewed by: @MatzeB
Differential Revision: https://reviews.llvm.org/D38176



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314296 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-27 10:31:58 +00:00
Stanislav Mekhanoshin
63c545da3a Allow target to decide when to cluster loads/stores in misched
MachineScheduler when clustering loads or stores checks if base
pointers point to the same memory. This check is done through
comparison of base registers of two memory instructions. This
works fine when instructions have separate offset operand. If
they require a full calculated pointer such instructions can
never be clustered according to such logic.

Changed shouldClusterMemOps to accept base registers as well and
let it decide what to do about it.

Differential Revision: https://reviews.llvm.org/D37698

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313208 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-13 22:20:47 +00:00
Mikael Holmen
db48628bdf [MachineScheduler] Put SchedRegion in an anonymous namespace.
Summary: It pollutes the global namespace otherwise.

Patch by: Bevin Hansson

Reviewers: jonpa

Reviewed By: jonpa

Subscribers: MatzeB, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D37555

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313148 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-13 14:07:47 +00:00
Eugene Zelenko
8fd05041c0 [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312971 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-11 23:00:48 +00:00
Jonas Paulsson
59bdb88371 [SystemZ, MachineScheduler] Improve post-RA scheduling.
The idea of this patch is to continue the scheduler state over an MBB boundary
in the case where the successor block has only one predecessor. This means
that the scheduler will continue in the successor block (after emitting any
branch instructions) with e.g. maintained processor resource counters.
Benchmarks have been confirmed to benefit from this.

The algorithm in MachineScheduler.cpp that extracts scheduling regions of an
MBB has been extended so that the strategy may optionally reverse the order
of processing the regions themselves. This is controlled by a new method
doMBBSchedRegionsTopDown(), which defaults to false.

Handling the top-most region of an MBB first also means that a top-down
scheduler can continue the scheduler state across any scheduling boundary
between to regions inside MBB.

Review: Ulrich Weigand, Matthias Braun, Andy Trick.
https://reviews.llvm.org/D35053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311072 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-17 08:33:44 +00:00
Sam Clegg
b209206d2c Mark dump() methods as const. NFC
Add const qualifier to any dump() method where adding one
was trivial.

Differential Revision: https://reviews.llvm.org/D34481

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305963 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 22:19:17 +00:00
Javed Absar
829442ad48 Use range-loop in machine-scheduler. NFCI.
Converts to range-loop usage in machine scheduler.
This makes the code neater and easier to read,
and also keeps pace of the machine scheduler
implementation with C++11 features.

Reviewed by: Matthias Braun
Differential Revision: https://reviews.llvm.org/D34320



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305887 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 09:10:10 +00:00
Chandler Carruth
e3e43d9d57 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 11:49:48 +00:00
Matthias Braun
0248ff99fa ScheduleDAGInstrs: Fix fixupKills()
Rewrite fixupKills() to use the LivePhysRegs class. Simplifies the code
and fixes a bug where the CSR registers in return blocks where missed
leading to invalid kill flags. Also remove the unnecessary rule that we
wouldn't set kill flags on tied operands.

No tests as I have an upcoming commit improving MachineVerifier checks
to catch these cases in multiple existing lit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304055 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-27 02:50:50 +00:00
Matthias Braun
94c4904dc5 CodeGen: Rename DEBUG_TYPE to match passnames
Rename the DEBUG_TYPE to match the names of corresponding passes where
it makes sense. Also establish the pattern of simply referencing
DEBUG_TYPE instead of repeating the passname where possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303921 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 21:26:32 +00:00
Florian Hahn
4cdd2e6d64 [AArch64] Make instruction fusion more aggressive.
Summary:
This patch makes instruction fusion more aggressive by
* adding artificial edges between the successors of FirstSU and
  SecondSU, similar to BaseMemOpClusterMutation::clusterNeighboringMemOps.
* updating PostGenericScheduler::tryCandidate to keep clusters together,
   similar to GenericScheduler::tryCandidate.

This change increases the number of AES instruction pairs generated on
 Cortex-A57 and Cortex-A72. This doesn't change code at all in
 most benchmarks or general code, but we've seen improvement on kernels
 using AESE/AESMC and AESD/AESIMC. 

Reviewers: evandro, kristof.beyls, t.p.northover, silviu.baranga, atrick, rengolin, MatzeB

Reviewed By: evandro

Subscribers: aemerson, rengolin, MatzeB, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303618 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 09:33:34 +00:00
Matthias Braun
6b814345d1 MachineScheduler: Skip acyclic latency heuristic for in-order cores
The current heuristic is triggered on `InFlightCount > BufferLimit`
which isn't really helpful on in-order cores where BufferLimit is zero.

Note that we already get latency hiding effects for in order cores
by instructions staying in the pending queue on stalls; The additional
latency scheduling heuristics only have minimal effects after that while
occasionally increasing register pressure too much resulting in extra
spills.

My motivation here is additional spills/reloads ending up in a loop in
464.h264ref / BlockMotionSearch function resulting in a 4% overal
regression on an in order core. rdar://30264380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300083 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 18:09:05 +00:00
Javed Absar
47652291c2 Improve machine schedulers for in-order processors
This patch enables schedulers to specify instructions that 
cannot be issued with any other instructions.
It also fixes BeginGroup/EndGroup.

Reviewed by: Andrew Trick
Differential Revision: https://reviews.llvm.org/D30744



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298885 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-27 20:46:37 +00:00
Davide Italiano
a7925b808d [MachineScheduler] Add missing machine pass dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298736 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-24 20:52:56 +00:00
Stanislav Mekhanoshin
fef0dbe59c Revert "Correct register pressure calculation in presence of subregs"
This reverts commit r296009. It broke one out of tree target and also
does not account for all partial lines added or removed when calculating
PressureDiff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296182 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 21:56:16 +00:00
Stanislav Mekhanoshin
0bf4d71d50 Correct register pressure calculation in presence of subregs
If a subreg is used in an instruction it counts as a whole superreg
for the purpose of register pressure calculation. This patch corrects
improper register pressure calculation by examining operand's lane mask.

Differential Revision: https://reviews.llvm.org/D29835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 20:19:44 +00:00
Simon Pilgrim
ee4b4ec8cc Fix signed/unsigned comparison warning on MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295962 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 12:00:34 +00:00
Eugene Zelenko
096e40d35f [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295893 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-22 22:32:51 +00:00
Evandro Menezes
20de1ea345 [CodeGen] Move MacroFusion to the target
This patch moves the class for scheduling adjacent instructions,
MacroFusion, to the target.

In AArch64, it also expands the fusion to all instructions pairs in a
scheduling block, beyond just among the predecessors of the branch at the
end.

Differential revision: https://reviews.llvm.org/D28489

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293737 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-01 02:54:34 +00:00
Matthias Braun
88d207542b Cleanup dump() functions.
We had various variants of defining dump() functions in LLVM. Normalize
them (this should just consistently implement the things discussed in
http://lists.llvm.org/pipermail/cfe-dev/2014-January/034323.html

For reference:
- Public headers should just declare the dump() method but not use
  LLVM_DUMP_METHOD or #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
- The definition of a dump method should look like this:
  #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
  LLVM_DUMP_METHOD void MyClass::dump() {
    // print stuff to dbgs()...
  }
  #endif

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293359 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-28 02:02:38 +00:00
Krzysztof Parzyszek
308c60d0cb Implement LaneBitmask::any(), use it to replace !none(), NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289974 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-16 19:11:56 +00:00
Krzysztof Parzyszek
d6ca3f019d Extract LaneBitmask into a separate type
Specifically avoid implicit conversions from/to integral types to
avoid potential errors when changing the underlying type. For example,
a typical initialization of a "full" mask was "LaneMask = ~0u", which
would result in a value of 0x00000000FFFFFFFF if the type was extended
to uint64_t.

Differential Revision: https://reviews.llvm.org/D27454


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289820 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-15 14:36:06 +00:00
Matthias Braun
05bdd2ebfe MachineScheduler: Export function to construct "default" scheduler.
This makes the createGenericSchedLive() function that constructs the
default scheduler available for the public API. This should help when
you want to get a scheduler and the default list of DAG mutations.

This also shrinks the list of default DAG mutations:
{Load|Store}ClusterDAGMutation and MacroFusionDAGMutation are no longer
added by default. Targets can easily add them if they need them. It also
makes it easier for targets to add alternative/custom macrofusion or
clustering mutations while staying with the default
createGenericSchedLive(). It also saves the callback back and forth in
TargetInstrInfo::enableClusterLoads()/enableClusterStores().

Differential Revision: https://reviews.llvm.org/D26986

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288057 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-28 20:11:54 +00:00
Matthias Braun
dc2310fcc5 Revert "(origin/master, origin/HEAD) MachineScheduler/ScheduleDAG: Add support to skipping a node."
Revert accidentally committed change.

This reverts commit r286655.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286656 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-11 22:39:50 +00:00
Matthias Braun
59a5edddc7 MachineScheduler/ScheduleDAG: Add support to skipping a node.
The DAG mutators in the scheduler cannot really remove DAG nodes as
additional anlysis information such as ScheduleDAGToplogicalSort are
already computed at this point and rely on a fixed number of DAG nodes.

Alleviate the missing removal with a new flag: Setting the new skip
flag on a node ignores it during scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286655 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-11 22:37:34 +00:00
Matthias Braun
97c4b7addd ScheduleDAGInstrs: Move VRegUses to ScheduleDAGMILive; NFCI
Push VRegUses/collectVRegUses() down the class hierarchy towards its
only user ScheduleDAGMILive.

NFCI: The initialization of the map happens at a later point but that
should not matter.

This is in preparation to allow DAG mutators to merge nodes, which
relies on this map getting computed later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286654 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-11 22:37:31 +00:00