150072 Commits

Author SHA1 Message Date
Konstantin Zhuravlyov
2c18fa1f9c AMDGPU/NFC: Move amdgpu code object metadata to support
Differential Revision: https://reviews.llvm.org/D31437


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304812 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 18:35:50 +00:00
Anna Thomas
0a378270ee [LoopIdiom] Move X86 specific atomic memcpy test to the X86 directory
Patch https://reviews.llvm.org/rL304806 was causing failures in Aarch64
and multiple other targets since the test should be run on X86 only.

Specifying the target triple is not enough. Moving the testcase to the
X86 target directory in LoopIdiom.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304809 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 17:46:41 +00:00
Daniel Berlin
2d73c379ee NewGVN: Fix PR/33187. This is a bug caused by two things:
1. When there is no perfect iteration order, we can't let phi nodes
put themselves in terms of things that come later in the iteration
order, or we will endlessly cycle (the normal RPO algorithm clears the
hashtable to avoid this issue).
2. We are sometimes erasing the wrong expression (causing pessimism)
because our equality says loads and stores are the same.
We introduce an exact equality function and use it when erasing to
make sure we erase only identical expressions, not equivalent ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304807 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 17:15:28 +00:00
Anna Thomas
bacc83353b [Atomics][LoopIdiom] Recognize unordered atomic memcpy
Summary:
Expanding the loop idiom test for memcpy to also recognize
unordered atomic memcpy. The only difference for recognizing
an unordered atomic memcpy and instead of a normal memcpy is
that the loads and/or stores involved are unordered atomic operations.

Background:  http://lists.llvm.org/pipermail/llvm-dev/2017-May/112779.html

Patch by Daniel Neilson!

Reviewers: reames, anna, skatkov

Reviewed By: reames, anna

Subscribers: llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D33243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304806 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 16:45:25 +00:00
Stanislav Mekhanoshin
8b43bddd6d [AMDGPU] Return correct value from SDWA pass
Differential Revision: https://reviews.llvm.org/D33927

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304805 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 16:42:30 +00:00
Sam Clegg
d6def3abef [WebAssembly] Remove unused methods from MCWasmObjectTargetWriter
These methods looks like they were originally came from
MCELFObjectTargetWriter but they are never called by the
WasmObjectWriter.

Remove these methods meant the declaration of WasmRelocationEntry
could also move into the cpp file.

Differential Revision: https://reviews.llvm.org/D33905

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304804 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 16:38:59 +00:00
Petar Jovanovic
55caeda9d7 [mips] Add madd4 subtarget feature
Addition of a feature and a predicate used to control generation of madd.fmt
and similar instructions.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D33400


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304801 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 15:33:01 +00:00
Anna Thomas
958169b1f8 [IRCE] Canonicalize pre/post loops after the blocks are added into parent loop
Summary:
We were canonizalizing the pre loop (into loop-simplify form) before
the post loop blocks were added into parent loop. This is incorrect when IRCE is
done on a subloop. The post-loop blocks are created, but not yet added to the
parent loop. So, loop-simplification on the pre-loop incorrectly updates
LoopInfo.

This patch corrects the ordering so that pre and post loop blocks are added to
parent loop (if any), and then the loops are canonicalized to LCSSA and
LoopSimplifyForm.

Reviewers: reames, sanjoy, apilipenko

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33846

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304800 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 14:54:01 +00:00
Simon Pilgrim
2c222247e9 Fix spelling mistake in getRThroughput static function names. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304799 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 14:25:34 +00:00
Simon Pilgrim
19ff9cf62b [X86][AVX1] Split 256-bit vector non-temporal FastISel loads to keep it non-temporal (PR32744)
Extension to D33728

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304798 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 14:18:39 +00:00
Tom Stellard
5d24d88bc7 AMDGPU/GlobalISel: Mark 32-bit G_ICMP as legal
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33890

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304797 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 14:16:50 +00:00
Chandler Carruth
6721342b90 Fix another ordering constraint with windows.h and comment about
a revers constraint that we got right (by chance).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304792 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 12:43:20 +00:00
Chandler Carruth
dca225eaa7 Fix several more missing headers, all of these were hidden by "lucky"
include ordering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304790 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 12:31:55 +00:00
Chandler Carruth
4d354ac7b0 Add a missing #include to a header.
This was masked by lucky #include ordering in the .cpp files and
uncovered when we moved to the canonical ordering because the primary
header was included first (yay!). Unfortunately, I can't build this
locally so took a build-bot iteration to find it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304789 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 12:21:27 +00:00
Chandler Carruth
1edfb2c819 Fix one place where I missed a commented requirement for a particular
include ordering.

I've changed the structure so that clang-format will preserve this going
forward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304788 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 12:11:24 +00:00
Chandler Carruth
e3e43d9d57 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 11:49:48 +00:00
Chandler Carruth
3c0d60785c Re-sort #include lines for unittests. This uses a slightly modified
clang-format (https://reviews.llvm.org/D33932) to keep primary headers
at the top and handle new utility headers like 'gmock' consistently with
other utility headers.

No other change was made. I did no manual edits, all of this is
clang-format.

This should allow other changes to have more clear and focused diffs,
and is especially motivated by moving some headers into more focused
libraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304786 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 11:06:56 +00:00
Peter Smith
9bea4232dd [ARM] Add curly braces around switch case [NFC]
My previous commit r304702 introduced a new case into a switch statement.
This case defined a variable but I forgot to add the curly brackets around the
case to limit the scope.

This change puts the curly braces back in so that the next person that adds a
case doesn't get a build failure. Thanks to avieira for the spot.

Differential Revision: https://reviews.llvm.org/D33931



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304785 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 10:22:49 +00:00
Joey Gouly
4d04e9b25e [InstSimplify] Constant fold the new GEP in SimplifyGEPInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304784 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 10:17:14 +00:00
Nuno Lopes
bac91bf18c [docs] Make it clear shifts yield poison when shift amount >= bitwidth
Some InstCombine optimizations already rely on the result being poison
rather than undef.

For example, the following rewrite is wrong if undef is used:
; (1 << Y) * X  ->  X << Y
%Op0 = shl 1, %Y
%r = mul %Op0, %Op1
  =>
%r = shl %Op1, %Y

ERROR: Mismatch in values for i4 %r

Example:
i4 %Y = 0x8 (8, -8)
i4 %Op0 = 0x0 (0)
i4 %Op1 = 0x0 (0)
source: 0x0 (0)
target: 0x1 (1)

The optimization is correct if poison is returned instead:
http://rise4fun.com/Alive/ygX


Differential Revision: https://reviews.llvm.org/D33654



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304780 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 08:28:17 +00:00
Vivek Pandya
de22782d75 [Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.
If -simplify-mir option is passed then MIRPrinter will not print such fields.
This change also required some lit test cases in CodeGen directory to be changed.

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D32304


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304779 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 08:16:19 +00:00
Chandler Carruth
8e7e3e824c Fix an unused variable warning in non-asserts builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304778 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 07:49:34 +00:00
Craig Topper
8d7f132f47 [InstSimplify] Remove some redundant code from InstSimplify now that llvm::isKnownNonEqual handles vectors.
isKnownNonEqual is called a little earlier in this function and can handle the case that we were checking here as well as more complex cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304775 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 07:13:17 +00:00
Craig Topper
275adc9e37 [ValueTracking] Remove scalar only restriction from isKnownNonEqual. The computeKnownBits and isKnownNonZero calls this code relies on should work fine for vectors.
This will be used by another commit to remove some code from InstSimplify that is redundant for scalars, but was needed for vectors due to this issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304774 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 07:13:15 +00:00
Craig Topper
7002e8b635 [InstSimplify] Use the getTrue/getFalse helpers and make sure we use the computed result type instead of hardcoding to i1. NFC
Currently, isKnownNonEqual punts on vectors so the hardcoding to i1 doesn't matter. But I plan to fix that in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304773 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 07:13:13 +00:00
Craig Topper
43a5f59f14 [ValueTracking] Use the computeKnownBits version that returns a KnownBits object instead of taking one by reference. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304772 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 07:13:11 +00:00
Craig Topper
04e2a49b56 [ValueTracking] Use APInt::intersects to avoid some temporary APInts. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304771 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 07:13:09 +00:00
Craig Topper
99facf0e27 [InstSimplify] Use ICmpInst::isEquality predicate method. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304770 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 07:13:04 +00:00
Mandeep Singh Grang
8c3abeed5e [llvm] Remove double semicolons
Reviewers: craig.topper, arsenm, mehdi_amini

Reviewed By: mehdi_amini

Subscribers: mehdi_amini, wdng, nhaehnle, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33924

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304767 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 05:08:36 +00:00
Chandler Carruth
c1a89c1b5c [x86] Stop this test from dirtying the source tree when run.
The output isn't used anyways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304766 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 03:24:22 +00:00
Xin Tong
801b4cef3c Add a dominanance check interface that uses caching for instructions within same basic block.
Summary:
This problem stems from the fact that instructions are allocated using new
in LLVM, i.e. there is no relationship that can be derived by just looking
at the pointer value.

This interface dispatches to appropriate dominance check given 2 instructions,
i.e. in case the instructions are in the same basic block, ordered basicblock
(with instruction numbering and caching) are used. Otherwise, dominator tree
is used.

This is a preparation patch for https://reviews.llvm.org/D32720

Reviewers: dberlin, hfinkel, davide

Subscribers: davide, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D33380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304764 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 02:34:41 +00:00
Chandler Carruth
446c2e7b47 [x86] Add the test for folding stack spills into pextrw.
This is a negative test as pextrw doesn't write to all 32-bits of the
spilled GPR. This fold ended up happening when D32684 was landed and
covers the regression that motivated reverting it in r304762.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304763 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 02:16:01 +00:00
Chandler Carruth
565cfe059c [x86] Revert the X86FoldTablesEmitter due to more miscompiles.
In testing, we've found yet another miscompile caused by the new tables.
And this one is even less clear how to fix (we could teach it to fold
a 16-bit load instead of the 32-bit load it wants, or block folding
entirely).

Also, the approach to excluding instructions seems increasingly to not
scale well.

I have left a more detailed analysis on the review log for the original
patch (https://reviews.llvm.org/D32684) along with suggested path
forward. I will land an additional test case that I wrote which covers
the code that was miscompiling (folding into the output of `pextrw`) in
a subsequent commit to keep this a pure revert.

For each commit reverted here, I've restricted the revert to the
non-test code touching the x86 fold table emission until the last commit
where I did revert the test updates. This means the *new* test cases
added for `insertps` and `xchg` remain untouched (and continue to pass).

Reverted commits:
r304540: [X86] Don't fold into memory operands into insertps in the ...
r304347: [TableGen] Adapt more places to getValueAsString now ...
r304163: [X86] Don't fold away the memory operand of an xchg.
r304123: Don't capture a temporary std::string in a StringRef.
r304122: Resubmit "[X86] Adding new LLVM TableGen backend that ..."

Original commit was in r304088, and after a string of fixes was reverted
previously in r304121 to fix build bots, and then re-landed in r304122.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304762 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 02:15:31 +00:00
Wolfgang Pieb
c9977b6aa4 [DWARF] Adding support for the DWARF v5 string offsets table (consumer/reader part only).
Reviewers: dblaikie, aprantl

Differential Revision: https://reviews.llvm.org/D32779



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304759 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 01:22:34 +00:00
Matthias Braun
2144c5262f CodeGen: Refactor MIR parsing
When parsing .mir files immediately construct the MachineFunctions and
put them into MachineModuleInfo.

This allows us to get rid of the delayed construction (and delayed error
reporting) through the MachineFunctionInitialzier interface.

Differential Revision: https://reviews.llvm.org/D33809

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304758 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 00:44:35 +00:00
Mandeep Singh Grang
20350be310 [cmake] Enable reverse iteration by default through build macro
Summary:
Reverse iteration can be turned on, by default, by setting -DLLVM_REVERSE_ITERATION:BOOL=ON during cmake.
With this enabled, we can uncover lots of cases of non-determinism in codegen by simply running our tests (without any other change).
We can then setup a buildbot which will have this turned on by default. Initially, a lot of unit tests will fail in this configuration.
Once we start fixing non-determinism issues, we can gradually make this a blocker for patches.

Reviewers: davide, dblaikie, mehdi_amini, dberlin

Reviewed By: dblaikie

Subscribers: probinson, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D33908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304757 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 00:36:09 +00:00
Matthias Braun
e6c9b7e113 llc: Create custom pass pipeline for .mir files; NFCI
Create a custom pass pipeline when loading .mir files even in
--start-after/--start-before cases.

This streamlines the mir handling code and prepares for an upcoming
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304755 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 00:26:24 +00:00
Matthias Braun
516023ae81 CodeGen/LLVMTargetMachine: Refactor ISel pass construction; NFCI
- Move ISel (and pre-isel) pass construction into TargetPassConfig
- Extract AsmPrinter construction into a helper function

Putting the ISel code into TargetPassConfig seems a lot more natural and
both changes together make make it easier to build custom pipelines
involving .mir in an upcoming commit. This moves MachineModuleInfo to an
earlier place in the pass pipeline which shouldn't have any effect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304754 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 00:26:13 +00:00
Sanjay Patel
2c200794df [x86] fix over-specific triple; NFC
There's nothing darwin-specific in these tests, and using that 
setting causes extra phantom diffs when the auto-generated check 
lines are regenerated today.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304753 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 00:18:11 +00:00
Quentin Colombet
de1ece9ed1 [InlineSpiller] Don't spill fully undef values
Althought it is not wrong to spill undef values, it is useless and harms
both code size and runtime. Before spilling a value, check that its
content actually matters.

http://www.llvm.org/PR33311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304752 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 23:51:27 +00:00
Evgeny Stupachenko
17e210d01a Fix PR23384 (part 2 of 3) NFC
Summary:
The patch moves LSR cost comparison to target part.

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D30561

From: Evgeny Stupachenko <evstupac@gmail.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304750 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 23:37:00 +00:00
Matt Arsenault
83def7c691 Remove double semicolon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304749 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 23:01:31 +00:00
Matthias Braun
6764d4642c Remove some #include from StackProtector.h; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304748 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 22:59:21 +00:00
Matt Arsenault
323e6e9ede RenameIndependentSubregs: Fix handling of undef tied operands
If a tied source operand was undef, it would be replaced but not
update the other tied operand, which would end up using different
virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304747 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 22:58:57 +00:00
Evgeny Stupachenko
de4b0d7fbb LSR: Calculate instruction cost only if InsnsCost is set to true (NFC)
Summary:

The patch guard all instruction cost calculations with InsnCosts (-lsr-insns-cost) option.
Currently even if the option set to false we calculate and print (in debug mode) instruction costs.

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D33914

From: Evgeny Stupachenko <evstupac@gmail.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304746 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 22:44:18 +00:00
Volkan Keles
5191e5027c [GlobalISel] IRTranslator: Add MachineMemOperand to target memory intrinsics
Reviewers: qcolombet, ab, t.p.northover, aditya_nandakumar, dsanders

Reviewed By: qcolombet

Subscribers: rovka, kristof.beyls, javed.absar, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D33724

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304743 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 22:17:17 +00:00
Davide Italiano
cc4a80a566 [SelectionDAG] Update the dominator after splitting critical edges.
Running `llc -verify-dom-info` on the attached testcase results in a
crash in the verifier, due to a stale dominator tree.

i.e.

  DominatorTree is not up to date!
  Computed:
  =============================--------------------------------
  Inorder Dominator Tree:
    [1] %safe_mod_func_uint8_t_u_u.exit.i.i.i {0,7}
      [2] %lor.lhs.false.i61.i.i.i {1,2}
      [2] %safe_mod_func_int8_t_s_s.exit.i.i.i {3,6}
        [3] %safe_div_func_int64_t_s_s.exit66.i.i.i {4,5}

  Actual:
  =============================--------------------------------
  Inorder Dominator Tree:
    [1] %safe_mod_func_uint8_t_u_u.exit.i.i.i {0,9}
      [2] %lor.lhs.false.i61.i.i.i {1,2}
      [2] %safe_mod_func_int8_t_s_s.exit.i.i.i {3,8}
        [3] %safe_div_func_int64_t_s_s.exit66.i.i.i {4,5}
        [3] %safe_mod_func_int8_t_s_s.exit.i.i.i.lor.lhs.false.i61.i.i.i_crit_edge {6,7}

This is because in `SelectionDAGIsel` we split critical edges without
updating the corresponding dominator for the function (and we claim
in `MachineFunctionPass::getAnalysisUsage()` that the domtree is preserved).

We could either stop preserving the domtree in `getAnalysisUsage`
or tell `splitCriticalEdge()` to update it.
As the second option is easy to implement, that's the one I chose.

Differential Revision:  https://reviews.llvm.org/D33800

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304742 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 22:16:41 +00:00
Zachary Turner
efcc38aeb3 [CodeView] Fix endianness bug.
We should be outputting in little endian, but we were writing
in host endianness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304741 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 22:12:23 +00:00
Saleem Abdulrasool
2c2bad997e test: fix hexagon build
Add a x86-registered-target requirement to the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304739 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 21:45:25 +00:00
Zachary Turner
11d1678b59 [CodeView] Handle Cross Module Imports and Exports.
While it's not entirely clear why a compiler or linker might
put this information into an object or PDB file, one has been
spotted in the wild which was causing llvm-pdbdump to crash.

This patch adds support for reading-writing these sections.
Since I don't know how to get one of the native tools to
generate this kind of debug info, the only test here is one
in which we feed YAML into the tool to produce a PDB and
then spit out YAML from the resulting PDB and make sure that
it matches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304738 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 21:40:33 +00:00