157444 Commits

Author SHA1 Message Date
Sean Eveson
360f53a441 Revert r319423: [MC] Function stack size section.
I messed up the diff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319429 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 12:43:25 +00:00
Diana Picus
11acbdedb4 [ARM GlobalISel] Bail out for byval
Fallback if we have a byval parameter or argument since we don't support
them yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319428 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 12:23:44 +00:00
Francis Visoiu Mistrih
7384652668 [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
As part of the unification of the debug format and the MIR format, avoid
printing "vreg" for virtual registers (which is one of the current MIR
possibilities).

Basically:

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E "s/%vreg([0-9]+)/%\1/g"
* grep -nr '%vreg' . and fix if needed
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E "s/ vreg([0-9]+)/ %\1/g"
* grep -nr 'vreg[0-9]\+' . and fix if needed

Differential Revision: https://reviews.llvm.org/D40420

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319427 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 12:12:19 +00:00
Simon Pilgrim
996d6ddb49 [X86][AVX512] Tag binop/rounding/sae instructions scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319424 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 12:01:52 +00:00
Sean Eveson
5e536b7694 [MC] Function stack size section.
Summary:
Original RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-August/117028.html

I wasn't sure who to put as reviewers, so please add/remove people as appropriate.

This change adds a '.stack-size' section containing metadata on function stack sizes to output ELF files behind the new -stack-size-section flag. The section contains pairs of function symbol references (8 byte) and stack sizes (unsigned LEB128).

The contents of this section can be used to measure changes to stack sizes between different versions of the compiler or a source base. The advantage of having a section is that we can extract this information when examining binaries that we didn't build, and it allows users and tools easy access to that information just by referencing the binary.

There is a follow up change to add an option to clang.

Thanks.

Reviewers: hfinkel, MatzeB

Reviewed By: MatzeB

Subscribers: thegameg, asb, llvm-commits

Differential Revision: https://reviews.llvm.org/D39788

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319423 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 12:01:16 +00:00
Sam Parker
a90c32e02f [DAGCombine] Refactor ReduceLoadWidth
visitAND attempts to narrow the width of extending loads that are
then masked off. ReduceLoadWidth already exists for a similar purpose
and handles shifts, so I've moved the code to handle AND nodes there.

Differential Revision: https://reviews.llvm.org/D39595


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319421 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 11:49:11 +00:00
Serge Guelton
86e196b704 Support generic lowering of vector bswap
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319419 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 11:06:22 +00:00
Simon Pilgrim
b785e2618f [X86][AVX512] Tag RCP/RSQRT/GETEXP instructions scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319418 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 10:48:47 +00:00
Jonas Devlieghere
6bb5dbce84 [dsymutil] Exclude namespace from ifdef in CFBundle
Should fix build failure introduced by r319416 on non-darwin hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319417 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 10:41:31 +00:00
Jonas Devlieghere
bdc984ca3d [dsymutil] Upstream getBundleInfo implementation
This patch implements `getBundleInfo`, which uses CoreFoundation to
obtain information about the CFBundle. This information is needed to
populate the Plist in the dSYM bundle.

This change only applies to darwin and is an NFC as far as other
platforms are concerned.

Differential revision: https://reviews.llvm.org/D40244

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319416 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 10:25:28 +00:00
Hiroshi Inoue
50f1f9435a Revert rL319407: [SROA] enable splitting for non-whole-alloca loads and stores
This reverts commit rL319407 due to failures in some buildbot.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319410 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 08:29:51 +00:00
Jonas Paulsson
431a76fee4 [SystemZ] Bugfix in adjustSubwordCmp.
Csmith generated a program where a store after load to the same address did
not get chained after the new load created during DAG legalizing, and so
performed an illegal overwrite of the expected value.

When the new zero-extending load is created, the chain users of the original
load must be updated, which was not done previously.

A similar case was also found and handled in lowerBITCAST.

Review: Ulrich Weigand
https://reviews.llvm.org/D40542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319409 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 08:18:50 +00:00
Hiroshi Inoue
39be023c86 [SROA] enable splitting for non-whole-alloca loads and stores
Currently, SROA splits loads and stores only when they are accessing the whole alloca.
This patch relaxes this limitation to allow splitting a load/store if all other loads and stores to the alloca are disjoint to or fully included in the current load/store. If there is no other load or store that crosses the boundary of the current load/store, the current splitting implementation works as is.
The whole-alloca loads and stores meet this new condition and so they are still splittable.

Here is a simplified motivating example.

struct record {
    long long a;
    int b;
    int c;
};

int func(struct record r) {
    for (int i = 0; i < r.c; i++)
        r.b++;
    return r.b;
}

When updating r.b (or r.c as well), LLVM generates redundant instructions on some platforms (such as x86_64, ppc64); here, r.b and r.c are packed into one 64-bit GPR when the struct is passed as a method argument.

With this patch, the above example is compiled into only few instructions without loop.
Without the patch, unnecessary loop-carried dependency is introduced by SROA and the loop cannot be eliminated by the later optimizers.

Differential Revision: https://reviews.llvm.org/D32998



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319407 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 07:44:46 +00:00
Craig Topper
f6395de026 [X86] Optimize avx2 vgatherqps for v2f32 with v2i64 index type.
Normal type legalization will widen everything. This requires forcing 0s into the mask register. We can instead choose the form that only reads 2 elements without zeroing the mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319406 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 07:01:40 +00:00
Craig Topper
d60f6e4a5b [X86] Make sure we don't remove sign extends of masks with AVX2 masked gathers.
We don't use k-registers and instead use the MSB so we need to make sure we sign extend the mask to the msb.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319405 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 06:31:31 +00:00
Dean Michael Berris
fe376dcd53 [XRay][docs] Update documentation on new default for xray_naive_log=
We've recently changed the default for `xray_naive_log=` to be `false`
instead of `true` to make it more consistent with the FDR mode logging
implementation. This means we will now ask users to explicitly choose
which version of the XRay logging is being used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319400 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 05:35:51 +00:00
Graham Yiu
9d522dc415 - Removed unused lamba (IsReturnBlock) causing build bots to fail for r319398
- Added lit testcases that were supposed to be part of r319398

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319399 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 03:36:57 +00:00
Graham Yiu
106d893fd7 With PGO information, we can do more aggressive outlining of cold regions in the inline candidate function. This contrasts with the scheme of keeping only the 'early return' portion of the inline candidate and outlining the rest of the function as a single function call.
Support for outlining multiple regions of each function is added, as well as some basic heuristics to determine which regions are good to outline. Outline candidates limited to regions that are single-entry & single-exit. We also avoid outlining regions that produce live-exit variables, which may inhibit some forms of code motion (like commoning).

Fallback to the regular partial inlining scheme is retained when either i) no regions are identified for outlining in the function, or ii) the outlined function could not be inlined in any of its callers.

Differential Revision: https://reviews.llvm.org/D38190

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319398 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 02:41:36 +00:00
Kostya Serebryany
eb4cb7ad5c [libFuzzer] mention one more trophie in the Linux Kernel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319397 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 02:26:47 +00:00
Matt Arsenault
1de313a465 AMDGPU: Allow negative MUBUF vaddr for gfx9
GFX9 does not enable bounds checking for the resource descriptors
used for private access, so it should be OK to use vaddr with
a potentially negative value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319393 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 00:52:40 +00:00
Rafael Espindola
fb10287401 Check alignment in getSectionContentsAsArray.
While the ArrayRef can technically have unaligned data, it would be
extremely surprising if iterating over it caused undefined behavior
when a reference to the underlying type was bound.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319392 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 00:44:22 +00:00
Vedant Kumar
310bfccbbf [Coverage] Use the most-recent completed region count (PR35437)
This is a fix for the coverage segment builder.

If multiple regions must be popped off the active stack at once, and
more than one of them end at the same location, emit a segment using the
count from the most-recent completed region.

Fixes PR35437, rdar://35760630

Testing: invoked llvm-cov on a stage2 build of clang, additional unit
tests, check-profile

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319391 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 00:28:23 +00:00
Peter Collingbourne
b45fa1a537 LowerTypeTests: Deduplicate code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319390 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 00:27:08 +00:00
Peter Collingbourne
1edbc9f1bc LowerTypeTests: Remove unnecessary cast. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319387 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 00:02:55 +00:00
Craig Topper
0a78cd8e7f [X86] Remove some questionable looking code that seems to be looking through a VZEXT to create a larger VSEXT.
If the input the vzext was signed this would do the wrong thing.

Not sure how to test this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319382 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 23:08:25 +00:00
Joerg Sonnenberger
4ee291ace8 First step towards more human-friendly PPC assembler output:
- add -ppc-reg-with-percent-prefix option to use %r3 etc as register
  names
- split off logic for Darwinish verbose conditional codes into a helper
  function
- be explicit about Darwin vs AIX vs GNUish assembler flavors

Based on the patch from Alexandre Yukio Yamashita

Differential Revision: https://reviews.llvm.org/D39016


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319381 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 23:05:56 +00:00
Sam Clegg
066e89ae6f [WebAssembly] Update test expectations for gcc torture tests
I believe these were recently fixed by:
https://reviews.llvm.org/rL319186

Differential Revision: https://reviews.llvm.org/D40619

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319380 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 23:05:50 +00:00
Zachary Turner
7448686a65 [CodeView] Factor some code out of TypeTableBuilder.
This class had some code that would automatically remap type
indices before hashing and serializing.  The only caller of
this method was the TypeStreamMerger anyway, and the method
doesn't make general sense, and prevents making certain future
improvements to the class.  So, factoring this up one level
into the TypeStreamMerger where it belongs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319377 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 22:41:56 +00:00
Craig Topper
f1a319a05f [SelectionDAG][X86] Teach promotion legalization for fp_to_sint/fp_to_uint to insert an assertsext/assertzext based on the original type
If we put in an assertsext/zext here, we're able to generate better truncate code using pack on pre-avx512 targets.

Similar is already done during type legalization. This is the equivalent for op legalization

Differential Revision: https://reviews.llvm.org/D40591

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319368 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 22:15:43 +00:00
Dan Gohman
685c102164 [WebAssembly] Fix fptoui lowering bounds
To fully avoid trapping on wasm, fptoui needs a second check to ensure that
the operand isn't below the supported range.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319354 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 20:20:11 +00:00
Sam Clegg
9bb51631d1 Add libstd++-4.8 exceptions to ubsan_blacklist.txt
Differential Revision: https://reviews.llvm.org/D40589

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319353 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 20:10:14 +00:00
Krzysztof Parzyszek
433d3104b8 [Hexagon] Remove HexagonISD::PACKHL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319352 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 19:59:29 +00:00
Krzysztof Parzyszek
743fb60a4e [Hexagon] Create helpers extractVector and insertVector in lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319351 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 19:58:10 +00:00
Simon Pilgrim
5c698e3437 [X86][AVX512] Tag RCP/RSQRT/GETEXP instructions scheduler classes (REVERSION)
Accidental commit of incomplete patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319346 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 19:37:38 +00:00
Zachary Turner
7fe0c00835 Make TypeTableBuilder inherit from TypeCollection.
A couple of places in LLD were passing references to
TypeTableCollections around, which makes it hard to change the
implementation at runtime.  However, these cases only needed to
iterate over the types in the collection, and TypeCollection
already provides a handy abstract interface for this purpose.

By implementing this interface, we can get rid of the need to
pass TypeTableBuilder references around, which should allow us
to swap the implementation at runtime in subsequent patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319345 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 19:35:21 +00:00
Zachary Turner
4c20574874 Fix line endings in llvm-pdbutil.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319340 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 19:29:25 +00:00
Simon Pilgrim
ae007cec62 [X86][AVX512] Tag RCP/RSQRT/GETEXP instructions scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319338 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 19:19:59 +00:00
Simon Pilgrim
02c5c78684 [X86][AVX512] Tag 3OP (shuffles, double-shifts and GFNI) instructions scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319337 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 18:52:20 +00:00
Nirav Dave
17820125d4 [ARM][DAG] Revert Disable post-legalization store merge for ARM
Partially reverting enabling of post-legalization store merge
(r319036) for just ARM backend as it is causing incorrect code
in some Thumb2 cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319331 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 18:06:13 +00:00
Greg Bedwell
3a42cace77 [cmake] Replace -Wall with /W4 in clang-cl options now that -Wall aliases -Weverything
Instead, reuse the code-path for cl.exe that adds /W4 , which for clang-cl
aliases clang's "-Wall -Wextra" which matches what clang-cl's /Wall
previously aliased.

This should restore the verbosity of a Windows selfhost build back to
its previous levels.

Differential Revision: https://reviews.llvm.org/D40603

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319330 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 18:05:32 +00:00
Greg Bedwell
e081e350cb Make check-lit tests respect LLVM_LIT_TOOLS_DIR
Differential Revision: https://reviews.llvm.org/D40520

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319329 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 18:05:26 +00:00
Zaara Syeda
1a60893597 [Power9] add more tests for D38287; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319328 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 17:26:20 +00:00
Sanjay Patel
0221a1478f [InstCombine] add tests for select-of-constants; NFC
These are variants of a test that was originally added in:
https://reviews.llvm.org/rL75531
...but removed with:
https://reviews.llvm.org/rL159230



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319327 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 17:21:39 +00:00
Simon Pilgrim
1c969b0dcc [X86][AVX512] Add itinerary argument to all AVX512_maskable_* wrappers. NFCI
All default to NoItinerary

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319326 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 17:21:15 +00:00
Adam Nemet
d3ee0657bc Add opt-viewer testing
Detects whether we have the Python modules (pygments, yaml) required by
opt-viewer and hooks this up to REQUIRES.

This fixes https://bugs.llvm.org/show_bug.cgi?id=34129 (the lack of opt-viewer
testing).

It's also related to https://github.com/apple/swift/pull/12938 and the idea is
to expose LLVM_HAVE_OPT_VIEWER_MODULES to the Swift cmake.

Differential Revision: https://reviews.llvm.org/D40202

Fixes since the first commit:
1. Disable syntax highlighting as different versions of pygments generate
different HTML
2. Use llvm-cxxfilt from the build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319324 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 17:07:41 +00:00
Sander de Smalen
ff77244792 Reverted r319315 because of unused functions (due to PPR not yet being
used by any instructions).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319321 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 15:14:39 +00:00
Simon Pilgrim
bc89401e6c [X86][AVX512] Tag VPERMILV instruction scheduler class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319316 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 14:58:34 +00:00
Sander de Smalen
a150a5ac82 [AArch64][SVE] Asm: Add SVE predicate register definitions and parsing support
Summary: Patch [1/4] in a series to add parsing of predicates and properly parse SVE ZIP1/ZIP2 instructions.

Reviewers: rengolin, kristof.beyls, fhahn, mcrosier, evandro, echristo, efriedma

Reviewed By: fhahn

Subscribers: aemerson, javed.absar, llvm-commits, tschuett

Differential Revision: https://reviews.llvm.org/D40360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319315 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 14:34:18 +00:00
Diana Picus
c7436ce110 [ARM GlobalISel] Fix selecting G_BRCOND
When lowering a G_BRCOND, we generate a TSTri of the condition against
1, which sets the flags, and then a Bcc which branches based on the
value of the flags.

Unfortunately, we were using the wrong condition code to check whether
we need to branch (EQ instead of NE), which caused all our branches to
do the opposite of what they were intended to do. This patch fixes the
issue by using the correct condition code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319313 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 14:20:06 +00:00
Simon Pilgrim
abf3849506 [X86][AVX512] Setup unary (PABS/VPLZCNT/VPOPCNT/VPCONFLICT/VMOV*DUP) instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319312 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 13:49:51 +00:00