Commit Graph

124465 Commits

Author SHA1 Message Date
Andrew Wilkins
b6bbdc0193 Use $GO_EXECUTABLE in Go-based lit tests
Summary:
When running tests, pass the GO_EXECUTABLE CMake
cache variable to llvm-go. The "go" binary may
not be in $PATH, or may be different to the one
passed to CMake.

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14041

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254187 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-27 04:44:51 +00:00
Rafael Espindola
39066cae68 Test both input file orders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254186 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-27 03:50:34 +00:00
Rafael Espindola
d2a2e5d4e8 Add missing file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254185 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-27 03:47:29 +00:00
Rafael Espindola
9e7173acbb Make the test a bit more interesting.
It now covers a regular function replacing an available_externally one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254184 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-27 02:07:37 +00:00
Peter Collingbourne
41984d3288 MC: Simplify handling of temporary symbols in COFF writer.
The COFF object writer was previously adding unnecessary symbols to its
temporary data structures and cleaning them up later. This made the code
harder to understand and caused a bug (aliases classed as temporary symbols
would cause an assertion failure). A much simpler way of handling such
symbols is to ask the layout for their section-relative position when needed.

Tested with a bootstrap on Windows and by building Chrome.

Differential Revision: http://reviews.llvm.org/D14975

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254183 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 23:29:27 +00:00
Simon Pilgrim
d87d4991ce [X86][FMA] Begun adding AVX512 FMA tests
As discussed on D14909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254180 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 20:53:28 +00:00
Charlie Turner
c8dc70b584 [LoopVectorize] Use MapVector rather than DenseMap for MinBWs.
The order in which instructions are truncated in truncateToMinimalBitwidths
effects code generation. Switch to a map with a determinisic order, since the
iteration order over a DenseMap is not defined.

This code is not hot, so the difference in container performance isn't
interesting.

Many thanks to David Blaikie for making me aware of MapVector!

Fixes PR25490.

Differential Revision: http://reviews.llvm.org/D14981



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 20:39:51 +00:00
Craig Topper
d647d4ba0f [X86] Now that X86VPermt2 is used in all the avx512_perm_t_sizes just hardcode it into the patterns instead of passing as an argument. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254177 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 20:21:29 +00:00
Craig Topper
1c01e6cc5c [X86] Merge X86VPermt2Fp and X86VPermt2Int back together by weakening them just enough. The SDTCisSameSizeAs introduced in r254138 helps here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254176 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 20:02:01 +00:00
Rafael Espindola
30e6c88594 Add a few passing lto tests.
I found these while trying to get a prototype to bootstrap.

They cover things like
* Handling of non linker visible stuff (append, available_externally)
* Type merging
* Alias to dropped globals
* Dropping linkage when converting to a declaration.

These should hopefully be generally useful for anyone refactoring the
plugin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254174 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 19:53:12 +00:00
Craig Topper
7df7870c48 [X86] Split ISD node for Vfpclass and Vfpclasss so that we can write strong type constraints for each that don't cause ambiguous isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254172 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 19:41:34 +00:00
Hal Finkel
c818be073d [bugpoint] Fix "Alias must point to a definition" problems
GlobalAliases may reference function definitions, but not function declarations.

bugpoint would sometimes create invalid IR by deleting a function's body (thus
mutating a function definition into a declaration) without first 'fixing' any
GlobalAliases that reference that function definition.

This change iteratively prevents that issue. Before deleting a function's body,
it scans the module for GlobalAliases which reference that function. When
found, it eliminates them using replaceAllUsesWith.

Fixes PR20788.

Patch by Nick Johnson!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254171 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 19:23:49 +00:00
Rafael Espindola
58019e7bea Disallow aliases to available_externally.
They are as much trouble as aliases to declarations. They are requiring
the code generator to define a symbol with the same value as another
symbol, but the second symbol is undefined.

If representing this is important for some optimization, we could add
support for available_externally aliases. They would be *required* to
point to a declaration (or available_externally definition).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254170 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 19:22:59 +00:00
Craig Topper
9f7045b0a6 [X86] Revert part of r254167 to recover bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254169 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 19:13:05 +00:00
Krzysztof Parzyszek
de8494c2f2 [Hexagon] Lowering of V60/HVX vector types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254168 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 18:38:27 +00:00
Craig Topper
942f8d8237 [X86] Strengthen more type constraints to reduce isel table size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254167 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 18:31:19 +00:00
Krzysztof Parzyszek
9a525442d8 [Hexagon] Hexagon V60 HVX intrinsic defintions
Author: Ron Lieberman <ronl@codeaurora.org>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 16:54:33 +00:00
Daniel Sanders
9edb4236cc [mips][ias] Range check uimm5 operands and fix several bugs this revealed.
Summary:
The bugs were:
* append, prepend, and balign were not tested
* balign takes a uimm2 not a uimm5.
* drotr32 was correctly implemented with a uimm5 but the tests expected
  '52' to be valid.
* li/la were implemented with a uimm5 instead of simm32. simm32 isn't
  completely correct either but I'll fix that when I get to simm32.

A notable omission are some of the shift instructions. Several of these
have been implemented using a single uimm6 instruction (rather than two
uimm5 instructions and a CodeGen-only uimm6 pseudo). These will be updated
in the uimm6 patch.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D14712

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254164 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 16:35:41 +00:00
Oliver Stannard
a890b48abb [AArch64] Add ARMv8.2-A new AT instruction variants
ARMv8.2-A adds new variants of the "at" (address translate) system
instruction, which take the PSTATE.PAN bit (added in ARMv8.1-A). These
are a required part of ARMv8.2-A, so no additional subtarget features
are required.

Differential Revision: http://reviews.llvm.org/D15018



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254159 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 15:34:44 +00:00
Martell Malone
937e2d588c ARM: address WOA unsigned division overflow crash
Building on r253865 the crash is not limited to signed overflows.

Disable custom handling of unsigned 32-bit and 64-bit integer divide.
Add test cases for both 32-bit and 64-bit unsigned integer overflow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 15:34:03 +00:00
Oliver Stannard
0981e5a6ce [AArch64] Add ARMv8.2-A UAO PSTATE bit
ARMv8.2-A adds a new PSTATE bit, PSTATE.UAO, which allows the LDTR/STTR
instructions to behave the same as LDR/STR with respect to execute-only
pages at higher privilege levels. New variants of the MSR/MRS
instructions are added to allow reading and writing this bit. It is a
required part of ARMv8.2-A, so no additional subtarget features are
required.

Differential Revision: http://reviews.llvm.org/D15020



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 15:32:30 +00:00
Oliver Stannard
df55505b87 [AArch64] Add ARMv8.2-A persistent memory instruction
ARMv8.2-A adds the "dc cvap" instruction, which is a system instruction
that cleans caches to the point of persistence (for systems that have
persistent memory). It is a required part of ARMv8.2-A, so no additional
subtarget features are required.

Differential Revision: http://reviews.llvm.org/D15016



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254156 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 15:28:47 +00:00
Oliver Stannard
c9ad981477 [AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 register
ARMv8.2-A adds a new ID register, ID_A64MMFR2_EL1, which behaves in the
same way as ID_A64MMFR0_EL1 and ID_A64MMFR1_EL1. It is a required part
of ARMv8.2-A, so no additional subtarget features are required.

Differential Revision: http://reviews.llvm.org/D15017



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254155 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 15:26:10 +00:00
Oliver Stannard
e6988659c9 [AArch64] Add subtarget features for ARMv8.2-A
This adds subtarget features for ARMv8.2-A, which builds on (and
requires the features from) ARMv8.1-A. Most assembler-visible features
of ARMv8.2-A are system instructions, and are all required parts of the
architecture, so just depend on the HasV8_2aOps subtarget feature. There
is also one large, optional feature, which adds 16-bit floating point
versions of all existing floating-point instructions (VFP and SIMD),
this is represented by the FeatureFullFP16 subtarget feature.

Differential Revision: http://reviews.llvm.org/D15013



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254154 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 15:23:32 +00:00
Daniel Sanders
bedb5c9946 [mips][ias] Explicitly disable IAS on tests that depend on not assembling.
Summary:
no-odd-spreg-msa.ll: This test deliberately uses an odd-numbered register
in inline assembly and expects the compiler to insert a move to an
even-numbered register.

inlineasm-operand-code.ll and inlineasm_constraint.ll:
Checks for IAS's output will be added once a matcher bug is resolved. This bug
causes the canonical output emitted by IAS to be incorrect for uimm16 constants
with the MSB set. We will still need the non-IAS checks at this point since
these tests primarily test formatting of operands.

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D14705

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254148 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 11:23:03 +00:00
Daniel Sanders
6bd5df3900 [mips][ias] Replace anchor comments with anchor instructions in tests.
Summary:
This is because IAS will delete the comments. NFC at the moment but it will
prevent a failure once IAS is the default.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D14704

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254147 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 10:26:18 +00:00
Benjamin Kramer
7c7d1ee4c2 [SimplifyLibCalls] Don't depend on a called function having a name, it might be an indirect call.
Fixes the crasher in PR25651 and related crashers using the same pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254145 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 09:51:17 +00:00
Craig Topper
2e77264e42 [X86] Strengthen more type constraints to reduce isel table size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254142 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 07:58:20 +00:00
Vyacheslav Klochkov
d9357adaa7 X86-FMA3: Improved/enabled the memory folding optimization for scalar loads
generated for _mm_losd_s{s,d}() intrinsics and used in scalar FMAs generated 
for FMA intrinsics _mm_f{madd,msub,nmadd,nmsub}_s{s,d}().

Reviewer: David Kreitzer
Differential Revision: http://reviews.llvm.org/D14762



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254140 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 07:45:30 +00:00
Craig Topper
c11aea8b65 [X86] Strengthen the type constraints on X86psadbw and X86dbpsadbw to reduce some of the type checks in the isel matching tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254139 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 07:02:21 +00:00
Craig Topper
ce6f743e65 [SelectionDAG] Add a SDTCisSameSizeAs type constraint that can be used to ensure vector widths match even if the element size and count don't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254138 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 07:02:18 +00:00
Craig Topper
3b658c7894 Add type constraints to masked_load/masked_store to ensure the mask vector has the same number of elements as the other vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 06:30:42 +00:00
Craig Topper
a86f909650 [TableGen] Flip reversed comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254136 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 06:30:40 +00:00
Krzysztof Parzyszek
eaabbb2686 [Hexagon] HVX vector register classes and more isel patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254132 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 04:33:11 +00:00
Tom Stellard
a19bd39c4e AMDGPU: Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 02:04:11 +00:00
Sanjoy Das
eecad07d00 [OperandBundles] Treat "deopt" operand bundles specially
Teach LLVM optimize to more precisely in the presence of "deopt" operand
bundles.  "deopt" operand bundles imply that the call they're attached
to is at least `readonly` (i.e. they don't imply clobber semantics), and
they don't capture their bundle operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254118 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 01:16:05 +00:00
Tom Stellard
aa23e0330d AMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsic
Summary:
This returns a pointer to the dispatch packet, which can be used to load
information about the kernel dispach.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D14898

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254116 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 00:43:29 +00:00
Kostya Serebryany
20bbb64e84 [libFuzzer] clean up the docs, add one more link
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 00:12:57 +00:00
Xinliang David Li
45df396019 Fix a typo introduced in previous patches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-26 00:02:23 +00:00
Xinliang David Li
931217997c [PGO] Implement ValueProfiling Closure interfaces for runtime value profile data
This is one of the many steps to commonize value profiling support between profile
runtime and compiler/llvm tools.

After this change, profiler runtime now can share the same C APIs to do VP
serialization/deseriazation with LLVM host tools (and produces value data
in identical format between indexed and raw profile).

It is not yet enabled in profiler runtime yet.

Also added a unit test case to test runtime profile data serialization/deserialization
interfaces implemented using common closure code.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254110 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 23:31:18 +00:00
Evgeniy Stepanov
5062813b46 [safestack] Fix alignment of dynamic allocas.
Fixes PR25588.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254109 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 22:52:30 +00:00
Richard Diamond
5efecd1377 Fix a use-after-free in llvm-config.
Summary:
This could happen if `GetComponentNames` is true, because `Name` from
`VisitComponent` would reference a stack instance of `std::string` in
`ComputeLibsForComponents`.

Reviewers: beanz

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 22:49:48 +00:00
Dan Gohman
d5a489c812 [WebAssembly] Fix inline asm support for i64 operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254106 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 22:28:50 +00:00
Dan Gohman
7fd6f1a4bf [WebAssembly] Fold setne and seteq comparisons into selects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254104 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 22:13:48 +00:00
Kostya Serebryany
e8d7ae6209 [libFuzzer] add a flag -exact_artifact_path
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254100 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 21:40:46 +00:00
Krzysztof Parzyszek
12452693d5 [Hexagon] Treat transfers of FP immediates are pseudo instructions
This is a temporary fix to address ICE on 2005-10-21-longlonggtu.ll.
The proper fix will be to use A2_tfrsi, but it will need more work to
teach all users of A2_tfrsi to also expect a floating-point operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254099 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 21:40:03 +00:00
Dan Gohman
c2d7234c34 [WebAssembly] Add some comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254096 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 21:32:06 +00:00
Marek Olsak
73f0848ca2 AMDGPU/SI: select S_ABS_I32 when possible (v2)
v2: added more tests, moved the SALU->VALU conversion to a separate function

It looks like it's not possible to get subregisters in the S_ABS lowering
code, and I don't feel like guessing without testing what the correct code
would look like.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254095 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 21:22:45 +00:00
Dan Gohman
2aff4b612e [WebAssembly] Fix WebAssembly register numbering for registers added late.
If virtual registers are created late, mappings to WebAssembly
registers need to be added explicitly. This patch adds a function
to do so and teaches WebAssemblyPeephole to use it. This fixes
an out-of-bounds access on the WARegs vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254094 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 21:13:02 +00:00
Davide Italiano
5fc0e47e6b [SCCP] More informative message if we don't know how to handle a terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254093 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 21:03:36 +00:00