RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-01-01 09:18:30 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
91,320 Commits 39 Branches 10 Tags 850 MiB
d0132ba722
Commit Graph

25 Commits

Author SHA1 Message Date
Chad Rosier
e7bd51980a Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all 
registers.  Previously, the register we being marked as implicitly defined, but
not killed.  In some cases this would cause the register scavenger to spill a
dead register.

Also, use an empty register mask to simplify the logic and to reduce the memory
footprint.
rdar://12592448

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167499 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-06 23:05:24 +00:00
Manman Ren
a41db53f66 ARM: enable struct byval for AAPCS-VFP. 
This change is to be enabled in clang.

rdar://9877866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161789 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-13 21:22:50 +00:00
Manman Ren
d9b4512593 ARM: enable struct byval for AAPCS. 
This change is to be enabled in clang.

rdar://9877866
PR://13350


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161693 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-10 20:39:38 +00:00
Eric Christopher
e94ac8871a Add support for the ARM GHC calling convention, this patch was in 3.0, 
but somehow managed to be dropped later.

Patch by Karel Gardas.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161226 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-03 00:05:53 +00:00
Jay Foad
ef1a3a25b3 Remove unused CCIfSubtarget. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154921 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-17 11:29:05 +00:00
Jia Liu
31d157ae1a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 12:03:15 +00:00
Jakob Stoklund Olesen
3ee7d15284 Implement ARMBaseRegisterInfo::getCallPreservedMask(). 
Move ARM callee-saved lists into ARMCallingConv.td.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148357 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-17 23:09:00 +00:00
Chad Rosier
0eff39f2e2 Enable support for returning i1, i8, and i16. Nothing special todo as it's the 
callee's responsibility to sign or zero-extend the return value.  The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-08 00:03:32 +00:00
Chad Rosier
62c8e8e3f6 Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 21:43:40 +00:00
Chad Rosier
38f5c0da6d Allow i1 to be promoted to i32 for ARM APCS calling convention. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143755 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-05 00:02:56 +00:00
Stuart Hastings
c73158730d ARM byval support. Will be enabled by another patch to the FE. <rdar://problem/7662569> 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129858 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-20 16:47:52 +00:00
Stuart Hastings
f222e595c0 Support for byval parameters on ARM. Will be enabled by a forthcoming 
patch to the front-end.  Radar 7662569.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126655 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-28 17:17:53 +00:00
Evan Cheng
76f920d316 Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by -arm-fastcc for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117119 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 18:23:05 +00:00
Chris Lattner
23e70ebf35 fix emacs language spec's, patch by Edmund Grimley-Evans! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-17 16:20:04 +00:00
Rafael Espindola
55e9587469 Fix eabi calling convention when a 64 bit value shadows r3. 
Without this what was happening was:

* R3 is not marked as "used"
* ARM backend thinks it has to save it to the stack because of vaarg
* Offset computation correctly ignores it
* Offsets are wrong

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110446 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 15:35:32 +00:00
Rafael Espindola
f87611272b Correctly align double arguments in the stack. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85235 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-27 14:09:44 +00:00
Anton Korobeynikov
567d14f07c Missed pieces for ARM HardFP ABI. 
Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78225 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 19:04:42 +00:00
Bob Wilson
5bafff36c7 Add support for ARM's Advanced SIMD (NEON) instruction set. 
This is still a work in progress but most of the NEON instruction set
is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 23:27:02 +00:00
Anton Korobeynikov
385f5a99ec Address review comments: add 3 ARM calling conventions. 
Dispatch C calling conv. to one of these conventions based on
target triple and subtarget features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73530 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 18:50:49 +00:00
Anton Korobeynikov
2e7ccfce98 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73098 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:59:50 +00:00
Anton Korobeynikov
0eebf653a7 The attached patches implement most of the ARM AAPCS-VFP hard float 
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:53:56 +00:00
Bob Wilson
04746eae49 Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and 
the stack.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72106 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 10:02:36 +00:00
Bob Wilson
1c2c462d0f Remove unnecessary references to f32 types. After specifying that f32 
should be bit-converted to i32, it is sufficient to list only i32 in
subsequent definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69973 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 16:55:25 +00:00
Bob Wilson
dee46d7f6d Clean up formatting, remove trailing whitespace, fix comment typos and 
punctuation.  No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69378 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:35:10 +00:00
Bob Wilson
1f595bb429 Use CallConvLower.h and TableGen descriptions of the calling conventions 
for ARM.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69371 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 19:07:39 +00:00