8585 Commits

Author SHA1 Message Date
Alexandros Lamprineas
73895c4cf0 [ARM] Emit trap instruction using .inst directive
The trap instruction is emitted as a data-in-text rather
than an instruction. This patch uses the .inst directive
for emitting trap.

Differential Revision: http://reviews.llvm.org/D16684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259182 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-29 10:23:32 +00:00
Tim Northover
8362c240ca ARMv7k: base ABI decision on v7k Arch rather than watchos OS.
Various bits we want to use the new ABI actually compile with "-arch armv7k
-miphoneos-version-min=9.0". Not ideal, but also not ridiculous given how
slices work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258975 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 19:32:29 +00:00
Benjamin Kramer
b8c1bbf870 One more batch of self-containing headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258974 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 19:29:56 +00:00
Benjamin Kramer
8cbe47dfe5 Don't put classes in headers into anonymous namespaces.
You want ODR violations? That's how you get ODR violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258973 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 19:29:42 +00:00
Benjamin Kramer
06342012ac Make more headers self-contained.
A lot of this comes from the new complete type requirement of DenseMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258956 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 18:03:37 +00:00
Benjamin Kramer
d254be2cd3 Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/
It's a SelectionDAG thing, not a Target thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258939 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 16:32:26 +00:00
Benjamin Kramer
030c9dc308 Move MCTargetAsmParser.h to llvm/MC/MCParser where it belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258917 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 10:01:28 +00:00
Chris Bieneman
caeade4234 Remove autoconf support
Summary:
This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html

"I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened."
- Obi Wan Kenobi

Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark

Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D16471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258861 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 21:29:08 +00:00
Benjamin Kramer
b6242a88c2 Reflect the MC/MCDisassembler split on the include/ level.
No functional change, just moving code around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258818 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 16:44:37 +00:00
Bradley Smith
36313d3496 [ARM] Add DSP build attribute and extension targeting
This patch was originally committed as r257885, but was reverted due to windows
failures. The cause of these failures has been fixed under r258677, hence
re-committing the original patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258683 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-25 11:26:11 +00:00
Bradley Smith
0ab91df5ff [ARM] Add new system registers to ARMv8-M Baseline/Mainline
This patch was originally committed as r257884, but was reverted due to windows
failures. The cause of these failures has been fixed under r258677, hence
re-committing the original patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258682 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-25 11:25:36 +00:00
Bradley Smith
aca9dcc971 [ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/Mainline
This patch was originally committed as r257883, but was reverted due to windows
failures. The cause of these failures has been fixed under r258677, hence
re-committing the original patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258681 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-25 11:24:47 +00:00
Oliver Stannard
5918cc57c3 [ARM] Add ARMv8.2-A FP16 scalar instructions
This was originally committed as r255762, but reverted as it broke windows
bots. Re-commitiing the exact same patch, as the underlying cause was fixed by
r258677.

ARMv8.2-A adds 16-bit floating point versions of all existing VFP
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.

The assembly for these instructions uses S registers (AArch32 does not
have H registers), but the instructions have ".f16" type specifiers
rather than ".f32" or ".f64". The top 16 bits of each source register
are ignored, and the top 16 bits of the destination register are set to
zero.

These instructions are mostly the same as the 32- and 64-bit versions,
but they use coprocessor 9 rather than 10 and 11.

Two new instructions, VMOVX and VINS, have been added to allow packing
and extracting two 16-bit floats stored in the top and bottom halves of
an S register.

New fixup kinds have been added for the PC-relative load and store
instructions, but no ELF relocations have been added as they have a
range of 512 bytes.

Differential Revision: http://reviews.llvm.org/D15038



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258678 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-25 10:26:26 +00:00
Oliver Stannard
daaca8cd29 [ARM] Operands for PKHTB alias should be swapped
When the shift immediate is zero, PKHTB is an alias for PKHBT, but the order of
the input operands needs to be swapped.

Differential Revision: http://reviews.llvm.org/D16288



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258044 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-18 11:56:35 +00:00
Manuel Jacob
9b6827560b [opaque pointer types] [NFC] CallSite: use getFunctionType() instead of going through PointerType::getElementType.
Patch by Eduard Burtescu.

Reviewers: dblaikie, mjacob

Subscribers: dsanders, llvm-commits, dblaikie

Differential Revision: http://reviews.llvm.org/D16273


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258023 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-17 22:37:39 +00:00
Manman Ren
b5e2dc9a76 CXX_FAST_TLS calling convention: fix issue on ARM.
When we have a single basic block, the explicit copy-back instructions should
be inserted right before the terminator. Before this fix, they were wrongly
placed at the beginning of the basic block.

PR26136


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257930 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 20:24:11 +00:00
Reid Kleckner
30b888ab0e Revert "[ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/Mainline"
This reverts commit r257883.

Somehow this didn't make it into r257916.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257919 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 18:55:12 +00:00
Reid Kleckner
257c031f51 # This is a combination of 2 commits.
# The first commit's message is:

Revert "[ARM] Add DSP build attribute and extension targeting"

This reverts commit b11cc50c0b4a7c8cdb628abc50b7dc226ff583dc.

# This is the 2nd commit message:

Revert "[ARM] Add new system registers to ARMv8-M Baseline/Mainline"

This reverts commit 837d08454e3e5beb8581951ac26b22fa07df3cd5.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257916 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 18:31:29 +00:00
Bradley Smith
b11cc50c0b [ARM] Add DSP build attribute and extension targeting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257885 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:28:25 +00:00
Bradley Smith
837d08454e [ARM] Add new system registers to ARMv8-M Baseline/Mainline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257884 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:28:03 +00:00
Bradley Smith
bcfe6aa735 [ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/Mainline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257883 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:27:14 +00:00
Bradley Smith
002a07ce70 [ARM] Add ARMv8-A semaphore/atomic instructions to ARMv8-M Baseline/Mainline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257882 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:26:51 +00:00
Bradley Smith
eab7e23bdd [ARM] Add B.W and CBZ instructions to ARMv8-M Baseline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257881 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:26:17 +00:00
Bradley Smith
2ff1a833df [ARM] Add SDIV/UDIV instructions to ARMv8-M Baseline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257880 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:25:35 +00:00
Bradley Smith
b7fd90158b [ARM] Add MOVW/MOVT instructions to ARMv8-M Baseline/Mainline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257879 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:25:14 +00:00
Bradley Smith
0283decdee [ARM] Add ARMv8-M Baseline/Mainline LLVM targeting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257878 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:24:39 +00:00
Bradley Smith
355f698c42 [ARM] Split out ARMv8-A semaphores and atomics and ARMv7 clrex as separate features
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257877 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:23:46 +00:00
Rui Ueyama
3edb0ec229 Update to use new name alignTo().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257804 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-14 21:06:47 +00:00
Benjamin Kramer
5f2bc6c766 [ARM] Use the efficient version of BitVector::set and a static_assert.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257766 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-14 14:33:04 +00:00
Rafael Espindola
fdba645465 Convert a few assert failures into proper errors.
Fixes PR25944.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257697 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-13 22:56:57 +00:00
Ana Pazos
f1f1b483b6 Guard fabs to bfc convert with V6T2 flag
Summary:
BFC instructions are available in ARMv6T2 and above.


Reviewers: t.p.northover

Subscribers: aemerson

Differential Revision: http://reviews.llvm.org/D16076

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257546 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-13 00:03:35 +00:00
Quentin Colombet
dab10b3735 [ARM] Mark VMOV with immediate: isAsCheapAsMove.
VMOVs are not strictly speaking cheap, but they are as expensive as a vector
copy (VORR), so we should prefer rematerialization over splitting when it
applies.

rdar://problem/23754176


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257545 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-13 00:02:40 +00:00
Keno Fischer
7125c9519f [ARM] Fix several state persistence bugs
Summary:
This fixes three bugs, in all of which state is not or incorrecly reset between
objects (i.e. when reusing the same pass manager to create multiple object
files):
1) AttributeSection needs to be reset to nullptr, because otherwise the backend
   will try to emit into the old object file's attribute section causing a
   segmentation fault.
2) MappingSymbolCounter needs to be reset, otherwise the second object file
   will start where the first one left off.
3) The MCStreamer base class resets the Streamer's e_flags settings. Since
   EF_ARM_EABI_VER5 is set on streamer creation, we need to set it again
   after the MCStreamer was rest.

Also rename Reset (uppser case) to EHReset to avoid confusion with
reset (lower case).

Reviewers: rengolin
Differential Revision: http://reviews.llvm.org/D15950

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257473 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-12 13:38:15 +00:00
Manman Ren
9f927315d8 CXX_FAST_TLS calling convention: performance improvement for ARM.
This is the same change on ARM as r255821 on AArch64.
rdar://9001553


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257424 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-12 00:47:18 +00:00
Manman Ren
27e49b014c CXX_FAST_TLS calling convention: Add support for ARM on Darwin.
rdar://9001553


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257417 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-11 23:50:43 +00:00
Weiming Zhao
432ca7460b RBIT Instruction only available for ARMv6t2 and above.
Summary:
r255334 matches bit-reverse pattern in InstCombine and generates calls to Instrinsic::bitreverse.

RBIT instruction is only available for ARMv6t2 and above. This patch has the intrinsic expanded during legalization for ARMv4 and ARMv5.

Patch by Z. Zheng <zhaoshiz@codeaurora.org>

Reviewers: apazos, jmolloy, weimingz

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D15932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257188 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-08 18:43:41 +00:00
Weiming Zhao
ad748b70b5 Disable shrink-wrap for Thumb1
Summary: In ARMConstantIslandPass, which runs after Shrink Wrap pass, long jumps will be fixed up as BL (tBfar) which depends on spilling LR in epilogue.  However, shrink-wrap may remove the LR, which causes issues when the function returns.

Reviewers: qcolombet, rengolin

Subscribers: aemerson, rengolin

Differential Revision: http://reviews.llvm.org/D15984

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257187 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-08 18:37:43 +00:00
Eric Christopher
d0fdbdba37 Add some testing for thumb1 and thumb2 inline asm immediate constraints
and fix a couple of bugs on inspection.

Also fixes PR26061.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257122 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-08 00:34:44 +00:00
Tim Northover
928410cd12 ARM: support TLS accesses on Darwin platforms
Darwin TLS accesses most closely resemble ELF's general-dynamic situation,
since they have to be able to handle all possible situations. The descriptors
and so on are obviously slightly different though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257039 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-07 09:03:03 +00:00
Philip Reames
f5d467572c Extract helper function to merge MemoryOperand lists [NFC]
In the discussion on http://reviews.llvm.org/D15730, Andy pointed out we had a utility function for merging MMO lists. Since it turned we actually had two copies and there's another review in progress (http://reviews.llvm.org/D15230) which needs the same, extract it into a utility function and clean up the interfaces to make it easier to use with a MachineInstBuilder.

I introduced a pair here to track size and allocation together. I think we should probably move in the direction of the MachineOperandsRef helper class, but I'm leaving that for further work. I want to get the poison state introduced before I make major changes to the interface.

Differential Revision: http://reviews.llvm.org/D15757



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256909 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-06 04:39:03 +00:00
MinSeong Kim
eaca36fc81 [AArch64] Add support for Samsung Exynos-M1
Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A).

Differential Revision: http://reviews.llvm.org/D15663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256828 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-05 12:51:59 +00:00
Craig Topper
2921ff9ffc Use std::is_sorted and std::none_of instead of manual loops. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256719 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-03 19:43:40 +00:00
Artyom Skrobov
1714cbd44c [Thumb] Fix assembler error 'cannot honor width suffix pop {lr}'
Summary:
* avoid generating POP {LR} in Thumb1 epilogues
* combine MOV LR, Rx + BX LR -> BX Rx in a peephole optimization pass
* combine POP {LR} + B + BX LR -> POP {PC} on v5T+

Test cases by Ana Pazos

Differential Revision: http://reviews.llvm.org/D15707

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-28 21:40:45 +00:00
Roman Divacky
d1070bbc62 Support clrex instruction on ARMv6k. Patch by Andrew Turner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256505 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-28 17:47:23 +00:00
Craig Topper
30e7d038e9 Remove extra forward declarations and scrub includes for all in tree InstPrinters. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256427 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-25 22:10:01 +00:00
David Majnemer
56afa6e660 [MC, COFF] Support link /incremental conditionally
Today, we always take into account the possibility that object files
produced by MC may be consumed by an incremental linker.  This results
in us initialing fields which vary with time (TimeDateStamp) which harms
hermetic builds (e.g. verifying a self-host went well) and produces
sub-optimal code because we cannot assume anything about the relative
position of functions within a section (call sites can get redirected
through incremental linker thunks).

Let's provide an MCTargetOption which controls this behavior so that we
can disable this functionality if we know a-priori that the build will
not rely on /incremental.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256203 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-21 22:09:27 +00:00
Adrian Prantl
7deb7ebf88 Teach ARMLoadStoreOptimizer to ignore DBG_VALUE instructions when merging
instructions.

As noted in PR24563.
rdar://problem/23963293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256183 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-21 19:25:03 +00:00
Chad Rosier
308175c1f1 Remove extra whitespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256173 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-21 18:08:05 +00:00
Weiming Zhao
116cc72ed4 Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2
Summary:
r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb.

r250697: http://reviews.llvm.org/rL250697

Reviewers: rmaprath

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D15653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 06:41:44 +00:00
Reid Kleckner
1b44fe3dd9 Revert "[ARM] Add ARMv8.2-A FP16 scalar instructions"
This reverts commit r255762.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-16 19:21:03 +00:00