153392 Commits

Author SHA1 Message Date
Kuba Mracek
fbd10c199d Get rid of some more "%T" expansions, see <https://reviews.llvm.org/D35396>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311293 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 17:00:08 +00:00
Benjamin Kramer
efa50a2449 [MachO] Use Twines more efficiently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311291 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 15:13:39 +00:00
Benjamin Kramer
700558ad13 [Mem2Reg] Modernize code a bit.
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311290 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 14:34:44 +00:00
Benjamin Kramer
c773276189 Move helper classes into anonymous namespaces.
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311288 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 13:03:48 +00:00
Benjamin Kramer
1c8117b2ed [dlltool] Make memory buffer ownership less weird.
There's no reason to destroy them in a global destructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311287 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 13:03:32 +00:00
Elena Demikhovsky
4a05fa1f1b Changed basic cost of store operation on X86
Store operation takes 2 UOps on X86 processors. The exact cost calculation affects several optimization passes including loop unroling.
This change compensates performance degradation caused by https://reviews.llvm.org/D34458 and shows improvements on some benchmarks.

Differential Revision: https://reviews.llvm.org/D35888



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311285 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 12:34:29 +00:00
Aditya Kumar
70fb4705b4 [Loop Vectorize] Added a separate metadata
Added a separate metadata to indicate when the loop
has already been vectorized instead of setting width and count to 1.

Patch written by Divya Shanmughan and Aditya Kumar

Differential Revision: https://reviews.llvm.org/D36220

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311281 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 10:32:41 +00:00
Igor Breger
1ce5cae5ff [GlobalISel][X86] Support call ABI.
Summary: Support call ABI. For now only Linux C and X86_64_SysV calling conventions supported. Variadic function not supported.

Reviewers: zvi, guyblank, oren_ben_simhon

Reviewed By: oren_ben_simhon

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311279 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 09:25:22 +00:00
Igor Breger
4b201cee02 [GlobalISel][X86] Support asimetric copy from/to GPR physical register.
Usually this case generated by ABI lowering, it requare to performe trancate/anyext.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311278 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 07:14:40 +00:00
Alex Bradbury
6e8164d525 [RISCV] Trivial whitespace fix in RISCVInstPrinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311277 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:58:43 +00:00
Alex Bradbury
5f1fa48a24 [RISCV] Fix two abuses of llvm_unreachable
Replace with report_fatal_error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311276 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:57:27 +00:00
Alex Bradbury
cc0899c732 [RISCV] Set HasRelocationAddend for RISCVELFObjectWriter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311275 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:55:14 +00:00
Sam Elliott
fe94416753 Revert "Emit only A Single Opt Remark When Inlining"
Reverting due to clang build failure

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311274 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:55:10 +00:00
Sam Elliott
2999c9c71d Emit only A Single Opt Remark When Inlining
Summary:
This updates the Inliner to only add a single Optimization
Remark when Inlining, rather than an Analysis Remark and an
Optimization Remark.

Fixes https://bugs.llvm.org/show_bug.cgi?id=33786

Reviewers: anemet, davidxl, chandlerc

Reviewed By: anemet

Subscribers: haicheng, fhahn, mehdi_amini, dblaikie, llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D36054

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311273 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:43:34 +00:00
Igor Breger
1bce6ea7b7 [GlobalIsel] Fix undefined behavior if Action not set (release), it aslo crashing in debug mode.
Differential Revision: https://reviews.llvm.org/D34978

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311272 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:26:22 +00:00
Sam Elliott
74a34d9193 Keep Optimization Remark Yaml in NewPM
Summary:
The New Pass Manager infrastructure was forgetting to keep around the optimization remark yaml file that the compiler might have been producing. This meant setting the option to '-' for stdout worked, but setting it to a filename didn't give file output (presumably it was deleted because compilation didn't explicitly keep it). This change just ensures that the file is kept if compilation succeeds.

So far I have updated one of the optimization remark output tests to add a version with the new pass manager. It is my intention for this patch to also include changes to all tests that use `-opt-remark-output=` but I wanted to get the code patch ready for review while I was making all those changes.

Fixes https://bugs.llvm.org/show_bug.cgi?id=33951

Reviewers: anemet, chandlerc

Reviewed By: anemet, chandlerc

Subscribers: javed.absar, chandlerc, fhahn, llvm-commits

Differential Revision: https://reviews.llvm.org/D36906

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311271 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 01:30:45 +00:00
Chandler Carruth
e12236f216 [x86] Fix an even stranger corner case where we have multiple levels of
cmov self-refrencing.

Pointed out by Amjad Aboud in code review, test case minorly simplified
from the one he posted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311267 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 23:35:50 +00:00
Craig Topper
f4c914cf46 [X86] Merge all of the vecload and alignedload predicates into single predicates.
We can load the memory VT and check for natural alignment. This also adds a new preferNonTemporalLoad helper that checks the correct subtarget feature based on the load size.

This shrinks the isel table by at least 5000 bytes by allowing more reordering and combining to occur.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311266 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 23:21:22 +00:00
Craig Topper
79ea2d3237 [X86] Converge alignedstore/alignedstore256/alignedstore512 to a single predicate.
We can read the memoryVT and get its store size directly from the SDNode to check its alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311265 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 23:21:21 +00:00
Craig Topper
2d1cd3c597 [AVX512] Use alignedstore256 in a pattern that's emitting a 256-bit movaps from an extract subvector operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311263 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 22:02:02 +00:00
Victor Leschuk
61fd1c077c Set init value for ScalarEvolution::BackedgeTakenInfo::MaxOrZero
Otherwise it can be used uninitialized in move ctor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311262 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 21:05:08 +00:00
Martin Storsjo
ee09c63e57 [ARM] Factorize the calculation of WhichResult in isV*Mask. NFC.
Differential Revision: https://reviews.llvm.org/D36930

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311260 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 20:26:51 +00:00
Martin Storsjo
daff186997 [ARM] Check the right order for halves of VZIP/VUZP if both parts are used
This is the exact same fix as in SVN r247254. In that commit, the fix was
applied only for isVTRNMask and isVTRN_v_undef_Mask, but the same issue
is present for VZIP/VUZP as well.

This fixes PR33921.

Differential Revision: https://reviews.llvm.org/D36899

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311258 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 19:47:48 +00:00
Teresa Johnson
3329070a6e Fix bot failures by requiring x86 target
The tests added in r311254 require a target triple since they are
running through code generation. Fix bot failures by requiring
an x86 target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311257 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 19:15:04 +00:00
Konstantin Zhuravlyov
6930800b8c AMDGPU/NFC: Reorder functions in SIMemoryLegalizer:
- Move *load* functions before *atomic* functions
  - Move *store* functions before *atomic* functions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311256 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 18:44:27 +00:00
Jatin Bhateja
9dc6615ef8 [DAGCombiner] Extending pattern detection for vector shuffle.
Summary:
    If all the operands of a BUILD_VECTOR extract elements from same vector then split the
    vector efficiently based on the maximum vector access index.

    Reviewers: zvi, delena, RKSimon, thakis

    Reviewed By: RKSimon

    Subscribers: chandlerc, eladcohen, llvm-commits

    Differential Revision: https://reviews.llvm.org/D35788

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311255 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 18:08:59 +00:00
Teresa Johnson
77be502efc [ThinLTO] Fix ThinLTO crash
Summary:
Follow up to fix in r311023, which fixed the case where the combined
index is written to disk. The same samplePGO logic exists for the
in-memory index when computing imports, so we need to filter out
GlobalVariable summaries there too.

Reviewers: davidxl

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D36919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311254 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 18:04:25 +00:00
Craig Topper
d826b54fdb [X86] Remove an unnecessary alignment restriction from MOVDDUP pattern.
The SSE MOVDDUP instruction only loads 64-bits with no alignment restriction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311253 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 18:02:28 +00:00
Jatin Bhateja
a96e1abb6f Revert rL311247 : To rectify commit message.
Summary: This reverts commit rL311247.

Differential Revision: https://reviews.llvm.org/D36927

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311252 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 17:59:58 +00:00
Jatin Bhateja
cb4206cf46 Merge branch 'arcpatch-D35788'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311247 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 17:00:04 +00:00
Jatin Bhateja
d40ac3206e Revert rL311242 "Extension of shuffle vector pattern detection, updating post rebase."
Summary:

This reverts commit rL311242.

Differential Revision: https://reviews.llvm.org/D36924

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311246 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 16:40:06 +00:00
Jatin Bhateja
a1afcacc9f Extension of shuffle vector pattern detection, updating post rebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311242 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 15:58:36 +00:00
Victor Leschuk
97c7061e09 revert failing test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311238 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 12:24:41 +00:00
Victor Leschuk
f377b57c53 Add temporary test to verify that win10 builder hangs on error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311236 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 12:02:39 +00:00
Victor Leschuk
df50467fed Temporary mark lit :: shtest-format as unsupported on windows
When run manually it fails, but when run under buildbot it causes hang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311230 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 07:58:07 +00:00
Chandler Carruth
c3557e20c3 [Inliner] Fix a nasty bug when inlining a non-recursive trace of
a function into itself.

We tried to fix this before in r306495 but that got reverted as the
assert was actually hit.

This fixes the original bug (which we seem to have lost track of with
the revert) by blocking a second remapping when the function being
inlined is also the caller and the remapping could succeed but
erroneously.

The included test case would actually load from an inlined copy of the
alloca before this change, failing to load the stored value and
miscompiling.

Many thanks to Richard Smith for diagnosing a user miscompile to this
bug, and to Kyle for the first attempt and initial analysis and David Li
for remembering the issue and how to fix it and suggesting the patch.
I'm just stitching it together and landing it. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311229 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 06:56:11 +00:00
Chandler Carruth
ff12911639 [Inliner] Clean up a test case a bit to make it more clear what is being
tested and why.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311228 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 06:06:44 +00:00
Chandler Carruth
33ba3ea4de [SLP] Fix an unused variable warning in non-asserts builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311227 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 05:06:23 +00:00
Chandler Carruth
ee26c4120d [x86] Teach the cmov converter to aggressively convert cmovs with memory
operands into control flow.

We have seen periodically performance problems with cmov where one
operand comes from memory. On modern x86 processors with strong branch
predictors and speculative execution, this tends to be much better done
with a branch than cmov. We routinely see cmov stalling while the load
is completed rather than continuing, and if there are subsequent
branches, they cannot be speculated in turn.

Also, in many (even simple) cases, macro fusion causes the control flow
version to be fewer uops.

Consider the IACA output for the initial sequence of code in a very hot
function in one of our internal benchmarks that motivates this, and notice the
micro-op reduction provided.
Before, SNB:
```
Throughput Analysis Report
--------------------------
Block Throughput: 2.20 Cycles       Throughput Bottleneck: Port1

| Num Of |              Ports pressure in cycles               |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |    |
---------------------------------------------------------------------
|   1    |           | 1.0 |           |           |     |     | CP | mov rcx, rdi
|   0*   |           |     |           |           |     |     |    | xor edi, edi
|   2^   | 0.1       | 0.6 | 0.5   0.5 | 0.5   0.5 |     | 0.4 | CP | cmp byte ptr [rsi+0xf], 0xf
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |    | mov rax, qword ptr [rsi]
|   3    | 1.8       | 0.6 |           |           |     | 0.6 | CP | cmovbe rax, rdi
|   2^   |           |     | 0.5   0.5 | 0.5   0.5 |     | 1.0 |    | cmp byte ptr [rcx+0xf], 0x10
|   0F   |           |     |           |           |     |     |    | jb 0xf
Total Num Of Uops: 9
```
After, SNB:
```
Throughput Analysis Report
--------------------------
Block Throughput: 2.00 Cycles       Throughput Bottleneck: Port5

| Num Of |              Ports pressure in cycles               |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |    |
---------------------------------------------------------------------
|   1    | 0.5       | 0.5 |           |           |     |     |    | mov rax, rdi
|   0*   |           |     |           |           |     |     |    | xor edi, edi
|   2^   | 0.5       | 0.5 | 1.0   1.0 |           |     |     |    | cmp byte ptr [rsi+0xf], 0xf
|   1    | 0.5       | 0.5 |           |           |     |     |    | mov ecx, 0x0
|   1    |           |     |           |           |     | 1.0 | CP | jnbe 0x39
|   2^   |           |     |           | 1.0   1.0 |     | 1.0 | CP | cmp byte ptr [rax+0xf], 0x10
|   0F   |           |     |           |           |     |     |    | jnb 0x3c
Total Num Of Uops: 7
```
The difference even manifests in a throughput cycle rate difference on Haswell.
Before, HSW:
```
Throughput Analysis Report
--------------------------
Block Throughput: 2.00 Cycles       Throughput Bottleneck: FrontEnd

| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   0*   |           |     |           |           |     |     |     |     |    | mov rcx, rdi
|   0*   |           |     |           |           |     |     |     |     |    | xor edi, edi
|   2^   |           |     | 0.5   0.5 | 0.5   0.5 |     | 1.0 |     |     |    | cmp byte ptr [rsi+0xf], 0xf
|   1    |           |     | 0.5   0.5 | 0.5   0.5 |     |     |     |     |    | mov rax, qword ptr [rsi]
|   3    | 1.0       | 1.0 |           |           |     |     | 1.0 |     |    | cmovbe rax, rdi
|   2^   | 0.5       |     | 0.5   0.5 | 0.5   0.5 |     |     | 0.5 |     |    | cmp byte ptr [rcx+0xf], 0x10
|   0F   |           |     |           |           |     |     |     |     |    | jb 0xf
Total Num Of Uops: 8
```
After, HSW:
```
Throughput Analysis Report
--------------------------
Block Throughput: 1.50 Cycles       Throughput Bottleneck: FrontEnd

| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   0*   |           |     |           |           |     |     |     |     |    | mov rax, rdi
|   0*   |           |     |           |           |     |     |     |     |    | xor edi, edi
|   2^   |           |     | 1.0   1.0 |           |     | 1.0 |     |     |    | cmp byte ptr [rsi+0xf], 0xf
|   1    |           | 1.0 |           |           |     |     |     |     |    | mov ecx, 0x0
|   1    |           |     |           |           |     |     | 1.0 |     |    | jnbe 0x39
|   2^   | 1.0       |     |           | 1.0   1.0 |     |     |     |     |    | cmp byte ptr [rax+0xf], 0x10
|   0F   |           |     |           |           |     |     |     |     |    | jnb 0x3c
Total Num Of Uops: 6
```

Note that this cannot be usefully restricted to inner loops. Much of the
hot code we see hitting this is not in an inner loop or not in a loop at
all. The optimization still remains effective and indeed critical for
some of our code.

I have run a suite of internal benchmarks with this change. I saw a few
very significant improvements and a very few minor regressions,
but overall this change rarely has a significant effect. However, the
improvements were very significant, and in quite important routines
responsible for a great deal of our C++ CPU cycles. The gains pretty
clealy outweigh the regressions for us.

I also ran the test-suite and SPEC2006. Only 11 binaries changed at all
and none of them showed any regressions.

Amjad Aboud at Intel also ran this over their benchmarks and saw no
regressions.

Differential Revision: https://reviews.llvm.org/D36858

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311226 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 05:01:19 +00:00
Chandler Carruth
5f49ff955e [x86] Refactor the CMOV conversion pass to be more flexible.
The primary thing that this accomplishes is to allow future re-use of
these routines in more contexts and clarify the behavior w.r.t. loops.
For example, if handling outer loops is desirable, doing so in
a inside-out order becomes straight forward because it walks the loop
nest itself (rather than walking the function's basic blocks) and
de-couples the CMOV rewriting from the loop structure as there isn't
actually anything loop-specific about this transformation.

This patch should be essentially a no-op. It potentially changes the
order in which we visit the inner loops, but otherwise should merely set
the stage for subsequent changes.

Differential Revision: https://reviews.llvm.org/D36783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311225 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 04:28:20 +00:00
Dinar Temirbulatov
484d59e444 [SLPVectorizer] Tighten up VLeft, VRight declaration, remove unnecessary testcase test/Transforms/SLPVectorizer/X86/reorder.ll, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311223 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 03:15:07 +00:00
Dinar Temirbulatov
ef0eca1bd9 [SLPVectorizer] Add opcode parameter to reorderAltShuffleOperands, reorderInputsAccordingToOpcode functions.
Reviewers: mkuper, RKSimon, ABataev, mzolotukhin, spatel, filcab

Subscribers: llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D36766


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311221 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 02:54:20 +00:00
Matthias Braun
6b1ec498c4 ARMRegsiterInfo: Define more ssub indexes; NFC
This doesn't really change anything as Tablegen would have inferred
those indices anyway; defining them gives us shorter names that are
easier to read while debugging (i.e. "ssub_4" rather than
"dsub2_then_ssub_0")

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311218 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 01:21:11 +00:00
Adrian Prantl
96438d3760 Filter out non-constant DIGlobalVariableExpressions reachable via the CU
They won't affect the DWARF output, but they will mess with the
sorting of the fragments. This fixes the crash reported in PR34159.

https://bugs.llvm.org/show_bug.cgi?id=34159

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311217 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 01:15:06 +00:00
Eric Beckmann
79fe5367c1 llvm-mt: Merge manifest namespaces.
mt.exe performs a tree merge where certain element nodes are combined
into one.  This introduces the possibility of xml namespaces conflicting
with each other.  The original mt.exe has a hierarchy whereby certain
namespace names can override others, and nodes that would then end up in
ambigious namespaces have their namespaces explicitly defined.  This
namespace handles this merging process.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311215 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-19 00:37:41 +00:00
Eugene Zelenko
89688ce180 [Analysis] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311212 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-18 23:51:26 +00:00
Xinliang David Li
3c29a5e3d5 Fix comment /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311209 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-18 23:08:50 +00:00
Xinliang David Li
6d9231092c [Profile] backward propagate profile info in JumpThreading
Differential Revsion: http://reviews.llvm.org/D36864


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311208 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-18 23:00:05 +00:00
Amjad Aboud
066b24cb94 [InstCombine] Teach ComputeNumSignBitsImpl to handle integer multiply instruction.
Differential Revision: https://reviews.llvm.org/D36679


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311206 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-18 22:56:55 +00:00
Max Kazantsev
de4770b949 [IRCE] Fix buggy behavior in Clamp
Clamp function was too optimistic when choosing signed or unsigned min/max function for calculations.
In fact, `!IsSignedPredicate` guarantees us that `Smallest` and `Greatest` can be compared safely using unsigned
predicates, but we did not check this for `S` which can in theory be negative.

This patch makes Clamp use signed min/max for cases when it fails to prove `S` being non-negative,
and it adds a test where such situation may lead to incorrect conditions calculation.

Differential Revision: https://reviews.llvm.org/D36873


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311205 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-18 22:50:29 +00:00