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2a69e2802ff46822d73be061fcdaef578ee37e6b
llvm/test/CodeGen/Mips
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Petar Avramovic 25e728d48d [MIPS GlobalISel] Register bank select for G_LOAD. Select i64 load 
Select gprb or fprb when loaded value is used by either:
 copy to physical register or
 instruction with only one mapping available for that use operand.

Load of integer s64 is handled with narrowScalar when mapping is applied,
produced artifacts are combined away. Manually set gprb to all register
operands of instructions created during narrowScalar.

Differential Revision: https://reviews.llvm.org/D64269


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365323 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-08 14:45:52 +00:00
..
cconv
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
2019-01-17 21:50:37 +00:00
compactbranches
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cstmaterialization
[mips] Add microMIPS specific addressing patterns.
2018-06-20 22:40:12 +00:00
Fast-ISel
RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs
2019-03-19 19:01:34 +00:00
GlobalISel
[MIPS GlobalISel] Register bank select for G_LOAD. Select i64 load
2019-07-08 14:45:52 +00:00
indirect-jump-hazard
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
instverify
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
llvm-ir
[mips] Use reg-exp in tests to tolerate register indexes changing. NFC
2019-05-29 14:59:07 +00:00
longbranch
[Mips] Supplement long branch pseudo instructions
2018-11-05 14:37:41 +00:00
micromips-sizereduction
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
mips32r6
[mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6
2014-05-09 09:46:21 +00:00
mips64r6
[mips] Don't derive the default ABI from the CPU in the backend.
2016-06-23 12:42:53 +00:00
mirparser
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
msa
[mips] Extend range of register indexes accepted by cfcmsa/ctcmsa
2019-06-01 13:55:18 +00:00
tailcall
[SelectionDAG] Provide adequate register class for RegisterSDNode
2018-02-09 13:55:25 +00:00
2008-06-05-Carry.ll
Reland "[mips] Fix multiprecision arithmetic."
2017-07-13 11:28:05 +00:00
2008-07-03-SRet.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
2008-07-06-fadd64.ll
…
2008-07-07-Float2Int.ll
Regenerate FP_TO_INT tests.
2018-10-27 15:00:38 +00:00
2008-07-07-FPExtend.ll
…
2008-07-07-IntDoubleConvertions.ll
…
2008-07-15-InternalConstant.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
2008-07-15-SmallSection.ll
[mips] Lift the assertion on the types that can be used with MipsGPRel
2017-08-11 14:36:05 +00:00
2008-07-16-SignExtInReg.ll
[Mips] Adjust float ABI settings in case of MIPS16 mode.
2013-11-19 12:20:17 +00:00
2008-07-22-Cstpool.ll
…
2008-07-23-fpcmp.ll
Fix the remaining TCL-style quotes found in the testsuite. This is
2012-07-02 19:09:46 +00:00
2008-07-29-icmp.ll
Fix the remaining TCL-style quotes found in the testsuite. This is
2012-07-02 19:09:46 +00:00
2008-07-31-fcopysign.ll
…
2008-08-01-AsmInline.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2008-08-03-fabs64.ll
…
2008-08-03-ReturnDouble.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2008-08-04-Bitconvert.ll
…
2008-08-06-Alloca.ll
…
2008-08-07-CC.ll
…
2008-08-07-FPRound.ll
…
2008-08-08-ctlz.ll
…
2008-10-13-LegalizerBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2008-11-10-xint_to_fp.ll
Now that we have a soft-float attribute, use it instead of the
2015-05-08 00:57:22 +00:00
2009-11-16-CstPoolLoad.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
2010-07-20-Switch.ll
Emit a left-shift instead of a power-of-two multiply for jump-tables
2018-05-16 08:58:26 +00:00
2010-11-09-CountLeading.ll
…
2010-11-09-Mul.ll
…
2011-05-26-BranchKillsVreg.ll
…
2012-12-12-ExpandMemcpy.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2013-11-18-fp64-const0.ll
[MIPS] Remove fcmp undef from reduced test
2019-03-30 20:16:16 +00:00
abicalls.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
abiflags32.ll
[mips] Emit .module softfloat directive
2019-02-26 14:45:17 +00:00
abiflags-xx.ll
[mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI is
2014-07-14 09:40:29 +00:00
addc.ll
…
addi.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
address-selection.ll
[mips] Add microMIPS specific addressing patterns.
2018-06-20 22:40:12 +00:00
addressing-mode.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
adjust-callstack-sp.ll
[mips] Don't derive the default ABI from the CPU in the backend.
2016-06-23 12:42:53 +00:00
align16.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
alloca16.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
alloca.ll
[mips] Make Static a default relocation model for MIPS codegen
2016-04-11 15:24:23 +00:00
analyzebranch.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
and1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
ase_warnings.ll
[mips] Warn when crc, ginv, virt flags are used with too old revision
2018-07-04 19:26:31 +00:00
asm-large-immediate.ll
[mips][ias] Explicitly disable IAS on asm-large-immediate.ll.
2015-11-13 13:02:31 +00:00
assertzext-trunc.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
atomic64.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
atomic.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
atomicCmpSwapPW.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
atomicops.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
beqzc1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
beqzc.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
biggot.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
blez_bgez.ll
[mips] Add microMIPS case to the tests and regenerate assertions using update_llc_test_checks.py. NFC
2018-07-13 15:03:24 +00:00
blockaddr.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
br-jmp.ll
Reland r331175: "[mips] Fix the predicates of jump and branch and link instructions"
2018-05-01 13:06:49 +00:00
branch-relaxation-with-hazard.ll
[mips] Merge MipsLongBranch and MipsHazardSchedule passes
2018-05-22 13:24:38 +00:00
brconeq.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
brconeqk.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
brconeqz.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
brconge.ll
Increase tail dup threshold for -O3 from 3 to 4.
2017-08-17 23:38:41 +00:00
brcongt.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
brconle.ll
Increase tail dup threshold for -O3 from 3 to 4.
2017-08-17 23:38:41 +00:00
brconlt.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
brconne.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
brconnek.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
brconnez.ll
CodeGen: Allow small copyable blocks to "break" the CFG.
2017-01-31 23:48:32 +00:00
brdelayslot.ll
[mips] Support shrink-wrapping
2018-06-29 16:37:16 +00:00
brind-tailcall.ll
[mips] Guard indirect and tailcall pseudo instructions correctly.
2017-11-08 11:13:44 +00:00
brind.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
brsize3.ll
[mips][mips16] Use isUnconditionalBranch() in AnalyzeBranch() and constant island pass.
2016-05-06 13:23:51 +00:00
brsize3a.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
brundef.ll
[MIPS] BuildCondBr should preserve MO flags
2017-06-13 14:11:29 +00:00
bswap.ll
[mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC
2018-10-03 22:02:23 +00:00
buildpairextractelementf64.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
buildpairf64-extractelementf64-implicit-sp.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
cache-intrinsic.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
call-optimization.ll
[mips] Do not allow -opt-bisect-limit to skip the PIC call optimization pass.
2016-10-27 15:50:36 +00:00
cfi_offset.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
check-adde-redundant-moves.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
check-noat.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
ci2.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
cins.ll
[Mips] Add support to match more patterns for DEXT and CINS
2017-03-15 13:10:08 +00:00
cmov.ll
[mips] Optimize materialization of i64 constants
2016-07-25 09:57:28 +00:00
cmplarge.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
coalesce-partial-redundant-reguse-terminator.mir
[RegisterCoalescing] Don't move COPY if it would interfere with another value
2018-03-28 06:01:30 +00:00
const1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
const4a.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
const6.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
const6a.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
const-mult.ll
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
2019-06-04 11:06:21 +00:00
constantfp0.ll
…
constraint-c-err.ll
[mips] Replace assert by an error message
2017-12-29 19:18:24 +00:00
constraint-c.ll
[mips] Replace assert by an error message
2017-12-29 19:18:24 +00:00
countleading.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
cprestore.ll
Fix test cases.
2012-05-12 03:25:16 +00:00
ctlz-v.ll
Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
2017-06-09 14:37:08 +00:00
ctlz.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
cttz-v.ll
Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
2017-06-09 14:37:08 +00:00
dagcombine_crash.ll
Use FileCheck for test
2015-04-13 18:47:19 +00:00
dagcombine-store-gep-chain-slow.ll
[DAGCombine] Disable finding better chains for stores at O0
2017-11-28 04:07:59 +00:00
DbgValueOtherTargets.test
Remove unnecessary leading comment characters in lit-only file
2013-03-18 22:08:16 +00:00
delay-slot-fill-forward.ll
[mips] Do not place users of $ra in the delay slot of call instructions.
2015-05-14 13:17:56 +00:00
delay-slot-kill.ll
[mips] Sign extend i32 return values on MIPS64
2018-07-26 10:59:35 +00:00
dext.ll
[Mips] Add support to match more patterns for DEXT and CINS
2017-03-15 13:10:08 +00:00
dins.ll
Fix typo in test/CodeGen/Mips/dins.ll
2018-07-23 23:19:53 +00:00
disable-tail-merge.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
div_rem.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
div.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
divrem.ll
[mips] interAptiv based generic schedule model
2016-09-01 14:53:53 +00:00
divu_remu.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
divu.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
double2int.ll
[mips] Fix predicate for the MipsTruncIntFP pattern
2018-07-18 14:11:22 +00:00
dsp-patterns-cmp-vselect.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
dsp-patterns.ll
Reland "[mips] Fix multiprecision arithmetic."
2017-07-13 11:28:05 +00:00
dsp-r1.ll
[mips][dsp] Modify repl.ph to accept signed immediate values
2017-06-07 14:48:46 +00:00
dsp-r2.ll
MIPS DSP: add operands to make sure instruction strings are being matched.
2012-09-28 21:23:16 +00:00
dsp-spill-reload.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
dsp-vec-load-store.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
dynamic-stack-realignment.ll
[MIPS][microMIPS] Enable dynamic stack realignment
2019-03-19 17:01:24 +00:00
eh-dwarf-cfa.ll
[mips] Optimize stack pointer adjustments.
2016-06-14 13:39:43 +00:00
eh-return32.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
eh-return64.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
eh.ll
Codegen: Fix broken assumption in Tail Merge.
2016-06-24 18:16:36 +00:00
ehframe-indirect.ll
[mips] Remove N32 Android test because Android does not support N32 ABI. NFC
2016-12-08 22:10:38 +00:00
elf_eflags.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
emergency-spill-slot-near-fp.ll
RegScavenging: Add scavengeRegisterBackwards()
2017-06-17 02:08:18 +00:00
emit-big-cst.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
emutls_generic.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
ex2.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
extins.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
f16abs.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
f32-to-i64-single-float.ll
[MIPS] Fix illegal type assert in single-float mode
2018-09-11 15:32:47 +00:00
fabs.ll
[mips] Support for +abs2008 attribute
2019-01-28 14:59:30 +00:00
fastcc_byval.ll
[mips] Generate memory dependencies for byVal arguments
2018-02-22 13:40:42 +00:00
fastcc.ll
[DAGCombine] Improve alias analysis for chain of independent stores.
2018-11-08 19:14:20 +00:00
fcmp.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
fcopysign-f32-f64.ll
Reland "[mips] Fix the target specific instruction verifier"
2017-12-18 15:56:40 +00:00
fcopysign.ll
Reland "[mips] Fix the target specific instruction verifier"
2017-12-18 15:56:40 +00:00
fixdfsf.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
fmadd1.ll
[mips] Add madd4 subtarget feature
2017-06-06 15:33:01 +00:00
fneg.ll
Re-commit: [mips] abs.[ds], and neg.[ds] should be allowed regardless of -enable-no-nans-fp-math
2014-04-09 09:56:43 +00:00
fp16-promote.ll
[mips] Change gnueabi to gnu in the triple because EABI has been removed recently. NFC
2016-12-08 22:10:44 +00:00
fp16instrinsmc.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
fp16mix.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
fp16static.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
fp64a.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
fp-contract.ll
[mips] Fix how compiler fuse instructions to fmadd/fmsub
2018-04-27 13:30:27 +00:00
fp-indexed-ls.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
fp-spill-reload.ll
[mips] Make Static a default relocation model for MIPS codegen
2016-04-11 15:24:23 +00:00
fpbr.ll
[mips] Correct label prefixes for N32 and N64.
2016-07-19 10:49:03 +00:00
fpneeded.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fpnotneeded.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fpxx.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
frame-address-err.ll
[mips] Replace assertion by error message while lowering RETURNADDR and FRAMEADDR
2019-03-06 22:40:28 +00:00
frame-address.ll
Add more addFrameMove test coverage.
2013-05-16 14:51:26 +00:00
frameindex.ll
[mips] Select the correct instruction for computing frameindexes
2018-06-01 10:07:10 +00:00
frem.ll
…
global-address.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
global-pointer-reg.ll
Make the following changes in MipsAsmPrinter.cpp:
2012-05-12 00:48:43 +00:00
gpopt-explict-section.ll
[mips] Handle variables with an explicit section and interactions with .sdata, .sbss
2017-08-16 12:18:04 +00:00
gpreg-lazy-binding.ll
[mips] Disable tail calls temporarily
2016-09-27 13:15:54 +00:00
gprestore.ll
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
2019-01-17 21:50:37 +00:00
helloworld.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
hf1_body.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
hf16_1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
hf16call32_body.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
hf16call32.ll
[mips] Enable IAS by default for 32-bit MIPS targets (O32).
2016-05-14 12:43:08 +00:00
hfptrcall.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
i32k.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
i64arg.ll
[mips] Restrict tail call optimization
2016-11-20 21:23:08 +00:00
imm.ll
…
indirectcall.ll
[mips] Disable tail calls temporarily
2016-09-27 13:15:54 +00:00
init-array.ll
[IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format
2019-05-15 02:35:32 +00:00
inline-asm-i-constraint-i1.ll
[TargetLowering] Extend bool args to inline-asm according to getBooleanType
2019-05-22 16:16:15 +00:00
inlineasm64.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
inlineasm_constraint_m.ll
[mips] Make Static a default relocation model for MIPS codegen
2016-04-11 15:24:23 +00:00
inlineasm_constraint_R.ll
[mips] Make Static a default relocation model for MIPS codegen
2016-04-11 15:24:23 +00:00
inlineasm_constraint_ZC.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
inlineasm_constraint.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
inlineasm-assembler-directives.ll
[mips][ias] Replace invalid assembly insn in test since IAS parses inline assembly.
2015-11-13 11:44:00 +00:00
inlineasm-cnstrnt-bad-I-1.ll
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
2014-05-22 11:46:58 +00:00
inlineasm-cnstrnt-bad-J.ll
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
2014-05-22 11:46:58 +00:00
inlineasm-cnstrnt-bad-K.ll
Add support for the inline asm constraint 'K'.
2012-05-07 05:46:29 +00:00
inlineasm-cnstrnt-bad-l1.ll
[mips] Fix 'l' constraint handling for types smaller than 32 bits
2018-02-12 12:21:55 +00:00
inlineasm-cnstrnt-bad-L.ll
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
2014-05-22 11:46:58 +00:00
inlineasm-cnstrnt-bad-N.ll
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
2014-05-22 11:46:58 +00:00
inlineasm-cnstrnt-bad-O.ll
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
2014-05-22 11:46:58 +00:00
inlineasm-cnstrnt-bad-P.ll
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
2014-05-22 11:46:58 +00:00
inlineasm-cnstrnt-reg64.ll
[mips][ias] Allow whitespace after commas in inlineasm*.ll tests.
2015-11-16 14:14:59 +00:00
inlineasm-cnstrnt-reg.ll
[mips] Fix 'l' constraint handling for types smaller than 32 bits
2018-02-12 12:21:55 +00:00
inlineasm-constraint_ZC_2.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
inlineasm-opcode-bad-y.ll
[mips] Support 'y' operand code to print exact log2 of the operand
2018-02-07 12:36:39 +00:00
inlineasm-operand-code.ll
[mips] Support 'y' operand code to print exact log2 of the operand
2018-02-07 12:36:39 +00:00
inlineasm-output-template.ll
[AsmPrinter] refactor to support %c w/ GlobalAddress'
2019-04-26 18:45:04 +00:00
inlineasmmemop.ll
[mips] Handle 'M' and 'L' operand codes for memory operands
2018-02-07 12:36:33 +00:00
insn-zero-size-bb.ll
Enhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInst
2015-12-21 22:00:51 +00:00
int-to-float-conversion.ll
[mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point
2014-04-14 16:00:28 +00:00
internalfunc.ll
Revert r361356: "[MIR] Add simple PRE pass to MachineCSE"
2019-05-27 06:00:00 +00:00
interrupt-attr-64-error.ll
[mips] Don't derive the default ABI from the CPU in the backend.
2016-06-23 12:42:53 +00:00
interrupt-attr-args-error.ll
[mips] Check for the correct error message in tests for interrupt attributes.
2015-10-26 14:24:30 +00:00
interrupt-attr-error.ll
[mips] Check for the correct error message in tests for interrupt attributes.
2015-10-26 14:24:30 +00:00
interrupt-attr.ll
[mips] Interrupt attribute support for mips32r2+.
2015-10-26 12:38:43 +00:00
jtstat.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
jump-table-mul.ll
Emit a left-shift instead of a power-of-two multiply for jump-tables
2018-05-16 08:58:26 +00:00
jumptable_labels.ll
[mips] Correct label prefixes for N32 and N64.
2016-07-19 10:49:03 +00:00
l3mc.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
largeimm1.ll
[mips] Optimize stack pointer adjustments.
2016-06-14 13:39:43 +00:00
largeimmprinting.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
lazy-binding.ll
[mips] Restrict tail call optimization
2016-11-20 21:23:08 +00:00
lb1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
lbu1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
lcb2.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
lcb3c.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
lcb4a.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
lcb5.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
lh1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
lhu1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
lit.local.cfg
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
llcarry.ll
Reland "[mips] Fix multiprecision arithmetic."
2017-07-13 11:28:05 +00:00
llrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
llround-conv.ll
[CodeGen] Add lround/llround builtins
2019-05-16 13:15:27 +00:00
load-store-left-right.ll
[Mips] Add support to match more patterns for DEXT and CINS
2017-03-15 13:10:08 +00:00
long-call-attr.ll
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
2019-01-17 21:50:37 +00:00
long-call-mcount.ll
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
2019-01-17 21:50:37 +00:00
long-calls.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
longbranch.ll
[mips] Involves microMIPS's jump in the analyzable branch set
2018-08-29 14:53:55 +00:00
lrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
lround-conv.ll
[CodeGen] Add lround/llround builtins
2019-05-16 13:15:27 +00:00
lw16-base-reg.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
machineverifier.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
madd-msub.ll
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
2019-06-04 11:06:21 +00:00
mature-mc-support.ll
[LLC] Add an inline assembly diagnostics handler.
2017-02-03 11:14:39 +00:00
mbrsize4a.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
memcpy.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
micromips64-unsupported.ll
[mips] Mark microMIPS64 as being unsupported.
2018-06-19 16:05:44 +00:00
micromips-addiu.ll
[mips][micromips] Make getPointerRegClass() result depend on the instruction.
2016-05-09 13:38:25 +00:00
micromips-addu16.ll
[mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator
2015-03-04 15:47:42 +00:00
micromips-and16.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
micromips-andi.ll
[mips][microMIPS] Revert commits r264245 and r264248.
2016-04-02 23:06:13 +00:00
micromips-ase-function-attribute.ll
[llvm-readobj] Change -long-option to --long-option in tests. NFC
2019-05-01 05:27:20 +00:00
micromips-atomic1.ll
[llvm-objdump] Support detection of feature bits from the object and implement this for Mips.
2016-06-16 09:17:03 +00:00
micromips-atomic.ll
[mips] Fix atomic operations at O0, v3
2018-07-05 09:27:05 +00:00
micromips-attr.ll
[mips] Support micromips attribute passed by front-end
2017-05-22 12:47:41 +00:00
micromips-b-range.ll
[mips][micromips] Fix how values in .gcc_except_table are calculated
2019-02-07 22:57:33 +00:00
micromips-compact-branches.ll
CodeGen: Allow small copyable blocks to "break" the CFG.
2017-01-31 23:48:32 +00:00
micromips-compact-jump.ll
[mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRC
2015-02-13 17:51:27 +00:00
micromips-delay-slot-jr.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
micromips-delay-slot.ll
[mips][microMIPS] Delay slot filler modifications
2016-03-23 10:29:38 +00:00
micromips-directives.ll
[mips] Emit '.set nomicromips' before a function's entry label
2014-04-16 11:46:59 +00:00
micromips-eva.mir
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
micromips-gcc-except-table.ll
[mips][micromips] Fix how values in .gcc_except_table are calculated
2018-10-16 08:27:28 +00:00
micromips-gp-rc.ll
evert "[mips] Fix test mips64fpldst.ll with machine verifier enabled"
2017-06-07 11:21:37 +00:00
micromips-jal.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
micromips-li.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
micromips-load-effective-address.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
micromips-lwc1-swc1.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
micromips-mtc-mfc.ll
[mips] Fix encoding of the mov.d command for microMIPS R6
2019-03-13 14:23:12 +00:00
micromips-not16.ll
[mips][microMIPS] Make usage of NOT16 by code generator
2015-03-11 20:28:31 +00:00
micromips-or16.ll
[mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated.
2016-03-04 17:34:31 +00:00
micromips-pseudo-mtlohi-expand.ll
[mips] Use reg-exp in tests to tolerate register indexes changing. NFC
2019-05-29 14:59:07 +00:00
micromips-rdhwr-directives.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
micromips-shift.ll
[mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions
2016-04-27 11:02:23 +00:00
micromips-short-delay-slot.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
micromips-subu16.ll
[mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator
2015-03-04 15:47:42 +00:00
micromips-sw-lw-16.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
micromips-sw.ll
[mips] Map SW instruction to its microMIPS R6 variant
2019-03-13 13:09:30 +00:00
micromips-target-external-symbol-reloc.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
micromips-xor16.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
mips3-spill-slot.ll
[mips] Fix spill slot for mips3, n64 abi
2018-06-11 16:50:28 +00:00
mips16_32_1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16_32_3.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16_32_4.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16_32_5.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16_32_6.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16_32_7.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16_32_8.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
mips16_32_9.ll
Fix a low hanging use of hasRawTextSupport.
2014-01-14 18:57:12 +00:00
mips16_32_10.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16_fpret.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16-hf-attr-2.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16-hf-attr.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mips16ex.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
mips16fpe.ll
[mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.
2016-05-19 10:42:14 +00:00
mips64-f128-call.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
mips64-f128.ll
[mips] Pick the right variant of DINS upfront and enable target instruction verification
2017-09-14 10:58:00 +00:00
mips64-libcall.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
mips64-sret.ll
Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes.
2015-02-26 12:29:48 +00:00
mips64directive.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
mips64ext.ll
Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes.
2015-02-26 12:29:48 +00:00
mips64extins.ll
[mips] Pick the right variant of DINS upfront and enable target instruction verification
2017-09-14 10:58:00 +00:00
mips64fpimm0.ll
Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes.
2015-02-26 12:29:48 +00:00
mips64fpldst.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
mips64imm.ll
[mips] Optimize materialization of i64 constants
2016-07-25 09:57:28 +00:00
mips64instrs.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
mips64intldst.ll
[mips] Make Static a default relocation model for MIPS codegen
2016-04-11 15:24:23 +00:00
mips64lea.ll
[mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point
2014-04-14 16:00:28 +00:00
mips64muldiv.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
mips64shift.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
mips64signextendsesf.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
mips64sinttofpsf.ll
Now that we have a soft-float attribute, use it instead of the
2015-05-08 00:57:22 +00:00
mips-shf-gprel.s
[llvm-readobj] Change -long-option to --long-option in tests. NFC
2019-05-01 05:27:20 +00:00
mipslopat.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
misha.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mno-ldc1-sdc1.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
mul.ll
Reverted: Track validity of pass results
2017-01-15 10:23:18 +00:00
mulll.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
mulull.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
nacl-align.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
nacl-branch-delay.ll
[mips] Enable tail calls by default
2016-08-04 09:17:07 +00:00
nacl-reserved-regs.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
named-register-n32.ll
Move the Mips target to storing the ABI in the TargetMachine rather
2015-01-26 17:33:46 +00:00
named-register-n64.ll
[mips] Add support for accessing $gp as a named register.
2015-01-09 17:21:30 +00:00
named-register-o32.ll
[mips] Add support for accessing $gp as a named register.
2015-01-09 17:21:30 +00:00
neg1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
nmadd.ll
[mips] Correct the instruction predicates for microMIPSr3
2017-10-10 20:52:53 +00:00
no-odd-spreg-msa.ll
[mips] Use AltOrders to prevent using odd FP-registers
2019-04-02 13:57:32 +00:00
no-odd-spreg.ll
[mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC
2018-10-03 22:02:23 +00:00
nomips16.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
not1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
null-streamer.ll
[Mips] Add a target streamer when creating a null streamer.
2014-06-23 19:43:40 +00:00
null.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
o32_cc_byval.ll
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
2019-01-17 21:50:37 +00:00
o32_cc_vararg.ll
[DAGCombine] Improve Load-Store Forwarding
2018-10-10 14:15:52 +00:00
o32_cc.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
octeon_popcnt.ll
[mips] Sign-extend i32 values truncated from previously zero-extended i32 values.
2016-04-13 15:07:45 +00:00
octeon.ll
[MIPS] Add support to match more patterns for BBIT instruction
2017-08-30 11:25:38 +00:00
optimize-fp-math.ll
[mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point
2014-04-14 16:00:28 +00:00
optimize-pic-o0.ll
[mips] Make Static a default relocation model for MIPS codegen
2016-04-11 15:24:23 +00:00
or1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
pbqp-reserved-physreg.ll
RegAllocPBQP: Do not assign reserved physical register
2017-06-08 21:30:54 +00:00
powif64_16.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
pr33682.ll
Fix endianness bug in DAGCombiner::visitTRUNCATE and visitEXTRACT_VECTOR_ELT
2017-07-25 09:40:35 +00:00
pr33978.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
pr34975.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
pr35071.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
pr36061.ll
[mips] Fix incorrect sign extension for fpowi libcall
2018-01-30 16:24:10 +00:00
prevent-hoisting.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
private-addr.ll
Mips: Fix access to private functions.
2016-06-27 03:19:40 +00:00
private.ll
[mips] Make Static a default relocation model for MIPS codegen
2016-04-11 15:24:23 +00:00
pseudo-jump-fill.ll
[mips][micromips] fix filling delay slots for PseudoIndirectBranch_MM
2019-02-22 14:53:58 +00:00
ra-allocatable.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
rdhwr-directives.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
reloc-jalr.ll
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
2019-01-17 21:50:37 +00:00
rem.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
remat-immed-load.ll
Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes.
2015-02-26 12:29:48 +00:00
remu.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
return_address_err.ll
[mips] Replace assertion by error message while lowering RETURNADDR and FRAMEADDR
2019-03-06 22:40:28 +00:00
return_address.ll
[mips] Fix return lowering
2017-03-09 11:19:48 +00:00
return-vector.ll
Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
2017-06-09 14:37:08 +00:00
rotate.ll
[mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add tests for LL, SC, SYSCALL, ROTR, ROTRV, LWM32, SWM32 and MOVEP instructions
2016-05-04 12:02:12 +00:00
s2rem.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sb1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sel1c.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sel2c.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
select.ll
[Mips] Return true in enableMultipleCopyHints().
2018-02-23 08:30:15 +00:00
selectcc.ll
Revert "[mips] Fix c.<cc>.<fmt> instruction definition."
2016-09-09 11:06:01 +00:00
selectiondag-optlevel.ll
[mips] SelectionDAGISel subclasses now follow the optimization level.
2016-07-14 13:25:22 +00:00
seleq.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
seleqk.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selgek.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selgt.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selle.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selltk.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selne.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selnek.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selpat.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selTBteqzCmpi.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selTBtnezCmpi.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
selTBtnezSlti.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
setcc-se.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
seteq.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
seteqz.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setge.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setgek.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setle.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setlt.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setltk.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setne.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setuge.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setugt.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setule.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setult.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
setultk.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
sh1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
shift-parts.ll
Expand 64-bit shifts if target ABI is O32.
2012-05-09 00:55:21 +00:00
shrink-wrap-buildpairf64-extractelementf64.mir
[mips] Prevent shrink-wrap for BuildPairF64, ExtractElementF64 when they use $sp
2018-08-29 14:07:14 +00:00
shrink-wrapping.ll
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
2019-01-17 21:50:37 +00:00
simplebr.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sint-fp-store_pattern.ll
[mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point
2014-04-14 16:00:28 +00:00
sitofp-selectcc-opt.ll
AsmPrinter: Use emitGlobalConstantFP to emit elements of constant data
2015-12-08 02:37:48 +00:00
sll1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sll2.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sll-micromips-r6-encoding.mir
[MIPS] Fix a incorrect test. (NFC)
2019-02-23 15:56:32 +00:00
slt.ll
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
2016-07-22 07:18:33 +00:00
small-section-reserve-gp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
spill-copy-acreg.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
sr1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sra1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sra2.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
srl1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
srl2.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
stack-alignment.ll
[MIPS] Implement support for -mstack-alignment.
2017-08-14 21:49:38 +00:00
stackcoloring.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stacksize.ll
Test case for r159240.
2012-06-27 00:40:34 +00:00
start-asm-file.ll
[mips] Recommit: "N64 static relocation model support"
2017-01-27 11:36:52 +00:00
stchar.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stldst.ll
[mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores.
2016-06-16 10:20:59 +00:00
sub1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
sub2.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
swzero.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
tail16.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
tglobaladdr-wrapper.ll
[mips] Move out the WrapperPat declaration from the NotInMicroMips predicate
2018-07-21 16:16:03 +00:00
thread-pointer.ll
[Mips] Add support for llvm.thread.pointer intrinsic.
2016-04-27 17:21:49 +00:00
tls16_2.ll
Set some tests to an unknown vendor and OS
2016-10-03 21:58:20 +00:00
tls16.ll
Set some tests to an unknown vendor and OS
2016-10-03 21:58:20 +00:00
tls-alias.ll
[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
2015-09-11 03:22:04 +00:00
tls-models.ll
Set some tests to an unknown vendor and OS
2016-10-03 21:58:20 +00:00
tls.ll
[mips] Add a pattern for 64-bit GPR variant of the rdhwr instruction
2018-09-11 09:57:25 +00:00
tnaked.ll
[mips] Fix return lowering
2017-03-09 11:19:48 +00:00
trap1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
trap.ll
[mips] Implement llvm.trap intrinsic.
2013-07-26 20:58:55 +00:00
uitofp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
ul1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
unaligned-memops-mapping.mir
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
unaligned-memops.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
unalignedload.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00
unsized-global.ll
[MIPS] Don't crash on unsized extern types with -mgpopt
2018-01-26 15:56:14 +00:00
v2i16tof32.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
vector-load-store.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vector-setcc.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
weak.ll
…
whitespace.ll
[mips] fix asmstring of Ext and Ins instructions and mips16 JALRC/JRC
2017-11-27 14:25:36 +00:00
xor1.ll
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
2015-10-15 14:34:23 +00:00
xray-mips-attribute-instrumentation.ll
[LLVM][XRAY][MIPS] Support xray on mips/mipsel/mips64/mips64el
2017-02-15 10:48:11 +00:00
xray-section-group.ll
[llvm-readobj] Change -long-option to --long-option in tests. NFC
2019-05-01 05:27:20 +00:00
zeroreg.ll
[mips] Use --check-prefixes where appropriate. NFC.
2016-06-24 12:23:17 +00:00