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llvm/lib/Target/AMDGPU
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Craig Topper d49344495d [KnownBits] Add bit counting methods to KnownBits struct and use them where possible 
This patch adds min/max population count, leading/trailing zero/one bit counting methods.

The min methods return answers based on bits that are known without considering unknown bits. The max methods give answers taking into account the largest count that unknown bits could give.

Differential Revision: https://reviews.llvm.org/D32931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302925 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-12 17:20:30 +00:00
..
AsmParser
[AMDGPU][MC] Added arg checks for vmcnt, expcnt, lgkmcnt helpers
2017-04-26 17:55:50 +00:00
Disassembler
AMDGPU: Fix crash when disassembling VOP3 mac
2017-04-10 17:58:06 +00:00
InstPrinter
[AMDGPU][MC] Fix for Bug 28211 + LIT tests
2017-04-07 13:07:13 +00:00
MCTargetDesc
AMDGPU: Fix ValueKind code object metadata for images
2017-04-25 20:38:26 +00:00
TargetInfo
Move the global variables representing each Target behind accessor function
2016-10-09 23:00:34 +00:00
Utils
AMDGPU: Add AMDGPU_HS calling convention
2017-05-02 15:41:10 +00:00
AMDGPU.h
[AMDGPU] Generate range metadata for workitem id
2017-04-12 20:48:56 +00:00
AMDGPU.td
AMDGPU: Add new subtarget features for gfx9 flat instructions
2017-05-10 21:19:05 +00:00
AMDGPUAliasAnalysis.cpp
[IR] Make getParamAttributes take argument numbers, not ArgNo+1
2017-04-13 23:12:13 +00:00
AMDGPUAliasAnalysis.h
AMDGPU/R600: Fix amdgpu alias analysis pass.
2017-03-31 19:26:23 +00:00
AMDGPUAlwaysInlinePass.cpp
[AMDGPU] Add GlobalOpt parameter to Always Inliner pass
2017-03-30 20:16:02 +00:00
AMDGPUAnnotateKernelFeatures.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUAnnotateUniformValues.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUAsmPrinter.cpp
AMDGPU/AMDHSA: Set COMPUTE_PGM_RSRC2:LDS_SIZE to 0
2017-05-05 20:13:55 +00:00
AMDGPUAsmPrinter.h
AMDGPU: Refactor AsmPrinter
2017-05-02 17:14:00 +00:00
AMDGPUCallingConv.td
AMDGPU: Stop using CCAssignToRegWithShadow
2017-04-06 17:37:27 +00:00
AMDGPUCallLowering.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUCallLowering.h
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUCodeGenPrepare.cpp
AMDGPU: Cleanup control flow intrinsics
2017-03-17 20:41:45 +00:00
AMDGPUFrameLowering.cpp
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
AMDGPUFrameLowering.h
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
AMDGPUGenRegisterBankInfo.def
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
2017-01-30 21:56:46 +00:00
AMDGPUInstrInfo.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUInstrInfo.h
AMDGPU: Fix crash when disassembling VOP3 mac
2017-04-10 17:58:06 +00:00
AMDGPUInstrInfo.td
AMDGPU: Add new amdgcn.init.exec intrinsics
2017-04-28 20:21:58 +00:00
AMDGPUInstructions.td
[AMDGPU][MC] Added check for truncation of SOPK imm operand
2017-04-26 15:34:19 +00:00
AMDGPUInstructionSelector.cpp
AMDGPU: Remove tfe bit from flat instruction definitions
2017-05-11 17:38:33 +00:00
AMDGPUInstructionSelector.h
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUIntrinsicInfo.cpp
Rename AttributeSet to AttributeList
2017-03-21 16:57:19 +00:00
AMDGPUIntrinsicInfo.h
AMDGPU: Change fdiv lowering based on !fpmath metadata
2016-07-19 23:16:53 +00:00
AMDGPUIntrinsics.td
AMDGPU: Remove legacy bfe intrinsics
2017-04-03 18:08:08 +00:00
AMDGPUISelDAGToDAG.cpp
AMDGPU: Remove tfe bit from flat instruction definitions
2017-05-11 17:38:33 +00:00
AMDGPUISelLowering.cpp
[KnownBits] Add bit counting methods to KnownBits struct and use them where possible
2017-05-12 17:20:30 +00:00
AMDGPUISelLowering.h
AMDGPU: Pull fneg out of extract_vector_elt
2017-05-11 17:26:25 +00:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Mark 32-bit integer constants as legal
2017-05-12 16:46:46 +00:00
AMDGPULegalizerInfo.h
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
2017-01-30 21:56:46 +00:00
AMDGPULowerIntrinsics.cpp
[AMDGPU] Generate range metadata for workitem id
2017-04-12 20:48:56 +00:00
AMDGPUMachineFunction.cpp
AMDGPU: Add AMDGPU_HS calling convention
2017-05-02 15:41:10 +00:00
AMDGPUMachineFunction.h
AMDGPU: Rename isKernel
2017-03-30 23:58:04 +00:00
AMDGPUMCInstLower.cpp
[AMDGPU] Handle SI_MASKED_UNREACHABLE in instruction emitter
2017-04-21 19:32:02 +00:00
AMDGPUMCInstLower.h
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
2016-10-06 17:19:11 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPU: Don't promote alloca to LDS for leaf functions
2017-05-02 18:33:18 +00:00
AMDGPUPTNote.h
[AMDGPU] Restructure code object metadata creation
2017-03-22 22:32:22 +00:00
AMDGPURegisterBankInfo.cpp
[RegisterBankInfo] Uniquely allocate instruction mapping.
2017-05-05 22:48:22 +00:00
AMDGPURegisterBankInfo.h
[RegisterBankInfo] Uniquely allocate instruction mapping.
2017-05-05 22:48:22 +00:00
AMDGPURegisterBanks.td
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
2017-01-30 21:56:46 +00:00
AMDGPURegisterInfo.cpp
AMDGPU: Move R600 only pieces into R600 classes
2016-07-09 18:11:15 +00:00
AMDGPURegisterInfo.h
AMDGPU: Prune unecessary include
2017-04-11 22:29:16 +00:00
AMDGPURegisterInfo.td
AMDGPU: Set SubRegIndex size and offset
2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp
AMDGPU: Add new subtarget features for gfx9 flat instructions
2017-05-10 21:19:05 +00:00
AMDGPUSubtarget.h
AMDGPU: Add new subtarget features for gfx9 flat instructions
2017-05-10 21:19:05 +00:00
AMDGPUTargetMachine.cpp
AMDGPU: Add AMDGPU_HS calling convention
2017-05-02 15:41:10 +00:00
AMDGPUTargetMachine.h
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUTargetObjectFile.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUTargetObjectFile.h
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUTargetTransformInfo.cpp
AMDGPU: Make some packed shuffles free
2017-05-10 21:29:33 +00:00
AMDGPUTargetTransformInfo.h
AMDGPU: Make some packed shuffles free
2017-05-10 21:29:33 +00:00
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPU: Unify divergent function exits.
2017-03-24 19:52:05 +00:00
AMDGPUUnifyMetadata.cpp
[AMDGPU] Turn AMDGPUUnifyMetadata back into module pass
2017-01-27 16:38:10 +00:00
AMDILCFGStructurizer.cpp
Remove unused functions. Remove static qualifier from functions in header files. NFC.
2017-04-11 14:55:32 +00:00
AMDKernelCodeT.h
[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
2016-02-24 10:54:25 +00:00
BUFInstructions.td
AMDGPU: Select scratch mubuf offsets when pointer is a constant
2017-04-24 19:40:59 +00:00
CaymanInstructions.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
CIInstructions.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
CMakeLists.txt
[AMDGPU] Add a new pass to insert waitcnts. Leave under an option for testing.
2017-04-12 03:25:12 +00:00
DSInstructions.td
Revert earlier change. ds permute operations affect lgkm counter.
2017-04-19 23:39:19 +00:00
EvergreenInstructions.td
AMDGPU: Fix unnecessary ands when packing f16 vectors
2017-03-15 19:04:26 +00:00
FLATInstructions.td
AMDGPU: Remove tfe bit from flat instruction definitions
2017-05-11 17:38:33 +00:00
GCNHazardRecognizer.cpp
AMDGPU: Fix broken condition in hazard recognizer
2017-03-17 21:36:28 +00:00
GCNHazardRecognizer.h
AMDGPU: Fix broken condition in hazard recognizer
2017-03-17 21:36:28 +00:00
GCNIterativeScheduler.cpp
[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
2017-03-21 13:15:46 +00:00
GCNIterativeScheduler.h
[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
2017-03-21 13:15:46 +00:00
GCNMinRegStrategy.cpp
[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
2017-03-21 13:15:46 +00:00
GCNRegPressure.cpp
[AMDGPU] Fixed typo in GCNRegPressure, NFC
2017-05-09 20:50:04 +00:00
GCNRegPressure.h
[AMDGPU] Fixed typo in GCNRegPressure, NFC
2017-05-09 20:50:04 +00:00
GCNSchedStrategy.cpp
[AMDGPU] Fix incorrect register pressure calculation
2017-05-11 17:16:55 +00:00
GCNSchedStrategy.h
[AMDGPU] Fix recorded region boundaries in max-occupancy scheduler
2017-03-28 21:48:54 +00:00
LLVMBuild.txt
AMDGPU: Add GlobalISel to required_libraries.
2017-01-28 18:13:08 +00:00
MIMGInstructions.td
AMDGPU: Remove legacy image intrinsics
2017-04-04 16:34:35 +00:00
Processors.td
AMDGPU: Merge initial gfx9 support
2017-02-18 18:29:53 +00:00
R600ClauseMergePass.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
R600ControlFlowFinalizer.cpp
[AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
2017-01-20 17:52:16 +00:00
R600Defines.h
AMDGPU: R600 code splitting cleanup
2016-03-11 08:00:27 +00:00
R600EmitClauseMarkers.cpp
AMDGPU/R600: Fix ALU clause markers use detection
2017-03-06 20:10:05 +00:00
R600ExpandSpecialInstrs.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
R600FrameLowering.cpp
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
R600FrameLowering.h
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
R600InstrFormats.td
AMDGPU/R600: Convert buffer id to VTX_READ input
2016-08-15 21:38:30 +00:00
R600InstrInfo.cpp
Cyle -> Cycle; NFCI
2017-03-15 15:37:42 +00:00
R600InstrInfo.h
Cyle -> Cycle; NFCI
2017-03-15 15:37:42 +00:00
R600Instructions.td
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
R600Intrinsics.td
AMDGPU: Make intrinsics speculatable
2017-05-02 16:57:44 +00:00
R600ISelLowering.cpp
AMDGPU: Refactor argument lowering
2017-04-11 22:29:24 +00:00
R600ISelLowering.h
AMDGPU: Fix i1 fp_to_int
2016-07-22 17:01:21 +00:00
R600MachineFunctionInfo.cpp
AMDGPU: Delete more dead code
2016-07-22 17:01:25 +00:00
R600MachineFunctionInfo.h
AMDGPU: Delete more dead code
2016-07-22 17:01:25 +00:00
R600MachineScheduler.cpp
CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
2016-06-30 00:01:54 +00:00
R600MachineScheduler.h
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
2016-12-09 22:06:55 +00:00
R600OptimizeVectorRegisters.cpp
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
2016-12-12 22:23:53 +00:00
R600Packetizer.cpp
Fix spelling mistakes in AMDGPU target comments. NFC.
2016-11-18 11:04:02 +00:00
R600RegisterInfo.cpp
AMDGPU: Move R600 only pieces into R600 classes
2016-07-09 18:11:15 +00:00
R600RegisterInfo.h
AMDGPU: Move R600 only pieces into R600 classes
2016-07-09 18:11:15 +00:00
R600RegisterInfo.td
…
R600Schedule.td
AMDGPU: Fix trailing whitespace
2016-06-10 02:18:02 +00:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
Remove now useless trailing nullptr in StructType::get
2017-05-11 08:46:02 +00:00
SIDebuggerInsertNops.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIDefines.h
AMDGPU: Add AMDGPU_HS calling convention
2017-05-02 15:41:10 +00:00
SIFixControlFlowLiveIntervals.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIFixSGPRCopies.cpp
AMDGPU: Fix copies from physical registers in SIFixSGPRCopies
2017-04-29 01:26:34 +00:00
SIFixVGPRCopies.cpp
[AMDGPU] Add VGPR copies post regalloc fix pass
2017-01-24 17:46:17 +00:00
SIFoldOperands.cpp
[AMDGPU] SDWA Peephole: improve search for immediates in SDWA patterns
2017-03-31 11:42:43 +00:00
SIFrameLowering.cpp
AMDGPU: GFX9 GS and HS shaders always have the scratch wave offset in SGPR5
2017-05-04 22:25:20 +00:00
SIFrameLowering.h
AMDGPU: Shift down reserved SP register like scratch wave offset
2017-04-25 23:40:57 +00:00
SIInsertSkips.cpp
AMDGPU: Rename SI_RETURN
2017-03-21 22:18:10 +00:00
SIInsertWaitcnts.cpp
[AMDGPU] In the new waitcnt insertion pass, use getHeader
2017-05-05 21:10:17 +00:00
SIInsertWaits.cpp
Move size and alignment information of regclass to TargetRegisterInfo
2017-04-24 18:55:33 +00:00
SIInstrFormats.td
AMDGPU: Unify divergent function exits.
2017-03-24 19:52:05 +00:00
SIInstrInfo.cpp
Move size and alignment information of regclass to TargetRegisterInfo
2017-04-24 18:55:33 +00:00
SIInstrInfo.h
Move size and alignment information of regclass to TargetRegisterInfo
2017-04-24 18:55:33 +00:00
SIInstrInfo.td
AMDGPU: Clean up VOP3NoMods pattern
2017-04-25 21:17:38 +00:00
SIInstructions.td
AMDGPU: Add new amdgcn.init.exec intrinsics
2017-04-28 20:21:58 +00:00
SIIntrinsics.td
AMDGPU: Remove legacy export intrinsic
2017-04-04 16:34:39 +00:00
SIISelLowering.cpp
[AMDGPU] Placate unused variable warning in release builds.
2017-05-11 19:58:52 +00:00
SIISelLowering.h
AMDGPU: Pull fneg out of extract_vector_elt
2017-05-11 17:26:25 +00:00
SILoadStoreOptimizer.cpp
[AMDGPU] added SIInstrInfo::getAddNoCarry() helper
2017-04-14 00:33:44 +00:00
SILowerControlFlow.cpp
[AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
2017-01-20 17:52:16 +00:00
SILowerI1Copies.cpp
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
2017-01-13 09:58:52 +00:00
SIMachineFunctionInfo.cpp
AMDGPU: GFX9 GS and HS shaders always have the scratch wave offset in SGPR5
2017-05-04 22:25:20 +00:00
SIMachineFunctionInfo.h
AMDGPU: Add StackPtr and FramePtr registers to MFI
2017-04-24 18:05:16 +00:00
SIMachineScheduler.cpp
[AMDGPU] Update SI scheduler colorHighLatenciesGroups
2017-03-28 07:19:48 +00:00
SIMachineScheduler.h
[AMDGPU] Update SI scheduler colorHighLatenciesGroups
2017-03-28 07:19:48 +00:00
SIOptimizeExecMasking.cpp
AMDGPU: Fix use-after-free in SIOptimizeExecMasking
2016-10-07 08:40:14 +00:00
SIPeepholeSDWA.cpp
[AMDGPU] SDWA: make pass global
2017-04-12 09:36:05 +00:00
SIRegisterInfo.cpp
[AMDGPU] Merge M0 initializations
2017-04-24 19:37:54 +00:00
SIRegisterInfo.h
Revert "Correct register pressure calculation in presence of subregs"
2017-02-24 21:56:16 +00:00
SIRegisterInfo.td
AMDGPU: Fix not including v2i16/v2f16 in register class
2017-03-21 16:42:50 +00:00
SISchedule.td
AMDGPU: Implement early ifcvt target hooks.
2017-01-25 04:25:02 +00:00
SIShrinkInstructions.cpp
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
2017-01-13 09:58:52 +00:00
SITypeRewriter.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIWholeQuadMode.cpp
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
2016-12-09 22:06:55 +00:00
SMInstructions.td
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
SOPInstructions.td
[AMDGPU][MC] Added check for truncation of SOPK imm operand
2017-04-26 15:34:19 +00:00
VIInstrFormats.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
VIInstructions.td
AMDGPU: Add VI i16 support
2016-11-10 16:02:37 +00:00
VOP1Instructions.td
[AMDGPU][MC] Added support for several VI-specific opcodes (s_wakeup, etc)
2017-04-12 17:10:07 +00:00
VOP2Instructions.td
[AMDGPU][MC] Corrected v_madak/madmk to avoid printing "_e32" in disassembler output
2017-05-10 13:00:28 +00:00
VOP3Instructions.td
[AMDGPU][MC] Added support for several VI-specific opcodes (s_wakeup, etc)
2017-04-12 17:10:07 +00:00
VOP3PInstructions.td
AMDGPU: Support v2i16/v2f16 packed operations
2017-02-27 22:15:25 +00:00
VOPCInstructions.td
[AMDGPU][MC] Corrected parsing of v_cmp_class* and v_cmpx_class*
2017-04-12 16:31:18 +00:00
VOPInstructions.td
[AMDGPU][MC] Fix for Bug 28207 + LIT tests
2017-03-27 15:57:17 +00:00