Commit Graph

128578 Commits

Author SHA1 Message Date
Quentin Colombet
392312ed5a [lit] Teach lit about global-isel requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262878 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:03:40 +00:00
Quentin Colombet
a7b1d455cc [llvm-config] Teach llvm-config about global-isel.
llvm-config can know tell whether or not a build has been configured to support
global-isel.
Use '--has-global-isel' for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262877 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:02:50 +00:00
Anna Zaks
8f023303dc [tsan] Add support for pointer typed atomic stores, loads, and cmpxchg
TSan instrumentation functions for atomic stores, loads, and cmpxchg work on
integer value types. This patch adds casts before calling TSan instrumentation
functions in cases where the value is a pointer.

Differential Revision: http://reviews.llvm.org/D17833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262876 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 23:16:23 +00:00
Sanjay Patel
60ef971c25 [x86] add test to show missing optimization
This should make it clearer how this proposed patch:
http://reviews.llvm.org/D11393
...will change codegen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262875 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 23:13:06 +00:00
Sanjay Patel
9169de74b0 [x86] simplify test and tighten checks
I noticed this test as part of:
http://reviews.llvm.org/D11393
...which is confusing enough as-is. 
Let's show the exact codegen, so the changes will be more obvious.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262874 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:53:23 +00:00
Quentin Colombet
c101677635 [MachineInstr] Get rid of some GlobalISel ifdefs.
Now the type API is always available, but when global-isel is not
built the implementation does nothing.

Note: The implementation free of ifdefs is WIP and tracked here in PR26576.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262873 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:47:23 +00:00
Amaury Sechet
0439f740b2 Remove unused import in Orc C API
Summary: It is not used.

Reviewers: lhames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262870 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:40:07 +00:00
Quentin Colombet
dbefd77861 [IR] Provide an API to skip the details of a structured type when printed.
The mir infrastructure will need this for generic instructions and currently
this feature was only available through the anonymous TypePrinter class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262869 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:32:42 +00:00
Quentin Colombet
2ba0323edd [AsmParser] Add a function to parse a standalone type.
This is useful for MIR serialization. Indeed generic machine instructions
must have a type and we don't want to duplicate the logic in the MIParser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262868 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:09:05 +00:00
Quentin Colombet
6266be0119 [MIR] Teach the MIPrinter about size for generic virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262867 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:57:52 +00:00
Matt Arsenault
d92b7ee9bc Fix broken example for bitreverse documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262865 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:54:52 +00:00
Matt Arsenault
eae62a846f AMDGPU: Match more med3 integer patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262864 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:54:48 +00:00
Quentin Colombet
d93f9aad50 [MIR] Teach the parser how to handle the size of generic virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262862 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:48:43 +00:00
Quentin Colombet
16fea2ad9c [MachineRegisterInfo] Add a method to set the size of a virtual register a posteriori.
This is required for mir testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262861 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:41:39 +00:00
Amaury Sechet
618dea3d12 Small formating change in Core.cpp . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262860 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:39:20 +00:00
Quentin Colombet
76b5b59a75 [MachineRegisterInfo] Get rid of the global-isel ifdefs.
One additional pointer is not a big deal size-wise and it makes
the code much nicer!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262856 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:22:09 +00:00
Matt Arsenault
420f9c1154 AMDGPU: Remove a fixme for ptrrtoint handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262854 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:12:46 +00:00
Matt Arsenault
11f560a199 AMDGPU: Move function only used by R600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262853 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:10:13 +00:00
Matt Arsenault
74d4df2129 DAGCombiner: Check legality before creating extract_vector_elt
Problem not hit by any in tree target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262852 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:10:09 +00:00
Justin Bogner
091b46f643 SelectionDAG: Remove some unused AtomicSDNode constructors. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262849 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 20:15:12 +00:00
Adam Nemet
7e94e7eb7e [LoopDataPrefetch] If prefetch distance is not set, skip pass
This lets select sub-targets enable this pass.  The patch implements the
idea from the recent llvm-dev thread:
http://thread.gmane.org/gmane.comp.compilers.llvm.devel/94925

The goal is to enable the LoopDataPrefetch pass for the Cyclone
sub-target only within Aarch64.

Positive and negative tests will be included in an upcoming patch that
enables selective prefetching of large-strided accesses on Cyclone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262844 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 18:35:42 +00:00
Marina Yatsina
aa9928a862 [ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + fix bag with curly braces
Until now curly braces could only be used in MS inline assembly to mark block start/end.
All curly braces were removed completely at a very early stage.
This approach caused bugs like:
"m{o}v eax, ebx" turned into "mov eax, ebx" without any error.

In addition, AVX-512 added special operands (e.g., k registers), which are also surrounded by curly braces that mark them as such.
Now, we need to keep the curly braces and identify at a later stage if they are marking block start/end (if so, ignore them), or surrounding special AVX-512 operands (if so, parse them as such).

This patch fixes the bug described above and enables the use of AVX-512 special operands.

This commit is the the llvm part of the patch.
The clang part of the review is: http://reviews.llvm.org/D17766
The llvm part of the review is: http://reviews.llvm.org/D17767

Differential Revision: http://reviews.llvm.org/D17767



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262843 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 18:11:16 +00:00
Adam Nemet
e11fea8823 [ScopedNoAliasAA] Make test basic.ll less confusing
Summary:
This testcase had me confused.  It made me believe that you can use
alias scopes and alias scopes list interchangeably with alias.scope and
noalias.  Both langref and the other testcase use scope lists so I went
looking.

Turns out using scope directly only happens to work by chance.  When
ScopedNoAliasAAResult::mayAliasInScopes traverses this as a scope list:

!1 = !{!1, !0, !"some scope"}

, the first entry is in fact a scope but only because the scope is
happened to be defined self-referentially to make it unique globally.

The remaining elements in the tuple (!0, !"some scope") are considered
as scopes but AliasScopeNode::getDomain will just bail on those without
any error.

This change avoids this ambiguity in the test but I've also been
wondering if we should issue some sort of a diagnostics.

Reviewers: dexonsmith, hfinkel

Subscribers: mssimpso, llvm-commits

Differential Revision: http://reviews.llvm.org/D16670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262841 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 17:49:10 +00:00
Adam Nemet
6b38e591a6 Revert "Enable LoopLoadElimination by default"
This reverts commit r262250.

It causes SPEC2006/gcc to generate wrong result (166.s) in AArch64 when
running with *ref* data set.  The error happens with
"-Ofast -flto -fuse-ld=gold" or "-O3 -fno-strict-aliasing".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262839 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 17:38:02 +00:00
Chandler Carruth
0e5929dee0 [memdep] Switch to range based for loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262831 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 15:12:57 +00:00
Chandler Carruth
9daf569e9c [DFSan] Remove an overly aggressive assert reported in PR26068.
This code has been successfully used to bootstrap libc++ in a no-asserts
mode for a very long time, so the code that follows cannot be completely
incorrect. I've added a test that shows the current behavior for this
kind of code with DFSan. If it is desirable for DFSan to do something
special when processing an invoke of a variadic function, it can be
added, but we shouldn't keep an assert that we've been ignoring due to
release builds anyways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262829 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 14:05:09 +00:00
Chandler Carruth
6d15e4501d [memdep] Switch a function to return true on success instead of false.
This is much more clear and less surprising IMO. It also makes things
more consistent with the increasingly large chunk of LLVM code that
assumes true-on-success.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262826 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 12:45:07 +00:00
Chandler Carruth
339c492cd0 [memdep] Cleanup the implementation doxygen comments and remove
duplicated comments.

In several cases these had diverged making them especially nice to
canonicalize. I checked to make sure we weren't losing important
information of course.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262825 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 12:30:06 +00:00
Chandler Carruth
55d119b9c5 [memdep] Finish cleaning up all of the comments' doxygen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262824 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 11:27:56 +00:00
Chandler Carruth
84d0b4a9cd [memdep] Switch from a hacky use of PointerIntPair and poorly chosen
arbitrary integers cast to Instruction pointers to a sum type over
Instruction * and a PointerEmbeddedInt.

No functionality changed.

Differential Revision: http://reviews.llvm.org/D15845

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262823 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 11:04:46 +00:00
Chandler Carruth
1edc33e7a9 [memdep] Update the comments' doxygen style and place them more clearly.
Just cleaning this up, no functionality changed. Next up will be moving
it to use the sum type instead of arbitrary "pointer"-like enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262822 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 10:35:02 +00:00
Chandler Carruth
97a88117d2 [memdep] Run clang-format over the header before porting it to
the new pass manager.

The port will involve substantial edits here, and would likely introduce
bad formatting if formatted in isolation, so just get all the formatting
up to snuff. I'll also go through and try to freshen the doxygen here as
well as modernizing some of the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262821 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 10:19:30 +00:00
Craig Topper
4016ad20d2 [CodeGen] Add space-optimized EmitMergeInputChains1_2 to the DAG isel matching tables. Shaves about 5100 bytes from the X86 matcher table. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262815 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 07:29:12 +00:00
Mehdi Amini
f73f5cd094 Add a new insert_as() method to DenseMap and use it for ConstantUniqueMap
Just like the existing find_as() method, the new insert_as() accepts
an extra parameter which is used as a key to find the bucket in the
map.
When creating a Constant, we want to check the map before actually
creating the object. In this case we have to perform two queries to
the map, and this extra parameter can save recomputing the hash value
for the second query.

This is a reapply of r260458, that was reverted because it was
suspected to be the cause of instability of an internal bot, but
wasn't confirmed.

Differential Revision: http://reviews.llvm.org/D16268

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262812 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 00:51:00 +00:00
Mehdi Amini
e47bc8657f Bitcode reader: Inline readAbbreviatedField in readRecord and move the enclosing loop in each case (NFC)
Summary: This make readRecord 20% faster, measured on an LTO build

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17911

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262811 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 00:38:09 +00:00
NAKAMURA Takumi
dbdf4107cb Revert r130657, "Windows/DynamicLibrary.inc: Clean up ELM_Callback. We may check the decl instead of the versions of individual libraries."
We may assume the type of 1st argument as PCSTR in PENUMLOADED_MODULES_CALLBACK. PSTR was in the ancient mingw32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262810 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 00:13:09 +00:00
Simon Pilgrim
0c5336e71f [X86][AVX512] Fixed VPERMT2* shuffle mask decoding and enabled target shuffle combining.
Patch to add support for target shuffle combining of X86ISD::VPERMV3 nodes, including support for detecting unary shuffles.

This uncovered several issues with the X86ISD::VPERMV3 shuffle mask decoding of non-64 bit shuffle mask elements - the bit masking wasn't being correctly computed.

Removed non-constant pool mask decode path as we have no way of testing it right now.

Differential Revision: http://reviews.llvm.org/D17916

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262809 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 21:54:52 +00:00
Valery Pykhtin
01c052d64a [AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler.
Engages code from r262804.

Differential Revision: http://reviews.llvm.org/D17151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262808 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 20:25:36 +00:00
Valery Pykhtin
56ec3a463c fix sanitizer-ppc64be-linux failure for r262804
error: moving a local object in a return statement prevents copy elision [-Werror,-Wpessimizing-move]

http://lab.llvm.org:8011/builders/sanitizer-ppc64be-linux/builds/930

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262805 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 15:13:54 +00:00
Valery Pykhtin
4a407fb86e [AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fields
Differential Revision: http://reviews.llvm.org/D17150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262804 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 13:27:13 +00:00
Igor Breger
c3bc454e83 AVX512BW: Support llvm intrinsic masked vector load/store for i8/i16 element types on SKX
Differential Revision: http://reviews.llvm.org/D17913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262803 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 12:38:58 +00:00
Wilfred Hughes
5949d69774 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262802 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 12:37:34 +00:00
Valery Pykhtin
8f2541d9b6 [AMDGPU] SOPxx instructions operand naming fixed in td files.
dst -> sdst
ssrcN -> srcN

Differential Revision: http://reviews.llvm.org/D17646

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262801 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 10:31:44 +00:00
Craig Topper
4f67b9a99e [X86] Use high bits of return value from getEncoding instead of predicate functions to populate the REX and VEX prefix bits that extend register encodings. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262800 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 08:12:47 +00:00
Craig Topper
2018f22d6e [X86] Remove unnecessary masking. The assert above it already guaranteed it. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262799 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 08:12:44 +00:00
Craig Topper
9be4b732cf [X86] Use uint8_t instead of unsigned char as it shortens the code and more explicitly reflects the desired size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262798 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 08:12:42 +00:00
Igor Breger
64fd08f76f AVX512: Remove VSHRI kmask patterns from TD file. It is incorrect to use kshiftw to implement VSHRI v4i1 , bits 15-4 is undef so the upper bits of v4i1 may not be zeroed. v4i1 should be zero_extend to v16i1 ( or any natively supported vector).
Differential Revision: http://reviews.llvm.org/D17763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262797 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 07:46:03 +00:00
Saleem Abdulrasool
88e2967579 unitests: add some ARM TargetParser tests
The ARM TargetParser would construct invalid StringRefs.  This would cause
asserts to trigger.  Add some tests in LLVM to ensure that we dont regress on
this in the future.  Although there is a test for this in clang, this ensures
that the changes would get caught in the same repository.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262790 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 04:50:55 +00:00
Alexander Kornienko
41664c2aeb [docs] Updated docs to work with Doxygen 1.8.11
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262786 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-06 03:50:08 +00:00
Simon Pilgrim
c5c4d22d26 [X86][AVX] Improved VPERMILPS variable shuffle mask decoding.
Added support for decoding VPERMILPS variable shuffle masks that aren't in the constant pool.

Added target shuffle mask decoding for SCALAR_TO_VECTOR+VZEXT_MOVL cases - these can happen for v2i64 constant re-materialization

Followup to D17681

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262784 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-05 22:53:31 +00:00