Commit Graph

128798 Commits

Author SHA1 Message Date
Junmo Park
23c40a726f Revert "[InstCombine] Combine A->B->A BitCast"
This reverts commit r262670 due to compile failure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262916 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 07:09:46 +00:00
Justin Bogner
a36efde3c8 SelectionDAG: Appease the bots that don't like my union
Should fix the breakage in r262902.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262908 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:51:58 +00:00
Peter Collingbourne
fb8bf30df5 Fix evaluation order. Spotted by Alexander Riccio!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262907 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:50:36 +00:00
Kit Barton
7cca145db8 [Power9] Implement new vsx instructions: load, store instructions for vector and scalar
We follow the comments mentioned in http://reviews.llvm.org/D16842#344378 to
implement this new patch.

This patch implements the following vsx instructions:

Vector load/store:
lxv lxvx lxvb16x lxvl lxvll lxvh8x lxvwsx
stxv stxvb16x stxvh8x stxvl stxvll stxvx
Scalar load/store:
lxsd lxssp lxsibzx lxsihzx
stxsd stxssp stxsibx stxsihx
21 instructions

Phabricator: http://reviews.llvm.org/D16919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262906 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:49:13 +00:00
Dan Gohman
2d88e345fe [WebAssembly] Update for spec change from tableswitch to br_table.
Also note that the operand order changed; the default label is now listed
after the regular labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262903 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:18:12 +00:00
Justin Bogner
6fc18536b7 Re-apply "SelectionDAG: Store SDNode operands in an ArrayRecycler"
This re-applies r262886 with a fix for 32 bit platforms that have 8 byte
pointer alignment, effectively reverting r262892.

Original Message:

  Currently some SDNode operands are malloc'd, some are stored inline in
  subclasses of SDNode, and some are thrown into a BumpPtrAllocator.
  This scheme is complex, inconsistent, and makes refactoring SDNodes
  fairly difficult.

  Instead, we can allocate all of the operands using an ArrayRecycler
  that wraps a BumpPtrAllocator. This keeps the cache locality when
  iterating operands, improves locality when iterating SDNodes without
  looking at operands, and vastly simplifies the ownership semantics.

  It also means we stop overallocating SDNodes by 2-3x and will make it
  simpler to fix the rampant undefined behaviour we have in how we
  mutate SDNodes from one kind to another (See llvm.org/pr26808).

  This is NFC other than the changes in memory behaviour, and I ran some
  LNT tests to make sure this didn't hurt compile time. Not many tests
  changed: there were a couple of 1-2% regressions reported, but there
  were more improvements (of up to 4%) than regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262902 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:14:29 +00:00
Quentin Colombet
252dec6972 [MIR] Change the token name for '<' and '>' to be consitent with the LLVM IR parser.
Thanks to Ahmed Bougacha for noticing!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262899 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 02:00:43 +00:00
Quentin Colombet
520819d997 [AArch64][GlobalISel] Add a test case for the IRTranslator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262898 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:48:08 +00:00
Quentin Colombet
76cdab6f0a [AArch64] Initialize GlobalISel as part of the target initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262897 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:45:36 +00:00
Quentin Colombet
1f00e2d8f3 [GlobalISel] Introduce initializer method to support start/stop-after features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262896 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:38:55 +00:00
Quentin Colombet
13129166eb [MIR] Teach the parser/printer that generic virtual registers do not need a register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262893 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:17:03 +00:00
Justin Bogner
2a7cc3e509 Revert "SelectionDAG: Store SDNode operands in an ArrayRecycler"
Looks like the largest SDNode is different between 32 and 64 bit now,
so this is breaking 32 bit bots. Reverting while I figure out a fix.

This reverts r262886.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262892 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:07:03 +00:00
Richard Smith
17a583f29c A couple more UB fixes for C++14 sized deallocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262891 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:59:44 +00:00
Quentin Colombet
03a69ba83b [MIR] Teach the parser how to parse complex types of generic machine instructions.
By complex types, I mean aggregate or vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262890 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:57:31 +00:00
Justin Bogner
54124b63dc SelectionDAG: Store SDNode operands in an ArrayRecycler
Currently some SDNode operands are malloc'd, some are stored inline in
subclasses of SDNode, and some are thrown into a BumpPtrAllocator.
This scheme is complex, inconsistent, and makes refactoring SDNodes
fairly difficult.

Instead, we can allocate all of the operands using an ArrayRecycler
that wraps a BumpPtrAllocator. This keeps the cache locality when
iterating operands, improves locality when iterating SDNodes without
looking at operands, and vastly simplifies the ownership semantics.

It also means we stop overallocating SDNodes by 2-3x and will make it
simpler to fix the rampant undefined behaviour we have in how we
mutate SDNodes from one kind to another (See llvm.org/pr26808).

This is NFC other than the changes in memory behaviour, and I ran some
LNT tests to make sure this didn't hurt compile time. Not many tests
changed: there were a couple of 1-2% regressions reported, but there
were more improvements (of up to 4%) than regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262886 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:39:51 +00:00
Quentin Colombet
4ae6fddb70 [MIR] Teach the printer how to print complex types for generic machine instructions.
Before this change, we would get the type definition in the middle
of the instruction.
E.g., %0(48) = G_ADD %struct_alias = type { i32, i16 } %edi, %edi

Now, we have just the expected type name:
%0(48) = G_ADD %struct_alias %edi, %edi


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262885 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:38:01 +00:00
Quentin Colombet
cbd4dbb999 [AsmParser] Expose an API to parse a string starting with a type.
Without actually parsing a type it is difficult to perdict where
the type definition ends. In other words, instead of expecting
the user of the parser API to hand over only the relevant bits
of the string being parsed, take the whole string, parse the type,
and get back the number of characters that have been read.

This will be used by the MIR testing infrastructure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262884 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:37:07 +00:00
Easwaran Raman
8a53057ba3 Revert revisions 262636, 262643, 262679, and 262682.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262883 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:36:35 +00:00
Quentin Colombet
5809e74255 [MIR] Print the type of generic machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262880 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:29:15 +00:00
Quentin Colombet
7ed6f84652 [MIR] Teach the mir parser about types on generic machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262879 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:20:48 +00:00
Quentin Colombet
392312ed5a [lit] Teach lit about global-isel requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262878 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:03:40 +00:00
Quentin Colombet
a7b1d455cc [llvm-config] Teach llvm-config about global-isel.
llvm-config can know tell whether or not a build has been configured to support
global-isel.
Use '--has-global-isel' for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262877 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:02:50 +00:00
Anna Zaks
8f023303dc [tsan] Add support for pointer typed atomic stores, loads, and cmpxchg
TSan instrumentation functions for atomic stores, loads, and cmpxchg work on
integer value types. This patch adds casts before calling TSan instrumentation
functions in cases where the value is a pointer.

Differential Revision: http://reviews.llvm.org/D17833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262876 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 23:16:23 +00:00
Sanjay Patel
60ef971c25 [x86] add test to show missing optimization
This should make it clearer how this proposed patch:
http://reviews.llvm.org/D11393
...will change codegen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262875 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 23:13:06 +00:00
Sanjay Patel
9169de74b0 [x86] simplify test and tighten checks
I noticed this test as part of:
http://reviews.llvm.org/D11393
...which is confusing enough as-is. 
Let's show the exact codegen, so the changes will be more obvious.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262874 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:53:23 +00:00
Quentin Colombet
c101677635 [MachineInstr] Get rid of some GlobalISel ifdefs.
Now the type API is always available, but when global-isel is not
built the implementation does nothing.

Note: The implementation free of ifdefs is WIP and tracked here in PR26576.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262873 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:47:23 +00:00
Amaury Sechet
0439f740b2 Remove unused import in Orc C API
Summary: It is not used.

Reviewers: lhames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262870 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:40:07 +00:00
Quentin Colombet
dbefd77861 [IR] Provide an API to skip the details of a structured type when printed.
The mir infrastructure will need this for generic instructions and currently
this feature was only available through the anonymous TypePrinter class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262869 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:32:42 +00:00
Quentin Colombet
2ba0323edd [AsmParser] Add a function to parse a standalone type.
This is useful for MIR serialization. Indeed generic machine instructions
must have a type and we don't want to duplicate the logic in the MIParser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262868 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:09:05 +00:00
Quentin Colombet
6266be0119 [MIR] Teach the MIPrinter about size for generic virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262867 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:57:52 +00:00
Matt Arsenault
d92b7ee9bc Fix broken example for bitreverse documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262865 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:54:52 +00:00
Matt Arsenault
eae62a846f AMDGPU: Match more med3 integer patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262864 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:54:48 +00:00
Quentin Colombet
d93f9aad50 [MIR] Teach the parser how to handle the size of generic virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262862 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:48:43 +00:00
Quentin Colombet
16fea2ad9c [MachineRegisterInfo] Add a method to set the size of a virtual register a posteriori.
This is required for mir testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262861 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:41:39 +00:00
Amaury Sechet
618dea3d12 Small formating change in Core.cpp . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262860 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:39:20 +00:00
Quentin Colombet
76b5b59a75 [MachineRegisterInfo] Get rid of the global-isel ifdefs.
One additional pointer is not a big deal size-wise and it makes
the code much nicer!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262856 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:22:09 +00:00
Matt Arsenault
420f9c1154 AMDGPU: Remove a fixme for ptrrtoint handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262854 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:12:46 +00:00
Matt Arsenault
11f560a199 AMDGPU: Move function only used by R600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262853 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:10:13 +00:00
Matt Arsenault
74d4df2129 DAGCombiner: Check legality before creating extract_vector_elt
Problem not hit by any in tree target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262852 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:10:09 +00:00
Justin Bogner
091b46f643 SelectionDAG: Remove some unused AtomicSDNode constructors. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262849 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 20:15:12 +00:00
Adam Nemet
7e94e7eb7e [LoopDataPrefetch] If prefetch distance is not set, skip pass
This lets select sub-targets enable this pass.  The patch implements the
idea from the recent llvm-dev thread:
http://thread.gmane.org/gmane.comp.compilers.llvm.devel/94925

The goal is to enable the LoopDataPrefetch pass for the Cyclone
sub-target only within Aarch64.

Positive and negative tests will be included in an upcoming patch that
enables selective prefetching of large-strided accesses on Cyclone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262844 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 18:35:42 +00:00
Marina Yatsina
aa9928a862 [ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + fix bag with curly braces
Until now curly braces could only be used in MS inline assembly to mark block start/end.
All curly braces were removed completely at a very early stage.
This approach caused bugs like:
"m{o}v eax, ebx" turned into "mov eax, ebx" without any error.

In addition, AVX-512 added special operands (e.g., k registers), which are also surrounded by curly braces that mark them as such.
Now, we need to keep the curly braces and identify at a later stage if they are marking block start/end (if so, ignore them), or surrounding special AVX-512 operands (if so, parse them as such).

This patch fixes the bug described above and enables the use of AVX-512 special operands.

This commit is the the llvm part of the patch.
The clang part of the review is: http://reviews.llvm.org/D17766
The llvm part of the review is: http://reviews.llvm.org/D17767

Differential Revision: http://reviews.llvm.org/D17767



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262843 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 18:11:16 +00:00
Adam Nemet
e11fea8823 [ScopedNoAliasAA] Make test basic.ll less confusing
Summary:
This testcase had me confused.  It made me believe that you can use
alias scopes and alias scopes list interchangeably with alias.scope and
noalias.  Both langref and the other testcase use scope lists so I went
looking.

Turns out using scope directly only happens to work by chance.  When
ScopedNoAliasAAResult::mayAliasInScopes traverses this as a scope list:

!1 = !{!1, !0, !"some scope"}

, the first entry is in fact a scope but only because the scope is
happened to be defined self-referentially to make it unique globally.

The remaining elements in the tuple (!0, !"some scope") are considered
as scopes but AliasScopeNode::getDomain will just bail on those without
any error.

This change avoids this ambiguity in the test but I've also been
wondering if we should issue some sort of a diagnostics.

Reviewers: dexonsmith, hfinkel

Subscribers: mssimpso, llvm-commits

Differential Revision: http://reviews.llvm.org/D16670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262841 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 17:49:10 +00:00
Adam Nemet
6b38e591a6 Revert "Enable LoopLoadElimination by default"
This reverts commit r262250.

It causes SPEC2006/gcc to generate wrong result (166.s) in AArch64 when
running with *ref* data set.  The error happens with
"-Ofast -flto -fuse-ld=gold" or "-O3 -fno-strict-aliasing".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262839 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 17:38:02 +00:00
Chandler Carruth
0e5929dee0 [memdep] Switch to range based for loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262831 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 15:12:57 +00:00
Chandler Carruth
9daf569e9c [DFSan] Remove an overly aggressive assert reported in PR26068.
This code has been successfully used to bootstrap libc++ in a no-asserts
mode for a very long time, so the code that follows cannot be completely
incorrect. I've added a test that shows the current behavior for this
kind of code with DFSan. If it is desirable for DFSan to do something
special when processing an invoke of a variadic function, it can be
added, but we shouldn't keep an assert that we've been ignoring due to
release builds anyways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262829 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 14:05:09 +00:00
Chandler Carruth
6d15e4501d [memdep] Switch a function to return true on success instead of false.
This is much more clear and less surprising IMO. It also makes things
more consistent with the increasingly large chunk of LLVM code that
assumes true-on-success.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262826 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 12:45:07 +00:00
Chandler Carruth
339c492cd0 [memdep] Cleanup the implementation doxygen comments and remove
duplicated comments.

In several cases these had diverged making them especially nice to
canonicalize. I checked to make sure we weren't losing important
information of course.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262825 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 12:30:06 +00:00
Chandler Carruth
55d119b9c5 [memdep] Finish cleaning up all of the comments' doxygen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262824 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 11:27:56 +00:00
Chandler Carruth
84d0b4a9cd [memdep] Switch from a hacky use of PointerIntPair and poorly chosen
arbitrary integers cast to Instruction pointers to a sum type over
Instruction * and a PointerEmbeddedInt.

No functionality changed.

Differential Revision: http://reviews.llvm.org/D15845

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262823 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 11:04:46 +00:00