Commit Graph

101640 Commits

Author SHA1 Message Date
Tobias Edler von Koch
7f80f1bbf5 LTO: Pass SF_Executable flag through to InputFile::Symbol
Summary:
The linker needs to be able to determine whether a symbol is text or data to
handle the case of a common being overridden by a strong definition in an
archive. If the archive contains a text member of the same name as the common,
that function is discarded. However, if the archive contains a data member of
the same name, that strong definition overrides the common. This is a behavior
of ld.bfd, which the Qualcomm linker also supports in LTO.

Here's a test case to illustrate:

####

cat > 1.c << \!
int blah;
!

cat > 2.c << \!
int blah() {
  return 0;
}
!

cat > 3.c << \!
int blah = 20;
!

clang -c 1.c
clang -c 2.c
clang -c 3.c

ar cr lib.a 2.o 3.o
ld 1.o lib.a -t

####

The correct output is:

1.o
(lib.a)3.o

Thanks to Shankar Easwaran and Hemant Kulkarni for the test case!

Reviewers: mehdi_amini, rafael, pcc, davide

Reviewed By: pcc

Subscribers: davide, llvm-commits, inglorion

Differential Revision: https://reviews.llvm.org/D31901

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300205 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 16:24:14 +00:00
Sanjay Patel
9defcc4205 [InstCombine] fix assert to not always be true
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300202 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 16:05:01 +00:00
Geoff Berry
0f154b0e36 Re-apply "[GVNHoist] Move GVNHoist to function simplification part of pipeline."
This reverts commit r296872 now that PR32153 has been fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300200 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 15:36:25 +00:00
Krzysztof Parzyszek
7fa51d159a [Hexagon] Implement HexagonTargetLowering::CanLowerReturn
Patch by Michael Wu.

Differential Revision: https://reviews.llvm.org/D32000


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300199 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 15:05:51 +00:00
Krzysztof Parzyszek
db734f0a3d [Hexagon] Fix "LowerFormalArguments emitted a value with the wrong type!" assertion
Patch by Michael Wu.

Differential Revision: https://reviews.llvm.org/D31999


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300198 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 15:00:18 +00:00
Serge Pavlov
cf2d2611cf Use methods to access data stored with frame instructions
Instructions CALLSEQ_START..CALLSEQ_END and their target dependent
counterparts keep data like frame size, stack adjustment etc. These
data are accessed by getOperand using hard coded indices. It is
error prone way. This change implements the access by special methods,
which improve readability and allow changing data representation without
massive changes of index values.

Differential Revision: https://reviews.llvm.org/D31953


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300196 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 14:10:52 +00:00
Ayman Musa
67b50524f6 [X86] Added missing mayLoad/mayStore attributes to some X86 instructions.
Throughout the effort of automatically generating the X86 memory folding tables these missing information were encountered.
This is a preparation work for a future patch including the automation of these tables.

Differential Revision: https://reviews.llvm.org/D31714



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300190 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 10:03:45 +00:00
George Rimar
2c882c2737 [DWARF] - Simplify (use dyn_cast instead of isa + cast).
This addresses post commit review comments for r300039.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300188 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 09:52:50 +00:00
Ayman Musa
456f727677 [X86] Change instructions names to keep consistency with the naming convention. NFC
Differential Revision: https://reviews.llvm.org/D31743



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300184 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 09:12:32 +00:00
Ayal Zaks
17f2fca608 [LV] Refactor ILV to provide vectorizeInstruction(); NFC
Refactoring InnerLoopVectorizer's vectorizeBlockInLoop() to provide
vectorizeInstruction(). Aligning DeadInstructions with its only user.
Facilitates driving the transformation by VPlan - follows
https://reviews.llvm.org/D28975 and its tentative breakdown.

Differential Revision: https://reviews.llvm.org/D31997


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300183 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 09:07:23 +00:00
Craig Topper
c170edb60b [APInt] Reorder fields to avoid a hole in the middle of the class
Summary:
APInt is currently implemented with an unsigned BitWidth field first and then a uint_64/pointer union. Due to the 64-bit size of the union there is a hole after the bitwidth.

Putting the union first allows the class to be packed. Making it 12 bytes instead of 16 bytes. An APSInt goes from 20 bytes to 16 bytes.

This shows a 4k reduction on the size of the opt binary on my local x86-64 build. So this enables some other improvement to the code as well.

Reviewers: dblaikie, RKSimon, hans, davide

Reviewed By: davide

Subscribers: davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D32001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300171 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 04:59:11 +00:00
Craig Topper
cd686df68a [APInt] Generalize the implementation of tcIncrement to support adding a full 'word' by introducing tcAddPart. Use this to support tcIncrement, operator++ and operator+=(uint64_t). Do the same for subtract. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300169 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 04:36:06 +00:00
Lang Hames
ed576a186f [ORC] Add RPC and serialization support for Errors and Expecteds.
This patch allows Error and Expected types to be passed to and returned from
RPC functions.

Serializers and deserializers for custom error types (types deriving from the
ErrorInfo class template) can be registered with the SerializationTraits for
a given channel type (see registerStringError in RPCSerialization.h for an
example), allowing a given custom type to be sent/received. Unregistered types
will be serialized/deserialized as StringErrors using the custom type's log
message as the error string.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300167 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 03:51:35 +00:00
Peter Collingbourne
8b69529e74 Support: Add a VCSRevision.h header file.
This is a magic header file supported by the build system that provides a
single definition, LLVM_REVISION, containing an LLVM revision identifier,
if available. This functionality previously lived in the LTO library, but
I am moving it out to lib/Support because I want to also start using it in
lib/Object to create the IR symbol table.

This change also fixes a bug where LLVM_REVISION was never actually being
used in lib/LTO because the macro HAS_LLVM_REVISION was never defined (it
was misspelled as HAVE_SVN_VERSION_INC in lib/LTO/CMakeLists.txt, and was
only being defined in a non-existent file Version.cpp).

I also changed the code to use "git rev-parse --git-dir" to locate the .git
directory, instead of looking for it in the LLVM source root directory,
which makes this compatible with monorepos as well as git worktrees.

Differential Revision: https://reviews.llvm.org/D31985

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300160 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 01:26:12 +00:00
Lang Hames
ebc666e155 [ORC] Add missing file from r300155.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300157 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 01:06:45 +00:00
Lang Hames
a43d3686c7 [ORC] Use native Errors rather than converted std::error_codes for ORC RPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300155 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 01:03:06 +00:00
Reid Kleckner
e9a46bf123 [IR] Take func, ret, and arg attrs separately in AttributeList::get
This seems like a much more natural API, based on Derek Schuff's
comments on r300015. It further hides the implementation detail of
AttributeList that function attributes come last and appear at index
~0U, which is easy for the user to screw up. git diff says it saves code
as well: 97 insertions(+), 137 deletions(-)

This also makes it easier to change the implementation, which I want to
do next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300153 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 00:58:09 +00:00
Craig Topper
2d32ddf143 [IR] Remove the APIntMoveTy typedef from ConstantRange. Use APInt type directly.
This typedef used to be conditional based on whether rvalue references were supported. Looks like it got left behind when we switched to always having rvalue references with c++11. I don't think it provides any value now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300146 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-13 00:20:31 +00:00
Konstantin Zhuravlyov
fae6220cbb Fix compiler error in Attributes.cpp
```
Compiling Attributes.cpp ...
../../../Attributes.cpp: In member function 'std::__1::pair<unsigned int, llvm::Optional<unsigned int> > llvm::AttributeSet::getAllocSizeArgs() const':
../../../Attributes.cpp:542:69: error: operands to ?: have different types 'std::__1::pair<unsigned int, llvm::Optional<unsigned int> >' and 'std::__1::pair<int, int>'
   return SetNode ? SetNode->getAllocSizeArgs() : std::make_pair(0, 0);
                                                                     ^
../../../Attributes.cpp:543:1: error: control reaches end of non-void function [-Werror=return-type]
 }
 ^
```

Differential Revision: https://reviews.llvm.org/D31981


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300143 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 23:57:37 +00:00
Wei Ding
24e7b0fb5c AMDGPU : Fix common dominator of two incoming blocks terminates with uniform branch issue.
Differential Revision: http://reviews.llvm.org/D31350

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300142 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 23:51:47 +00:00
Richard Smith
e22326d7b4 Fix some ArgList uses after API change in r300135.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300139 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 23:43:58 +00:00
Zachary Turner
71cd6a6292 Fix initialization order of class members.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300137 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 23:27:43 +00:00
Richard Smith
e05ab25f5d ArgList: cache index ranges containing arguments with each ID
Improve performance of argument list parsing with large numbers of IDs and
large numbers of arguments, by tracking a conservative range of indexes within
the argument list that might contain an argument with each ID. In the worst
case (when the first and last argument with a given ID are at the opposite ends
of the argument list), this still results in a linear-time walk of the list,
but it helps substantially in the common case where each ID occurs only once,
or a few times close together in the list.

This gives a ~10x speedup to clang's `test/Driver/response-file.c`, which
constructs a very large set of command line arguments and feeds them to the
clang driver.

Differential Revision: https://reviews.llvm.org/D30130


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300135 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 23:19:51 +00:00
Zachary Turner
67dcd802e3 [llvm-pdbdump] Minor prepatory refactor of Class Def Dumper.
In a followup patch I intend to introduce an additional dumping
mode which dumps a graphical representation of a class's layout.
In preparation for this, the text-based layout printer needs to
be split out from the graphical layout printer, and both need
to be able to use the same code for printing the intro and outro
of a class's definition (e.g. base class list, etc).

This patch does so, and in the process introduces a skeleton
definition for the graphical printer, while currently making
the graphical printer just print nothing.

NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300134 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 23:18:51 +00:00
Zachary Turner
7724dc63a7 [llvm-pdbdump] More advanced class definition dumping.
Previously the dumping of class definitions was very primitive,
and it made it hard to do more than the most trivial of output
formats when dumping.  As such, we would only dump one line for
each field, and then dump non-layout items like nested types
and enums.

With this patch, we do a complete analysis of the object
hierarchy including aggregate types, bases, virtual bases,
vftable analysis, etc.  The only immediately visible effects
of this are that a) we can now dump a line for the vfptr where
before we would treat that as padding, and b) we now don't
treat virtual bases that come at the end of a class as padding
since we have a more detailed analysis of the class's storage
usage.

In subsequent patches, we should be able to use this analysis
to display a complete graphical view of a class's layout including
recursing arbitrarily deep into an object's base class / aggregate
member hierarchy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300133 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 23:18:21 +00:00
Akira Hatanaka
69dba78684 [libFuzzer] XFAIL fuzzer-oom.test on Darwin.
The test fails on Darwin because Fuzzer::DeathCallback (which calls
DumpCurrentUnit("crash-")) is called before DumpCurrentUnit("oom-") is
called in Fuzzer::RssLimitCallback. DeathCallback is transitively called
from __sanitizer_print_memory_profile.

This should fix the fuzzer bot that has been failing for a while:

http://lab.llvm.org:8080/green/job/libFuzzer/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300127 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 23:15:10 +00:00
Craig Topper
b25869aa9e [InstSimplify] Don't try to constant fold AllocaInsts since it won't do anything.
Should give a small compile time improvement.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300125 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 22:54:24 +00:00
Craig Topper
53726fa11a [ValueTracking] Teach GetUnderlyingObject to stop when it reachs an alloca instruction.
Previously it tried to call SimplifyInstruction which doesn't know anything about alloca so defers to constant folding which also doesn't do anything with alloca. This results in wasted cycles making calls that won't do anything. Given the frequency with which this function is called this time adds up.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300118 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 22:29:23 +00:00
Reid Kleckner
7c6ef2a299 [IR] Assert that we never create an empty AttributeListImpl, NFC
Delete following conditional that is always true as a result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300117 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 22:22:01 +00:00
Matt Arsenault
ab28f3b39e AMDGPU: Fix invalid copies when copying i1 to phys reg
Insert a VReg_1 virtual register so the i1 workaround pass
can handle it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300113 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 21:58:23 +00:00
Stanislav Mekhanoshin
bb9002fbb2 [AMDGPU] Generate range metadata for workitem id
If workgroup size is known inform llvm about range returned by local
id  and local size queries.

Differential Revision: https://reviews.llvm.org/D31804

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300102 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 20:48:56 +00:00
Peter Collingbourne
5bfc47d152 Bitcode: Move version and global value module code parsers to separate functions. NFCI.
This will make it easier to teach this code about the string table.

Differential Revision: https://reviews.llvm.org/D31828

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300099 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 20:02:09 +00:00
Craig Topper
d0d13f5774 [InstCombine] Teach SimplifyMultipleUseDemandedBits to handle And/Or/Xor known bits using the LHS/RHS known bits it already acquired without recursing back into computeKnownBits.
This replicates the known bits and constant creation code from the single use case for these instructions and adds it here. The computeKnownBits and constant creation code for other instructions is now in the default case of the opcode switch.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300094 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 19:32:47 +00:00
Craig Topper
1db7e25e94 [InstCombine] Remove unreachable code for turning an And where all demanded bits on both sides are known to be zero into a constant 0.
We already handled a superset check that included the known ones too and folded to a constant that may include ones. But it can also handle the case of no ones.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300093 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 19:08:03 +00:00
Sanjay Patel
2c5adb18ba [InstCombine] fix wrong undef handling when converting select to shuffle
As discussed in:
https://bugs.llvm.org/show_bug.cgi?id=32486
...the canonicalization of vector select to shufflevector does not hold up
when undef elements are present in the condition vector. 

Try to make the undef handling clear in the code and the LangRef.

Differential Revision: https://reviews.llvm.org/D31980



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300092 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 18:39:53 +00:00
Craig Topper
c5de42f38f [SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and copies when bit width is larger than 64-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300091 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 18:39:27 +00:00
Kyle Butt
718593b3f9 CodeGen: BlockPlacement: Add comment about DenseMap Safety.
The use of a DenseMap in precomputeTriangleChains does not cause
non-determinism, even though it is iterated over, as the only thing the
iteration does is to insert entries into a new DenseMap, which is not iterated.
Comment only change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300088 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 18:30:32 +00:00
Craig Topper
d9096c7391 [InstCombine] In SimplifyMultipleUseDemandedBits, use a switch instead of cascaded ifs on opcode. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300085 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 18:25:25 +00:00
Craig Topper
51f7e1a9dc [InstCombine] Teach SimplifyDemandedInstructionBits that even if we reach an instruction that has multiple uses, if we know all the bits for the demanded bits for this context we can go ahead and create a constant.
Currently if we reach an instruction with multiples uses we know we can't do any optimizations to that instruction itself since we only have the demanded bits for one of the users. But if we know all of the bits are zero/one for that one user we can still go ahead and create a constant to give to that user.

This might then reduce the instruction to having a single use and allow additional optimizations on the other path.

This picks up an additional case that r300075 didn't catch.

Differential Revision: https://reviews.llvm.org/D31552



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300084 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 18:17:46 +00:00
Matthias Braun
6b814345d1 MachineScheduler: Skip acyclic latency heuristic for in-order cores
The current heuristic is triggered on `InFlightCount > BufferLimit`
which isn't really helpful on in-order cores where BufferLimit is zero.

Note that we already get latency hiding effects for in order cores
by instructions staying in the pending queue on stalls; The additional
latency scheduling heuristics only have minimal effects after that while
occasionally increasing register pressure too much resulting in extra
spills.

My motivation here is additional spills/reloads ending up in a loop in
464.h264ref / BlockMotionSearch function resulting in a 4% overal
regression on an in order core. rdar://30264380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300083 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 18:09:05 +00:00
Craig Topper
c7bad98e0e [InstCombine] Move portion of SimplifyDemandedUseBits that deals with instructions with multiple uses out to a separate method. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300082 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 18:05:21 +00:00
Dmitry Preobrazhensky
b4ede06cc4 [AMDGPU][MC] Added support for several VI-specific opcodes (s_wakeup, etc)
Added support for VI:

- s_endpgm_saved
- s_wakeup
- s_rfe_restore_b64
- v_perm_b32

Enabled for VI:

- v_mov_fed_b32
- v_mov_fed_b32_e64

See bug 32593: https://bugs.llvm.org//show_bug.cgi?id=32593

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D31931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300076 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 17:10:07 +00:00
Craig Topper
3461e9c2e4 Teach SimplifyDemandedUseBits that adding or subtractings 0s from every bit below the highest demanded bit can be simplified
If we are adding/subtractings 0s below the highest demanded bit we can just use the other operand and remove the operation.

My primary motivation is observing that we can call ShrinkDemandedConstant for the add/sub and create a 0 constant, rather than removing the add completely. In the case I saw, we modified the constant on an add instruction to a 0, but the add is not put into the worklist. So we didn't revisit it until the next InstCombine iteration. This caused an IR modification to remove add and a subsequent iteration to be ran.

With this change we get bypass the add in the first iteration and prevent the second iteration from changing anything.

Differential Revision: https://reviews.llvm.org/D31120



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300075 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 16:49:59 +00:00
Dmitry Preobrazhensky
ef86a1e6af [AMDGPU][MC] Corrected parsing of v_cmp_class* and v_cmpx_class*
Fixed bug 32565: https://bugs.llvm.org//show_bug.cgi?id=32565

Reviewers: vpykhtin

Differential Revision: https://reviews.llvm.org/D31820

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300073 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 16:31:18 +00:00
Derek Schuff
490024c934 [WebAssembly] Update use of Attributes after r299875
This fixes the failing WebAssemblyLowerEmscriptenEHSjLj tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300072 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 16:03:00 +00:00
Dmitry Preobrazhensky
405c945bb5 [AMDGPU][MC] Corrected encoding of V_MQSAD_U32_U8 for CI
Corrected encoding of V_MQSAD_U32_U8 for CI

See bug 32552: https://bugs.llvm.org//show_bug.cgi?id=32552

Reviewers: vpykhtin

Differential Revision: https://reviews.llvm.org/D31810

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300070 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 15:36:09 +00:00
Easwaran Raman
6f3228cc82 Fix the bootstrap failure caused by r299986.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300069 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 15:26:15 +00:00
Sanjay Patel
e930b092c4 [InstCombine] morph an existing instruction instead of creating a new one
One potential way to make InstCombine (very slightly?) faster is to recycle instructions 
when possible instead of creating new ones. It's not explicitly stated AFAIK, but we don't
consider this an "InstSimplify". We could, however, make a new layer to house transforms 
like this if that makes InstCombine more manageable (just throwing out an idea; not sure 
how much opportunity is actually here).

Differential Revision: https://reviews.llvm.org/D31863


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300067 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 15:11:33 +00:00
Dmitry Preobrazhensky
df5e51ce8f [AMDGPU][MC] Corrected ds_wrxchg2* to support two offsets
Fixed bug 28227: https://bugs.llvm.org//show_bug.cgi?id=28227

Reviewers: vpykhtin

Differential Revision: https://reviews.llvm.org/D31808

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300066 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 14:29:45 +00:00
Serge Pavlov
e4957d5a3e Remove redundant type casts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300063 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 14:13:00 +00:00