llvm/AArch64 at c710179bcbecd613db952525b2d284b92d5a0f9d - llvm - Gitea: Git with a cup of tea

RPCSX/llvm

mirror of https://github.com/RPCSX/llvm.git synced 2025-03-07 12:28:19 +00:00

History

Tim Shen 1a7750eecd [SSP] Remove llvm.stackprotectorcheck.

This is a cleanup patch for SSP support in LLVM. There is no functional change.
llvm.stackprotectorcheck is not needed, because SelectionDAG isn't
actually lowering it in SelectBasicBlock; rather, it adds check code in
FinishBasicBlock, ignoring the position where the intrinsic is inserted
(See FindSplitPointForStackProtector()).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265851 91177308-0d34-0410-b5e6-96231b3b80d8

2016-04-08 21:26:31 +00:00

..

AArch64: support .cpu directive

2016-04-02 19:29:52 +00:00

Remove autoconf support

2016-01-26 21:29:08 +00:00

Remove autoconf support

2016-01-26 21:29:08 +00:00

[AArch64] Better errors for out-of-range fixups

2016-04-01 09:14:50 +00:00

Remove autoconf support

2016-01-26 21:29:08 +00:00

Remove autoconf support

2016-01-26 21:29:08 +00:00

AArch64.h

AArch64: avoid clobbering SP for dead MOVimm pseudos.

2016-04-01 23:14:52 +00:00

AArch64.td

AArch64: remove CRC feature from Cyclone.

2016-02-24 18:10:17 +00:00

AArch64A53Fix835769.cpp

Add MachineFunctionProperty checks for AllVRegsAllocated for target passes

2016-04-04 17:09:25 +00:00

AArch64A57FPLoadBalancing.cpp

RegisterScavenger: Take a reference as enterBasicBlock() argument.

2016-04-06 02:47:09 +00:00

AArch64AddressTypePromotion.cpp

Simplify some boolean conditional return statements in AArch64.

2016-02-29 22:50:49 +00:00

AArch64AdvSIMDScalarPass.cpp

AArch64: Remove implicit ilist iterator conversions, NFC

2015-10-13 20:02:15 +00:00

AArch64AsmPrinter.cpp

Clean up redundant copies of Triple objects. NFC

2015-06-16 15:44:21 +00:00

AArch64BranchRelaxation.cpp

[AArch64] Fix typo. NFC.

2016-03-25 14:37:43 +00:00

AArch64CallingConvention.h

Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef.

2015-12-05 07:13:35 +00:00

AArch64CallingConvention.td

Swift Calling Convention: add swiftself attribute.

2016-03-29 17:37:21 +00:00

AArch64CallLowering.cpp

[AArch64] gcc does not like litteral without quotes even on preprocessor macros.

2016-04-07 20:49:15 +00:00

AArch64CallLowering.h

[GlobalISel] Re-apply r260922-260923 with MSVC-friendly code.

2016-02-16 19:26:02 +00:00

AArch64CleanupLocalDynamicTLSPass.cpp

Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"

2016-02-22 20:49:58 +00:00

AArch64CollectLOH.cpp

Add MachineFunctionProperty checks for AllVRegsAllocated for target passes

2016-04-04 17:09:25 +00:00

AArch64ConditionalCompares.cpp

WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFC

2016-02-27 17:05:33 +00:00

AArch64ConditionOptimizer.cpp

Fix AArch64ConditionOptimizer

2016-01-15 00:06:58 +00:00

AArch64DeadRegisterDefinitionsPass.cpp

Add MachineFunctionProperty checks for AllVRegsAllocated for target passes

2016-04-04 17:09:25 +00:00

AArch64ExpandPseudoInsts.cpp

AArch64: avoid clobbering SP for dead MOVimm pseudos.

2016-04-01 23:14:52 +00:00

AArch64FastISel.cpp

Swift Calling Convention: add swiftself attribute.

2016-03-29 17:37:21 +00:00

AArch64FrameLowering.cpp

AArch64: Fix compile error

2016-04-06 02:59:44 +00:00

AArch64FrameLowering.h

Change eliminateCallFramePseudoInstr() to return an iterator

2016-03-31 18:33:38 +00:00

AArch64GISelAccessor.h

[AArch64] Teach the subtarget how to get to the RegisterBankInfo.

2016-04-06 17:26:03 +00:00

AArch64InstrAtomics.td

NFC: make AtomicOrdering an enum class

2016-04-06 21:19:33 +00:00

AArch64InstrFormats.td

AArch64: Add missing schedinfo, check completeness for cyclone

2016-03-01 21:20:31 +00:00

AArch64InstrInfo.cpp

[AArch64][CodeGen] NFC refactor AArch64InstrInfo::optimizeCompareInstr to prepare it for fixing a bug in it

2016-04-06 11:39:00 +00:00

AArch64InstrInfo.h

[AArch64][CodeGen] NFC refactor AArch64InstrInfo::optimizeCompareInstr to prepare it for fixing a bug in it

2016-04-06 11:39:00 +00:00

AArch64InstrInfo.td

AArch64: remove pseudo-instructions used only for their patterns.

2016-03-10 18:46:12 +00:00

AArch64ISelDAGToDAG.cpp

NFC: make AtomicOrdering an enum class

2016-04-06 21:19:33 +00:00

AArch64ISelLowering.cpp

[SSP] Remove llvm.stackprotectorcheck.

2016-04-08 21:26:31 +00:00

AArch64ISelLowering.h

[SSP] Remove llvm.stackprotectorcheck.

2016-04-08 21:26:31 +00:00

AArch64LoadStoreOptimizer.cpp

Add MachineFunctionProperty checks for AllVRegsAllocated for target passes

2016-04-04 17:09:25 +00:00

AArch64MachineFunctionInfo.h

[AArch64] Break the dependency between FP and SP when possible.

2016-03-14 18:17:41 +00:00

AArch64MCInstLower.cpp

Convert some AArch64 code to foreach loops. NFC.

2015-08-03 19:04:32 +00:00

AArch64MCInstLower.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

AArch64PBQPRegAlloc.cpp

CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC

2016-02-27 06:40:41 +00:00

AArch64PBQPRegAlloc.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

AArch64PerfectShuffle.h

Canonicalize header guards into a common format.

2014-08-13 16:26:38 +00:00

AArch64PromoteConstant.cpp

Fix -Wdocumentation warnings from r263853

2016-03-21 22:13:44 +00:00

AArch64RedundantCopyElimination.cpp

Add MachineFunctionProperty checks for AllVRegsAllocated for target passes

2016-04-04 17:09:25 +00:00

AArch64RegisterBankInfo.cpp

[AArch64] Fix a typo in the register class to register bank mapping.

2016-04-07 23:10:14 +00:00

AArch64RegisterBankInfo.h

[AArch64] Teach RegisterBankInfo about the CC register bank.

2016-04-07 00:39:29 +00:00

AArch64RegisterInfo.cpp

Add support for a preserve_most calling convention to the AArch64 backend.

2016-03-10 04:35:09 +00:00

AArch64RegisterInfo.h

CXX_FAST_TLS calling convention: performance improvement for AArch64.

2015-12-16 21:04:19 +00:00

AArch64RegisterInfo.td

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

AArch64SchedA53.td

AArch64: Reenable CompleteModel for A53, A57 and Kryo models

2016-03-01 21:55:35 +00:00

AArch64SchedA57.td

AArch64: Reenable CompleteModel for A53, A57 and Kryo models

2016-03-01 21:55:35 +00:00

AArch64SchedA57WriteRes.td

[AArch64] Refines the Cortex-A57 Machine Model

2014-09-29 21:27:36 +00:00

AArch64SchedCyclone.td

AArch64: Add missing schedinfo, check completeness for cyclone

2016-03-01 21:20:31 +00:00

AArch64SchedKryo.td

AArch64: Reenable CompleteModel for A53, A57 and Kryo models

2016-03-01 21:55:35 +00:00

AArch64SchedKryoDetails.td

[AArch64] Add support for Qualcomm Kryo CPU.

2016-02-12 15:51:51 +00:00

AArch64SchedM1.td

[AArch64] Minor reformatting (NFC).

2016-03-09 19:56:38 +00:00

AArch64Schedule.td

AArch64: Add missing schedinfo, check completeness for cyclone

2016-03-01 21:20:31 +00:00

AArch64SelectionDAGInfo.cpp

Remove getDataLayout() from TargetSelectionDAGInfo (had no users)

2015-07-09 02:10:08 +00:00

AArch64SelectionDAGInfo.h

Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/

2016-01-27 16:32:26 +00:00

AArch64StorePairSuppress.cpp

[TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.

2016-03-09 16:00:35 +00:00

AArch64Subtarget.cpp

[AArch64] Teach the subtarget how to get to the RegisterBankInfo.

2016-04-06 17:26:03 +00:00

AArch64Subtarget.h

[AArch64] Teach the subtarget how to get to the RegisterBankInfo.

2016-04-06 17:26:03 +00:00

AArch64TargetMachine.cpp

[AArch64] Get rid of some GlobalISel ifdefs.

2016-04-07 21:24:40 +00:00

AArch64TargetMachine.h

Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.

2015-06-11 19:41:26 +00:00

AArch64TargetObjectFile.cpp

MC: Clean up MCExpr naming. NFC.

2015-05-30 01:25:56 +00:00

AArch64TargetObjectFile.h

[AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents

2015-03-06 13:49:05 +00:00

AArch64TargetTransformInfo.cpp

[LoopDataPrefetch] Centralize the tuning cl::opts under the pass

2016-03-29 23:45:52 +00:00

AArch64TargetTransformInfo.h

[LoopDataPrefetch] Add TTI to limit the number of iterations to prefetch ahead

2016-03-18 00:27:43 +00:00

CMakeLists.txt

[AArch64][CallLowering] Do not build the API if GlobalISel is not built.

2016-04-07 20:47:51 +00:00

LLVMBuild.txt

[AArch64] Plug the beginning of the GlobalISel pipeline.

2016-02-11 19:35:06 +00:00