Ulrich Weigand b64e2115de Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.

This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167855 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 18:40:58 +00:00
..
2011-05-02 15:58:16 +00:00
2010-07-16 22:51:10 +00:00
2010-03-28 07:58:37 +00:00
2012-10-11 15:38:20 +00:00
2012-10-05 13:32:38 +00:00
2012-08-28 02:10:15 +00:00
2011-05-02 15:58:16 +00:00
2010-01-05 17:55:26 +00:00
2012-08-28 02:10:33 +00:00
2010-11-14 22:22:14 +00:00
2010-11-14 22:22:14 +00:00
2012-10-16 13:30:53 +00:00
2010-01-21 20:01:04 +00:00
2012-06-04 17:36:38 +00:00
2010-11-14 22:22:14 +00:00