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22 Commits
Author SHA1 Message Date
byuu 7dec0b2a3c Update to bsnes v014 release.
This version adds speed regulation, greatly improves PPU rendering, and increases speed by ~30% over the previous version.
Changelog:
    - Rewrote offset-per-tile mode emulation, should be correct now. Fixes Chrono Trigger, Contra III, Tetris Attack, etc.
    - Fixed a bug with HDMA occuring during interrupts. Fixes Tales of Phantasia souond test screen
    - Updated compiler to Visual Studio 2005, and enabled profile guided optimizations
    - Added conditional compilation of debugging functions (faster without them)
    - Added conditional compilation of core classes as pointers (allowing polymorphism) or objects (allowing inlining). The latter results in a speed increase
    - Small fixes to BG and OAM rendering routines
    - Corrected sprite tile bounds wrapping
    - Corrected sprite rendering in hires video modes
    - Rewrote color add/sub routines, should be correct now. Fixes Illusion of Gaia menu, etc.
    - Optimized video blitting routines, will temporarilly break mixed video mode screenshots
    - Prevented selecting menu options via return key from being recognized as keypresses by the emulator
    - Added system speed regulation (60hz/NTSC or 50hz/PAL)! Many thanks to kode54, GIGO, and Richard Bannister for their assistance
I disabled the debugger and polymorphism, and enabled profile guided optimizations for this build, to maximize speed. The debugger and polymorphism can be re-enabled via uncommenting the respective #defines in src/base.h and recompiling, or bsnes v0.013 can be used. I may start releasing two separate builds in the future... not sure yet.
2005-11-12 16:49:26 +00:00
byuu f288280ceb Update to bsnes v013r02 release.
[No changelog available]
2005-10-25 23:25:28 +00:00
byuu c6c5f4669c Update to bsnes v013 release.
- Greatly improved HDMA timing and accuracy with help from anomie and DMV27 -- fixes bugs in Energy Breaker and Street Fighter Alpha 2
    - Fixed a problem with color add/sub code -- fixes opening battle in Tales of Phantasia and clouds in Energy Breaker
    - Temporarily added DMV27's bugfix for the DSP KON register -- fixes sound in Der Langrisser, but this is not a hardware-accurate fix
    - Disabled VRAM writes outside of vblank -- fixes Hook, but breaks many PD ROMs and fan translations (Roto's BS Zelda hack, Gideon Zhi's Ys 4 translation, etc). I might add an option in the future to toggle this behavior, but for now these games will no longer work. Please keep in mind these games will not run properly on real SNES hardware, either.
    - Improved frameskipping code thanks to a suggestion from Richard Bannister
    - Misc. other code cleanups and improvements (notably in the color table generation code)
    - bsnes is now endian-safe and runs on Mac OS X
    - Added caching support for window clipping tables resulting in a slight speedup. Please let me know if you spot any errors as a result of this change.
2005-10-23 23:32:30 +00:00
byuu 397b9c4505 Update to bsnes v012 release.
Changelog:
    - Added S-DSP emulation
    - Added sound output support via DirectSound -- no sound buffering though, so sound is muted by default
    - Added option to record raw sound output to WAV files
    - Added multiple color adjustment filters to the video output
    - Added mode3/4 direct color support
    - Added mode7 direct color and mosaic support
    - Greatly improved mode7 rendering algorithm thanks to anomie
    - Fixed mode7 screen repitition and EXTBG effects
    - Greatly increased accuracy of NMI and IRQ timing, and emulated many newly discovered hardware quirks involving the two
    - A few speed improvements courtesy of Nach for profiling the code for me
I'm now looking for assistance with sound buffering. Specifically, I need help modifying the DirectSound code to allow the emulator to be ran between 50%-400% normal speed, while keeping the sound output relatively good. If you have experience with this and can help, please get in touch with me (setsunakun0 at hotmail dot com).
2005-10-02 00:38:34 +00:00
byuu 7e2cfb6d40 Update to bsnes v011 release.
- Fixed Mode 0 color palette index problem. Fixes ToP, DQ5, etc.
    - Improved LoROM memory mapper to support 32mbit images. Fixes Tokimeki Memorial, etc.
    - Added full S-DD1 support, SFA2 and Star Ocean are now playable. Special thanks to Andreas Naive
    - Updated BGnxOFS / Mode7 registers with anomie's latest findings
    - Added basic ROM mirroring support. Fixes copy protection issues in MMX, etc.
    - Rewrote string library to work better on gcc/linux
    - Cleaned up S-RTC/S-DD1 emulation to make way for future add-on chip emulation
    - Rewrote DMA code, now runs cycle-by-cycle
    - Rewrote HDMA code, now allows HDMA to be enabled mid-frame, fixes many games
    - Fixed a bug in Mode7 vertical screen flip mode. Fixes FF5 title screen, etc.
    - Greatly improved IRQ triggering. Fixes Der Langrisser, etc.
    - Added full support for open bus. This includes PPU1 and PPU2 open bus support
    - Modified CPU core back to cycle-based system. Slower, but improves debugger
    - Implemented temporary fix for debugger to handle new cycle-based cores
    - Modified CGRAM to ignore highest bit, since it is not used at all by the SNES, and is impossible to read on real hardware. Lowers memory usage by ~1.2mb
    - Added mostly accurate PAL timing support. This should increase compatibility by ~30% or so
    - More stuff I'm forgetting at the moment...
2005-08-26 20:38:00 +00:00
byuu 970dcea0ac Update to bsnes v010 release.
bsnes now supports SPC700 emulation (no DSP or sound support, however), and has greatly improved compatibility. It also now contains a keyboard-only joypad configuration tool.
2005-08-03 21:22:42 +00:00
byuu 402c146a53 Update to bsnes v009 release.
- Fixed non-interlaced display modes from not drawing every other frame
    - Changed OAM halve to skip every other scanline in 224-height modes
    - Updated renderer to properly support games that switch resolutions mid-frame
    - Fixed VRAM address remapping modes, fixes DQ3R, FF: MQ
    - Fixed a bug in main color window clipping affecting BGs
    - Added video color curve option, thanks to Overload for the idea + color table
    - Added vblank, FPS counter, and DDraw surface memory options to settings menu
    - Added fullscreen modes 640x480 and 1024x768 to video modes
    - Added option to toggle the menubar on and off by pressing the escape key
    - Mode3 was not rendering sprites
    - Priorities were wrong for modes 2-4, thanks to anomie for info
    - Fixed a serious bug in IRQ interrupts. May not be perfect, but helps many games
2005-06-26 11:07:38 +00:00
byuu a471c150c9 Update to bsnes v008 release.
moving the window + main color window clipping into the bg/oam/mode7 rendering routines themselves, I was able to greatly simplify the most complicated part of rendering: the final pass where color add/sub effects are applied. As a result, the new PPU core is not only ~35% faster (on graphics intensive screens, even faster on simpler screens), but more accurate as well. Awesome.
In celebration, I´m releasing bsnes v0.008. I can actually run all games I have at >60fps on my Athlon 1.67ghz PC. Probably not something to brag about, though ...
Oh, and I also updated the keyboard polling code to only capture keypresses if the main window has focus. I´ve been meaning to do this for the better part of a year now, but never got around to it.
If, for some reason, you still want to use the old renderer, you can uncomment the first line in src/ppu/bppu/bppu.h and recompile the emulator yourself. Or you can use v0.007a, I´ll leave it up for a bit.
2005-06-21 09:13:40 +00:00
byuu ea38ea2537 Update to bsnes v007a release.
[No changelog available]
2005-06-13 04:34:10 +00:00
byuu 09b326ae86 Update to bsnes v007 release.
I have done quite a bit, so I´ll try my best to recap most of the fixes since the last release...
    - HDMA was not running during DMA transfers
    - Emulator did not recognize any filetype other than .smc
    - Added configuration file support and imported my vector/string/config libraries into bsnes
    - Added option to use system RAM instead of video RAM for display, this can greatly increase speed on certain video cards
    - Increased speed by ~15% by adding 256x224 renderer (still very buggy when the SNES mixes video modes mid-frame)
    - mvn/mvp opcodes were not setting the DB register
    - Fixed joypad input in many games (Super Mario: All Stars, Dragon Quest III, etc.)
    - Major speedup with frakeskip option
    - Fixed default aspect ratio when emulator is first started
There´s probably a lot more, but that´s all I remember offhand... this release should be a lot closer to the quality of v0.005a, but still needs a bit more polishing.
2005-06-12 08:15:22 +00:00
byuu a60f667b25 Update to bsnes v006 release.
The rewrite is now complete. I finished adding frameskip, and fixed some crashing issues with loading multiple ROMs. I wrapped all malloc/free calls with memalloc/memfree, which are custom functions that log each call, and let you pass sprintf-style arguments to them to debug memory leaks. Don´t see any, nor have I noticed any in bsnes; but it makes a nice test tool anyway.
I found out today that the mvn/mvp instructions actually set the DB register to the destination bank. Weird. This fixed Final Fantasy V, Chrono Trigger, and Dragon Quest III (which now runs as a result) graphics. Not all of them, but quite a few. I had also previously been setting the M/X flags of the P register when xce was executed. I never anticipated a game using xce while in native mode to switch to... native mode... but apparently, Chrono Trigger does. And my code was incorrect. So now Chrono Trigger gets past the name select screen, but dies a few screens after still.
The only really major flaw I am aware of that bsnes v0.005 did not have is with the battle screens in Squaresoft games. I get horrible flickering and "crushed scanlines" every other frame on them, for some reason. I´ll try and track that down for the next release, but I didn´t want to hold up a new release any longer. As a result, I´ll leave up v0.005a for the time being until I get this problem fixed.
2005-05-13 12:03:02 +00:00
byuu 6f7cf1bd31 Update to bsnes v005a release.
[No changelog available]
2005-02-06 04:04:32 +00:00
byuu 8751bc433f Update to bsnes v005 release.
Released a new version of bsnes today. Version 0.0.005 is up on the main page now.
The changes since .004 wip10 include: DRAM timing fix (now occurs mid-opcode), memory address speed fix, added CPU cycle condition 4 to all opcodes that use it, and fixed a bug where DRAM refresh was not changing start positions every other scanline.
With the new version, Chrono Trigger should get a little further, and Final Fantasy 5 should get in-game now. The only problem FF5 seems to have is sprite corrution in the menus. I´m too busy with the CPU timing to mess around with the PPU right now, though. Also, the APU is not bridged to the CPU in this release, so compatibility is (still) really low.
After I get the APU working fairly well, I´ll (try and) start keeping a what´s new file so that people can know what all changed between public releases of the emulator without having to follow this page. Sorry for the inconvenience in the mean time.

[No archive available]
2005-02-05 00:00:00 +00:00
byuu afbee40bc0 Update to bsnes v004 release.
[No changelog available]

[No archive available]
2004-12-24 00:00:00 +00:00
byuu 81e9be64d2 Update to bsnes v003r01 release.
[No changelog available]

[No archive available]
2004-12-13 00:00:00 +00:00
byuu 0cd4972d11 Update to bsnes v002 ir11 release.
Doubled the width of sprites when the width of the screen is 512. The SNES Test Program now runs through all of the character test correctly. The windows are off-by-one though.
Added the very bizarre 00:4300-00:437f memory region that is unique from 7e:4300-7e:437f. Then I added read support from $2180. This allowed the SNES Test Program to not crash after failing the electronics test, and it also fixed the horrible graphics corruption in Der Langrisser.
The fonts were still failing, so I went in with my tracer and found out what was causing it. The following code:
	gx816->regs.pc += (signed char)(arg + 2);
This is the code used to increment the pc counter after relative branches. The problem is that I had parinthesis around the + 2 as well as arg. Therefore, if arg was 0x7e, 0x7f, 0xfe, or 0xff, it would change the sign. This would in turn make the program counter off by 256 bytes. Very bad. Fixing this fixed the font in Der Langrisser, and also fixed Super Mario World, when Yoshi spits a turtle out, the game will no longer crash.
Next, via the Der Langrisser world map, I realized that anomie´s description of the BG/mode7 register latches was reversed: the BG registers (may) share a common latch between all of them, but the mode7 registers do not. I removed the common latches from the mode7 regs, but I haven´t added the latch to the BG registers yet.
I also realized that clearing the entire screen on a BG mode change would probably not be a good thing for games that change video modes mid-frame. So I tried working on getting the weird single-frame garble that pops up every minute or so to go away, but to no avail. I´m having a difficult time tracking down the exact cause of the error, but I believe it to be a buffer overflow, or something along those lines.

[No archive available]
2004-12-11 00:00:00 +00:00
byuu 938609818f Update to bsnes v002 ir9 release.
[No changelog available]
2004-12-07 01:12:32 +00:00
byuu 487491e6f2 Update to bsnes v002 ir7 release.
The bug in the Bahamut Lagoon mode7 screens turned out to be that I never added the dividend result to $4216/$4217. It always returned the multiplication of $4202/$4203. This also fixed the sprites in battles for Dai Kaijuu Monogatari. I added a bunch of window stuff, including a double size windowed mode, and a fullscreen mode. Lots of fixes to the interface, as well as code cleanup. It's still pretty buggy, there's a lot of variables to keep up with in the GUI at present...
I also added better tile caching, I just cache all tiles when they are rendered, for all 3 color depths (4, 16, 256). Seems to help a little. A portion of the speed gain was lost by fixing the dividend result, though. Very strange, since I wouldn't think much work would go into a simple line of code that's called 20 times a frame probably at best... oh well.

[No archive available]
2004-12-05 00:00:00 +00:00
byuu a6ccc7e5d2 Update to unreleased version.
First, I fixed some issues with the mode7 / scroll regs thanks to info from anomie. Qwertie's mode7 demo runs without modification now. Next, I fixed a small glitch with tiles getting cut off on the right edge of the screen, fixes some flickering on the edges in Zelda 3. Finally, I added tile caching to all 4 BG layers. It didn't really increase speed by much (~10%), and upped the RAM requirements by 1.2mb... I left the old code in case I need to fall back on it. My only guess (hope) is that the bottleneck lies somewhere else...

[No archive available]
2004-12-04 00:00:00 +00:00
byuu 39dd39cc09 Update to unreleased version.
Had a small glitch in the OAM $2102/$2103 register settings, fixed that and now both Zelda 3 and Super Mario World always show sprites perfectly. The only error to my knowledge in the below screenshots is that the large version of the mario sprite in the third pic is not shown at the top left of the screen. Which could be because I have no mosaic support. But at any rate, both games should be completely playable now, albeit very slowly. I tried to speed up things by caching some stuff in the PPU, but I couldn't find a nice way to implement it that would result in a significant speed increase. Oh yeah, Zelda won't follow you in Zelda 3, but you can just go to the throne room and push the picture to the right yourself, and she'll appear when you reach the sanctuary.
I also updated the debugger, it uses a smaller font, which is a bit harder to read, but saves a lot of screen space. This will definately be needed when I add in more of the debugging windows in the future, so it's better to get used to it now than later.

[No archive available]
2004-11-27 00:00:00 +00:00
byuu 1a017ff697 Update to unreleased version.
Added SRAM support. It's compatible with other emulators. It maps both the LoROM SRAM between $700000-$7dffff, and HiROM SRAM between $3n6000-$3n7fff (where n = 0 - f).
Modified the screen to redraw at scanline 224, instead of 0. Fixes some flickering between screens in some games.
Moved the lighting adjustment code ($2100 bits 0-3) directly into the PPU, rather than outside in the platform-specific code. This is because games have the ability to adjust this value per scanline. Also allowed the games to control the background enable ($2100 bit 7) flag per scanline now. This allowed Bahamut Lagoon's dragon intro to work.
I then added mode2 support, so now all that's missing is modes 5 and 6 (interlaced).
I also created an easy #define to select between the public domain mode7 code I wrote, and the snes9x mode7 code. I'll go through one of these days and rewrite the snes9x code in a clean environment (e.g. without using the current mode7 file as a reference) to avoid the issue altogether, but for now... the snes9x code is twice as fast, and that's good enough for me.
Lastly, I also added in a trace checkbox to enable tracing. As such, the zip file of my work up now has debug mode enabled by default. I really need an overhaul of the gui implementation, and a configuration file. I have a very nice string library system (that I wrote myself) that I would love to take advantage of in this project.
Here's some screenshots of the dragon intro. Lots of HDMA here, showing that I pretty much have HDMA down, now. I remember zsnes used to have a problem with these screens, and had to do something with an HDMA hack to get around it. They figured out what the problem was, eventually. I was actually quite surprised my emulator does not suffer from this same problem. Lucky for me, as they never did mention what the problem was to begin with. The HDMA is technically drawing too soon (at the start of the scanline instead of the end) which probably messes things up a bit, and I'm guessing the scroll registers are screwing up in one or two of the below pics. No mosaic support either.

[No archive available]
2004-11-21 00:00:00 +00:00
byuu 591adfcb25 Update to unreleased version.
Initial release

[No archive available]
2004-10-14 00:00:00 +00:00
2347 changed files with 31195 additions and 212198 deletions

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linux-x86_64-binaries_task:
container:
image: ubuntu:latest
setup_script:
- apt-get update && apt-get -y install build-essential libgtk2.0-dev libpulse-dev mesa-common-dev libgtksourceview2.0-dev libcairo2-dev libsdl2-dev libxv-dev libao-dev libopenal-dev libudev-dev zip
compile_script:
- make -C higan target=higan local=false
- make -C icarus
- make -C genius
package_script:
- mkdir higan-nightly
- cp -a higan/out/higan higan-nightly/higan
- cp -a higan/System higan-nightly
- cp -a icarus/out/icarus higan-nightly/icarus
- cp -a icarus/Database higan-nightly
- cp -a icarus/Firmware higan-nightly
- cp -a genius/out/genius higan-nightly/genius
- cp -a GPLv3.txt higan-nightly
- zip -r higan-nightly.zip higan-nightly
higan-nightly_artifacts:
path: "higan-nightly.zip"
freebsd-x86_64-binaries_task:
freebsd_instance:
image: freebsd-12-0-release-amd64
setup_script:
- pkg install --yes gmake gdb gcc8 pkgconf sdl2 openal-soft gtksourceview2 libXv zip
compile_script:
- gmake -C higan target=higan local=false
- gmake -C icarus
- gmake -C genius
package_script:
- mkdir higan-nightly
- cp -a higan/out/higan higan-nightly/higan
- cp -a higan/System higan-nightly
- cp -a icarus/out/icarus higan-nightly/icarus
- cp -a icarus/Database higan-nightly
- cp -a icarus/Firmware higan-nightly
- cp -a genius/out/genius higan-nightly/genius
- cp -a GPLv3.txt higan-nightly
- zip -r higan-nightly.zip higan-nightly
higan-nightly_artifacts:
path: "higan-nightly.zip"
windows-x86_64-binaries_task:
container:
image: ubuntu:latest
setup_script:
- apt-get update && apt-get -y install build-essential mingw-w64 zip
compile_script:
- make -C higan target=higan local=false platform=windows compiler="x86_64-w64-mingw32-g++" windres="x86_64-w64-mingw32-windres"
- make -C icarus platform=windows compiler="x86_64-w64-mingw32-g++" windres="x86_64-w64-mingw32-windres"
package_script:
- mkdir higan-nightly
- cp -a higan/out/higan higan-nightly/higan.exe
- cp -a icarus/out/icarus higan-nightly/icarus.exe
- cp -a higan/System higan-nightly/Templates
- mkdir higan-nightly/Systems
- cp -a icarus/Database higan-nightly
- cp -a icarus/Firmware higan-nightly
- cp -a GPLv3.txt higan-nightly
- echo "templates: ./Templates/" >> higan-nightly/paths.bml
- echo "data: ./Systems/" >> higan-nightly/paths.bml
- zip -r higan-nightly.zip higan-nightly
higan-nightly_artifacts:
path: "higan-nightly.zip"
macOS-x86_64-binaries_task:
osx_instance:
image: mojave-base
compile_script:
- make -C higan target=higan local=false
- make -C icarus
package_script:
- mkdir higan-nightly
- cp -a higan/out/higan.app higan-nightly
- cp -a higan/System higan-nightly
- cp -a icarus/out/icarus.app higan-nightly
- cp -a icarus/Database higan-nightly
- cp -a icarus/Firmware higan-nightly
- cp -a GPLv3.txt higan-nightly
- zip -r higan-nightly.zip higan-nightly
higan-nightly_artifacts:
path: "higan-nightly.zip"
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*.fs linguist-detectable=false
*.vs linguist-detectable=false
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patreon: byuu
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Contributing
============
Code contributions are most welcome and highly appreciated!
But first, please note that although higan is licensed under the GPLv3 license,
in order to be merged upstream, any code contributions must be provided under
the ISC source code license.
This is *not* a CLA (community license agreement), no legal contract needs to be
signed, and you will maintain full and exclusive copyright ownership over any
contributed source code.
There are two reasons for this requirement:
GPLv4+
------
higan is currently licensed under the GPLv3 license only. I do not license higan
under the GPLv3 or later license, because there is no way of knowing what the
GPLv4 and later licenses will change, and if they will be in the best interests
of emulator development and video game preservation.
Although I put a good deal of trust into the FSF, no one is an oracle that can
predict the future. Would *you* agree to a license before being able to read it?
However, the GPLv4 may prove beneficial, and close important holes in the GPLv3
license, just as the GPLv3 license closed the GPLv2's TiVoization loophole. And
so it is important that higan retains the option of relicensing to the GPLv4+ in
the future.
As a point of interest, there have been projects with similar concerns about
using a GPLv2 or later clause, that are now permanently stuck on the GPLv2
license. There have also been projects that did use a GPLv2 or later clause,
only to disagree with the changes introduced in the GPLv3.
ISC
---
The more important reason for this requirement is that it is my intention to
release the entirety of higan under the ISC license once official upstream
development has ceased.
The reason I would want to relicense higan to the ISC license upon its official
discontinuation is because once again, no one is an oracle, and I cannot predict
what future issues higan permanently remaining under the GPLv3 license may
cause.
For instance, imagine a world where a certain vendor took over the world, and
the only way to distribute applications was with their approval, and their store
rules forbade GPLv3 software. Or perhaps a world where the GPL was abandoned in
favor of the new OSSv1 license. But GPLv3 software was incompatible with the
OSSv1 license. Other open source developers would not be able to use higan in
that scenario.
It would be very disappointing if all of our work ended up unusable 50+ years
into the future because it was permanently bound to the GPLv3 license.
GPLv3
-----
The reason I use the GPLv3 license currently is because it is a balance between
altruism and self-interest. The GPLv3 allows other vendors to sell my own code
without sharing revenue with me, and indeed this has already happened. But the
GPLv3 also prevents other vendors from improving upon higan without sharing
their work with everyone else as I have.
While I am actively developing higan, I do not wish to compete against myself.
As such, I believe the GPLv3 is the best license during active development, and
the ISC is the best license once higan is officially discontinued.
Considerations
--------------
This is the part that should concern you as a contributor: I am not requesting
contributed source code to be released under the ISC so that I personally may
sell GPLv3 commercial license exemptions to your work, but in the future when
higan is released under the ISC license, that will open the door for anyone to
sell the work commercially in a closed source form.
If this is not acceptable to you, I wholly understand and I welcome you to
release your work under the GPLv3 in the form of a higan fork. And if your work
is not an essential part of the core emulation -- that is to say, it may be
optionally disabled -- then I am still willing to work with you in merging such
work upstream anyway under the full GPLv3 license, but please reach out to me
first before developing under the assumption your work will be merged upstream.
Thank you very much for reading and hopefully for your understanding.
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higan was created and is maintained by byuu (Near), but many people have contributed to the project.
This software would not be where it is today without the help and support of the following individuals:
- Andreas Naive
- Ange Albertini
- anomie
- AWJ
- Bisqwit
- blargg
- Łukasz Krawczyk
- Danish
- DerKoun
- DMV27
- Dr. Decapitator
- endrift
- Fatbag
- FitzRoy
- gekkio
- GIGO
- Hendricks266
- hex_usr
- ikari_01
- jchadwick
- Jonas Quinn
- kode54
- krom
- Lioncash
- Lord Nightmare
- lowkey
- Matthew Callis
- Max833
- MerryMage
- mightymo
- Nach
- ncbncb
- neviksti
- OV2
- Overload
- p4plus2
- quequotion
- RedDwarf
- Richard Bannister
- Ryphecha
- segher
- Sintendo
- SuperMikeMan
- Talarubi
- tetsuo55
- TmEE
- TRAC
- wareya
- zones
If your contributions have been missed here, please reach out [here](https://byuu.org/contact) to have this corrected, thank you!
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GNU GENERAL PUBLIC LICENSE
Version 3, 29 June 2007
Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The GNU General Public License is a free, copyleft license for
software and other kinds of works.
The licenses for most software and other practical works are designed
to take away your freedom to share and change the works. By contrast,
the GNU General Public License is intended to guarantee your freedom to
share and change all versions of a program--to make sure it remains free
software for all its users. We, the Free Software Foundation, use the
GNU General Public License for most of our software; it applies also to
any other work released this way by its authors. You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
them if you wish), that you receive source code or can get it if you
want it, that you can change the software or use pieces of it in new
free programs, and that you know you can do these things.
To protect your rights, we need to prevent others from denying you
these rights or asking you to surrender the rights. Therefore, you have
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TERMS AND CONDITIONS
0. Definitions.
"This License" refers to version 3 of the GNU General Public License.
"Copyright" also means copyright-like laws that apply to other kinds of
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"The Program" refers to any copyrightable work licensed under this
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A "covered work" means either the unmodified Program or a work based
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To "propagate" a work means to do anything with it that, without
permission, would make you directly or secondarily liable for
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public, and in some countries other activities as well.
To "convey" a work means any kind of propagation that enables other
parties to make or receive copies. Mere interaction with a user through
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An interactive user interface displays "Appropriate Legal Notices"
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1. Source Code.
The "source code" for a work means the preferred form of the work
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The "System Libraries" of an executable work include anything, other
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The Corresponding Source need not include anything that users
can regenerate automatically from other parts of the Corresponding
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The Corresponding Source for a work in source code form is that
same work.
2. Basic Permissions.
All rights granted under this License are granted for the term of
copyright on the Program, and are irrevocable provided the stated
conditions are met. This License explicitly affirms your unlimited
permission to run the unmodified Program. The output from running a
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You may make, run and propagate covered works that you do not
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You may convey verbatim copies of the Program's source code as you
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You may convey a covered work in object code form under the terms
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customarily used for software interchange.
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(including a physical distribution medium), accompanied by a
written offer, valid for at least three years and valid for as
long as you offer spare parts or customer support for that product
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copy of the Corresponding Source for all the software in the
product that is covered by this License, on a durable physical
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If you convey an object code work under this section in, or with, or
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7. Additional Terms.
"Additional permissions" are terms that supplement the terms of this
License by making exceptions from one or more of its conditions.
Additional permissions that are applicable to the entire Program shall
be treated as though they were included in this License, to the extent
that they are valid under applicable law. If additional permissions
apply only to part of the Program, that part may be used separately
under those permissions, but the entire Program remains governed by
this License without regard to the additional permissions.
When you convey a copy of a covered work, you may at your option
remove any additional permissions from that copy, or from any part of
it. (Additional permissions may be written to require their own
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Notwithstanding any other provision of this License, for material you
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terms of sections 15 and 16 of this License; or
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author attributions in that material or in the Appropriate Legal
Notices displayed by works containing it; or
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All other non-permissive additional terms are considered "further
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received it, or any part of it, contains a notice stating that it is
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a further restriction but permits relicensing or conveying under this
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If you add terms to a covered work in accord with this section, you
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Additional terms, permissive or non-permissive, may be stated in the
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the above requirements apply either way.
8. Termination.
You may not propagate or modify a covered work except as expressly
provided under this License. Any attempt otherwise to propagate or
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this License (including any patent licenses granted under the third
paragraph of section 11).
However, if you cease all violation of this License, then your
license from a particular copyright holder is reinstated (a)
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finally terminates your license, and (b) permanently, if the copyright
holder fails to notify you of the violation by some reasonable means
prior to 60 days after the cessation.
Moreover, your license from a particular copyright holder is
reinstated permanently if the copyright holder notifies you of the
violation by some reasonable means, this is the first time you have
received notice of violation of this License (for any work) from that
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your receipt of the notice.
Termination of your rights under this section does not terminate the
licenses of parties who have received copies or rights from you under
this License. If your rights have been terminated and not permanently
reinstated, you do not qualify to receive new licenses for the same
material under section 10.
9. Acceptance Not Required for Having Copies.
You are not required to accept this License in order to receive or
run a copy of the Program. Ancillary propagation of a covered work
occurring solely as a consequence of using peer-to-peer transmission
to receive a copy likewise does not require acceptance. However,
nothing other than this License grants you permission to propagate or
modify any covered work. These actions infringe copyright if you do
not accept this License. Therefore, by modifying or propagating a
covered work, you indicate your acceptance of this License to do so.
10. Automatic Licensing of Downstream Recipients.
Each time you convey a covered work, the recipient automatically
receives a license from the original licensors, to run, modify and
propagate that work, subject to this License. You are not responsible
for enforcing compliance by third parties with this License.
An "entity transaction" is a transaction transferring control of an
organization, or substantially all assets of one, or subdividing an
organization, or merging organizations. If propagation of a covered
work results from an entity transaction, each party to that
transaction who receives a copy of the work also receives whatever
licenses to the work the party's predecessor in interest had or could
give under the previous paragraph, plus a right to possession of the
Corresponding Source of the work from the predecessor in interest, if
the predecessor has it or can get it with reasonable efforts.
You may not impose any further restrictions on the exercise of the
rights granted or affirmed under this License. For example, you may
not impose a license fee, royalty, or other charge for exercise of
rights granted under this License, and you may not initiate litigation
(including a cross-claim or counterclaim in a lawsuit) alleging that
any patent claim is infringed by making, using, selling, offering for
sale, or importing the Program or any portion of it.
11. Patents.
A "contributor" is a copyright holder who authorizes use under this
License of the Program or a work on which the Program is based. The
work thus licensed is called the contributor's "contributor version".
A contributor's "essential patent claims" are all patent claims
owned or controlled by the contributor, whether already acquired or
hereafter acquired, that would be infringed by some manner, permitted
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but do not include claims that would be infringed only as a
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Each contributor grants you a non-exclusive, worldwide, royalty-free
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In the following three paragraphs, a "patent license" is any express
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(such as an express permission to practice a patent or covenant not to
sue for patent infringement). To "grant" such a patent license to a
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patent against the party.
If you convey a covered work, knowingly relying on a patent license,
and the Corresponding Source of the work is not available for anyone
to copy, free of charge and under the terms of this License, through a
publicly available network server or other readily accessible means,
then you must either (1) cause the Corresponding Source to be so
available, or (2) arrange to deprive yourself of the benefit of the
patent license for this particular work, or (3) arrange, in a manner
consistent with the requirements of this License, to extend the patent
license to downstream recipients. "Knowingly relying" means you have
actual knowledge that, but for the patent license, your conveying the
covered work in a country, or your recipient's use of the covered work
in a country, would infringe one or more identifiable patents in that
country that you have reason to believe are valid.
If, pursuant to or in connection with a single transaction or
arrangement, you convey, or propagate by procuring conveyance of, a
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receiving the covered work authorizing them to use, propagate, modify
or convey a specific copy of the covered work, then the patent license
you grant is automatically extended to all recipients of the covered
work and works based on it.
A patent license is "discriminatory" if it does not include within
the scope of its coverage, prohibits the exercise of, or is
conditioned on the non-exercise of one or more of the rights that are
specifically granted under this License. You may not convey a covered
work if you are a party to an arrangement with a third party that is
in the business of distributing software, under which you make payment
to the third party based on the extent of your activity of conveying
the work, and under which the third party grants, to any of the
parties who would receive the covered work from you, a discriminatory
patent license (a) in connection with copies of the covered work
conveyed by you (or copies made from those copies), or (b) primarily
for and in connection with specific products or compilations that
contain the covered work, unless you entered into that arrangement,
or that patent license was granted, prior to 28 March 2007.
Nothing in this License shall be construed as excluding or limiting
any implied license or other defenses to infringement that may
otherwise be available to you under applicable patent law.
12. No Surrender of Others' Freedom.
If conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot convey a
covered work so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you may
not convey it at all. For example, if you agree to terms that obligate you
to collect a royalty for further conveying from those to whom you convey
the Program, the only way you could satisfy both those terms and this
License would be to refrain entirely from conveying the Program.
13. Use with the GNU Affero General Public License.
Notwithstanding any other provision of this License, you have
permission to link or combine any covered work with a work licensed
under version 3 of the GNU Affero General Public License into a single
combined work, and to convey the resulting work. The terms of this
License will continue to apply to the part which is the covered work,
but the special requirements of the GNU Affero General Public License,
section 13, concerning interaction through a network will apply to the
combination as such.
14. Revised Versions of this License.
The Free Software Foundation may publish revised and/or new versions of
the GNU General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the
Program specifies that a certain numbered version of the GNU General
Public License "or any later version" applies to it, you have the
option of following the terms and conditions either of that numbered
version or of any later version published by the Free Software
Foundation. If the Program does not specify a version number of the
GNU General Public License, you may choose any version ever published
by the Free Software Foundation.
If the Program specifies that a proxy can decide which future
versions of the GNU General Public License can be used, that proxy's
public statement of acceptance of a version permanently authorizes you
to choose that version for the Program.
Later license versions may give you additional or different
permissions. However, no additional obligations are imposed on any
author or copyright holder as a result of your choosing to follow a
later version.
15. Disclaimer of Warranty.
THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
16. Limitation of Liability.
IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES.
17. Interpretation of Sections 15 and 16.
If the disclaimer of warranty and limitation of liability provided
above cannot be given local legal effect according to their terms,
reviewing courts shall apply local law that most closely approximates
an absolute waiver of all civil liability in connection with the
Program, unless a warranty or assumption of liability accompanies a
copy of the Program in return for a fee.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
state the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <https://www.gnu.org/licenses/>.
Also add information on how to contact you by electronic and paper mail.
If the program does terminal interaction, make it output a short
notice like this when it starts in an interactive mode:
<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".
You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<https://www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<https://www.gnu.org/licenses/why-not-lgpl.html>.
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@@ -1,45 +0,0 @@
----------------------------------------------------------------------
higan - Suite of videogame emulators
icarus - Game library importer for higan
genius - Game database editor for higan
Copyright © 2004-2019 byuu
https://byuu.org
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, specifically version 3 of the License
and no other version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <https://www.gnu.org/licenses/>.
----------------------------------------------------------------------
----------------------------------------------------------------------
libco - C cooperative threading library
nall - C++ template library
ruby - Hardware abstraction library
hiro - User interface library
Copyright © 2006-2019 byuu
Permission to use, copy, modify, and/or distribute this software for
any purpose with or without fee is hereby granted, provided that the
above copyright notice and this permission notice appear in all
copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
PERFORMANCE OF THIS SOFTWARE.
----------------------------------------------------------------------
-60
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@@ -1,60 +0,0 @@
higan
=====
![higan logo © byuu](https://byuu.org/images/higan/github/byuu-higan-logo.png)
higan is a multi-system emulator from [byuu](https://byuu.org/about) with an
uncompromising focus on accuracy and code readability.
It is a research project meant to improve all emulators through open source
collaboration, and as such is not meant to be used as a standard emulator for
playing games (although it can be used as such with some patience.)
Testing is greatly appreciated so that the emulation quality can be improved.
Such improvements will migrate downstream to user-focused emulators such as
bsnes.
It currently emulates the following systems: Famicom, Famicom Disk System,
Super Famicom, Super Game Boy, Game Boy, Game Boy Color, Game Boy Advance,
Game Boy Player, SG-1000, SC-3000, Master System, Game Gear, Mega Drive,
Mega CD, PC Engine, SuperGrafx, MSX, MSX2, ColecoVision, Neo Geo Pocket,
Neo Geo Pocket Color, WonderSwan, WonderSwan Color, SwanCrystal,
Pocket Challenge V2.
Development
-----------
Git is used for the development of new releases, and represents a staging
environment. As higan is rather mature, things should generally be quite stable.
However, bugs will exist, regressions will occur, so proceed at your own risk.
If stability is required, please download the latest stable release from the
[official website.](https://byuu.org/higan)
Links
-----
- [Official website](https://byuu.org/higan)
- [Official git repository](https://github.com/byuu/higan)
- [Donations](https://patreon.com/byuu)
Release Builds
--------------
- [Windows binaries](https://byuu.itch.io/higan)
Nightly Builds
--------------
- [Download](https://cirrus-ci.com/github/byuu/higan/master)
- ![Build status](https://api.cirrus-ci.com/github/byuu/higan.svg?task=windows-x86_64-binaries)
- ![Build status](https://api.cirrus-ci.com/github/byuu/higan.svg?task=macOS-x86_64-binaries)
- ![Build status](https://api.cirrus-ci.com/github/byuu/higan.svg?task=linux-x86_64-binaries)
- ![Build status](https://api.cirrus-ci.com/github/byuu/higan.svg?task=freebsd-x86_64-binaries)
Preview
-------
![higan user interface © byuu](https://byuu.org/images/higan/github/byuu-higan-user-interface.png)
![higan running Bahamut Lagoon (SNES) © byuu](https://byuu.org/images/higan/github/byuu-higan-bahamut-lagoon.png)
![higan running Riviera (GBA) © byuu](https://byuu.org/images/higan/github/byuu-higan-riviera.png)
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# Applies contrast adjust filter to video output when enabled
# Works by lowering the brightness of darker colors,
# while leaving brighter colors alone; thus reducing saturation
# (default = true)
snes.video_color_curve = true
# Selects color adjustment filter for video output
# 0 = Normal (no filter, rgb555)
# 1 = Grayscale mode (l5)
# 2 = VGA mode (rgb332)
# 3 = Genesis mode (rgb333)
# (default = 0)
snes.video_color_adjust_mode = 0
# Mutes SNES audio output when enabled
# (default = true)
snes.mute = false
# Regulate speed to 60hz (NTSC) / 50hz (PAL)
# (default = true)
system.regulate_speed = true
# Video mode
# 0 = 256x224w
# 1 = 512x448w
# 2 = 960x720w
# 3 = 640x480f
# 4 = 1024x768f
# (default = 1)
video.mode = 1
# Use Video RAM instead of System RAM
# (default = true)
video.use_vram = true
# Wait for vertical retrace when updating screen
# (default = false)
video.vblank = false
# Show framerate in window title
# (default = true)
gui.show_fps = true
# Joypad1 up
# (default = 0x26)
input.joypad1.up = 0x26
# Joypad1 down
# (default = 0x28)
input.joypad1.down = 0x28
# Joypad1 left
# (default = 0x25)
input.joypad1.left = 0x25
# Joypad1 right
# (default = 0x27)
input.joypad1.right = 0x27
# Joypad1 A
# (default = 0x58)
input.joypad1.a = 0x58
# Joypad1 B
# (default = 0x5a)
input.joypad1.b = 0x5a
# Joypad1 X
# (default = 0x53)
input.joypad1.x = 0x53
# Joypad1 Y
# (default = 0x41)
input.joypad1.y = 0x41
# Joypad1 L
# (default = 0x44)
input.joypad1.l = 0x44
# Joypad1 R
# (default = 0x43)
input.joypad1.r = 0x43
# Joypad1 select
# (default = 0x10)
input.joypad1.select = 0x10
# Joypad1 start
# (default = 0xd)
input.joypad1.start = 0xd
# Joypad2 up
# (default = 0x54)
input.joypad2.up = 0x54
# Joypad2 down
# (default = 0x47)
input.joypad2.down = 0x47
# Joypad2 left
# (default = 0x46)
input.joypad2.left = 0x46
# Joypad2 right
# (default = 0x48)
input.joypad2.right = 0x48
# Joypad2 A
# (default = 0x4b)
input.joypad2.a = 0x4b
# Joypad2 B
# (default = 0x4a)
input.joypad2.b = 0x4a
# Joypad2 X
# (default = 0x49)
input.joypad2.x = 0x49
# Joypad2 Y
# (default = 0x55)
input.joypad2.y = 0x55
# Joypad2 L
# (default = 0x4f)
input.joypad2.l = 0x4f
# Joypad2 R
# (default = 0x4c)
input.joypad2.r = 0x4c
# Joypad2 select
# (default = 0x5b)
input.joypad2.select = 0x5b
# Joypad2 start
# (default = 0x5d)
input.joypad2.start = 0x5d
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name := genius
build := stable
flags += -I..
nall.path := ../nall
include $(nall.path)/GNUmakefile
hiro.path := ../hiro
hiro.resource := data/$(name).rc
include $(hiro.path)/GNUmakefile
objects := obj/genius.o
obj/genius.o: genius.cpp
all: $(hiro.objects) $(objects)
$(info Linking out/$(name) ...)
+@$(compiler) -o out/$(name) $(hiro.objects) $(objects) $(hiro.options) $(options)
ifeq ($(platform),macos)
rm -rf out/$(name).app
mkdir -p out/$(name).app/Contents/MacOS/
mkdir -p out/$(name).app/Contents/Resources/
mv out/$(name) out/$(name).app/Contents/MacOS/$(name)
cp data/$(name).plist out/$(name).app/Contents/Info.plist
sips -s format icns data/$(name).png --out out/$(name).app/Contents/Resources/$(name).icns
endif
verbose: hiro.verbose nall.verbose all;
clean:
ifeq ($(platform),macos)
rm -rf out/$(name).app
endif
$(call delete,obj/*)
$(call delete,out/*)
install: all
ifeq ($(platform),macos)
cp -R out/$(name).app /Applications/$(name).app
else ifneq ($(filter $(platform),linux bsd),)
mkdir -p $(prefix)/bin/
mkdir -p $(prefix)/share/applications/
mkdir -p $(prefix)/share/icons/
mkdir -p $(prefix)/share/$(name)/
cp out/$(name) $(prefix)/bin/$(name)
cp data/$(name).desktop $(prefix)/share/applications/$(name).desktop
cp data/$(name).png $(prefix)/share/icons/$(name).png
endif
uninstall:
ifeq ($(platform),macos)
rm -rf /Applications/$(name).app
else ifneq ($(filter $(platform),linux bsd),)
rm -f $(prefix)/bin/$(name)
rm -f $(prefix)/share/applications/$(name).desktop
rm -f $(prefix)/share/icons/$(name).png
endif
-include obj/*.d
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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
<assembly xmlns="urn:schemas-microsoft-com:asm.v1" manifestVersion="1.0">
<assemblyIdentity type="win32" name="genius" version="1.0.0.0" processorArchitecture="*"/>
<dependency>
<dependentAssembly>
<assemblyIdentity type="win32" name="Microsoft.Windows.Common-Controls" version="6.0.0.0" processorArchitecture="*" publicKeyToken="6595b64144ccf1df" language="*"/>
</dependentAssembly>
</dependency>
<asmv3:application xmlns:asmv3="urn:schemas-microsoft-com:asm.v3">
<asmv3:windowsSettings>
<dpiAware xmlns="http://schemas.microsoft.com/SMI/2005/WindowsSettings">true/pm</dpiAware>
<dpiAwareness xmlns="http://schemas.microsoft.com/SMI/2016/WindowsSettings">PerMonitorV2, PerMonitor</dpiAwareness>
</asmv3:windowsSettings>
</asmv3:application>
</assembly>
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[Desktop Entry]
Name=genius
Comment=Emulator
Exec=genius
Icon=genius
Terminal=false
Type=Application
Categories=Game;Emulator;
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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
<plist version="1.0">
<dict>
<key>CFBundleIdentifier</key>
<string>org.byuu.genius</string>
<key>CFBundleDisplayName</key>
<string>genius</string>
<key>CFBundleExecutable</key>
<string>genius</string>
<key>CFBundleIconFile</key>
<string>genius.icns</string>
<key>NSHighResolutionCapable</key>
<true/>
<key>NSSupportsAutomaticGraphicsSwitching</key>
<true/>
</dict>
</plist>
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1 24 "genius.Manifest"
2 ICON DISCARDABLE "genius.ico"
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#include <nall/nall.hpp>
using namespace nall;
#include <hiro/hiro.hpp>
using namespace hiro;
#include "genius.hpp"
namespace Instances {
Instance<ListWindow> listWindow;
Instance<GameWindow> gameWindow;
Instance<MemoryWindow> memoryWindow;
Instance<OscillatorWindow> oscillatorWindow;
}
ListWindow& listWindow = Instances::listWindow();
GameWindow& gameWindow = Instances::gameWindow();
MemoryWindow& memoryWindow = Instances::memoryWindow();
OscillatorWindow& oscillatorWindow = Instances::oscillatorWindow();
//
ListWindow::ListWindow() {
fileMenu.setText("File");
newAction.setText("New").onActivate([&] { newDatabase(); });
openAction.setText("Open ...").onActivate([&] {
if(auto location = BrowserDialog().setAlignment(*this).setFilters({"*.bml"}).openFile()) {
loadDatabase(location);
}
});
saveAction.setText("Save").onActivate([&] {
if(!location) return saveAsAction.doActivate();
saveDatabase(location);
});
saveAsAction.setText("Save As ...").onActivate([&] {
if(auto location = BrowserDialog().setAlignment(*this).setFilters({"*.bml"}).saveFile()) {
saveDatabase(location);
}
});
quitAction.setText("Quit").onActivate([&] { quit(); });
helpMenu.setText("Help");
aboutAction.setText("About ...").onActivate([&] {
AboutDialog()
.setName("genius")
.setVersion("1")
.setCopyright("byuu")
.setLicense("GPLv3")
.setWebsite("https://byuu.org")
.setAlignment(*this)
.show();
});
layout.setPadding(5);
gameList.setHeadered();
gameList.onActivate([&](auto cell) { modifyButton.doActivate(); });
gameList.onChange([&] { updateWindow(); });
appendButton.setText("Append").onActivate([&] {
setEnabled(false);
gameWindow.show();
});
modifyButton.setText("Modify").onActivate([&] {
if(auto item = gameList.selected()) {
setEnabled(false);
gameWindow.show(games[item.offset()]);
}
});
removeButton.setText("Remove").onActivate([&] { removeGame(); });
onClose([&] { quit(); });
setSize({820, 600});
reloadList();
updateWindow();
setAlignment(Alignment::Center);
}
auto ListWindow::quit() -> void {
if(!modified || MessageDialog().setAlignment(*this).setText({
"Are you sure you want to quit without saving your changes?"
}).question() == "Yes") {
Application::quit();
}
}
auto ListWindow::reloadList() -> void {
gameList.reset();
gameList.append(TableViewColumn().setText("Name").setExpandable());
gameList.append(TableViewColumn().setText("Region"));
gameList.append(TableViewColumn().setText("Revision"));
gameList.append(TableViewColumn().setText("Board"));
for(auto& game : games) {
TableViewItem item{&gameList};
item.append(TableViewCell().setText(game.name));
item.append(TableViewCell().setText(game.region));
item.append(TableViewCell().setText(game.revision));
item.append(TableViewCell().setText(game.board));
}
Application::processEvents();
gameList.resizeColumns();
}
auto ListWindow::updateWindow() -> void {
modifyButton.setEnabled((bool)gameList.selected());
removeButton.setEnabled((bool)gameList.selected());
string name = Location::base(location);
if(!name) name = "(Untitled)";
setTitle({modified ? "*" : "", name, " [", games.size(), "] - genius"});
}
auto ListWindow::newDatabase() -> void {
games.reset();
modified = false;
location = "";
reloadList();
updateWindow();
}
auto ListWindow::loadDatabase(string location) -> void {
auto document = BML::unserialize(string::read(location));
games.reset();
for(auto node : document.find("game")) {
Game game;
game.sha256 = node["sha256"].text();
game.label = node["label"].text();
game.name = node["name"].text();
game.region = node["region"].text();
game.revision = node["revision"].text();
game.board = node["board"].text();
for(auto object : node["board"]) {
Component component;
if(object.name() == "memory") {
component.type = Component::Type::Memory;
component.memory.type = object["type"].text();
component.memory.size = object["size"].text();
component.memory.content = object["content"].text();
component.memory.manufacturer = object["manufacturer"].text();
component.memory.architecture = object["architecture"].text();
component.memory.identifier = object["identifier"].text();
component.memory.Volatile = (bool)object["volatile"];
}
if(object.name() == "oscillator") {
component.type = Component::Type::Oscillator;
component.oscillator.frequency = object["frequency"].text();
}
game.components.append(component);
}
game.note = node["note"].text();
games.append(game);
}
modified = false;
this->location = location;
reloadList();
updateWindow();
}
auto ListWindow::saveDatabase(string location) -> void {
auto fp = file::open(location, file::mode::write);
if(!fp) return MessageDialog().setAlignment(*this).setText({
"Error: failed to write file.\n\n",
"Name: ", location
}).error(), void();
auto copy = games;
copy.sort([](auto x, auto y) {
return string::icompare(
{x.name, "\n", x.region, "\n", x.revision},
{y.name, "\n", y.region, "\n", y.revision}
) < 0;
});
fp.print("database\n");
fp.print(" revision: ", chrono::local::date(), "\n\n");
for(auto& game : copy) {
fp.print("game\n");
fp.print(" sha256: ", game.sha256, "\n");
if(game.label)
fp.print(" label: ", game.label, "\n");
fp.print(" name: ", game.name, "\n");
fp.print(" region: ", game.region, "\n");
fp.print(" revision: ", game.revision, "\n");
if(game.board)
fp.print(" board: ", game.board, "\n");
else if(game.components)
fp.print(" board\n");
for(auto& component : game.components) {
if(component.type == Component::Type::Memory) {
fp.print(" memory\n");
fp.print(" type: ", component.memory.type, "\n");
fp.print(" size: ", component.memory.size, "\n");
fp.print(" content: ", component.memory.content, "\n");
if(component.memory.manufacturer)
fp.print(" manufacturer: ", component.memory.manufacturer, "\n");
if(component.memory.architecture)
fp.print(" architecture: ", component.memory.architecture, "\n");
if(component.memory.identifier)
fp.print(" identifier: ", component.memory.identifier, "\n");
if(component.memory.Volatile)
fp.print(" volatile\n");
}
if(component.type == Component::Type::Oscillator) {
fp.print(" oscillator\n");
fp.print(" frequency: ", component.oscillator.frequency, "\n");
}
}
if(game.note)
fp.print(" note: ", game.note, "\n");
fp.print("\n");
}
modified = false;
this->location = location;
updateWindow();
}
auto ListWindow::appendGame(Game game) -> void {
modified = true;
auto offset = games.size();
games.append(game);
reloadList();
gameList.item(offset).setSelected().setFocused();
updateWindow();
}
auto ListWindow::modifyGame(Game game) -> void {
if(auto item = gameList.selected()) {
modified = true;
auto offset = item.offset();
games[offset] = game;
reloadList();
gameList.item(offset).setSelected().setFocused();
updateWindow();
}
}
auto ListWindow::removeGame() -> void {
if(auto item = gameList.selected()) {
if(MessageDialog().setAlignment(*this).setText({
"Are you sure you want to permanently remove this game?\n\n",
"Name: ", item.cell(0).text()
}).question() == "Yes") {
modified = true;
games.remove(item.offset());
reloadList();
updateWindow();
}
}
}
//
GameWindow::GameWindow() {
layout.setPadding(5);
hashLabel.setText("SHA256:").setAlignment(1.0);
hashEdit.setFont(Font().setFamily(Font::Mono)).onChange([&] { modified = true, updateWindow(); });
regionLabel.setText("Region:").setAlignment(1.0);
regionEdit.setFont(Font().setFamily(Font::Mono)).onChange([&] { modified = true, updateWindow(); });
revisionLabel.setText("Revision:");
revisionEdit.setFont(Font().setFamily(Font::Mono)).onChange([&] { modified = true, updateWindow(); });
boardLabel.setText("Board:");
boardEdit.setFont(Font().setFamily(Font::Mono)).onChange([&] { modified = true, updateWindow(); });
nameLabel.setText("Name:").setAlignment(1.0);
nameEdit.onChange([&] { modified = true, updateWindow(); });
labelLabel.setText("Label:").setAlignment(1.0);
labelEdit.onChange([&] { modified = true, updateWindow(); });
noteLabel.setText("Note:").setAlignment(1.0);
noteEdit.onChange([&] { modified = true, updateWindow(); });
componentLabel.setText("Tree:").setAlignment({1.0, 0.0});
componentTree.onActivate([&] { modifyComponentButton.doActivate(); });
componentTree.onChange([&] { updateWindow(); });
appendMemoryButton.setText("Memory").onActivate([&] {
setEnabled(false);
memoryWindow.show();
});
appendOscillatorButton.setText("Oscillator").onActivate([&] {
setEnabled(false);
oscillatorWindow.show();
});
modifyComponentButton.setText("Modify").onActivate([&] {
if(auto item = componentTree.selected()) {
setEnabled(false);
auto path = item.path().split("/");
auto offset = path(0).natural();
Component component = game.components[offset];
if(component.type == Component::Type::Memory) {
memoryWindow.show(component.memory);
}
if(component.type == Component::Type::Oscillator) {
oscillatorWindow.show(component.oscillator);
}
}
});
removeComponentButton.setText("Remove").onActivate([&] { removeComponent(); });
acceptButton.setText("Accept").onActivate([&] { accept(); });
cancelButton.setText("Cancel").onActivate([&] { cancel(); });
onClose([&] { cancel(); });
setSize({640, 480});
setDismissable();
}
auto GameWindow::show(Game game) -> void {
this->game = game;
modified = false;
create = !game.sha256;
hashEdit.setText(game.sha256);
regionEdit.setText(game.region);
revisionEdit.setText(game.revision);
boardEdit.setText(game.board);
nameEdit.setText(game.name);
labelEdit.setText(game.label);
noteEdit.setText(game.note);
acceptButton.setText(create ? "Create" : "Apply");
reloadList();
updateWindow();
setAlignment(*listWindow);
setVisible();
if(create) {
hashEdit.setFocused();
} else {
cancelButton.setFocused();
}
}
auto GameWindow::accept() -> void {
game.sha256 = hashEdit.text().strip();
game.region = regionEdit.text().strip();
game.revision = revisionEdit.text().strip();
game.board = boardEdit.text().strip();
game.name = nameEdit.text().strip();
game.label = labelEdit.text().strip();
game.note = noteEdit.text().strip();
if(create) {
listWindow.appendGame(game);
} else {
listWindow.modifyGame(game);
}
memoryWindow.setVisible(false);
setVisible(false);
listWindow.setEnabled();
listWindow.setFocused();
}
auto GameWindow::cancel() -> void {
if(!modified || MessageDialog().setAlignment(*this).setText({
"Are you sure you want to discard your changes to this game?"
}).question() == "Yes") {
memoryWindow->setVisible(false);
setVisible(false);
listWindow->setEnabled();
listWindow->setFocused();
}
}
auto GameWindow::reloadList() -> void {
componentTree.reset();
uint counter = 1;
for(auto& component : game.components) {
TreeViewItem item;
string index = {"[", counter++, "] "};
if(component.type == Component::Type::Memory) {
item.setText({index, "Memory"});
item.append(TreeViewItem().setText({"Type: ", component.memory.type}));
item.append(TreeViewItem().setText({"Size: ", component.memory.size}));
item.append(TreeViewItem().setText({"Content: ", component.memory.content}));
if(component.memory.manufacturer)
item.append(TreeViewItem().setText({"Manufacturer: ", component.memory.manufacturer}));
if(component.memory.architecture)
item.append(TreeViewItem().setText({"Architecture: ", component.memory.architecture}));
if(component.memory.identifier)
item.append(TreeViewItem().setText({"Identifier: ", component.memory.identifier}));
if(component.memory.Volatile)
item.append(TreeViewItem().setText({"Volatile"}));
}
if(component.type == Component::Type::Oscillator) {
item.setText({index, "Oscillator"});
item.append(TreeViewItem().setText({"Frequency: ", component.oscillator.frequency}));
}
componentTree.append(item);
}
Application::processEvents();
for(auto& item : componentTree.items()) item.setExpanded();
}
auto GameWindow::updateWindow() -> void {
bool valid = true;
bool hashValid = hashEdit.text().strip().size() == 64;
hashEdit.setEditable(!hashValid).setBackgroundColor(
!create || hashValid ? Color{192, 255, 192}
: (valid = false, Color{255, 224, 224}));
regionEdit.setBackgroundColor(regionEdit.text().strip() ? Color{} : (valid = false, Color{255, 224, 224}));
revisionEdit.setBackgroundColor(revisionEdit.text().strip() ? Color{} : (valid = false, Color{255, 224, 224}));
boardEdit.setBackgroundColor(boardEdit.text().strip() ? Color{} : (Color{255, 255, 240}));
nameEdit.setBackgroundColor(nameEdit.text().strip() ? Color{} : (valid = false, Color{255, 224, 224}));
labelEdit.setBackgroundColor(labelEdit.text().strip() ? Color{} : (Color{255, 255, 240}));
noteEdit.setBackgroundColor(noteEdit.text().strip() ? Color{} : (Color{255, 255, 240}));
modifyComponentButton.setEnabled((bool)componentTree.selected());
removeComponentButton.setEnabled((bool)componentTree.selected());
acceptButton.setEnabled(valid);
setTitle({modified ? "*" : "", create ? "Add New Game" : "Modify Game Details"});
if(create && hashValid && hashEdit.focused()) regionEdit.setFocused();
}
auto GameWindow::appendComponent(Component component) -> void {
modified = true;
auto offset = game.components.size();
game.components.append(component);
reloadList();
componentTree.item(offset).setSelected().setFocused();
updateWindow();
}
auto GameWindow::modifyComponent(Component component) -> void {
if(auto item = componentTree.selected()) {
modified = true;
auto path = item.path().split("/");
auto offset = path(0).natural();
game.components[offset] = component;
reloadList();
componentTree.item(offset).setSelected().setFocused();
updateWindow();
}
}
auto GameWindow::removeComponent() -> void {
if(auto item = componentTree.selected()) {
if(MessageDialog().setAlignment(*this).setText({
"Are you sure you want to permanently remove this component?"
}).question() == "Yes") {
modified = true;
auto path = item.path().split("/");
auto offset = path(0).natural();
game.components.remove(offset);
reloadList();
updateWindow();
}
}
}
//
MemoryWindow::MemoryWindow() {
layout.setPadding(5);
typeLabel.setText("Type:").setAlignment(1.0);
typeEdit.append(ComboEditItem().setText("ROM"));
typeEdit.append(ComboEditItem().setText("EEPROM"));
typeEdit.append(ComboEditItem().setText("Flash"));
typeEdit.append(ComboEditItem().setText("RAM"));
typeEdit.append(ComboEditItem().setText("RTC"));
typeEdit.onChange([&] { modified = true, updateWindow(); });
sizeLabel.setText("Size:").setAlignment(1.0);
sizeEdit.onChange([&] { modified = true, updateWindow(); });
contentLabel.setText("Content:").setAlignment(1.0);
contentEdit.append(ComboEditItem().setText("Program"));
contentEdit.append(ComboEditItem().setText("Data"));
contentEdit.append(ComboEditItem().setText("Character"));
contentEdit.append(ComboEditItem().setText("Save"));
contentEdit.append(ComboEditItem().setText("Time"));
contentEdit.onChange([&] { modified = true, updateWindow(); });
manufacturerLabel.setText("Manufacturer:").setAlignment(1.0);
manufacturerEdit.onChange([&] { modified = true, updateWindow(); });
architectureLabel.setText("Architecture:").setAlignment(1.0);
architectureEdit.onChange([&] { modified = true, updateWindow(); });
identifierLabel.setText("Identifier:").setAlignment(1.0);
identifierEdit.onChange([&] { modified = true, updateWindow(); });
volatileOption.setText("Volatile").onToggle([&] { modified = true, updateWindow(); });
acceptButton.setText("Accept").onActivate([&] { accept(); });
cancelButton.setText("Cancel").onActivate([&] { cancel(); });
onClose([&] { cancel(); });
setSize({320, layout.minimumSize().height()});
setDismissable();
}
auto MemoryWindow::show(Memory memory) -> void {
this->memory = memory;
modified = false;
create = !memory.type;
typeEdit.setText(memory.type);
sizeEdit.setText(memory.size);
contentEdit.setText(memory.content);
manufacturerEdit.setText(memory.manufacturer);
architectureEdit.setText(memory.architecture);
identifierEdit.setText(memory.identifier);
volatileOption.setChecked(memory.Volatile);
updateWindow();
setAlignment(*gameWindow);
setVisible();
typeEdit.setFocused();
}
auto MemoryWindow::accept() -> void {
memory.type = typeEdit.text().strip();
memory.size = sizeEdit.text().strip();
memory.content = contentEdit.text().strip();
memory.manufacturer = manufacturerEdit.text().strip();
memory.architecture = architectureEdit.text().strip();
memory.identifier = identifierEdit.text().strip();
memory.Volatile = volatileOption.checked() && (memory.type == "RAM" || memory.type == "RTC");
Component component{Component::Type::Memory};
component.memory = memory;
if(create) {
gameWindow.appendComponent(component);
} else {
gameWindow.modifyComponent(component);
}
setVisible(false);
gameWindow.setEnabled();
gameWindow.setFocused();
}
auto MemoryWindow::cancel() -> void {
if(!modified || MessageDialog().setAlignment(*this).setText({
"Are you sure you want to discard your changes to this memory?"
}).question() == "Yes") {
setVisible(false);
gameWindow.setEnabled();
gameWindow.setFocused();
}
}
auto MemoryWindow::updateWindow() -> void {
bool valid = true;
typeEdit.setBackgroundColor(typeEdit.text().strip() ? Color{} : (valid = false, Color{255, 224, 224}));
sizeEdit.setBackgroundColor(sizeEdit.text().strip() ? Color{} : (valid = false, Color{255, 224, 224}));
contentEdit.setBackgroundColor(contentEdit.text().strip() ? Color{} : (valid = false, Color{255, 224, 224}));
manufacturerEdit.setBackgroundColor(manufacturerEdit.text().strip() ? Color{} : (Color{255, 255, 240}));
architectureEdit.setBackgroundColor(architectureEdit.text().strip() ? Color{} : (Color{255, 255, 240}));
identifierEdit.setBackgroundColor(identifierEdit.text().strip() ? Color{} : (Color{255, 255, 240}));
volatileOption.setEnabled(typeEdit.text().strip() == "RAM" || typeEdit.text().strip() == "RTC");
acceptButton.setEnabled(valid);
setTitle({modified ? "*" : "", create ? "Add New Memory" : "Modify Memory Details"});
}
//
OscillatorWindow::OscillatorWindow() {
layout.setPadding(5);
frequencyLabel.setText("Frequency:").setAlignment(1.0);
frequencyEdit.onChange([&] { modified = true, updateWindow(); });
acceptButton.setText("Accept").onActivate([&] { accept(); });
cancelButton.setText("Cancel").onActivate([&] { cancel(); });
onClose([&] { cancel(); });
setSize({320, layout.minimumSize().height()});
setDismissable();
}
auto OscillatorWindow::show(Oscillator oscillator) -> void {
this->oscillator = oscillator;
modified = false;
create = !oscillator.frequency;
frequencyEdit.setText(oscillator.frequency);
updateWindow();
setAlignment(*gameWindow);
setVisible();
frequencyEdit.setFocused();
}
auto OscillatorWindow::accept() -> void {
oscillator.frequency = frequencyEdit.text().strip();
Component component{Component::Type::Oscillator};
component.oscillator = oscillator;
if(create) {
gameWindow.appendComponent(component);
} else {
gameWindow.modifyComponent(component);
}
setVisible(false);
gameWindow->setEnabled();
gameWindow->setFocused();
}
auto OscillatorWindow::cancel() -> void {
if(!modified || MessageDialog().setAlignment(*this).setText({
"Are you sure you want to discard your changes to this property?"
}).question() == "Yes") {
setVisible(false);
gameWindow->setEnabled();
gameWindow->setFocused();
}
}
auto OscillatorWindow::updateWindow() -> void {
bool valid = true;
frequencyEdit.setBackgroundColor(frequencyEdit.text().strip() ? Color{} : (valid = false, Color{255, 224, 224}));
acceptButton.setEnabled(valid);
setTitle({modified ? "*" : "", create ? "Add New Property" : "Modify Property Details"});
}
//
#include <nall/main.hpp>
auto nall::main(Arguments) -> void {
Application::setName("genius");
Instances::listWindow.construct();
Instances::gameWindow.construct();
Instances::memoryWindow.construct();
Instances::oscillatorWindow.construct();
listWindow.setVisible();
Application::run();
}
-178
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@@ -1,178 +0,0 @@
struct Memory {
string type;
string size;
string content;
string manufacturer;
string architecture;
string identifier;
boolean Volatile;
};
struct Oscillator {
string frequency;
};
//variant meta-class
struct Component {
enum class Type : uint {
Memory,
Oscillator,
} type;
Memory memory;
Oscillator oscillator;
};
struct Game {
string sha256;
string region;
string revision;
string board;
string name;
string label;
string note;
vector<Component> components;
};
struct ListWindow : Window {
ListWindow();
auto quit() -> void;
auto reloadList() -> void;
auto updateWindow() -> void;
auto newDatabase() -> void;
auto loadDatabase(string) -> void;
auto saveDatabase(string) -> void;
auto appendGame(Game) -> void;
auto modifyGame(Game) -> void;
auto removeGame() -> void;
private:
bool modified = false;
vector<Game> games;
string location;
MenuBar menuBar{this};
Menu fileMenu{&menuBar};
MenuItem newAction{&fileMenu};
MenuItem openAction{&fileMenu};
MenuItem saveAction{&fileMenu};
MenuItem saveAsAction{&fileMenu};
MenuSeparator quitSeparator{&fileMenu};
MenuItem quitAction{&fileMenu};
Menu helpMenu{&menuBar};
MenuItem aboutAction{&helpMenu};
HorizontalLayout layout{this};
TableView gameList{&layout, Size{~0, ~0}};
VerticalLayout controlLayout{&layout, Size{80, ~0}};
Button appendButton{&controlLayout, Size{~0, 0}};
Button modifyButton{&controlLayout, Size{~0, 0}};
Button removeButton{&controlLayout, Size{~0, 0}};
};
struct GameWindow : Window {
GameWindow();
auto show(Game = {}) -> void;
auto accept() -> void;
auto cancel() -> void;
auto reloadList() -> void;
auto updateWindow() -> void;
auto appendComponent(Component) -> void;
auto modifyComponent(Component) -> void;
auto removeComponent() -> void;
private:
bool modified = false;
bool create = true;
Game game;
VerticalLayout layout{this};
HorizontalLayout hashLayout{&layout, Size{~0, 0}};
Label hashLabel{&hashLayout, Size{50, 0}};
LineEdit hashEdit{&hashLayout, Size{~0, 0}};
HorizontalLayout infoLayout{&layout, Size{~0, 0}};
Label regionLabel{&infoLayout, Size{50, 0}};
LineEdit regionEdit{&infoLayout, Size{~0, 0}};
Label revisionLabel{&infoLayout, Size{0, 0}};
LineEdit revisionEdit{&infoLayout, Size{~0, 0}};
Label boardLabel{&infoLayout, Size{0, 0}};
LineEdit boardEdit{&infoLayout, Size{~0, 0}, 0};
HorizontalLayout nameLayout{&layout, Size{~0, 0}};
Label nameLabel{&nameLayout, Size{50, 0}};
LineEdit nameEdit{&nameLayout, Size{~0, 0}};
HorizontalLayout labelLayout{&layout, Size{~0, 0}};
Label labelLabel{&labelLayout, Size{50, 0}};
LineEdit labelEdit{&labelLayout, Size{~0, 0}};
HorizontalLayout noteLayout{&layout, Size{~0, 0}};
Label noteLabel{&noteLayout, Size{50, 0}};
LineEdit noteEdit{&noteLayout, Size{~0, 0}};
HorizontalLayout lowerLayout{&layout, Size{~0, ~0}};
Label componentLabel{&lowerLayout, Size{50, ~0}};
TreeView componentTree{&lowerLayout, Size{~0, ~0}};
VerticalLayout controlLayout{&lowerLayout, Size{0, ~0}};
Button appendMemoryButton{&controlLayout, Size{80, 0}};
Button appendOscillatorButton{&controlLayout, Size{80, 0}};
Button modifyComponentButton{&controlLayout, Size{80, 0}};
Button removeComponentButton{&controlLayout, Size{80, 0}};
Widget controlSpacer{&controlLayout, Size{0, ~0}};
Button acceptButton{&controlLayout, Size{80, 0}};
Button cancelButton{&controlLayout, Size{80, 0}};
};
struct MemoryWindow : Window {
MemoryWindow();
auto show(Memory = {}) -> void;
auto accept() -> void;
auto cancel() -> void;
auto updateWindow() -> void;
private:
bool modified = false;
bool create = true;
Memory memory;
VerticalLayout layout{this};
HorizontalLayout infoLayout{&layout, Size{~0, 0}};
Label typeLabel{&infoLayout, Size{80, 0}};
ComboEdit typeEdit{&infoLayout, Size{~0, 0}};
Label sizeLabel{&infoLayout, Size{0, 0}};
LineEdit sizeEdit{&infoLayout, Size{~0, 0}};
HorizontalLayout contentLayout{&layout, Size{~0, 0}};
Label contentLabel{&contentLayout, Size{80, 0}};
ComboEdit contentEdit{&contentLayout, Size{~0, 0}};
HorizontalLayout manufacturerLayout{&layout, Size{~0, 0}};
Label manufacturerLabel{&manufacturerLayout, Size{80, 0}};
LineEdit manufacturerEdit{&manufacturerLayout, Size{~0, 0}};
HorizontalLayout architectureLayout{&layout, Size{~0, 0}};
Label architectureLabel{&architectureLayout, Size{80, 0}};
LineEdit architectureEdit{&architectureLayout, Size{~0, 0}};
HorizontalLayout identifierLayout{&layout, Size{~0, 0}};
Label identifierLabel{&identifierLayout, Size{80, 0}};
LineEdit identifierEdit{&identifierLayout, Size{~0, 0}};
HorizontalLayout controlLayout{&layout, Size{~0, 0}};
Widget controlSpacer{&controlLayout, Size{~0, 0}};
CheckLabel volatileOption{&controlLayout, Size{0, 0}};
Button acceptButton{&controlLayout, Size{80, 0}};
Button cancelButton{&controlLayout, Size{80, 0}};
};
struct OscillatorWindow : Window {
OscillatorWindow();
auto show(Oscillator = {}) -> void;
auto accept() -> void;
auto cancel() -> void;
auto updateWindow() -> void;
private:
bool modified = false;
bool create = true;
Oscillator oscillator;
VerticalLayout layout{this};
HorizontalLayout frequencyLayout{&layout, Size{~0, 0}};
Label frequencyLabel{&frequencyLayout, Size{60, 0}};
LineEdit frequencyEdit{&frequencyLayout, Size{~0, 0}};
HorizontalLayout controlLayout{&layout, Size{~0, 0}};
Widget controlSpacer{&controlLayout, Size{~0, 0}};
Button acceptButton{&controlLayout, Size{80, 0}};
Button cancelButton{&controlLayout, Size{80, 0}};
};
-2
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@@ -1,2 +0,0 @@
*.o
*.d
-1
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@@ -1 +0,0 @@
genius
-109
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@@ -1,109 +0,0 @@
target := higan
#target := byuu
build := performance
openmp := false
local := true
flags += -I. -I..
$(info Targeting $(target) ...)
nall.path := ../nall
include $(nall.path)/GNUmakefile
ifeq ($(platform),local)
flags += -march=native
endif
ifeq ($(platform),windows)
options += -luuid -lkernel32 -luser32 -lgdi32 -lcomctl32 -lcomdlg32 -lshell32
options += -Wl,-enable-auto-import
options += -Wl,-enable-runtime-pseudo-reloc
else ifeq ($(platform),macos)
else ifneq ($(filter $(platform),linux bsd),)
options += -Wl,-export-dynamic
options += -lX11 -lXext
else
$(error "unsupported platform")
endif
objects := libco emulator
obj/libco.o: ../libco/libco.c
obj/emulator.o: emulator/emulator.cpp
ifeq ($(target),higan)
profile := accuracy
cores := fc sfc sg ms md pce msx cv gb gba ws ngp
endif
ifeq ($(target),byuu)
profile := performance
cores := fc sfc sg ms md pce msx gb gba ws ngp
endif
ifeq ($(profile),accuracy)
flags += -DPROFILE_ACCURACY
endif
ifeq ($(profile),performance)
flags += -DPROFILE_PERFORMANCE
endif
ifneq ($(filter $(cores),fc),)
include fc/GNUmakefile
endif
ifneq ($(filter $(cores),sfc),)
include sfc/GNUmakefile
endif
ifneq ($(filter $(cores),sg),)
include sg/GNUmakefile
endif
ifneq ($(filter $(cores),ms),)
include ms/GNUmakefile
endif
ifneq ($(filter $(cores),md),)
include md/GNUmakefile
endif
ifneq ($(filter $(cores),pce),)
include pce/GNUmakefile
endif
ifneq ($(filter $(cores),msx),)
include msx/GNUmakefile
endif
ifneq ($(filter $(cores),cv),)
include cv/GNUmakefile
endif
ifneq ($(filter $(cores),gb),)
include gb/GNUmakefile
endif
ifneq ($(filter $(cores),gba),)
include gba/GNUmakefile
endif
ifneq ($(filter $(cores),ws),)
include ws/GNUmakefile
endif
ifneq ($(filter $(cores),ngp),)
include ngp/GNUmakefile
endif
include component/GNUmakefile
flags += $(foreach c,$(call strupper,$(cores)),-DCORE_$c)
ui := target-$(target)
include $(ui)/GNUmakefile
-include obj/*.d
clean:
$(call delete,obj/*)
$(call delete,out/*)
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@@ -1,122 +0,0 @@
layout
name: Japanese
//row 0
key: 0 わ を
key: 1 ! ぬ
key: 2 " ふ
key: 3 # あ ぁ
key: 4 $ う ぅ
key: 5 % え ぇ
key: 6 & お ぉ
key: 7 ’ や ゃ
//row 1
key: 8 ( ゆ ゅ
key: 9 ) よ ょ
key: - = ほ
key: ^ ~ へ
key: ¥ | ー
key: @ ‘ "
key: [ { 。
key: ; + れ
//row 2
key: : * け
key: ] } む
key: , < ね `
key: . > る 。
key: / ? め .
key: - ろ
key: A ち
key: B こ
//row 3
key: C そ
key: D し
key: E い ぃ
key: F は
key: G き
key: H く
key: I に
key: J ま
//row 4
key: K の
key: L り
key: M も
key: N み
key: O ら
key: P せ
key: Q た
key: R す
//row 5
key: S と
key: T か
key: U な
key: V ひ
key: W て
key: X さ
key: Y ん
key: Z つ っ
//row 6
key: SHIFT
key: CTRL
key: GRAPH
key: CAPS
key: かな
key: F1 F6
key: F2 F7
key: F3 F8
//row 7
key: F4 F9
key: F5 F10
key: ESC
key: TAB
key: STOP
key: BS
key: SELECT
key: RETURN
//row 8
key: SPACE
key: CLS/HOME
key: INS
key: DEL
key: ←
key: ↑
key: ↓
key: →
//row 9
key: *
key: +
key: /
key: 0
key: 1
key: 2
key: 3
key: 4
//row 10
key: 5
key: 6
key: 7
key: 8
key: 9
key: -
key: ,
key: .
//row 11
key:
key: 実行
key:
key: 取消
key:
key:
key:
key:
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@@ -1,122 +0,0 @@
layout
name: Japanese
//row 0
key: 0 わ を
key: 1 ! ぬ
key: 2 " ふ
key: 3 # あ ぁ
key: 4 $ う ぅ
key: 5 % え ぇ
key: 6 & お ぉ
key: 7 ’ や ゃ
//row 1
key: 8 ( ゆ ゅ
key: 9 ) よ ょ
key: - = ほ
key: ^ ~ へ
key: ¥ | ー
key: @ ‘ "
key: [ { 。
key: ; + れ
//row 2
key: : * け
key: ] } む
key: , < ね `
key: . > る 。
key: / ? め .
key: - ろ
key: A ち
key: B こ
//row 3
key: C そ
key: D し
key: E い ぃ
key: F は
key: G き
key: H く
key: I に
key: J ま
//row 4
key: K の
key: L り
key: M も
key: N み
key: O ら
key: P せ
key: Q た
key: R す
//row 5
key: S と
key: T か
key: U な
key: V ひ
key: W て
key: X さ
key: Y ん
key: Z つ っ
//row 6
key: SHIFT
key: CTRL
key: GRAPH
key: CAPS
key: かな
key: F1 F6
key: F2 F7
key: F3 F8
//row 7
key: F4 F9
key: F5 F10
key: ESC
key: TAB
key: STOP
key: BS
key: SELECT
key: RETURN
//row 8
key: SPACE
key: CLS/HOME
key: INS
key: DEL
key: ←
key: ↑
key: ↓
key: →
//row 9
key: *
key: +
key: /
key: 0
key: 1
key: 2
key: 3
key: 4
//row 10
key: 5
key: 6
key: 7
key: 8
key: 9
key: -
key: ,
key: .
//row 11
key:
key: 実行
key:
key: 取消
key:
key:
key:
key:
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database
revision: 2020-01-21
//Boards (Production)
database
revision: 2020-01-21
board: BANDAI-PT-923
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
slot type=SufamiTurbo
rom
map address=20-3f,a0-bf:8000-ffff mask=0x8000
ram
map address=60-6f,e0-ef:0000-ffff
slot type=SufamiTurbo
rom
map address=40-5f,c0-df:0000-ffff mask=0x8000
ram
map address=70-7d,f0-ff:0000-ffff
board: BSC-1A5B9P-01
memory type=RAM content=Save
map address=10-17:5000-5fff mask=0xf000
processor identifier=MCC
map address=00-0f:5000-5fff
mcu
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
map address=20-3f,a0-bf:6000-7fff
memory type=ROM content=Program
memory type=RAM content=Download
slot type=BSMemory
board: BSC-1A5M-02
memory type=ROM content=Program
map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
slot type=BSMemory
map address=c0-ef:0000-ffff
board: BSC-1A7M-(01,10)
memory type=ROM content=Program
map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
slot type=BSMemory
map address=c0-ef:0000-ffff
board: BSC-1J3M-01
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff
map address=40-5f,c0-df:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
slot type=BSMemory
map address=20-3f,a0-bf:8000-ffff
map address=60-7d,e0-ff:0000-ffff
board: BSC-1J5M-01
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff
map address=40-5f,c0-df:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
slot type=BSMemory
map address=20-3f,a0-bf:8000-ffff
map address=60-7d,e0-ff:0000-ffff
board: BSC-1L3B-01
processor architecture=W65C816S
map address=00-3f,80-bf:2200-23ff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x408000
map address=c0-ff:0000-ffff
memory type=ROM content=Program
slot type=BSMemory
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=40-4f:0000-ffff
memory type=RAM content=Internal
map address=00-3f,80-bf:3000-37ff size=0x800
board: BSC-1L5B-01
processor architecture=W65C816S
map address=00-3f,80-bf:2200-23ff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x408000
map address=c0-ff:0000-ffff
memory type=ROM content=Program
slot type=BSMemory
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=40-4f:0000-ffff
memory type=RAM content=Internal
map address=00-3f,80-bf:3000-37ff size=0x800
board: SGB-R-10
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
map address=40-7d,c0-ff:0000-7fff mask=0x8000
processor identifier=ICD revision=2
map address=00-3f,80-bf:6000-67ff,7000-7fff
memory type=ROM content=Boot architecture=SM83
slot type=GameBoy
board: SHVC-1A0N-(01,02,10,20,30)
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
map address=40-7d,c0-ff:0000-7fff mask=0x8000
board: SHVC-1A1B-(04,05,06)
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-ffff
board: SHVC-1A1M-(01,10,11,20)
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-1A3B-(11,12,13)
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-ffff
board: SHVC-1A3B-20
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-1A3M-(10,20,21,30)
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-1A5B-(02,04)
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-ffff
board: SHVC-1A5M-(01,11,20)
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-1B0N-(02,03,10)
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
processor architecture=uPD7725
map address=30-3f,b0-bf:8000-ffff mask=0x3fff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: SHVC-1B5B-02
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-ffff
processor architecture=uPD7725
map address=20-3f,a0-bf:8000-ffff mask=0x3fff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: SHVC-1C0N
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=60-7d,e0-ff:0000-ffff
board: SHVC-1C0N5S-01
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=60-7d,e0-ff:0000-ffff
board: SHVC-1CA0N5S-01
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
map address=40-5f,c0-df:0000-ffff
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=70-71,f0-f1:0000-ffff
board: SHVC-1CA0N6S-01
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
map address=40-5f,c0-df:0000-ffff
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=70-71,f0-f1:0000-ffff
board: SHVC-1CA6B-01
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
map address=40-5f,c0-df:0000-ffff
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=70-71,f0-f1:0000-ffff
board: SHVC-1CB0N7S-01
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-3f:8000-ffff mask=0x8000
map address=40-5f:0000-ffff
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=70-71:0000-ffff
board: SHVC-1CB5B-(01,20)
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-3f:8000-ffff mask=0x8000
map address=40-5f:0000-ffff
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=70-71:0000-ffff
board: SHVC-1CB7B-01
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-3f:8000-ffff mask=0x8000
map address=40-5f:0000-ffff
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=70-71:0000-ffff
board: SHVC-1DC0N-01
processor architecture=HG51BS169
map address=00-3f,80-bf:6c00-6fff,7c00-7fff
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-77:0000-7fff
memory type=ROM content=Data architecture=HG51BS169
memory type=RAM content=Data architecture=HG51BS169
map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
oscillator
board: SHVC-1DS0B-20
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
processor architecture=uPD96050
map address=60-67,e0-e7:0000-3fff
memory type=ROM content=Program architecture=uPD96050
memory type=ROM content=Data architecture=uPD96050
memory type=RAM content=Data architecture=uPD96050
map address=68-6f,e8-ef:0000-7fff mask=0x8000
oscillator
board: SHVC-1J0N-(01,10,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
board: SHVC-1J1M-(11,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
board: SHVC-1J3B-01
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
board: SHVC-1J3M-(01,11,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
board: SHVC-1J5M-(01,11,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
board: SHVC-1K0N-01
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
processor architecture=uPD7725
map address=00-1f,80-9f:6000-7fff mask=0xfff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: SHVC-1K1B-01
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
processor architecture=uPD7725
map address=00-1f,80-9f:6000-7fff mask=0xfff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: SHVC-1K1X-10
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
processor architecture=uPD7725
map address=00-1f,80-9f:6000-7fff mask=0xfff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: SHVC-1L0N3S-01
processor architecture=W65C816S
map address=00-3f,80-bf:2200-23ff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x408000
map address=c0-ff:0000-ffff
memory type=ROM content=Program
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=40-4f:0000-ffff
memory type=RAM content=Internal
map address=00-3f,80-bf:3000-37ff size=0x800
board: SHVC-1L3B-(02,11)
processor architecture=W65C816S
map address=00-3f,80-bf:2200-23ff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x408000
map address=c0-ff:0000-ffff
memory type=ROM content=Program
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=40-4f:0000-ffff
memory type=RAM content=Internal
map address=00-3f,80-bf:3000-37ff size=0x800
board: SHVC-1L5B-(11,20)
processor architecture=W65C816S
map address=00-3f,80-bf:2200-23ff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x408000
map address=c0-ff:0000-ffff
memory type=ROM content=Program
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=40-4f:0000-ffff
memory type=RAM content=Internal
map address=00-3f,80-bf:3000-37ff size=0x800
board: SHVC-1N0N-(01,10)
processor identifier=SDD1
map address=00-3f,80-bf:4800-480f
mcu
map address=00-3f,80-bf:8000-ffff
map address=c0-ff:0000-ffff
memory type=ROM content=Program
board: SHVC-2A0N-01#A
memory type=ROM content=Program
map address=00-2f,80-af:8000-ffff mask=0x8000
map address=40-6f,c0-ef:0000-ffff mask=0x8000
board: SHVC-2A0N-(01,10,11,20)
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
map address=40-7d,c0-ff:0000-7fff mask=0x8000
board: SHVC-2A1M-01
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-2A3B-01
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-2A3M-01#A
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-2A3M-(01,11,20)
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-2A5M-01
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-2B3B-01
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
processor architecture=uPD7725
map address=60-6f,e0-ef:0000-7fff mask=0x3fff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: SHVC-2DC0N-01
processor architecture=HG51BS169
map address=00-3f,80-bf:6c00-6fff,7c00-7fff
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-77:0000-7fff
memory type=ROM content=Data architecture=HG51BS169
memory type=RAM content=Data architecture=HG51BS169
map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
oscillator
board: SHVC-2E3M-01
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
processor identifier=OBC1
map address=00-3f,80-bf:6000-7fff mask=0xe000
map address=70-71,f0-f1:6000-7fff,e000-ffff mask=0xe000
memory type=RAM content=Save
board: SHVC-2J0N-(01,10,11,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
board: SHVC-2J3M-(01,11,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=10-1f,30-3f,90-9f,b0-bf:6000-7fff mask=0xe000
board: SHVC-2J5M-01
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=10-1f,30-3f,90-9f,b0-bf:6000-7fff mask=0xe000
board: SHVC-3J0N-01
memory type=ROM content=Program
map address=00-2f,80-af:8000-ffff
map address=40-6f,c0-ef:0000-ffff
board: SHVC-BA0N-(01,10)
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
map address=40-7d,c0-ff:0000-7fff mask=0x8000
board: SHVC-BA1M-01
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-BA3M-(01,10)
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: SHVC-BJ0N-(01,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
board: SHVC-BJ1M-(10,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
board: SHVC-BJ3M-(10,20)
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
board: SHVC-LDH3C-01
processor identifier=SPC7110
map address=00-3f,80-bf:4800-483f
map address=50,58:0000-ffff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x800000
map address=c0-ff:0000-ffff mask=0xc00000
memory type=ROM content=Program
memory type=ROM content=Data
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff mask=0xe000
rtc manufacturer=Epson
map address=00-3f,80-bf:4840-4842
memory type=RTC content=Time manufacturer=Epson
board: SHVC-LJ3M-01
memory type=ROM content=Program
map address=00-3f:8000-ffff base=0x400000
map address=40-7d:0000-ffff base=0x400000
map address=80-bf:8000-ffff mask=0xc00000
map address=c0-ff:0000-ffff mask=0xc00000
memory type=RAM content=Save
map address=80-bf:6000-7fff mask=0xe000
board: SHVC-LN3B-01
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff mask=0xe000
map address=70-73:0000-ffff
processor identifier=SDD1
map address=00-3f,80-bf:4800-480f
mcu
map address=00-3f,80-bf:8000-ffff
map address=c0-ff:0000-ffff
memory type=ROM content=Program
board: SHVC-SGB2-01
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
map address=40-7d,c0-ff:0000-7fff mask=0x8000
processor identifier=ICD revision=2
map address=00-3f,80-bf:6000-67ff,7000-7fff
memory type=ROM content=Boot architecture=SM83
oscillator
slot type=GameBoy
board: SHVC-YA0N-01
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
map address=40-7d,c0-ff:0000-7fff mask=0x8000
board: SHVC-YJ0N-01
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
//Boards (Generic)
database
revision: 2020-01-01
board: ARM-LOROM-RAM
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
map address=40-6f,c0-ef:0000-7fff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-ffff
processor architecture=ARM6
map address=00-3f,80-bf:3800-38ff
memory type=ROM content=Program architecture=ARM6
memory type=ROM content=Data architecture=ARM6
memory type=RAM content=Data architecture=ARM6
oscillator
board: BS-HIROM-RAM
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff
map address=40-5f,c0-df:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
slot type=BSMemory
map address=20-3f,a0-bf:8000-ffff
map address=60-7d,e0-ff:0000-ffff
board: BS-LOROM-RAM
memory type=ROM content=Program
map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
slot type=BSMemory
map address=c0-ef:0000-ffff
board: BS-MCC-RAM
memory type=RAM content=Save
map address=10-17:5000-5fff mask=0xf000
processor identifier=MCC
map address=00-0f:5000-5fff
mcu
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
map address=20-3f,a0-bf:6000-7fff
memory type=ROM content=Program
memory type=RAM content=Download
slot type=BSMemory
board: BS-SA1-RAM
processor architecture=W65C816S
map address=00-3f,80-bf:2200-23ff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x408000
map address=c0-ff:0000-ffff
memory type=ROM content=Program
slot type=BSMemory
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=40-4f:0000-ffff
memory type=RAM content=Internal
map address=00-3f,80-bf:3000-37ff size=0x800
board: EVENT-CC92
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
processor manufacturer=NEC architecture=uPD78214
identifier: Campus Challenge '92
map address=c0,e0:0000
mcu
map address=00-1f,80-9f:8000-ffff
memory type=ROM content=Program
memory type=ROM content=Level-1
memory type=ROM content=Level-2
memory type=ROM content=Level-3
dip
processor manufacturer=NEC architecture=uPD7725
map address=20-3f,a0-bf:8000-ffff mask=0x7fff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: EVENT-PF94
memory type=RAM content=Save
map address=30-3f,b0-bf:6000-7fff mask=0xe000
processor manufacturer=NEC architecture=uPD78214
identifier: PowerFest '94
map address=10,20:6000
mcu
map address=00-3f,80-bf:8000-ffff
map address=c0-ff:0000-ffff
memory type=ROM content=Program
memory type=ROM content=Level-1
memory type=ROM content=Level-2
memory type=ROM content=Level-3
dip
processor manufacturer=NEC architecture=uPD7725
map address=00-0f,80-8f:6000-7fff mask=0xfff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: EXHIROM
memory type=ROM content=Program
map address=00-3f:8000-ffff base=0x400000
map address=40-7d:0000-ffff base=0x400000
map address=80-bf:8000-ffff mask=0xc00000
map address=c0-ff:0000-ffff mask=0xc00000
board: EXHIROM-RAM
memory type=ROM content=Program
map address=00-3f:8000-ffff base=0x400000
map address=40-7d:0000-ffff base=0x400000
map address=80-bf:8000-ffff mask=0xc00000
map address=c0-ff:0000-ffff mask=0xc00000
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
map address=70-7d:0000-7fff
board: EXHIROM-RAM-SHARPRTC
memory type=ROM content=Program
map address=00-3f:8000-ffff base=0x400000
map address=40-7d:0000-ffff base=0x400000
map address=80-bf:8000-ffff mask=0xc00000
map address=c0-ff:0000-ffff mask=0xc00000
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
map address=70-7d:0000-7fff
rtc manufacturer=Sharp
map address=00-3f,80-bf:2800-2801
memory type=RTC content=Time manufacturer=Sharp
board: EXLOROM
memory type=ROM content=Program
map address=00-7d:8000-ffff mask=0x808000 base=0x400000
map address=80-ff:8000-ffff mask=0x808000 base=0x000000
board: EXLOROM-RAM
memory type=ROM content=Program
map address=00-7d:8000-ffff mask=0x808000 base=0x400000
map address=80-ff:8000-ffff mask=0x808000 base=0x000000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: EXNEC-LOROM
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
processor architecture=uPD96050
map address=60-67,e0-e7:0000-3fff
memory type=ROM content=Program architecture=uPD96050
memory type=ROM content=Data architecture=uPD96050
memory type=RAM content=Data architecture=uPD96050
map address=68-6f,e8-ef:0000-7fff mask=0x8000
oscillator
board: EXSPC7110-RAM-EPSONRTC
memory type=ROM content=Expansion
map address=40-4f:0000-ffff
processor identifier=SPC7110
map address=00-3f,80-bf:4800-483f
map address=50,58:0000-ffff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x800000
map address=c0-ff:0000-ffff mask=0xc00000
memory type=ROM content=Program
memory type=ROM content=Data
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff mask=0xe000
rtc manufacturer=Epson
map address=00-3f,80-bf:4840-4842
memory type=RTC content=Time manufacturer=Epson
board: GB-LOROM
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
map address=40-7d,c0-ff:0000-7fff mask=0x8000
processor identifier=ICD revision=2
map address=00-3f,80-bf:6000-67ff,7000-7fff
memory type=ROM content=Boot architecture=SM83
oscillator
slot type=GameBoy
board: GSU-RAM
processor architecture=GSU
map address=00-3f,80-bf:3000-34ff
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
map address=40-5f,c0-df:0000-ffff
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=70-71,f0-f1:0000-ffff
board: HIROM
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
board: HIROM-RAM
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
board: HITACHI-LOROM
processor architecture=HG51BS169
map address=00-3f,80-bf:6c00-6fff,7c00-7fff
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-77:0000-7fff
memory type=ROM content=Data architecture=HG51BS169
memory type=RAM content=Data architecture=HG51BS169
map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
oscillator
board: LOROM
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
board: LOROM-RAM
memory type=ROM content=Program
map address=00-7d,80-ff:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
board: LOROM-RAM#A
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-ffff mask=0x8000
board: NEC-HIROM
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
processor architecture=uPD7725
map address=00-1f,80-9f:6000-7fff mask=0xfff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: NEC-HIROM-RAM
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff
map address=40-7d,c0-ff:0000-ffff
memory type=RAM content=Save
map address=20-3f,a0-bf:6000-7fff mask=0xe000
processor architecture=uPD7725
map address=00-1f,80-9f:6000-7fff mask=0xfff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: NEC-LOROM
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
processor architecture=uPD7725
map address=30-3f,b0-bf:8000-ffff mask=0x3fff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: NEC-LOROM-RAM
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-7fff mask=0x8000
processor architecture=uPD7725
map address=60-6f,e0-ef:0000-7fff mask=0x3fff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: NEC-LOROM-RAM#A
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
memory type=RAM content=Save
map address=70-7d,f0-ff:0000-ffff
processor architecture=uPD7725
map address=20-3f,a0-bf:8000-ffff mask=0x3fff
memory type=ROM content=Program architecture=uPD7725
memory type=ROM content=Data architecture=uPD7725
memory type=RAM content=Data architecture=uPD7725
oscillator
board: OBC1-LOROM-RAM
memory type=ROM content=Program
map address=00-3f,80-bf:8000-ffff mask=0x8000
processor identifier=OBC1
map address=00-3f,80-bf:6000-7fff mask=0xe000
map address=70-71,f0-f1:6000-7fff,e000-ffff mask=0xe000
memory type=RAM content=Save
board: SA1-RAM
processor architecture=W65C816S
map address=00-3f,80-bf:2200-23ff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x408000
map address=c0-ff:0000-ffff
memory type=ROM content=Program
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff size=0x2000
map address=40-4f:0000-ffff
memory type=RAM content=Internal
map address=00-3f,80-bf:3000-37ff size=0x800
board: SDD1
processor identifier=SDD1
map address=00-3f,80-bf:4800-480f
mcu
map address=00-3f,80-bf:8000-ffff
map address=c0-ff:0000-ffff
memory type=ROM content=Program
board: SDD1-RAM
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff mask=0xe000
map address=70-73:0000-ffff mask=0x8000
processor identifier=SDD1
map address=00-3f,80-bf:4800-480f
mcu
map address=00-3f,80-bf:8000-ffff
map address=c0-ff:0000-ffff
memory type=ROM content=Program
board: SPC7110-RAM
processor identifier=SPC7110
map address=00-3f,80-bf:4800-483f
map address=50,58:0000-ffff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x800000
map address=c0-ff:0000-ffff mask=0xc00000
memory type=ROM content=Program
memory type=ROM content=Data
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff mask=0xe000
board: SPC7110-RAM-EPSONRTC
processor identifier=SPC7110
map address=00-3f,80-bf:4800-483f
map address=50,58:0000-ffff
mcu
map address=00-3f,80-bf:8000-ffff mask=0x800000
map address=c0-ff:0000-ffff mask=0xc00000
memory type=ROM content=Program
memory type=ROM content=Data
memory type=RAM content=Save
map address=00-3f,80-bf:6000-7fff mask=0xe000
rtc manufacturer=Epson
map address=00-3f,80-bf:4840-4842
memory type=RTC content=Time manufacturer=Epson
board: ST-LOROM
memory type=ROM content=Program
map address=00-1f,80-9f:8000-ffff mask=0x8000
slot type=SufamiTurbo
rom
map address=20-3f,a0-bf:8000-ffff mask=0x8000
ram
map address=60-6f,e0-ef:0000-ffff
slot type=SufamiTurbo
rom
map address=40-5f,c0-df:0000-ffff mask=0x8000
ram
map address=70-7d,f0-ff:0000-ffff
Binary file not shown.
Whitespace-only changes.
Binary file not shown.
Binary file not shown.
Binary file not shown.
-53
View File
@@ -1,53 +0,0 @@
components := $(call unique,$(components))
objects += $(if $(findstring ay38910,$(components)),audio-ay38910)
objects += $(if $(findstring sn76489,$(components)),audio-sn76489)
objects += $(if $(findstring t6w28,$(components)),audio-t6w28)
objects += $(if $(findstring ym2149,$(components)),audio-ym2149)
objects += $(if $(findstring ym2413,$(components)),audio-ym2413)
objects += $(if $(findstring m93lcx6,$(components)),eeprom-m93lcx6)
objects += $(if $(findstring x24c01,$(components)),eeprom-x24c01)
objects += $(if $(findstring arm7tdmi,$(components)),processor-arm7tdmi)
objects += $(if $(findstring gsu,$(components)),processor-gsu)
objects += $(if $(findstring hg51b,$(components)),processor-hg51b)
objects += $(if $(findstring huc6280,$(components)),processor-huc6280)
objects += $(if $(findstring m68k,$(components)),processor-m68k)
objects += $(if $(findstring mos6502,$(components)),processor-mos6502)
objects += $(if $(findstring sm83,$(components)),processor-sm83)
objects += $(if $(findstring spc700,$(components)),processor-spc700)
objects += $(if $(findstring tlcs900h,$(components)),processor-tlcs900h)
objects += $(if $(findstring upd96050,$(components)),processor-upd96050)
objects += $(if $(findstring v30mz,$(components)),processor-v30mz)
objects += $(if $(findstring wdc65816,$(components)),processor-wdc65816)
objects += $(if $(findstring z80,$(components)),processor-z80)
objects += $(if $(findstring tms9918,$(components)),video-tms9918)
objects += $(if $(findstring v9938,$(components)),video-v9938)
obj/audio-ay38910.o: component/audio/ay38910/ay38910.cpp
obj/audio-sn76489.o: component/audio/sn76489/sn76489.cpp
obj/audio-t6w28.o: component/audio/t6w28/t6w28.cpp
obj/audio-ym2149.o: component/audio/ym2149/ym2149.cpp
obj/audio-ym2413.o: component/audio/ym2413/ym2413.cpp
obj/eeprom-m93lcx6.o: component/eeprom/m93lcx6/m93lcx6.cpp
obj/eeprom-x24c01.o: component/eeprom/x24c01/x24c01.cpp
obj/processor-arm7tdmi.o: component/processor/arm7tdmi/arm7tdmi.cpp
obj/processor-gsu.o: component/processor/gsu/gsu.cpp
obj/processor-hg51b.o: component/processor/hg51b/hg51b.cpp
obj/processor-huc6280.o: component/processor/huc6280/huc6280.cpp
obj/processor-m68k.o: component/processor/m68k/m68k.cpp
obj/processor-mos6502.o: component/processor/mos6502/mos6502.cpp
obj/processor-sm83.o: component/processor/sm83/sm83.cpp
obj/processor-spc700.o: component/processor/spc700/spc700.cpp
obj/processor-tlcs900h.o: component/processor/tlcs900h/tlcs900h.cpp
obj/processor-upd96050.o: component/processor/upd96050/upd96050.cpp
obj/processor-v30mz.o: component/processor/v30mz/v30mz.cpp
obj/processor-wdc65816.o: component/processor/wdc65816/wdc65816.cpp
obj/processor-z80.o: component/processor/z80/z80.cpp
obj/video-tms9918.o: component/video/tms9918/tms9918.cpp
obj/video-v9938.o: component/video/v9938/v9938.cpp
-225
View File
@@ -1,225 +0,0 @@
#include <emulator/emulator.hpp>
#include "ay38910.hpp"
namespace higan {
#include "serialization.cpp"
auto AY38910::clock() -> array<uint4[3]> {
toneA.clock();
toneB.clock();
toneC.clock();
noise.clock();
envelope.clock();
array<uint4[3]> output;
if((toneA.output | channelA.tone) & (noise.output | channelA.noise)) {
output[0] = channelA.envelope ? envelope.output : channelA.volume;
}
if((toneB.output | channelB.tone) & (noise.output | channelB.noise)) {
output[1] = channelB.envelope ? envelope.output : channelB.volume;
}
if((toneC.output | channelC.tone) & (noise.output |channelC.noise)) {
output[2] = channelC.envelope ? envelope.output : channelC.volume;
}
return output;
}
auto AY38910::Tone::clock() -> void {
if(++counter >= period) {
counter = 0;
output ^= 1;
}
}
auto AY38910::Noise::clock() -> void {
if(++counter >= period) {
counter = 0;
if(flip ^= 1) {
output = !lfsr.bit(0);
lfsr = (lfsr.bit(0) ^ lfsr.bit(3)) << 16 | lfsr >> 1;
}
}
}
auto AY38910::Envelope::clock() -> void {
if(!holding && ++counter >= period) {
counter = 0;
if(!attacking) {
if(output != 0) return (void)output--;
} else {
if(output != 15) return (void)output++;
}
if(!repeat) {
output = 0;
holding = 1;
} else if(hold) {
if(alternate) output ^= 15;
holding = 1;
} else if(alternate) {
attacking ^= 1;
} else {
output = !attacking ? 15 : 0;
}
}
}
auto AY38910::read() -> uint8 {
uint8 data;
switch(io.register) {
case 0:
data.bit(0,7) = toneA.period.bit(0, 7);
break;
case 1:
data.bit(0,3) = toneA.period.bit(8,11);
break;
case 2:
data.bit(0,7) = toneB.period.bit(0, 7);
break;
case 3:
data.bit(0,3) = toneB.period.bit(8,11);
break;
case 4:
data.bit(0,7) = toneC.period.bit(0, 7);
break;
case 5:
data.bit(0,3) = toneC.period.bit(8,11);
break;
case 6:
data.bit(0,4) = noise.period;
break;
case 7:
data.bit(0) = channelA.tone;
data.bit(1) = channelB.tone;
data.bit(2) = channelC.tone;
data.bit(3) = channelA.noise;
data.bit(4) = channelB.noise;
data.bit(5) = channelC.noise;
data.bit(6) = portA.direction;
data.bit(7) = portB.direction;
break;
case 8:
data.bit(0,3) = channelA.volume;
data.bit(4) = channelA.envelope;
break;
case 9:
data.bit(0,3) = channelB.volume;
data.bit(4) = channelB.envelope;
break;
case 10:
data.bit(0,3) = channelC.volume;
data.bit(4) = channelC.envelope;
break;
case 11:
data.bit(0,7) = envelope.period.bit(0, 7);
break;
case 12:
data.bit(0,7) = envelope.period.bit(8,15);
break;
case 13:
data.bit(0) = envelope.hold;
data.bit(1) = envelope.alternate;
data.bit(2) = envelope.attack;
data.bit(3) = envelope.repeat;
break;
case 14:
data.bit(0,7) = readIO(0);
break;
case 15:
data.bit(0,7) = readIO(1);
break;
}
return data;
}
auto AY38910::write(uint8 data) -> void {
switch(io.register) {
case 0:
toneA.period.bit(0, 7) = data.bit(0,7);
break;
case 1:
toneA.period.bit(8,11) = data.bit(0,3);
break;
case 2:
toneB.period.bit(0, 7) = data.bit(0,7);
break;
case 3:
toneB.period.bit(8,11) = data.bit(0,3);
break;
case 4:
toneC.period.bit(0, 7) = data.bit(0,7);
break;
case 5:
toneC.period.bit(8,11) = data.bit(0,3);
break;
case 6:
noise.period = data.bit(0,4);
break;
case 7:
channelA.tone = data.bit(0);
channelB.tone = data.bit(1);
channelC.tone = data.bit(2);
channelA.noise = data.bit(3);
channelB.noise = data.bit(4);
channelC.noise = data.bit(5);
portA.direction = data.bit(6);
portB.direction = data.bit(7);
break;
case 8:
channelA.volume = data.bit(0,3);
channelA.envelope = data.bit(4);
break;
case 9:
channelB.volume = data.bit(0,3);
channelB.envelope = data.bit(4);
break;
case 10:
channelC.volume = data.bit(0,3);
channelC.envelope = data.bit(4);
break;
case 11:
envelope.period.bit(0, 7) = data.bit(0,7);
break;
case 12:
envelope.period.bit(8,15) = data.bit(0,7);
break;
case 13:
envelope.hold = data.bit(0);
envelope.alternate = data.bit(1);
envelope.attack = data.bit(2);
envelope.repeat = data.bit(3);
envelope.holding = 0;
envelope.attacking = envelope.attack;
envelope.output = !envelope.attacking ? 15 : 0;
break;
case 14:
writeIO(0, data);
break;
case 15:
writeIO(1, data);
break;
}
}
auto AY38910::select(uint4 data) -> void {
io.register = data;
}
auto AY38910::power() -> void {
toneA = {};
toneB = {};
toneC = {};
noise = {};
envelope = {};
channelA = {};
channelB = {};
channelC = {};
portA = {};
portB = {};
io = {};
}
}
-86
View File
@@ -1,86 +0,0 @@
#pragma once
namespace higan {
//General Instrument AY-3-8910
struct AY38910 {
virtual auto readIO(uint1 port) -> uint8 { return 0xff; }
virtual auto writeIO(uint1 port, uint8 data) -> void {}
//ay38910.cpp
auto clock() -> array<uint4[3]>;
auto read() -> uint8;
auto write(uint8 data) -> void;
auto select(uint4 data) -> void;
auto power() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
protected:
struct Tone {
//ay38910.cpp
auto clock() -> void;
uint12 counter;
uint12 period;
uint1 output;
};
struct Noise {
//ay38910.cpp
auto clock() -> void;
uint5 counter;
uint5 period;
uint1 flip;
uint17 lfsr = 1;
uint1 output;
};
struct Envelope {
//ay38910.cpp
auto clock() -> void;
uint16 counter;
uint16 period;
uint1 holding;
uint1 attacking;
uint1 hold;
uint1 alternate;
uint1 attack;
uint1 repeat; //continue
uint4 output;
};
struct Channel {
uint1 tone; //0 = enable, 1 = disable
uint1 noise; //0 = enable, 1 = disable
uint1 envelope; //0 = use fixed volume, 1 = use envelope phase
uint4 volume;
};
struct Port {
uint1 direction; //0 = input, 1 = output
uint8 data;
};
struct IO {
uint4 register;
};
Tone toneA;
Tone toneB;
Tone toneC;
Noise noise;
Envelope envelope;
Channel channelA;
Channel channelB;
Channel channelC;
Port portA;
Port portB;
IO io;
};
}
@@ -1,52 +0,0 @@
auto AY38910::serialize(serializer& s) -> void {
s.integer(toneA.counter);
s.integer(toneA.period);
s.integer(toneA.output);
s.integer(toneB.counter);
s.integer(toneB.period);
s.integer(toneB.output);
s.integer(toneC.counter);
s.integer(toneC.period);
s.integer(toneC.output);
s.integer(noise.counter);
s.integer(noise.period);
s.integer(noise.flip);
s.integer(noise.lfsr);
s.integer(noise.output);
s.integer(envelope.counter);
s.integer(envelope.period);
s.integer(envelope.holding);
s.integer(envelope.attacking);
s.integer(envelope.hold);
s.integer(envelope.alternate);
s.integer(envelope.attack);
s.integer(envelope.repeat);
s.integer(envelope.output);
s.integer(channelA.tone);
s.integer(channelA.noise);
s.integer(channelA.envelope);
s.integer(channelA.volume);
s.integer(channelB.tone);
s.integer(channelB.noise);
s.integer(channelB.envelope);
s.integer(channelB.volume);
s.integer(channelC.tone);
s.integer(channelC.noise);
s.integer(channelC.envelope);
s.integer(channelC.volume);
s.integer(portA.direction);
s.integer(portA.data);
s.integer(portB.direction);
s.integer(portB.data);
s.integer(io.register);
}
@@ -1,25 +0,0 @@
auto SN76489::serialize(serializer& s) -> void {
tone0.serialize(s);
tone1.serialize(s);
tone2.serialize(s);
noise.serialize(s);
s.integer(io.register);
}
auto SN76489::Tone::serialize(serializer& s) -> void {
s.integer(volume);
s.integer(counter);
s.integer(pitch);
s.integer(output);
}
auto SN76489::Noise::serialize(serializer& s) -> void {
s.integer(volume);
s.integer(counter);
s.integer(pitch);
s.integer(enable);
s.integer(rate);
s.integer(lfsr);
s.integer(flip);
s.integer(output);
}
-75
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@@ -1,75 +0,0 @@
#include <emulator/emulator.hpp>
#include "sn76489.hpp"
namespace higan {
#include "serialization.cpp"
auto SN76489::clock() -> array<uint4[4]> {
tone0.clock();
tone1.clock();
tone2.clock();
noise.clock();
array<uint4[4]> output{15, 15, 15, 15};
if(tone0.output) output[0] = tone0.volume;
if(tone1.output) output[1] = tone1.volume;
if(tone2.output) output[2] = tone2.volume;
if(noise.output) output[3] = noise.volume;
return output;
}
auto SN76489::Tone::clock() -> void {
if(!counter--) {
counter = pitch;
output ^= 1;
}
}
auto SN76489::Noise::clock() -> void {
if(!counter--) {
counter = array<uint10[4]>{0x10, 0x20, 0x40, pitch}[rate];
if(flip ^= 1) { //0->1 transition
output = !lfsr.bit(0);
lfsr = (lfsr.bit(0) ^ lfsr.bit(3) & enable) << 15 | lfsr >> 1;
}
}
}
auto SN76489::write(uint8 data) -> void {
if(data.bit(7)) io.register = data.bit(4,6);
if(io.register.bit(0)) switch(io.register.bit(1,2)) {
case 0: tone0.volume = data.bit(0,3); break;
case 1: tone1.volume = data.bit(0,3); break;
case 2: tone2.volume = data.bit(0,3); break;
case 3: noise.volume = data.bit(0,3); break;
}
else if(data.bit(7)) switch(io.register.bit(1,2)) {
case 0: tone0.pitch.bit(0,3) = data.bit(0,3); break;
case 1: tone1.pitch.bit(0,3) = data.bit(0,3); break;
case 2: tone2.pitch.bit(0,3) = data.bit(0,3); noise.pitch = tone2.pitch; break;
case 3: noise.rate = data.bit(0,1);
noise.enable = data.bit(2);
noise.lfsr = 0x8000;
break;
}
else switch(io.register.bit(1,2)) {
case 0: tone0.pitch.bit(4,9) = data.bit(0,5); break;
case 1: tone1.pitch.bit(4,9) = data.bit(0,5); break;
case 2: tone2.pitch.bit(4,9) = data.bit(0,5); noise.pitch = tone2.pitch; break;
case 3: noise.volume = data.bit(0,3); break;
}
}
auto SN76489::power() -> void {
tone0 = {};
tone1 = {};
tone2 = {};
noise = {};
io = {};
}
}
-58
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@@ -1,58 +0,0 @@
#pragma once
namespace higan {
//Texas Instruments SN76489
struct SN76489 {
//sn76489.cpp
auto clock() -> array<uint4[4]>;
auto write(uint8 data) -> void;
auto power() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
protected:
struct Tone {
//sn76489.cpp
auto clock() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
uint4 volume = 15;
uint10 counter;
uint10 pitch;
uint1 output;
};
struct Noise {
//sn76489.cpp
auto clock() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
uint4 volume = 15;
uint10 counter;
uint10 pitch;
uint1 enable;
uint2 rate;
uint16 lfsr = 0x8000;
uint1 flip;
uint1 output;
};
struct IO {
uint3 register;
};
Tone tone0;
Tone tone1;
Tone tone2;
Noise noise;
IO io;
};
}
@@ -1,27 +0,0 @@
auto T6W28::serialize(serializer& s) -> void {
tone0.serialize(s);
tone1.serialize(s);
tone2.serialize(s);
noise.serialize(s);
s.integer(io.register);
}
auto T6W28::Tone::serialize(serializer& s) -> void {
s.integer(counter);
s.integer(pitch);
s.integer(output);
s.integer(volume.left);
s.integer(volume.right);
}
auto T6W28::Noise::serialize(serializer& s) -> void {
s.integer(counter);
s.integer(pitch);
s.integer(enable);
s.integer(rate);
s.integer(lfsr);
s.integer(flip);
s.integer(output);
s.integer(volume.left);
s.integer(volume.right);
}
-93
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@@ -1,93 +0,0 @@
#include <emulator/emulator.hpp>
#include "t6w28.hpp"
namespace higan {
#include "serialization.cpp"
auto T6W28::clock() -> array<uint4[8]> {
tone0.clock();
tone1.clock();
tone2.clock();
noise.clock();
array<uint4[8]> output{15, 15, 15, 15, 15, 15, 15, 15};
if(tone0.output) output[0] = tone0.volume.left, output[4] = tone0.volume.right;
if(tone1.output) output[1] = tone1.volume.left, output[5] = tone1.volume.right;
if(tone2.output) output[2] = tone2.volume.left, output[6] = tone2.volume.right;
if(noise.output) output[3] = noise.volume.left, output[7] = noise.volume.right;
return output;
}
auto T6W28::Tone::clock() -> void {
if(!counter--) {
counter = pitch;
output ^= 1;
}
}
auto T6W28::Noise::clock() -> void {
if(!counter--) {
counter = array<uint10[4]>{0x10, 0x20, 0x40, pitch}[rate];
if(flip ^= 1) {
output = !lfsr.bit(0);
lfsr = (lfsr.bit(0) ^ lfsr.bit(2) & enable) << 14 | lfsr >> 1;
}
}
}
auto T6W28::writeLeft(uint8 data) -> void {
if(data.bit(7)) io.register = data.bit(4,6);
if(io.register.bit(0)) switch(io.register.bit(1,2)) {
case 0: tone0.volume.left = data.bit(0,3); break;
case 1: tone1.volume.left = data.bit(0,3); break;
case 2: tone2.volume.left = data.bit(0,3); break;
case 3: noise.volume.left = data.bit(0,3); break;
}
else if(data.bit(7)) switch(io.register.bit(1,2)) {
case 0: tone0.pitch.bit(0,3) = data.bit(0,3); break;
case 1: tone1.pitch.bit(0,3) = data.bit(0,3); break;
case 2: tone2.pitch.bit(0,3) = data.bit(0,3); break;
}
else switch(io.register.bit(1,2)) {
case 0: tone0.pitch.bit(4,9) = data.bit(0,5); break;
case 1: tone1.pitch.bit(4,9) = data.bit(0,5); break;
case 2: tone2.pitch.bit(4,9) = data.bit(0,5); break;
}
}
auto T6W28::writeRight(uint8 data) -> void {
if(data.bit(7)) io.register = data.bit(4,6);
if(io.register.bit(0)) switch(io.register.bit(1,2)) {
case 0: tone0.volume.right = data.bit(0,3); break;
case 1: tone1.volume.right = data.bit(0,3); break;
case 2: tone2.volume.right = data.bit(0,3); break;
case 3: noise.volume.right = data.bit(0,3); break;
}
else if(data.bit(7)) switch(io.register.bit(1,2)) {
case 2: noise.pitch.bit(0,3) = data.bit(0,3); break;
case 3: noise.rate = data.bit(0,1);
noise.enable = data.bit(2);
noise.lfsr = 0x4000;
break;
}
else switch(io.register.bit(1,2)) {
case 2: noise.pitch.bit(4,9) = data.bit(0,5); break;
}
}
auto T6W28::power() -> void {
tone0 = {};
tone1 = {};
tone2 = {};
noise = {};
io = {};
}
}
-65
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@@ -1,65 +0,0 @@
#pragma once
namespace higan {
//T6W28 (SN76489 variant)
struct T6W28 {
//t6w28.cpp
auto clock() -> array<uint4[8]>;
auto writeLeft(uint8 data) -> void;
auto writeRight(uint8 data) -> void;
auto power() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
protected:
struct Tone {
//t6w28.cpp
auto clock() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
uint10 counter;
uint10 pitch;
uint1 output;
struct Volume {
uint4 left = 15;
uint4 right = 15;
} volume;
};
struct Noise {
//t6w28.cpp
auto clock() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
uint10 counter;
uint10 pitch;
uint1 enable;
uint2 rate;
uint15 lfsr = 0x4000;
uint1 flip;
uint1 output;
struct Volume {
uint4 left = 15;
uint4 right = 15;
} volume;
};
struct IO {
uint3 register;
};
Tone tone0;
Tone tone1;
Tone tone2;
Noise noise;
IO io;
};
}
@@ -1,60 +0,0 @@
auto YM2149::serialize(serializer& s) -> void {
s.integer(toneA.counter);
s.integer(toneA.period);
s.integer(toneA.unused);
s.integer(toneA.output);
s.integer(toneB.counter);
s.integer(toneB.period);
s.integer(toneB.unused);
s.integer(toneB.output);
s.integer(toneC.counter);
s.integer(toneC.period);
s.integer(toneC.unused);
s.integer(toneC.output);
s.integer(noise.counter);
s.integer(noise.period);
s.integer(noise.unused);
s.integer(noise.flip);
s.integer(noise.lfsr);
s.integer(noise.output);
s.integer(envelope.counter);
s.integer(envelope.period);
s.integer(envelope.holding);
s.integer(envelope.attacking);
s.integer(envelope.hold);
s.integer(envelope.alternate);
s.integer(envelope.attack);
s.integer(envelope.repeat);
s.integer(envelope.unused);
s.integer(envelope.output);
s.integer(channelA.tone);
s.integer(channelA.noise);
s.integer(channelA.envelope);
s.integer(channelA.volume);
s.integer(channelA.unused);
s.integer(channelB.tone);
s.integer(channelB.noise);
s.integer(channelB.envelope);
s.integer(channelB.volume);
s.integer(channelB.unused);
s.integer(channelC.tone);
s.integer(channelC.noise);
s.integer(channelC.envelope);
s.integer(channelC.volume);
s.integer(channelC.unused);
s.integer(portA.direction);
s.integer(portA.data);
s.integer(portB.direction);
s.integer(portB.data);
s.integer(io.register);
}
-243
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@@ -1,243 +0,0 @@
#include <emulator/emulator.hpp>
#include "ym2149.hpp"
namespace higan {
#include "serialization.cpp"
auto YM2149::clock() -> array<uint5[3]> {
toneA.clock();
toneB.clock();
toneC.clock();
noise.clock();
envelope.clock();
array<uint5[3]> output;
if((toneA.output | channelA.tone) & (noise.output | channelA.noise)) {
output[0] = channelA.envelope ? envelope.output : uint5(channelA.volume << 1 | 1);
}
if((toneB.output | channelB.tone) & (noise.output | channelB.noise)) {
output[1] = channelB.envelope ? envelope.output : uint5(channelB.volume << 1 | 1);
}
if((toneC.output | channelC.tone) & (noise.output | channelC.noise)) {
output[2] = channelC.envelope ? envelope.output : uint5(channelC.volume << 1 | 1);
}
return output;
}
auto YM2149::Tone::clock() -> void {
if(++counter >= period) {
counter = 0;
output ^= 1;
}
}
auto YM2149::Noise::clock() -> void {
if(++counter >= period) {
counter = 0;
if(flip ^= 1) {
output = !lfsr.bit(0);
lfsr = (lfsr.bit(0) ^ lfsr.bit(3)) << 16 | lfsr >> 1;
}
}
}
auto YM2149::Envelope::clock() -> void {
if(holding) return;
counter += 2;
if(counter >= period) {
counter = 0;
if(!attacking) {
if(output != 0) return (void)output--;
} else {
if(output != 31) return (void)output++;
}
if(!repeat) {
output = 0;
holding = 1;
} else if(hold) {
if(alternate) output ^= 31;
holding = 1;
} else if(alternate) {
attacking ^= 1;
} else {
output = !attacking ? 31 : 0;
}
}
}
auto YM2149::read() -> uint8 {
uint8 data;
switch(io.register) {
case 0:
data.bit(0,7) = toneA.period.bit(0, 7);
break;
case 1:
data.bit(0,3) = toneA.period.bit(8,11);
data.bit(4,7) = toneA.unused.bit(0, 3);
break;
case 2:
data.bit(0,7) = toneB.period.bit(0, 7);
break;
case 3:
data.bit(0,3) = toneB.period.bit(8,11);
data.bit(4,7) = toneB.unused.bit(0, 3);
break;
case 4:
data.bit(0,7) = toneC.period.bit(0, 7);
break;
case 5:
data.bit(0,3) = toneC.period.bit(8,11);
data.bit(4,7) = toneC.unused.bit(0, 3);
break;
case 6:
data.bit(0,4) = noise.period;
data.bit(5,7) = noise.unused;
break;
case 7:
data.bit(0) = channelA.tone;
data.bit(1) = channelB.tone;
data.bit(2) = channelC.tone;
data.bit(3) = channelA.noise;
data.bit(4) = channelB.noise;
data.bit(5) = channelC.noise;
data.bit(6) = portA.direction;
data.bit(7) = portB.direction;
break;
case 8:
data.bit(0,3) = channelA.volume;
data.bit(4) = channelA.envelope;
data.bit(5,7) = channelA.unused;
break;
case 9:
data.bit(0,3) = channelB.volume;
data.bit(4) = channelB.envelope;
data.bit(5,7) = channelB.unused;
break;
case 10:
data.bit(0,3) = channelC.volume;
data.bit(4) = channelC.envelope;
data.bit(5,7) = channelC.unused;
break;
case 11:
data.bit(0,7) = envelope.period.bit(0, 7);
break;
case 12:
data.bit(0,7) = envelope.period.bit(8,15);
break;
case 13:
data.bit(0) = envelope.hold;
data.bit(1) = envelope.alternate;
data.bit(2) = envelope.attack;
data.bit(3) = envelope.repeat;
data.bit(4,7) = envelope.unused;
break;
case 14:
data.bit(0,7) = portA.data;
break;
case 15:
data.bit(0,7) = portB.data;
break;
}
return data;
}
auto YM2149::write(uint8 data) -> void {
switch(io.register) {
case 0:
toneA.period.bit(0, 7) = data.bit(0,7);
break;
case 1:
toneA.period.bit(8,11) = data.bit(0,3);
toneA.unused.bit(0, 3) = data.bit(4,7);
break;
case 2:
toneB.period.bit(0, 7) = data.bit(0,7);
break;
case 3:
toneB.period.bit(8,11) = data.bit(0,3);
toneB.unused.bit(0, 3) = data.bit(4,7);
break;
case 4:
toneC.period.bit(0, 7) = data.bit(0,7);
break;
case 5:
toneC.period.bit(8,11) = data.bit(0,3);
toneC.unused.bit(0, 3) = data.bit(4,7);
break;
case 6:
noise.period = data.bit(0,4);
noise.unused = data.bit(5,7);
break;
case 7:
channelA.tone = data.bit(0);
channelB.tone = data.bit(1);
channelC.tone = data.bit(2);
channelA.noise = data.bit(3);
channelB.noise = data.bit(4);
channelC.noise = data.bit(5);
portA.direction = data.bit(6);
portB.direction = data.bit(7);
break;
case 8:
channelA.volume = data.bit(0,3);
channelA.envelope = data.bit(4);
channelA.unused = data.bit(5,7);
break;
case 9:
channelB.volume = data.bit(0,3);
channelB.envelope = data.bit(4);
channelB.unused = data.bit(5,7);
break;
case 10:
channelC.volume = data.bit(0,3);
channelC.envelope = data.bit(4);
channelC.unused = data.bit(5,7);
break;
case 11:
envelope.period.bit(0, 7) = data.bit(0,7);
break;
case 12:
envelope.period.bit(8,15) = data.bit(0,7);
break;
case 13:
envelope.hold = data.bit(0);
envelope.alternate = data.bit(1);
envelope.attack = data.bit(2);
envelope.repeat = data.bit(3);
envelope.unused = data.bit(4,7);
envelope.holding = 0;
envelope.attacking = envelope.attack;
envelope.output = !envelope.attacking ? 31 : 0;
break;
case 14:
portA.data = data;
break;
case 15:
portB.data = data;
break;
}
}
auto YM2149::select(uint4 data) -> void {
io.register = data;
}
auto YM2149::power() -> void {
toneA = {};
toneB = {};
toneC = {};
noise = {};
envelope = {};
channelA = {};
channelB = {};
channelC = {};
portA = {};
portB = {};
io = {};
}
}
-87
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@@ -1,87 +0,0 @@
#pragma once
namespace higan {
//Yamaha YM2149 (General Instrument AY-3-8910 derivative)
struct YM2149 {
//ym2149.cpp
auto clock() -> array<uint5[3]>;
auto read() -> uint8;
auto write(uint8 data) -> void;
auto select(uint4 data) -> void;
auto power() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
protected:
struct Tone {
//ym2149.cpp
auto clock() -> void;
uint12 counter;
uint12 period;
uint4 unused;
uint1 output;
};
struct Noise {
//ym2149.cpp
auto clock() -> void;
uint5 counter;
uint5 period;
uint3 unused;
uint1 flip;
uint17 lfsr = 1;
uint1 output;
};
struct Envelope {
//ym2149.cpp
auto clock() -> void;
uint16 counter;
uint16 period;
uint1 holding;
uint1 attacking;
uint1 hold;
uint1 alternate;
uint1 attack;
uint1 repeat; //continue
uint4 unused;
uint5 output;
};
struct Channel {
uint1 tone; //0 = enable, 1 = disable
uint1 noise; //0 = enable, 1 = disable
uint1 envelope; //0 = use fixed volume, 1 = use envelope volume
uint4 volume;
uint3 unused;
};
struct Port {
uint1 direction; //0 = input, 1 = output
uint8 data;
};
struct IO {
uint4 register;
};
Tone toneA;
Tone toneB;
Tone toneC;
Noise noise;
Envelope envelope;
Channel channelA;
Channel channelB;
Channel channelC;
Port portA;
Port portB;
IO io;
};
}
@@ -1,81 +0,0 @@
const int8 YM2413::levelScaling[16] = {
//-6 dB/octave, -6 dB/8 units
//input: fnumber.bits(5,8)
0, 24, 32, 37, 40, 43, 45, 47, 48, 50, 51, 52, 53, 54, 55, 56,
};
const uint64 YM2413::envelopeSteps[17][2] = {
//{attack sequence, decay sequence },
{0x0101010101010101, 0x0101010101010101}, // 4..44
{0x0101110101011101, 0x0101110101011101}, // 5..45
{0x0111011101110111, 0x0111011101110111}, // 6..46
{0x0111111101111111, 0x0111111101111111}, // 7..47
{0x1111111111111111, 0x0101010101010101}, //48
{0x1121112111211121, 0x0101110101011101}, //49
{0x1212121212121212, 0x0111011101110111}, //50
{0x1222122212221222, 0x0111111101111111}, //51
{0x2222222222222222, 0x0101010101010101}, //52
{0x2242224222422242, 0x0101010111110101}, //53
{0x2424242424242424, 0x0101111101011111}, //54
{0x2444244424442444, 0x0101111111111111}, //55
{0x4444444444444444, 0x1111111111111111}, //56
{0x4484448444844484, 0x1111111122221111}, //57
{0x4848484848484848, 0x1111222211112222}, //58
{0x4888488848884888, 0x1111222222222222}, //59
{0x0000000000000000, 0x2222222222222222}, //60+
};
/* these are approximations and are not hardware accurate */
const uint8 YM2413::melodicTonesOPLL[15][8] = {
{0x61, 0x61, 0x1e, 0x17, 0xf0, 0x78, 0x00, 0x17},
{0x13, 0x41, 0x1e, 0x0d, 0xd7, 0xf7, 0x13, 0x13},
{0x13, 0x01, 0x99, 0x04, 0xf2, 0xf4, 0x11, 0x23},
{0x21, 0x61, 0x1b, 0x07, 0xaf, 0x64, 0x40, 0x27},
{0x22, 0x21, 0x1e, 0x06, 0xf0, 0x75, 0x08, 0x18},
{0x31, 0x22, 0x16, 0x05, 0x90, 0x71, 0x00, 0x13},
{0x21, 0x61, 0x1d, 0x07, 0x82, 0x80, 0x10, 0x17},
{0x23, 0x21, 0x2d, 0x16, 0xc0, 0x70, 0x07, 0x07},
{0x61, 0x61, 0x1b, 0x06, 0x64, 0x65, 0x10, 0x17},
{0x61, 0x61, 0x0c, 0x18, 0x85, 0xf0, 0x70, 0x07},
{0x23, 0x01, 0x07, 0x11, 0xf0, 0xa4, 0x00, 0x22},
{0x97, 0xc1, 0x24, 0x07, 0xff, 0xf8, 0x22, 0x12},
{0x61, 0x10, 0x0c, 0x05, 0xf2, 0xf4, 0x40, 0x44},
{0x01, 0x01, 0x55, 0x03, 0xf3, 0x92, 0xf3, 0xf3},
{0x61, 0x41, 0x89, 0x03, 0xf1, 0xf4, 0xf0, 0x13},
};
const uint8 YM2413::rhythmTonesOPLL[3][8] = {
{0x01, 0x01, 0x16, 0x00, 0xfd, 0xf8, 0x2f, 0x6d},
{0x01, 0x01, 0x00, 0x00, 0xd8, 0xd8, 0xf9, 0xf8},
{0x05, 0x01, 0x00, 0x00, 0xf8, 0xba, 0x49, 0x55},
};
/* these tables were extracted from the VRC7 debug mode: likely inaccurate for the YM2413 */
const uint8 YM2413::melodicTonesVRC7[15][8] = {
{0x03, 0x21, 0x05, 0x06, 0xe8, 0x81, 0x42, 0x27}, //1: violin
{0x13, 0x41, 0x14, 0x0d, 0xd8, 0xf6, 0x23, 0x12}, //2: guitar
{0x11, 0x11, 0x08, 0x08, 0xfa, 0xb2, 0x20, 0x12}, //3: piano
{0x31, 0x61, 0x0c, 0x07, 0xa8, 0x64, 0x61, 0x27}, //4: flute
{0x32, 0x21, 0x1e, 0x06, 0xe1, 0x76, 0x01, 0x28}, //5: clarinet
{0x02, 0x01, 0x06, 0x00, 0xa3, 0xe2, 0xf4, 0xf4}, //6: oboe
{0x21, 0x61, 0x1d, 0x07, 0x82, 0x81, 0x11, 0x07}, //7: trumpet
{0x23, 0x21, 0x22, 0x17, 0xa2, 0x72, 0x01, 0x17}, //8: organ
{0x35, 0x11, 0x25, 0x00, 0x40, 0x73, 0x72, 0x01}, //9: horn
{0xb5, 0x01, 0x0f, 0x0f, 0xa8, 0xa5, 0x51, 0x02}, //a: synthesizer
{0x17, 0xc1, 0x24, 0x07, 0xf8, 0xf8, 0x22, 0x12}, //b: harpischord
{0x71, 0x23, 0x11, 0x06, 0x65, 0x74, 0x18, 0x16}, //c: vibraphone
{0x01, 0x02, 0xd3, 0x05, 0xc9, 0x95, 0x03, 0x02}, //d: synthesizer bass
{0x61, 0x63, 0x0c, 0x00, 0x94, 0xc0, 0x33, 0xf6}, //e: acoustic bass
{0x21, 0x72, 0x0d, 0x00, 0xc1, 0xd5, 0x56, 0x06}, //f: electric guitar
};
const uint8 YM2413::rhythmTonesVRC7[3][8] = {
{0x01, 0x01, 0x18, 0x0f, 0xdf, 0xf8, 0x6a, 0x6d}, //7, 13/16: bass drum
{0x01, 0x01, 0x00, 0x00, 0xc8, 0xd8, 0xa7, 0x68}, //8, 14/17: hihat, snare drum
{0x05, 0x01, 0x00, 0x00, 0xf8, 0xaa, 0x59, 0x55}, //9, 15/18: tomtom, top cymbal
};
uint13 YM2413::sinTable[1 << 10];
int12 YM2413::expTable[1 << 9];
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auto YM2413::address(uint8 data) -> void {
io.address = data;
}
auto YM2413::write(uint8 data) -> void {
uint4 index = io.address.bit(0,3) % 9;
auto& voice = voices[index];
if(io.address >= 0x00 && io.address <= 0x07) {
customTone[io.address] = data;
for(uint n : range(9)) {
if(voices[n].tone == 0) reload(n);
}
return;
}
if(io.address == 0x0e) {
if(io.isVRC7) return;
if(io.rhythmMode != data.bit(5)) {
io.rhythmMode = data.bit(5);
for(uint n : range(9)) reload(n);
}
if(io.rhythmMode) {
hihat.trigger(data.bit(0));
cymbal.trigger(data.bit(1));
tomtom.trigger(data.bit(2));
snare.trigger(data.bit(3));
bass.carrier.trigger(data.bit(4));
}
return;
}
if(io.address == 0x0f) {
//test register is currently unemulated
return;
}
if(io.address >= 0x10 && io.address <= 0x1f) { //0x19+ mirrors 0x10+
if(io.isVRC7 && index >= 6) return;
voice.fnumber.bit(0,7) = data;
voice.update();
return;
}
if(io.address >= 0x20 && io.address <= 0x2f) { //0x29+ mirrors 0x20+
if(io.isVRC7 && index >= 6) return;
voice.fnumber.bit(8) = data.bit(0);
voice.block = data.bit(1,3);
uint1 keyOn = data.bit(4);
uint1 sustainOn = data.bit(5);
voice.update();
voice.carrier.trigger(keyOn, sustainOn);
return;
}
if(io.address >= 0x30 && io.address <= 0x3f) { //0x39+ mirrors 0x30+
if(io.isVRC7 && index >= 6) return;
voice.level = data.bit(0,3);
voice.tone = data.bit(4,7);
if(io.rhythmMode && index >= 6) voice.update();
else if(voice.tone) voice.update(melodicTones[voice.tone - 1]);
else voice.update(customTone);
return;
}
}
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auto YM2413::Operator::releaseRate() const -> uint4 {
if(state == Trigger) return 13;
if(state == Attack) return attack;
if(state == Decay) return decay;
if(state == Sustain) return sustainable ? (uint4)0 : release;
// state == Release
if(!audible) return 0; //should never happen
if(sustainOn) return 5; //carrier only
return sustainable ? release : (uint4)7;
}
auto YM2413::Operator::update(maybe<uint> updateState) -> void {
if(updateState) state = updateState();
auto baseRate = releaseRate();
auto ksr = 2 * block + fnumber.bit(8) >> (scaleRate ? 0 : 2);
rate = min(60, baseRate ? 4 * baseRate + ksr : 0);
divider = max(state == Attack ? 2 : 0, 13 - rate / 4);
sequence = envelopeSteps[rate < 48 ? rate % 4 : rate - 44][state == Attack ? 0 : 1];
auto ksl = levelScaling[fnumber.bit(5,8)] + 8 * block - 56;
level = totalLevel;
level += max(0, scaleLevel ? ksl : 0) >> 3 - scaleLevel;
auto f = fnumber.bit(6,8);
long m = multiple;
long lfo[8]{0, -f/2, -f, -f/2, 0, +f/2, +f, +f/2};
m += (m == 14) - (m == 13 || m == 11); //unimplemented; maps to 15, 12, or 10
m = max(1, 2 * m); //0 => 1/2, which truncates fnumber bit 0
for(uint n : range(8)) {
pitch[n] = (fnumber + lfo[n]) * m / 2 << block;
}
}
auto YM2413::Operator::synchronize(uint1 hard, maybe<Operator&> modulator) -> void {
if(state == Trigger && envelope.bit(2,6) == 31) {
update(Attack);
if(rate >= 60) update(Decay), envelope = 0;
if(hard) phase = 0;
if(modulator) {
modulator->update(Attack);
if(modulator->rate >= 60) modulator->update(Decay), modulator->envelope = 0;
if(hard) modulator->phase = 0;
}
}
if(state == Attack && envelope == 0x00) update(Decay);
if(state == Decay && envelope >= sustain << 3) update(Sustain);
if(modulator) modulator->synchronize(hard);
}
//only carriers (never modulators) call trigger()
auto YM2413::Operator::trigger(uint1 key, uint1 sustain) -> void {
sustainOn = sustain;
if(keyOn == key) return;
keyOn = key;
update(keyOn ? Trigger : Release);
}
auto YM2413::Operator::clock(natural clock, integer offset, integer modulation) -> int12 {
uint14 y = YM2413::sinTable[uint10(offset + modulation)];
if(waveform & ~y.bit(0)) y = sinTable[0];
auto w = clock / 64 % 210 * tremolo;
auto lfo = (w < 105 ? w : 210 - w) >> 3;
y += envelope << 4 + 1;
y += level << 5 + 1;
y += lfo << 4 + 1;
prior = output;
output = expTable[y.bit(0,8)] * 1L >> y.bit(9,13);
phase += pitch[clock / 1024 % 8 * vibrato];
auto lsbs = divider ? clock.bit(0, divider - 1) : 0;
if(rate && (state == Attack ? lsbs & -4 : lsbs) == 0) {
natural msbs = uint4(clock >> divider);
integer step = uint4(sequence << 4 * msbs >> 60);
if(state == Attack) step = ~envelope * step >> 4;
envelope = max(0x00, min(0x7f, envelope + step));
}
return output;
}
@@ -1,55 +0,0 @@
auto YM2413::serialize(serializer& s) -> void {
//melodicTones and rhythmTones are not serialized here:
//they are reloaded during YM2413::power()
s.array(customTone);
for(auto& voice : voices) voice.serialize(s);
s.integer(io.clock);
s.integer(io.address);
s.integer(io.rhythmMode);
s.integer(io.noise);
s.integer(io.isVRC7);
}
auto YM2413::Voice::serialize(serializer& s) -> void {
s.integer(tone);
s.integer(fnumber);
s.integer(block);
s.integer(level);
s.integer(feedback);
modulator.serialize(s);
carrier.serialize(s);
}
auto YM2413::Operator::serialize(serializer& s) -> void {
s.integer(slot);
s.integer(keyOn);
s.integer(sustainOn);
s.integer(multiple);
s.integer(scaleRate);
s.integer(sustainable);
s.integer(vibrato);
s.integer(tremolo);
s.integer(scaleLevel);
s.integer(waveform);
s.integer(attack);
s.integer(decay);
s.integer(sustain);
s.integer(release);
s.integer(totalLevel);
s.integer(audible);
s.integer(state);
s.integer(rate);
s.integer(divider);
s.integer(sequence);
s.integer(envelope);
s.integer(level);
s.integer(fnumber);
s.integer(block);
s.array(pitch);
s.integer(phase);
s.integer(output);
s.integer(prior);
}
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auto YM2413::Voice::update(const uint8* data) -> void {
if(data) {
modulator.multiple = data[0].bit(0,3);
modulator.scaleRate = data[0].bit(4);
modulator.sustainable = data[0].bit(5);
modulator.vibrato = data[0].bit(6);
modulator.tremolo = data[0].bit(7);
carrier.multiple = data[1].bit(0,3);
carrier.scaleRate = data[1].bit(4);
carrier.sustainable = data[1].bit(5);
carrier.vibrato = data[1].bit(6);
carrier.tremolo = data[1].bit(7);
modulator.totalLevel = data[2].bit(0,5);
modulator.scaleLevel.bit(1) = data[2].bit(6);
modulator.scaleLevel.bit(0) = data[2].bit(7); //bits swapped
feedback = data[3].bit(0,2);
modulator.waveform = data[3].bit(3);
carrier.waveform = data[3].bit(4);
//unused = data[3].bit(5);
carrier.scaleLevel.bit(1) = data[3].bit(6);
carrier.scaleLevel.bit(0) = data[3].bit(7); //bits swapped
modulator.decay = data[4].bit(0,3);
modulator.attack = data[4].bit(4,7);
carrier.decay = data[5].bit(0,3);
carrier.attack = data[5].bit(4,7);
modulator.release = data[6].bit(0,3);
modulator.sustain = data[6].bit(4,7);
carrier.release = data[7].bit(0,3);
carrier.sustain = data[7].bit(4,7);
}
modulator.block = block;
modulator.fnumber = fnumber;
if(modulator.audible) modulator.totalLevel = tone << 2;
modulator.update();
carrier.block = block;
carrier.fnumber = fnumber;
carrier.totalLevel = level << 2;
carrier.update();
}
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#include <emulator/emulator.hpp>
#include "ym2413.hpp"
namespace higan {
#include "constants.cpp"
#include "operator.cpp"
#include "voice.cpp"
#include "io.cpp"
#include "serialization.cpp"
auto YM2413::clock() -> double {
auto melody = 0;
auto rhythm = 0;
auto mask = -(1 << 12 - 9);
for(uint index : range(io.rhythmMode ? 6 : 9)) {
auto& voice = voices[index];
auto input = voice.modulator.output + voice.modulator.prior >> 8 - voice.feedback;
voice.modulator.clock(io.clock, voice.modulator.phase >> 9, voice.feedback ? input : 0);
voice.carrier.clock(io.clock, voice.carrier.phase >> 9, voice.modulator.output << 1);
voice.carrier.synchronize(true, voice.modulator);
melody += mask & voice.carrier.output;
}
if(io.rhythmMode) {
auto metallic = [](auto a, auto b) {
return (a.bit(16) ^ a.bit(11)) | a.bit(12) | b.bit(14) | b.bit(12);
};
auto noise = io.noise.bit(0);
auto m = metallic(hihat.phase, cymbal.phase);
auto input = bass.modulator.output + bass.modulator.prior >> 8 - bass.feedback;
bass.modulator.clock(io.clock, bass.modulator.phase >> 9, bass.feedback ? input : 0);
bass.carrier.clock(io.clock, bass.carrier.phase >> 9, bass.modulator.output << 1);
bass.carrier.synchronize(true, bass.modulator);
rhythm += mask & bass.carrier.output;
rhythm += mask & hihat.clock(io.clock, m << 9 | (m ^ noise ? 52 : 208));
rhythm += mask & tomtom.clock(io.clock, tomtom.phase >> 9);
rhythm += mask & snare.clock(io.clock, 1 << snare.phase.bit(17) + 8 ^ noise << 8);
rhythm += mask & cymbal.clock(io.clock, m << 9 | 256);
hihat.synchronize(false);
snare.synchronize(true);
tomtom.synchronize(true);
cymbal.synchronize(false);
}
auto mix = melody + 2 * rhythm;
io.noise = io.noise >> 1 ^ io.noise.bit(0) * (1 << 22 | 1 << 8 | 1 << 7 | 1 << 0);
if(++io.clock == 210 << 12) io.clock -= 210 << 12;
return mix / 32768.0 * 4.0;
}
auto YM2413::reload(uint4 index) -> void {
auto& voice = voices[index];
voice.modulator.audible = io.rhythmMode && index > 6;
voice.carrier.audible = true;
if(io.rhythmMode && index >= 6) voice.update(rhythmTones[index - 6]);
else if(voice.tone) voice.update(melodicTones[voice.tone - 1]);
else voice.update(customTone);
}
auto YM2413::power(bool isVRC7) -> void {
if(isVRC7) {
memory::copy(melodicTones, sizeof(melodicTones), melodicTonesVRC7, sizeof(melodicTonesVRC7));
memory::copy( rhythmTones, sizeof( rhythmTones), rhythmTonesVRC7, sizeof(rhythmTonesVRC7));
} else {
memory::copy(melodicTones, sizeof(melodicTones), melodicTonesOPLL, sizeof(melodicTonesOPLL));
memory::copy( rhythmTones, sizeof( rhythmTones), rhythmTonesOPLL, sizeof(rhythmTonesOPLL));
}
for(auto& byte : customTone) byte = 0x00;
if(!sinTable[0] || !expTable[0])
for(auto x : range(0x100)) {
//10.9 fixed point phases
auto y = sin((2 * x + 1) * Math::Pi / 1024.0); //0x400 units to 2pi radians
auto z = -(1 << 8) * log(y) / log(2); //convert to -6 dB/256 units
auto s = (1 << 10) * pow(2, uint8(~x) / 256.0); //0x7fa .. 0x400
sinTable[0x000 + x] = sinTable[0x1ff - x] = uint(z + 0.5) * 2 + 1;
sinTable[0x200 + x] = sinTable[0x3ff - x] = uint(z + 0.5) * 2 + 0;
expTable[x * 2 + 1] = +uint(s + 0.5);
expTable[x * 2 + 0] = ~uint(s + 0.5);
}
io = {};
io.isVRC7 = isVRC7;
for(uint n : range(9)) {
voices[n] = {};
reload(n);
}
for(uint n : range(3)) {
voices[3 * n + 0].modulator.slot = 1 + 6 * n;
voices[3 * n + 1].modulator.slot = 2 + 6 * n;
voices[3 * n + 2].modulator.slot = 3 + 6 * n;
voices[3 * n + 0].carrier.slot = 4 + 6 * n;
voices[3 * n + 1].carrier.slot = 5 + 6 * n;
voices[3 * n + 2].carrier.slot = 6 + 6 * n;
}
}
}
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#pragma once
namespace higan {
//Yamaha YM2413 (OPLL)
//Author: Talarubi
struct YM2413 {
//ym2413.cpp
auto clock() -> double;
auto reload(uint4 voice) -> void;
auto power(bool isVRC7 = false) -> void;
//io.cpp
auto address(uint8 data) -> void;
auto write(uint8 data) -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
protected:
static const int8 levelScaling[16];
static const uint64 envelopeSteps[17][2];
static const uint8 melodicTonesOPLL[15][8];
static const uint8 rhythmTonesOPLL[3][8];
static const uint8 melodicTonesVRC7[15][8];
static const uint8 rhythmTonesVRC7[3][8];
static uint13 sinTable[1 << 10];
static int12 expTable[1 << 9];
uint8 melodicTones[15][8];
uint8 rhythmTones[3][8];
uint8 customTone[8];
enum : uint { Trigger, Attack, Decay, Sustain, Release };
struct Operator {
//operator.cpp
auto releaseRate() const -> uint4;
auto update(maybe<uint> state = {}) -> void;
auto synchronize(uint1 hard, maybe<Operator&> modulator = {}) -> void;
auto trigger(uint1 key, uint1 sustain = 0) -> void;
auto clock(natural clock, integer offset, integer modulation = 0) -> int12;
//serialization.cpp
auto serialize(serializer&) -> void;
uint5 slot; //1-18
uint1 keyOn;
uint1 sustainOn;
uint4 multiple;
uint1 scaleRate;
uint1 sustainable;
uint1 vibrato;
uint1 tremolo;
uint2 scaleLevel;
uint1 waveform;
uint4 attack;
uint4 decay;
uint4 sustain;
uint4 release;
uint6 totalLevel;
uint1 audible;
//envelope generator
uint3 state = Release;
uint7 rate;
uint4 divider;
uint64 sequence;
uint7 envelope = 0x7f;
uint7 level;
//phase generator
uint9 fnumber;
uint3 block;
uint19 pitch[8];
uint19 phase;
//output
int12 output;
int12 prior;
};
struct Voice {
//voice.cpp
auto update(const uint8* data = nullptr) -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
uint4 tone;
uint9 fnumber;
uint3 block;
uint4 level;
uint3 feedback;
Operator modulator;
Operator carrier;
} voices[9];
struct IO {
uint32 clock;
uint8 address;
uint1 rhythmMode;
uint23 noise = 1;
uint1 isVRC7 = 0;
} io;
Voice& bass = voices[6];
Operator& hihat = voices[7].modulator;
Operator& snare = voices[7].carrier;
Operator& tomtom = voices[8].modulator;
Operator& cymbal = voices[8].carrier;
};
}
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#include <emulator/emulator.hpp>
#include "m93lcx6.hpp"
namespace higan {
#include "serialization.cpp"
M93LCx6::operator bool() const {
return size;
}
auto M93LCx6::reset() -> void {
size = 0;
}
auto M93LCx6::allocate(uint size, uint width, uint8 fill) -> bool {
if(size != 128 && size != 256 && size != 512 && size != 1024 && size != 2048) return false;
if(width != 8 && width != 16) return false;
this->size = size;
this->width = width;
for(auto& byte : data) byte = fill;
input.addressLength = 0;
input.dataLength = width;
//note: the 93LC56 and 93LC76 have an extra dummy address bit
if(size == 128) input.addressLength = width == 16 ? 6 : 7; //93LC46
if(size == 256) input.addressLength = width == 16 ? 8 : 9; //93LC56
if(size == 512) input.addressLength = width == 16 ? 8 : 9; //93LC66
if(size == 1024) input.addressLength = width == 16 ? 10 : 11; //93LC76
if(size == 2048) input.addressLength = width == 16 ? 10 : 11; //93LC86
return true;
}
//used externally to program initial state values for uninitialized EEPROMs
auto M93LCx6::program(uint11 address, uint8 value) -> void {
data[address] = value;
}
//1ms frequency
auto M93LCx6::clock() -> void {
//set during programming commands
if(busy) busy--;
}
auto M93LCx6::power() -> void {
//writable = 0;
busy = 0;
input.flush();
output.flush();
}
auto M93LCx6::edge() -> void {
//wait for start
if(!input.start()) return;
uint start = *input.start();
//start bit must be set
if(start != 1) return input.flush();
//wait for opcode
if(!input.opcode()) return;
uint opcode = *input.opcode();
//wait for address
if(!input.address()) return;
if(opcode == 0b00) {
auto mode = *input.mode();
if(mode == 0b00) return writeDisable();
if(mode == 0b01) return writeAll();
if(mode == 0b10) return eraseAll();
if(mode == 0b11) return writeEnable();
}
if(opcode == 0b01) return write();
if(opcode == 0b10) return read();
if(opcode == 0b11) return erase();
}
//
auto M93LCx6::read() -> void {
uint address = *input.address() << (width == 16) & size - 1;
output.flush();
for(uint4 index : range(width)) {
output.write(data[address + index.bit(3)].bit(index.bit(0,2)));
}
output.write(0); //reads have an extra dummy data bit
}
auto M93LCx6::write() -> void {
if(!input.data()) return; //wait for data
if(!writable) return input.flush();
uint address = *input.address() << (width == 16) & size - 1;
for(uint4 index : range(width)) {
data[address + index.bit(3)].bit(index.bit(0,2)) = input.read();
}
busy = 4; //milliseconds
return input.flush();
}
auto M93LCx6::erase() -> void {
if(!writable) return input.flush();
uint address = *input.address() << (width == 16) & size - 1;
for(uint4 index : range(width)) {
data[address + index.bit(3)].bit(index.bit(0,2)) = 1;
}
busy = 4; //milliseconds
return input.flush();
}
auto M93LCx6::writeAll() -> void {
if(!input.data()) return; //wait for data
if(!writable) return input.flush();
auto word = *input.data();
for(uint address = 0; address < 512;) {
data[address++] = uint8(word >> (width == 16 ? 8 : 0));
data[address++] = uint8(word >> 0);
}
busy = 16; //milliseconds
return input.flush();
}
auto M93LCx6::eraseAll() -> void {
if(!writable) return input.flush();
for(auto& byte : data) byte = 0xff;
busy = 8; //milliseconds
return input.flush();
}
auto M93LCx6::writeEnable() -> void {
writable = true;
return input.flush();
}
auto M93LCx6::writeDisable() -> void {
writable = false;
return input.flush();
}
//
auto M93LCx6::ShiftRegister::flush() -> void {
value = 0;
count = 0;
}
auto M93LCx6::ShiftRegister::edge() -> uint1 {
return value.bit(0);
}
auto M93LCx6::ShiftRegister::read() -> uint1 {
uint1 bit = value.bit(0);
value >>= 1;
count--;
return bit;
}
auto M93LCx6::ShiftRegister::write(uint1 bit) -> void {
value <<= 1;
value.bit(0) = bit;
count++;
}
//
auto M93LCx6::InputShiftRegister::start() -> maybe<uint1> {
if(count < 1) return {};
return {value >> count - 1 & 1};
}
auto M93LCx6::InputShiftRegister::opcode() -> maybe<uint2> {
if(count < 1 + 2) return {};
return {value >> count - 3 & 3};
}
auto M93LCx6::InputShiftRegister::mode() -> maybe<uint2> {
if(count < 1 + 2 + addressLength) return {};
return {value >> count - 5 & 3};
}
auto M93LCx6::InputShiftRegister::address() -> maybe<uint11> {
if(count < 1 + 2 + addressLength) return {};
return {value >> count - (3 + addressLength) & (1 << addressLength) - 1};
}
auto M93LCx6::InputShiftRegister::data() -> maybe<uint16> {
if(count < 1 + 2 + addressLength + dataLength) return {};
return {value >> count - (3 + addressLength + dataLength) & (1 << dataLength) - 1};
}
auto M93LCx6::InputShiftRegister::increment() -> void {
value.bit(0, addressLength - 1)++;
}
}
@@ -1,73 +0,0 @@
#pragma once
namespace higan {
//Microchip 93LCx6
// 93LC46 => 1024 cells => 128 x 8-bit or 64 x 16-bit
// 93LC56 => 2048 cells => 256 x 8-bit or 128 x 16-bit
// 93LC66 => 4096 cells => 512 x 8-bit or 256 x 16-bit
// 93LC76 => 8192 cells => 1024 x 8-bit or 512 x 16-bit
// 93LC86 => 16384 cells => 2048 x 8-bit or 1024 x 16-bit
struct M93LCx6 {
//m93lcx6.cpp
explicit operator bool() const;
auto reset() -> void;
auto allocate(uint size, uint width, uint8 fill = 0xff) -> bool;
auto program(uint11 address, uint8 data) -> void;
auto clock() -> void;
auto power() -> void;
auto edge() -> void;
//chip commands
auto read() -> void;
auto write() -> void;
auto erase() -> void;
auto writeAll() -> void;
auto eraseAll() -> void;
auto writeEnable() -> void;
auto writeDisable() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
//it is awkward no matter if data is uint1[bits], uint8[bytes], or uint16[words]
uint8 data[2048]; //uint8 was chosen solely for easier serialization and saving
uint size; //in bytes
uint width; //8-bit (ORG=0) or 16-bit (ORG=1) configuration
boolean writable; //EWEN, EWDS
uint busy; //busy cycles in milliseconds remaining for programming (write) operations to complete
struct ShiftRegister {
auto flush() -> void;
auto edge() -> uint1;
auto read() -> uint1;
auto write(uint1 data) -> void;
uint32 value;
uint32 count;
};
struct InputShiftRegister : ShiftRegister {
auto start() -> maybe<uint1>;
auto opcode() -> maybe<uint2>;
auto mode() -> maybe<uint2>;
auto address() -> maybe<uint11>;
auto data() -> maybe<uint16>;
auto increment() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
uint32 addressLength;
uint32 dataLength;
} input;
struct OutputShiftRegister : ShiftRegister {
//serialization.cpp
auto serialize(serializer&) -> void;
} output;
};
}
@@ -1,21 +0,0 @@
auto M93LCx6::serialize(serializer& s) -> void {
s.array(data);
s.integer(size);
s.integer(width);
s.boolean(writable);
s.integer(busy);
input.serialize(s);
output.serialize(s);
}
auto M93LCx6::InputShiftRegister::serialize(serializer& s) -> void {
s.integer(value);
s.integer(count);
s.integer(addressLength);
s.integer(dataLength);
}
auto M93LCx6::OutputShiftRegister::serialize(serializer& s) -> void {
s.integer(value);
s.integer(count);
}
@@ -1,19 +0,0 @@
auto X24C01::serialize(serializer& s) -> void {
s.array(memory);
s.integer(clock.lo);
s.integer(clock.hi);
s.integer(clock.fall);
s.integer(clock.rise);
s.integer(clock.line);
s.integer(data.lo);
s.integer(data.hi);
s.integer(data.fall);
s.integer(data.rise);
s.integer(data.line);
s.integer((uint&)mode);
s.integer(counter);
s.integer(address);
s.integer(input);
s.integer(output);
s.integer(line);
}
-128
View File
@@ -1,128 +0,0 @@
#include <emulator/emulator.hpp>
#include "x24c01.hpp"
namespace higan {
#include "serialization.cpp"
auto X24C01::reset() -> void {
clock = {};
data = {};
mode = Mode::Idle;
counter = 0;
address = 0;
input = 0;
output = 0;
line = 1;
}
auto X24C01::read() -> uint1 {
return line;
}
auto X24C01::write(uint1 scl, uint1 sda) -> void {
clock.write(scl);
data.write(sda);
if(clock.hi && data.fall) {
line = 1;
mode = Mode::Address;
counter = 0;
return;
}
if(clock.hi && data.rise) {
line = 1;
mode = Mode::Idle;
return;
}
if(clock.rise) {
if(mode == Mode::Address && counter < 8) {
address = data.line << 7 | address >> 1;
counter++;
return;
}
if(mode == Mode::Read && counter < 8) {
line = output & 1;
output >>= 1;
counter++;
return;
}
if(mode == Mode::Write && counter < 8) {
input = data.line << 7 | input >> 1;
counter++;
return;
}
if(mode == Mode::AddressAcknowledge) {
line = 0;
return;
}
if(mode == Mode::ReadAcknowledge) {
line = 0;
return;
}
if(mode == Mode::WriteAcknowledge) {
line = 0;
return;
}
}
if(clock.fall) {
if(mode == Mode::Address && counter == 8) {
line = 1;
mode = Mode::AddressAcknowledge;
return;
}
if(mode == Mode::Read && counter == 8) {
mode = Mode::ReadAcknowledge;
address.bit(1,7)++;
counter = 0;
return;
}
if(mode == Mode::Write && counter == 8) {
memory[address & 0x7f] = input;
mode = Mode::WriteAcknowledge;
return;
}
if(mode == Mode::AddressAcknowledge) {
mode = address & 0x80 ? Mode::Read : Mode::Write;
output = memory[address & 0x7f];
counter = 0;
return;
}
if(mode == Mode::ReadAcknowledge) {
mode = Mode::Read;
if(!data.line) mode = Mode::Idle;
return;
}
if(mode == Mode::WriteAcknowledge) {
mode = Mode::Idle;
return;
}
}
}
auto X24C01::erase(uint8 fill) -> void {
for(auto& byte : memory) byte = fill;
}
auto X24C01::Line::write(uint1 data) -> void {
lo = !line && !data;
hi = line && data;
fall = line && !data;
rise = !line && data;
line = data;
}
}
-48
View File
@@ -1,48 +0,0 @@
#pragma once
namespace higan {
//X24C01 => 1024 cells => 128 x 8-bit
struct X24C01 {
//x24c01.cpp
auto reset() -> void;
auto read() -> uint1;
auto write(uint1 clock, uint1 data) -> void;
auto erase(uint8 fill = 0xff) -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
uint8 memory[128];
private:
enum class Mode : uint {
Idle,
Address, AddressAcknowledge,
Read, ReadAcknowledge,
Write, WriteAcknowledge,
};
struct Line {
//x24c01.cpp
auto write(uint1 data) -> void;
uint1 lo;
uint1 hi;
uint1 fall;
uint1 rise;
uint1 line;
};
Line clock;
Line data;
Mode mode;
uint8 counter;
uint8 address;
uint8 input;
uint8 output;
uint1 line;
};
}
@@ -1,96 +0,0 @@
auto ARM7TDMI::ADD(uint32 source, uint32 modify, bool carry) -> uint32 {
uint32 result = source + modify + carry;
if(cpsr().t || opcode.bit(20)) {
uint32 overflow = ~(source ^ modify) & (source ^ result);
cpsr().v = 1 << 31 & (overflow);
cpsr().c = 1 << 31 & (overflow ^ source ^ modify ^ result);
cpsr().z = result == 0;
cpsr().n = result.bit(31);
}
return result;
}
auto ARM7TDMI::ASR(uint32 source, uint8 shift) -> uint32 {
carry = cpsr().c;
if(shift == 0) return source;
carry = shift > 32 ? source & 1 << 31 : source & 1 << shift - 1;
source = shift > 31 ? (int32)source >> 31 : (int32)source >> shift;
return source;
}
auto ARM7TDMI::BIT(uint32 result) -> uint32 {
if(cpsr().t || opcode.bit(20)) {
cpsr().c = carry;
cpsr().z = result == 0;
cpsr().n = result.bit(31);
}
return result;
}
auto ARM7TDMI::LSL(uint32 source, uint8 shift) -> uint32 {
carry = cpsr().c;
if(shift == 0) return source;
carry = shift > 32 ? 0 : source & 1 << 32 - shift;
source = shift > 31 ? 0 : source << shift;
return source;
}
auto ARM7TDMI::LSR(uint32 source, uint8 shift) -> uint32 {
carry = cpsr().c;
if(shift == 0) return source;
carry = shift > 32 ? 0 : source & 1 << shift - 1;
source = shift > 31 ? 0 : source >> shift;
return source;
}
auto ARM7TDMI::MUL(uint32 product, uint32 multiplicand, uint32 multiplier) -> uint32 {
idle();
if(multiplier >> 8 && multiplier >> 8 != 0xffffff) idle();
if(multiplier >> 16 && multiplier >> 16 != 0xffff) idle();
if(multiplier >> 24 && multiplier >> 24 != 0xff) idle();
product += multiplicand * multiplier;
if(cpsr().t || opcode.bit(20)) {
cpsr().z = product == 0;
cpsr().n = product.bit(31);
}
return product;
}
auto ARM7TDMI::ROR(uint32 source, uint8 shift) -> uint32 {
carry = cpsr().c;
if(shift == 0) return source;
if(shift &= 31) source = source << 32 - shift | source >> shift;
carry = source & 1 << 31;
return source;
}
auto ARM7TDMI::RRX(uint32 source) -> uint32 {
carry = source.bit(0);
return cpsr().c << 31 | source >> 1;
}
auto ARM7TDMI::SUB(uint32 source, uint32 modify, bool carry) -> uint32 {
return ADD(source, ~modify, carry);
}
auto ARM7TDMI::TST(uint4 mode) -> bool {
switch(mode) {
case 0: return cpsr().z == 1; //EQ (equal)
case 1: return cpsr().z == 0; //NE (not equal)
case 2: return cpsr().c == 1; //CS (carry set)
case 3: return cpsr().c == 0; //CC (carry clear)
case 4: return cpsr().n == 1; //MI (negative)
case 5: return cpsr().n == 0; //PL (positive)
case 6: return cpsr().v == 1; //VS (overflow)
case 7: return cpsr().v == 0; //VC (no overflow)
case 8: return cpsr().c == 1 && cpsr().z == 0; //HI (unsigned higher)
case 9: return cpsr().c == 0 || cpsr().z == 1; //LS (unsigned lower or same)
case 10: return cpsr().n == cpsr().v; //GE (signed greater than or equal)
case 11: return cpsr().n != cpsr().v; //LT (signed less than)
case 12: return cpsr().z == 0 && cpsr().n == cpsr().v; //GT (signed greater than)
case 13: return cpsr().z == 1 || cpsr().n != cpsr().v; //LE (signed less than or equal)
case 14: return true; //AL (always)
case 15: return false; //NV (never)
}
unreachable;
}
@@ -1,30 +0,0 @@
#include <emulator/emulator.hpp>
#include "arm7tdmi.hpp"
namespace higan {
#include "registers.cpp"
#include "memory.cpp"
#include "algorithms.cpp"
#include "instruction.cpp"
#include "instructions-arm.cpp"
#include "instructions-thumb.cpp"
#include "serialization.cpp"
#include "disassembler.cpp"
ARM7TDMI::ARM7TDMI() {
armInitialize();
thumbInitialize();
}
auto ARM7TDMI::power() -> void {
processor = {};
processor.r15.modify = [&] { pipeline.reload = true; };
pipeline = {};
carry = 0;
irq = 0;
cpsr().f = 1;
exception(PSR::SVC, 0x00);
}
}
@@ -1,285 +0,0 @@
//ARMv4 (ARM7TDMI)
#pragma once
namespace higan {
struct ARM7TDMI {
enum : uint {
Nonsequential = 1 << 0, //N cycle
Sequential = 1 << 1, //S cycle
Prefetch = 1 << 2, //instruction fetch
Byte = 1 << 3, // 8-bit access
Half = 1 << 4, //16-bit access
Word = 1 << 5, //32-bit access
Load = 1 << 6, //load operation
Store = 1 << 7, //store operation
Signed = 1 << 8, //sign-extend
};
virtual auto step(uint clocks) -> void = 0;
virtual auto sleep() -> void = 0;
virtual auto get(uint mode, uint32 address) -> uint32 = 0;
virtual auto set(uint mode, uint32 address, uint32 word) -> void = 0;
//arm7tdmi.cpp
ARM7TDMI();
auto power() -> void;
//registers.cpp
struct GPR;
struct PSR;
inline auto r(uint4) -> GPR&;
inline auto cpsr() -> PSR&;
inline auto spsr() -> PSR&;
inline auto privileged() const -> bool;
inline auto exception() const -> bool;
//memory.cpp
auto idle() -> void;
auto read(uint mode, uint32 address) -> uint32;
auto load(uint mode, uint32 address) -> uint32;
auto write(uint mode, uint32 address, uint32 word) -> void;
auto store(uint mode, uint32 address, uint32 word) -> void;
//algorithms.cpp
auto ADD(uint32, uint32, bool) -> uint32;
auto ASR(uint32, uint8) -> uint32;
auto BIT(uint32) -> uint32;
auto LSL(uint32, uint8) -> uint32;
auto LSR(uint32, uint8) -> uint32;
auto MUL(uint32, uint32, uint32) -> uint32;
auto ROR(uint32, uint8) -> uint32;
auto RRX(uint32) -> uint32;
auto SUB(uint32, uint32, bool) -> uint32;
auto TST(uint4) -> bool;
//instruction.cpp
auto fetch() -> void;
auto instruction() -> void;
auto exception(uint mode, uint32 address) -> void;
auto armInitialize() -> void;
auto thumbInitialize() -> void;
//instructions-arm.cpp
auto armALU(uint4 mode, uint4 target, uint4 source, uint32 data) -> void;
auto armMoveToStatus(uint4 field, uint1 source, uint32 data) -> void;
auto armInstructionBranch(int24, uint1) -> void;
auto armInstructionBranchExchangeRegister(uint4) -> void;
auto armInstructionDataImmediate(uint8, uint4, uint4, uint4, uint1, uint4) -> void;
auto armInstructionDataImmediateShift(uint4, uint2, uint5, uint4, uint4, uint1, uint4) -> void;
auto armInstructionDataRegisterShift(uint4, uint2, uint4, uint4, uint4, uint1, uint4) -> void;
auto armInstructionLoadImmediate(uint8, uint1, uint4, uint4, uint1, uint1, uint1) -> void;
auto armInstructionLoadRegister(uint4, uint1, uint4, uint4, uint1, uint1, uint1) -> void;
auto armInstructionMemorySwap(uint4, uint4, uint4, uint1) -> void;
auto armInstructionMoveHalfImmediate(uint8, uint4, uint4, uint1, uint1, uint1, uint1) -> void;
auto armInstructionMoveHalfRegister(uint4, uint4, uint4, uint1, uint1, uint1, uint1) -> void;
auto armInstructionMoveImmediateOffset(uint12, uint4, uint4, uint1, uint1, uint1, uint1, uint1) -> void;
auto armInstructionMoveMultiple(uint16, uint4, uint1, uint1, uint1, uint1, uint1) -> void;
auto armInstructionMoveRegisterOffset(uint4, uint2, uint5, uint4, uint4, uint1, uint1, uint1, uint1, uint1) -> void;
auto armInstructionMoveToRegisterFromStatus(uint4, uint1) -> void;
auto armInstructionMoveToStatusFromImmediate(uint8, uint4, uint4, uint1) -> void;
auto armInstructionMoveToStatusFromRegister(uint4, uint4, uint1) -> void;
auto armInstructionMultiply(uint4, uint4, uint4, uint4, uint1, uint1) -> void;
auto armInstructionMultiplyLong(uint4, uint4, uint4, uint4, uint1, uint1, uint1) -> void;
auto armInstructionSoftwareInterrupt(uint24 immediate) -> void;
auto armInstructionUndefined() -> void;
//instructions-thumb.cpp
auto thumbInstructionALU(uint3, uint3, uint4) -> void;
auto thumbInstructionALUExtended(uint4, uint4, uint2) -> void;
auto thumbInstructionAddRegister(uint8, uint3, uint1) -> void;
auto thumbInstructionAdjustImmediate(uint3, uint3, uint3, uint1) -> void;
auto thumbInstructionAdjustRegister(uint3, uint3, uint3, uint1) -> void;
auto thumbInstructionAdjustStack(uint7, uint1) -> void;
auto thumbInstructionBranchExchange(uint4) -> void;
auto thumbInstructionBranchFarPrefix(int11) -> void;
auto thumbInstructionBranchFarSuffix(uint11) -> void;
auto thumbInstructionBranchNear(int11) -> void;
auto thumbInstructionBranchTest(int8, uint4) -> void;
auto thumbInstructionImmediate(uint8, uint3, uint2) -> void;
auto thumbInstructionLoadLiteral(uint8, uint3) -> void;
auto thumbInstructionMoveByteImmediate(uint3, uint3, uint5, uint1) -> void;
auto thumbInstructionMoveHalfImmediate(uint3, uint3, uint5, uint1) -> void;
auto thumbInstructionMoveMultiple(uint8, uint3, uint1) -> void;
auto thumbInstructionMoveRegisterOffset(uint3, uint3, uint3, uint3) -> void;
auto thumbInstructionMoveStack(uint8, uint3, uint1) -> void;
auto thumbInstructionMoveWordImmediate(uint3, uint3, uint5, uint1) -> void;
auto thumbInstructionShiftImmediate(uint3, uint3, uint5, uint2) -> void;
auto thumbInstructionSoftwareInterrupt(uint8) -> void;
auto thumbInstructionStackMultiple(uint8, uint1, uint1) -> void;
auto thumbInstructionUndefined() -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
//disassembler.cpp
auto disassembleInstruction(maybe<uint32> pc = {}, maybe<boolean> thumb = {}) -> string;
auto disassembleContext() -> string;
struct GPR {
inline operator uint32_t() const { return data; }
inline auto operator=(const GPR& value) -> GPR& { return operator=(value.data); }
inline auto operator=(uint32 value) -> GPR& {
data = value;
if(modify) modify();
return *this;
}
uint32 data;
function<auto () -> void> modify;
};
struct PSR {
enum : uint {
USR = 0x10, //user
FIQ = 0x11, //fast interrupt
IRQ = 0x12, //interrupt
SVC = 0x13, //service
ABT = 0x17, //abort
UND = 0x1b, //undefined
SYS = 0x1f, //system
};
inline operator uint32_t() const {
return m << 0 | t << 5 | f << 6 | i << 7 | v << 28 | c << 29 | z << 30 | n << 31;
}
inline auto operator=(uint32 data) -> PSR& {
m = data.bit(0,4);
t = data.bit(5);
f = data.bit(6);
i = data.bit(7);
v = data.bit(28);
c = data.bit(29);
z = data.bit(30);
n = data.bit(31);
return *this;
}
//serialization.cpp
auto serialize(serializer&) -> void;
uint5 m; //mode
boolean t; //thumb
boolean f; //fiq
boolean i; //irq
boolean v; //overflow
boolean c; //carry
boolean z; //zero
boolean n; //negative
};
struct Processor {
//serialization.cpp
auto serialize(serializer&) -> void;
GPR r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15;
PSR cpsr;
struct FIQ {
GPR r8, r9, r10, r11, r12, r13, r14;
PSR spsr;
} fiq;
struct IRQ {
GPR r13, r14;
PSR spsr;
} irq;
struct SVC {
GPR r13, r14;
PSR spsr;
} svc;
struct ABT {
GPR r13, r14;
PSR spsr;
} abt;
struct UND {
GPR r13, r14;
PSR spsr;
} und;
} processor;
struct Pipeline {
//serialization.cpp
auto serialize(serializer&) -> void;
struct Instruction {
uint32 address;
uint32 instruction;
boolean thumb; //not used by fetch stage
};
uint1 reload = 1;
uint1 nonsequential = 1;
Instruction fetch;
Instruction decode;
Instruction execute;
} pipeline;
uint32 opcode;
boolean carry;
boolean irq;
function<void (uint32 opcode)> armInstruction[4096];
function<void ()> thumbInstruction[65536];
//disassembler.cpp
auto armDisassembleBranch(int24, uint1) -> string;
auto armDisassembleBranchExchangeRegister(uint4) -> string;
auto armDisassembleDataImmediate(uint8, uint4, uint4, uint4, uint1, uint4) -> string;
auto armDisassembleDataImmediateShift(uint4, uint2, uint5, uint4, uint4, uint1, uint4) -> string;
auto armDisassembleDataRegisterShift(uint4, uint2, uint4, uint4, uint4, uint1, uint4) -> string;
auto armDisassembleLoadImmediate(uint8, uint1, uint4, uint4, uint1, uint1, uint1) -> string;
auto armDisassembleLoadRegister(uint4, uint1, uint4, uint4, uint1, uint1, uint1) -> string;
auto armDisassembleMemorySwap(uint4, uint4, uint4, uint1) -> string;
auto armDisassembleMoveHalfImmediate(uint8, uint4, uint4, uint1, uint1, uint1, uint1) -> string;
auto armDisassembleMoveHalfRegister(uint4, uint4, uint4, uint1, uint1, uint1, uint1) -> string;
auto armDisassembleMoveImmediateOffset(uint12, uint4, uint4, uint1, uint1, uint1, uint1, uint1) -> string;
auto armDisassembleMoveMultiple(uint16, uint4, uint1, uint1, uint1, uint1, uint1) -> string;
auto armDisassembleMoveRegisterOffset(uint4, uint2, uint5, uint4, uint4, uint1, uint1, uint1, uint1, uint1) -> string;
auto armDisassembleMoveToRegisterFromStatus(uint4, uint1) -> string;
auto armDisassembleMoveToStatusFromImmediate(uint8, uint4, uint4, uint1) -> string;
auto armDisassembleMoveToStatusFromRegister(uint4, uint4, uint1) -> string;
auto armDisassembleMultiply(uint4, uint4, uint4, uint4, uint1, uint1) -> string;
auto armDisassembleMultiplyLong(uint4, uint4, uint4, uint4, uint1, uint1, uint1) -> string;
auto armDisassembleSoftwareInterrupt(uint24) -> string;
auto armDisassembleUndefined() -> string;
auto thumbDisassembleALU(uint3, uint3, uint4) -> string;
auto thumbDisassembleALUExtended(uint4, uint4, uint2) -> string;
auto thumbDisassembleAddRegister(uint8, uint3, uint1) -> string;
auto thumbDisassembleAdjustImmediate(uint3, uint3, uint3, uint1) -> string;
auto thumbDisassembleAdjustRegister(uint3, uint3, uint3, uint1) -> string;
auto thumbDisassembleAdjustStack(uint7, uint1) -> string;
auto thumbDisassembleBranchExchange(uint4) -> string;
auto thumbDisassembleBranchFarPrefix(int11) -> string;
auto thumbDisassembleBranchFarSuffix(uint11) -> string;
auto thumbDisassembleBranchNear(int11) -> string;
auto thumbDisassembleBranchTest(int8, uint4) -> string;
auto thumbDisassembleImmediate(uint8, uint3, uint2) -> string;
auto thumbDisassembleLoadLiteral(uint8, uint3) -> string;
auto thumbDisassembleMoveByteImmediate(uint3, uint3, uint5, uint1) -> string;
auto thumbDisassembleMoveHalfImmediate(uint3, uint3, uint5, uint1) -> string;
auto thumbDisassembleMoveMultiple(uint8, uint3, uint1) -> string;
auto thumbDisassembleMoveRegisterOffset(uint3, uint3, uint3, uint3) -> string;
auto thumbDisassembleMoveStack(uint8, uint3, uint1) -> string;
auto thumbDisassembleMoveWordImmediate(uint3, uint3, uint5, uint1) -> string;
auto thumbDisassembleShiftImmediate(uint3, uint3, uint5, uint2) -> string;
auto thumbDisassembleSoftwareInterrupt(uint8) -> string;
auto thumbDisassembleStackMultiple(uint8, uint1, uint1) -> string;
auto thumbDisassembleUndefined() -> string;
function<string (uint32 opcode)> armDisassemble[4096];
function<string ()> thumbDisassemble[65536];
uint32 _pc;
string _c;
};
}
@@ -1,413 +0,0 @@
static const string _r[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"
};
static const string _conditions[] = {
"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
"hi", "ls", "ge", "lt", "gt", "le", "", "nv",
};
#define _s save ? "s" : ""
#define _move(mode) (mode == 13 || mode == 15)
#define _comp(mode) (mode >= 8 && mode <= 11)
#define _math(mode) (mode <= 7 || mode == 12 || mode == 14)
auto ARM7TDMI::disassembleInstruction(maybe<uint32> pc, maybe<boolean> thumb) -> string {
if(!pc) pc = pipeline.execute.address;
if(!thumb) thumb = cpsr().t;
_pc = pc();
if(!thumb()) {
uint32 opcode = read(Word | Nonsequential, _pc & ~3);
uint12 index = (opcode & 0x0ff00000) >> 16 | (opcode & 0x000000f0) >> 4;
_c = _conditions[opcode >> 28];
return pad(armDisassemble[index](opcode), -40);
} else {
uint16 opcode = read(Half | Nonsequential, _pc & ~1);
return pad(thumbDisassemble[opcode](), -40);
}
}
auto ARM7TDMI::disassembleContext() -> string {
string output;
for(uint n : range(16)) {
output.append(_r[n], ":", hex(r(n), 8L), " ");
}
output.append("cpsr:");
output.append(cpsr().n ? "N" : "n");
output.append(cpsr().z ? "Z" : "z");
output.append(cpsr().c ? "C" : "c");
output.append(cpsr().v ? "V" : "v", "/");
output.append(cpsr().i ? "I" : "i");
output.append(cpsr().f ? "F" : "f");
output.append(cpsr().t ? "T" : "t", "/");
output.append(hex(cpsr().m, 2L));
if(cpsr().m == PSR::USR || cpsr().m == PSR::SYS) return output;
output.append(" spsr:");
output.append(spsr().n ? "N" : "n");
output.append(spsr().z ? "Z" : "z");
output.append(spsr().c ? "C" : "c");
output.append(spsr().v ? "V" : "v", "/");
output.append(spsr().i ? "I" : "i");
output.append(spsr().f ? "F" : "f");
output.append(spsr().t ? "T" : "t", "/");
output.append(hex(spsr().m, 2L));
return output;
}
//
auto ARM7TDMI::armDisassembleBranch
(int24 displacement, uint1 link) -> string {
return {"b", link ? "l" : "", _c, " 0x", hex(_pc + 8 + displacement * 4, 8L)};
}
auto ARM7TDMI::armDisassembleBranchExchangeRegister
(uint4 m) -> string {
return {"bx", _c, " ", _r[m]};
}
auto ARM7TDMI::armDisassembleDataImmediate
(uint8 immediate, uint4 shift, uint4 d, uint4 n, uint1 save, uint4 mode) -> string {
static const string opcode[] = {
"and", "eor", "sub", "rsb", "add", "adc", "sbc", "rsc",
"tst", "teq", "cmp", "cmn", "orr", "mov", "bic", "mvn",
};
uint32 data = immediate >> (shift << 1) | immediate << 32 - (shift << 1);
return {opcode[mode], _c,
_move(mode) ? string{_s, " ", _r[d]} : string{},
_comp(mode) ? string{" ", _r[n]} : string{},
_math(mode) ? string{_s, " ", _r[d], ",", _r[n]} : string{},
",#0x", hex(data, 8L)};
}
auto ARM7TDMI::armDisassembleDataImmediateShift
(uint4 m, uint2 type, uint5 shift, uint4 d, uint4 n, uint1 save, uint4 mode) -> string {
static const string opcode[] = {
"and", "eor", "sub", "rsb", "add", "adc", "sbc", "rsc",
"tst", "teq", "cmp", "cmn", "orr", "mov", "bic", "mvn",
};
return {opcode[mode], _c,
_move(mode) ? string{_s, " ", _r[d]} : string{},
_comp(mode) ? string{" ", _r[n]} : string{},
_math(mode) ? string{_s, " ", _r[d], ",", _r[n]} : string{},
",", _r[m],
type == 0 && shift ? string{" lsl #", shift} : string{},
type == 1 ? string{" lsr #", shift ? (uint)shift : 32} : string{},
type == 2 ? string{" asr #", shift ? (uint)shift : 32} : string{},
type == 3 && shift ? string{" ror #", shift} : string{},
type == 3 && !shift ? " rrx" : ""};
}
auto ARM7TDMI::armDisassembleDataRegisterShift
(uint4 m, uint2 type, uint4 s, uint4 d, uint4 n, uint1 save, uint4 mode) -> string {
static const string opcode[] = {
"and", "eor", "sub", "rsb", "add", "adc", "sbc", "rsc",
"tst", "teq", "cmp", "cmn", "orr", "mov", "bic", "mvn",
};
return {opcode[mode], _c,
_move(mode) ? string{_s, " ", _r[d]} : string{},
_comp(mode) ? string{" ", _r[n]} : string{},
_math(mode) ? string{_s, " ", _r[d], ",", _r[n]} : string{},
",", _r[m], " ",
type == 0 ? "lsl" : "",
type == 1 ? "lsr" : "",
type == 2 ? "asr" : "",
type == 3 ? "ror" : "",
" ", _r[s]};
}
auto ARM7TDMI::armDisassembleLoadImmediate
(uint8 immediate, uint1 half, uint4 d, uint4 n, uint1 writeback, uint1 up, uint1 pre) -> string {
string data;
if(n == 15) data = {" =0x", hex(read((half ? Half : Byte) | Nonsequential,
_pc + 8 + (up ? +immediate : -immediate)), half ? 4L : 2L)};
return {"ldr", _c, half ? "sh" : "sb", " ",
_r[d], ",[", _r[n],
pre == 0 ? "]" : "",
immediate ? string{",", up ? "+" : "-", "0x", hex(immediate, 2L)} : string{},
pre == 1 ? "]" : "",
pre == 0 || writeback ? "!" : "", data};
}
auto ARM7TDMI::armDisassembleLoadRegister
(uint4 m, uint1 half, uint4 d, uint4 n, uint1 writeback, uint1 up, uint1 pre) -> string {
return {"ldr", _c, half ? "sh" : "sb", " ",
_r[d], ",[", _r[n],
pre == 0 ? "]" : "",
",", up ? "+" : "-", _r[m],
pre == 1 ? "]" : "",
pre == 0 || writeback ? "!" : ""};
}
auto ARM7TDMI::armDisassembleMemorySwap
(uint4 m, uint4 d, uint4 n, uint1 byte) -> string {
return {"swp", _c, byte ? "b" : "", " ", _r[d], ",", _r[m], ",[", _r[n], "]"};
}
auto ARM7TDMI::armDisassembleMoveHalfImmediate
(uint8 immediate, uint4 d, uint4 n, uint1 mode, uint1 writeback, uint1 up, uint1 pre) -> string {
string data;
if(n == 15) data = {" =0x", hex(read(Half | Nonsequential, _pc + (up ? +immediate : -immediate)), 4L)};
return {mode ? "ldr" : "str", _c, "h ",
_r[d], ",[", _r[n],
pre == 0 ? "]" : "",
immediate ? string{",", up ? "+" : "-", "0x", hex(immediate, 2L)} : string{},
pre == 1 ? "]" : "",
pre == 0 || writeback ? "!" : "", data};
}
auto ARM7TDMI::armDisassembleMoveHalfRegister
(uint4 m, uint4 d, uint4 n, uint1 mode, uint1 writeback, uint1 up, uint1 pre) -> string {
return {mode ? "ldr" : "str", _c, "h ",
_r[d], ",[", _r[n],
pre == 0 ? "]" : "",
",", up ? "+" : "-", _r[m],
pre == 1 ? "]" : "",
pre == 0 || writeback ? "!" : ""};
}
auto ARM7TDMI::armDisassembleMoveImmediateOffset
(uint12 immediate, uint4 d, uint4 n, uint1 mode, uint1 writeback, uint1 byte, uint1 up, uint1 pre) -> string {
string data;
if(n == 15) data = {" =0x", hex(read((byte ? Byte : Word) | Nonsequential,
_pc + 8 + (up ? +immediate : -immediate)), byte ? 2L : 4L)};
return {mode ? "ldr" : "str", _c, byte ? "b" : "", " ", _r[d], ",[", _r[n],
pre == 0 ? "]" : "",
immediate ? string{",", up ? "+" : "-", "0x", hex(immediate, 3L)} : string{},
pre == 1 ? "]" : "",
pre == 0 || writeback ? "!" : "", data};
}
auto ARM7TDMI::armDisassembleMoveMultiple
(uint16 list, uint4 n, uint1 mode, uint1 writeback, uint1 type, uint1 up, uint1 pre) -> string {
string registers;
for(uint index : range(16)) {
if(list.bit(index)) registers.append(_r[index], ",");
}
registers.trimRight(",", 1L);
return {mode ? "ldm" : "stm", _c,
up == 0 && pre == 0 ? "da" : "",
up == 0 && pre == 1 ? "db" : "",
up == 1 && pre == 0 ? "ia" : "",
up == 1 && pre == 1 ? "ib" : "",
" ", _r[n], writeback ? "!" : "",
",{", registers, "}", type ? "^" : ""};
}
auto ARM7TDMI::armDisassembleMoveRegisterOffset
(uint4 m, uint2 type, uint5 shift, uint4 d, uint4 n, uint1 mode, uint1 writeback, uint1 byte, uint1 up, uint1 pre) -> string {
return {mode ? "ldr" : "str", _c, byte ? "b" : "", " ", _r[d], ",[", _r[n],
pre == 0 ? "]" : "",
",", up ? "+" : "-", _r[m],
type == 0 && shift ? string{" lsl #", shift} : string{},
type == 1 ? string{" lsr #", shift ? (uint)shift : 32} : string{},
type == 2 ? string{" asr #", shift ? (uint)shift : 32} : string{},
type == 3 && shift ? string{" ror #", shift} : string{},
type == 3 && !shift ? " rrx" : "",
pre == 1 ? "]" : "",
pre == 0 || writeback ? "!" : ""};
}
auto ARM7TDMI::armDisassembleMoveToRegisterFromStatus
(uint4 d, uint1 mode) -> string {
return {"mrs", _c, " ", _r[d], ",", mode ? "spsr" : "cpsr"};
}
auto ARM7TDMI::armDisassembleMoveToStatusFromImmediate
(uint8 immediate, uint4 rotate, uint4 field, uint1 mode) -> string {
uint32 data = immediate >> (rotate << 1) | immediate << 32 - (rotate << 1);
return {"msr", _c, " ", mode ? "spsr:" : "cpsr:",
field.bit(0) ? "c" : "",
field.bit(1) ? "x" : "",
field.bit(2) ? "s" : "",
field.bit(3) ? "f" : "",
",#0x", hex(data, 8L)};
}
auto ARM7TDMI::armDisassembleMoveToStatusFromRegister
(uint4 m, uint4 field, uint1 mode) -> string {
return {"msr", _c, " ", mode ? "spsr:" : "cpsr:",
field.bit(0) ? "c" : "",
field.bit(1) ? "x" : "",
field.bit(2) ? "s" : "",
field.bit(3) ? "f" : "",
",", _r[m]};
}
auto ARM7TDMI::armDisassembleMultiply
(uint4 m, uint4 s, uint4 n, uint4 d, uint1 save, uint1 accumulate) -> string {
if(accumulate) {
return {"mla", _c, _s, " ", _r[d], ",", _r[m], ",", _r[s], ",", _r[n]};
} else {
return {"mul", _c, _s, " ", _r[d], ",", _r[m], ",", _r[s]};
}
}
auto ARM7TDMI::armDisassembleMultiplyLong
(uint4 m, uint4 s, uint4 l, uint4 h, uint1 save, uint1 accumulate, uint1 sign) -> string {
return {sign ? "s" : "u", accumulate ? "mlal" : "mull", _c, _s, " ",
_r[l], ",", _r[h], ",", _r[m], ",", _r[s]};
}
auto ARM7TDMI::armDisassembleSoftwareInterrupt
(uint24 immediate) -> string {
return {"swi #0x", hex(immediate, 6L)};
}
auto ARM7TDMI::armDisassembleUndefined
() -> string {
return {"undefined"};
}
//
auto ARM7TDMI::thumbDisassembleALU
(uint3 d, uint3 m, uint4 mode) -> string {
static const string opcode[] = {
"and", "eor", "lsl", "lsr", "asr", "adc", "sbc", "ror",
"tst", "neg", "cmp", "cmn", "orr", "mul", "bic", "mvn",
};
return {opcode[mode], " ", _r[d], ",", _r[m]};
}
auto ARM7TDMI::thumbDisassembleALUExtended
(uint4 d, uint4 m, uint2 mode) -> string {
static const string opcode[] = {"add", "sub", "mov"};
if(d == 8 && m == 8 && mode == 2) return {"nop"};
return {opcode[mode], " ", _r[d], ",", _r[m]};
}
auto ARM7TDMI::thumbDisassembleAddRegister
(uint8 immediate, uint3 d, uint1 mode) -> string {
return {"add ", _r[d], ",", mode ? "sp" : "pc", ",#0x", hex(immediate, 2L)};
}
auto ARM7TDMI::thumbDisassembleAdjustImmediate
(uint3 d, uint3 n, uint3 immediate, uint1 mode) -> string {
return {!mode ? "add" : "sub", " ", _r[d], ",", _r[n], ",#", immediate};
}
auto ARM7TDMI::thumbDisassembleAdjustRegister
(uint3 d, uint3 n, uint3 m, uint1 mode) -> string {
return {!mode ? "add" : "sub", " ", _r[d], ",", _r[n], ",", _r[m]};
}
auto ARM7TDMI::thumbDisassembleAdjustStack
(uint7 immediate, uint1 mode) -> string {
return {!mode ? "add" : "sub", " sp,#0x", hex(immediate * 4, 3L)};
}
auto ARM7TDMI::thumbDisassembleBranchExchange
(uint4 m) -> string {
return {"bx ", _r[m]};
}
auto ARM7TDMI::thumbDisassembleBranchFarPrefix
(int11 displacementHi) -> string {
uint11 displacementLo = read(Half | Nonsequential, (_pc & ~1) + 2);
int22 displacement = displacementHi << 11 | displacementLo << 0;
uint32 address = _pc + 4 + displacement * 2;
return {"bl 0x", hex(address, 8L)};
}
auto ARM7TDMI::thumbDisassembleBranchFarSuffix
(uint11 displacement) -> string {
return {"bl (suffix)"};
}
auto ARM7TDMI::thumbDisassembleBranchNear
(int11 displacement) -> string {
uint32 address = _pc + 4 + displacement * 2;
return {"b 0x", hex(address, 8L)};
}
auto ARM7TDMI::thumbDisassembleBranchTest
(int8 displacement, uint4 condition) -> string {
uint32 address = _pc + 4 + displacement * 2;
return {"b", _conditions[condition], " 0x", hex(address, 8L)};
}
auto ARM7TDMI::thumbDisassembleImmediate
(uint8 immediate, uint3 d, uint2 mode) -> string {
static const string opcode[] = {"mov", "cmp", "add", "sub"};
return {opcode[mode], " ", _r[d], ",#0x", hex(immediate, 2L)};
}
auto ARM7TDMI::thumbDisassembleLoadLiteral
(uint8 displacement, uint3 d) -> string {
uint32 address = ((_pc + 4) & ~3) + (displacement << 2);
uint32 data = read(Word | Nonsequential, address);
return {"ldr ", _r[d], ",[pc,#0x", hex(address, 8L), "] =0x", hex(data, 8L)};
}
auto ARM7TDMI::thumbDisassembleMoveByteImmediate
(uint3 d, uint3 n, uint5 offset, uint1 mode) -> string {
return {mode ? "ldrb" : "strb", " ", _r[d], ",[", _r[n], ",#0x", hex(offset, 2L), "]"};
}
auto ARM7TDMI::thumbDisassembleMoveHalfImmediate
(uint3 d, uint3 n, uint5 offset, uint1 mode) -> string {
return {mode ? "ldrh" : "strh", " ", _r[d], ",[", _r[n], ",#0x", hex(offset * 2, 2L), "]"};
}
auto ARM7TDMI::thumbDisassembleMoveMultiple
(uint8 list, uint3 n, uint1 mode) -> string {
string registers;
for(uint m : range(8)) {
if(list.bit(m)) registers.append(_r[m], ",");
}
registers.trimRight(",", 1L);
return {mode ? "ldmia" : "stmia", " ", _r[n], "!,{", registers, "}"};
}
auto ARM7TDMI::thumbDisassembleMoveRegisterOffset
(uint3 d, uint3 n, uint3 m, uint3 mode) -> string {
static const string opcode[] = {"str", "strh", "strb", "ldsb", "ldr", "ldrh", "ldrb", "ldsh"};
return {opcode[mode], " ", _r[d], ",[", _r[n], ",", _r[m], "]"};
}
auto ARM7TDMI::thumbDisassembleMoveStack
(uint8 immediate, uint3 d, uint1 mode) -> string {
return {mode ? "ldr" : "str", " ", _r[d], ",[sp,#0x", hex(immediate * 4, 3L), "]"};
}
auto ARM7TDMI::thumbDisassembleMoveWordImmediate
(uint3 d, uint3 n, uint5 offset, uint1 mode) -> string {
return {mode ? "ldr" : "str", " ", _r[d], ",[", _r[n], ",#0x", hex(offset * 4, 2L), "]"};
}
auto ARM7TDMI::thumbDisassembleShiftImmediate
(uint3 d, uint3 m, uint5 immediate, uint2 mode) -> string {
static const string opcode[] = {"lsl", "lsr", "asr"};
return {opcode[mode], " ", _r[d], ",", _r[m], ",#", immediate};
}
auto ARM7TDMI::thumbDisassembleSoftwareInterrupt
(uint8 immediate) -> string {
return {"swi #0x", hex(immediate, 2L)};
}
auto ARM7TDMI::thumbDisassembleStackMultiple
(uint8 list, uint1 lrpc, uint1 mode) -> string {
string registers;
for(uint m : range(8)) {
if(list.bit(m)) registers.append(_r[m], ",");
}
if(lrpc) registers.append(!mode ? "lr," : "pc,");
registers.trimRight(",", 1L);
return {!mode ? "push" : "pop", " {", registers, "}"};
}
auto ARM7TDMI::thumbDisassembleUndefined
() -> string {
return {"undefined"};
}
#undef _s
#undef _move
#undef _comp
#undef _save
@@ -1,538 +0,0 @@
auto ARM7TDMI::fetch() -> void {
pipeline.execute = pipeline.decode;
pipeline.decode = pipeline.fetch;
pipeline.decode.thumb = cpsr().t;
uint sequential = Sequential;
if(pipeline.nonsequential) {
pipeline.nonsequential = false;
sequential = Nonsequential;
}
uint mask = !cpsr().t ? 3 : 1;
uint size = !cpsr().t ? Word : Half;
r(15).data += size >> 3;
pipeline.fetch.address = r(15) & ~mask;
pipeline.fetch.instruction = read(Prefetch | size | sequential, pipeline.fetch.address);
}
auto ARM7TDMI::instruction() -> void {
uint mask = !cpsr().t ? 3 : 1;
uint size = !cpsr().t ? Word : Half;
if(pipeline.reload) {
pipeline.reload = false;
r(15).data &= ~mask;
pipeline.fetch.address = r(15) & ~mask;
pipeline.fetch.instruction = read(Prefetch | size | Nonsequential, pipeline.fetch.address);
fetch();
}
fetch();
if(irq && !cpsr().i) {
exception(PSR::IRQ, 0x18);
if(pipeline.execute.thumb) r(14).data += 2;
return;
}
opcode = pipeline.execute.instruction;
if(!pipeline.execute.thumb) {
if(!TST(opcode.bit(28,31))) return;
uint12 index = (opcode & 0x0ff00000) >> 16 | (opcode & 0x000000f0) >> 4;
armInstruction[index](opcode);
} else {
thumbInstruction[(uint16)opcode]();
}
}
auto ARM7TDMI::exception(uint mode, uint32 address) -> void {
auto psr = cpsr();
cpsr().m = mode;
spsr() = psr;
cpsr().t = 0;
if(cpsr().m == PSR::FIQ) cpsr().f = 1;
cpsr().i = 1;
r(14) = pipeline.decode.address;
r(15) = address;
}
auto ARM7TDMI::armInitialize() -> void {
#define bind(id, name, ...) { \
uint index = (id & 0x0ff00000) >> 16 | (id & 0x000000f0) >> 4; \
assert(!armInstruction[index]); \
armInstruction[index] = [&](uint32 opcode) { return armInstruction##name(arguments); }; \
armDisassemble[index] = [&](uint32 opcode) { return armDisassemble##name(arguments); }; \
}
#define pattern(s) \
std::integral_constant<uint32_t, bit::test(s)>::value
#define arguments \
opcode.bit( 0,23), /* displacement */ \
opcode.bit(24) /* link */
for(uint4 displacementLo : range(16))
for(uint4 displacementHi : range(16))
for(uint1 link : range(2)) {
auto opcode = pattern(".... 101? ???? ???? ???? ???? ???? ????")
| displacementLo << 4 | displacementHi << 20 | link << 24;
bind(opcode, Branch);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3) /* m */
{
auto opcode = pattern(".... 0001 0010 ---- ---- ---- 0001 ????");
bind(opcode, BranchExchangeRegister);
}
#undef arguments
#define arguments \
opcode.bit( 0, 7), /* immediate */ \
opcode.bit( 8,11), /* shift */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(20), /* save */ \
opcode.bit(21,24) /* mode */
for(uint4 shiftHi : range(16))
for(uint1 save : range(2))
for(uint4 mode : range(16)) {
if(mode >= 8 && mode <= 11 && !save) continue; //TST, TEQ, CMP, CMN
auto opcode = pattern(".... 001? ???? ???? ???? ???? ???? ????") | shiftHi << 4 | save << 20 | mode << 21;
bind(opcode, DataImmediate);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit( 5, 6), /* type */ \
opcode.bit( 7,11), /* shift */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(20), /* save */ \
opcode.bit(21,24) /* mode */
for(uint2 type : range(4))
for(uint1 shiftLo : range(2))
for(uint1 save : range(2))
for(uint4 mode : range(16)) {
if(mode >= 8 && mode <= 11 && !save) continue; //TST, TEQ, CMP, CMN
auto opcode = pattern(".... 000? ???? ???? ???? ???? ???0 ????") | type << 5 | shiftLo << 7 | save << 20 | mode << 21;
bind(opcode, DataImmediateShift);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit( 5, 6), /* type */ \
opcode.bit( 8,11), /* s */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(20), /* save */ \
opcode.bit(21,24) /* mode */
for(uint2 type : range(4))
for(uint1 save : range(2))
for(uint4 mode : range(16)) {
if(mode >= 8 && mode <= 11 && !save) continue; //TST, TEQ, CMP, CMN
auto opcode = pattern(".... 000? ???? ???? ???? ???? 0??1 ????") | type << 5 | save << 20 | mode << 21;
bind(opcode, DataRegisterShift);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3) << 0 | opcode.bit( 8,11) << 4, /* immediate */ \
opcode.bit( 5), /* half */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(21), /* writeback */ \
opcode.bit(23), /* up */ \
opcode.bit(24) /* pre */
for(uint1 half : range(2))
for(uint1 writeback : range(2))
for(uint1 up : range(2))
for(uint1 pre : range(2)) {
auto opcode = pattern(".... 000? ?1?1 ???? ???? ???? 11?1 ????") | half << 5 | writeback << 21 | up << 23 | pre << 24;
bind(opcode, LoadImmediate);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit( 5), /* half */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(21), /* writeback */ \
opcode.bit(23), /* up */ \
opcode.bit(24) /* pre */
for(uint1 half : range(2))
for(uint1 writeback : range(2))
for(uint1 up : range(2))
for(uint1 pre : range(2)) {
auto opcode = pattern(".... 000? ?0?1 ???? ???? ---- 11?1 ????") | half << 5 | writeback << 21 | up << 23 | pre << 24;
bind(opcode, LoadRegister);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(22) /* byte */
for(uint1 byte : range(2)) {
auto opcode = pattern(".... 0001 0?00 ???? ???? ---- 1001 ????") | byte << 22;
bind(opcode, MemorySwap);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3) << 0 | opcode.bit( 8,11) << 4, /* immediate */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(20), /* mode */ \
opcode.bit(21), /* writeback */ \
opcode.bit(23), /* up */ \
opcode.bit(24) /* pre */
for(uint1 mode : range(2))
for(uint1 writeback : range(2))
for(uint1 up : range(2))
for(uint1 pre : range(2)) {
auto opcode = pattern(".... 000? ?1?? ???? ???? ???? 1011 ????") | mode << 20 | writeback << 21 | up << 23 | pre << 24;
bind(opcode, MoveHalfImmediate);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(20), /* mode */ \
opcode.bit(21), /* writeback */ \
opcode.bit(23), /* up */ \
opcode.bit(24) /* pre */
for(uint1 mode : range(2))
for(uint1 writeback : range(2))
for(uint1 up : range(2))
for(uint1 pre : range(2)) {
auto opcode = pattern(".... 000? ?0?? ???? ???? ---- 1011 ????") | mode << 20 | writeback << 21 | up << 23 | pre << 24;
bind(opcode, MoveHalfRegister);
}
#undef arguments
#define arguments \
opcode.bit( 0,11), /* immediate */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(20), /* mode */ \
opcode.bit(21), /* writeback */ \
opcode.bit(22), /* byte */ \
opcode.bit(23), /* up */ \
opcode.bit(24) /* pre */
for(uint4 immediatePart : range(16))
for(uint1 mode : range(2))
for(uint1 writeback : range(2))
for(uint1 byte : range(2))
for(uint1 up : range(2))
for(uint1 pre : range(2)) {
auto opcode = pattern(".... 010? ???? ???? ???? ???? ???? ????")
| immediatePart << 4 | mode << 20 | writeback << 21 | byte << 22 | up << 23 | pre << 24;
bind(opcode, MoveImmediateOffset);
}
#undef arguments
#define arguments \
opcode.bit( 0,15), /* list */ \
opcode.bit(16,19), /* n */ \
opcode.bit(20), /* mode */ \
opcode.bit(21), /* writeback */ \
opcode.bit(22), /* type */ \
opcode.bit(23), /* up */ \
opcode.bit(24) /* pre */
for(uint4 listPart : range(16))
for(uint1 mode : range(2))
for(uint1 writeback : range(2))
for(uint1 type : range(2))
for(uint1 up : range(2))
for(uint1 pre : range(2)) {
auto opcode = pattern(".... 100? ???? ???? ???? ???? ???? ????")
| listPart << 4 | mode << 20 | writeback << 21 | type << 22 | up << 23 | pre << 24;
bind(opcode, MoveMultiple);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit( 5, 6), /* type */ \
opcode.bit( 7,11), /* shift */ \
opcode.bit(12,15), /* d */ \
opcode.bit(16,19), /* n */ \
opcode.bit(20), /* mode */ \
opcode.bit(21), /* writeback */ \
opcode.bit(22), /* byte */ \
opcode.bit(23), /* up */ \
opcode.bit(24) /* pre */
for(uint2 type : range(4))
for(uint1 shiftLo : range(2))
for(uint1 mode : range(2))
for(uint1 writeback : range(2))
for(uint1 byte : range(2))
for(uint1 up : range(2))
for(uint1 pre : range(2)) {
auto opcode = pattern(".... 011? ???? ???? ???? ???? ???0 ????")
| type << 5 | shiftLo << 7 | mode << 20 | writeback << 21 | byte << 22 | up << 23 | pre << 24;
bind(opcode, MoveRegisterOffset);
}
#undef arguments
#define arguments \
opcode.bit(12,15), /* d */ \
opcode.bit(22) /* mode */
for(uint1 mode : range(2)) {
auto opcode = pattern(".... 0001 0?00 ---- ???? ---- 0000 ----") | mode << 22;
bind(opcode, MoveToRegisterFromStatus);
}
#undef arguments
#define arguments \
opcode.bit( 0, 7), /* immediate */ \
opcode.bit( 8,11), /* rotate */ \
opcode.bit(16,19), /* field */ \
opcode.bit(22) /* mode */
for(uint4 immediateHi : range(16))
for(uint1 mode : range(2)) {
auto opcode = pattern(".... 0011 0?10 ???? ---- ???? ???? ????") | immediateHi << 4 | mode << 22;
bind(opcode, MoveToStatusFromImmediate);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit(16,19), /* field */ \
opcode.bit(22) /* mode */
for(uint1 mode : range(2)) {
auto opcode = pattern(".... 0001 0?10 ???? ---- ---- 0000 ????") | mode << 22;
bind(opcode, MoveToStatusFromRegister);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit( 8,11), /* s */ \
opcode.bit(12,15), /* n */ \
opcode.bit(16,19), /* d */ \
opcode.bit(20), /* save */ \
opcode.bit(21) /* accumulate */
for(uint1 save : range(2))
for(uint1 accumulate : range(2)) {
auto opcode = pattern(".... 0000 00?? ???? ???? ???? 1001 ????") | save << 20 | accumulate << 21;
bind(opcode, Multiply);
}
#undef arguments
#define arguments \
opcode.bit( 0, 3), /* m */ \
opcode.bit( 8,11), /* s */ \
opcode.bit(12,15), /* l */ \
opcode.bit(16,19), /* h */ \
opcode.bit(20), /* save */ \
opcode.bit(21), /* accumulate */ \
opcode.bit(22) /* sign */
for(uint1 save : range(2))
for(uint1 accumulate : range(2))
for(uint1 sign : range(2)) {
auto opcode = pattern(".... 0000 1??? ???? ???? ???? 1001 ????") | save << 20 | accumulate << 21 | sign << 22;
bind(opcode, MultiplyLong);
}
#undef arguments
#define arguments \
opcode.bit( 0,23) /* immediate */
for(uint4 immediateLo : range(16))
for(uint4 immediateHi : range(16)) {
auto opcode = pattern(".... 1111 ???? ???? ???? ???? ???? ????") | immediateLo << 4 | immediateHi << 20;
bind(opcode, SoftwareInterrupt);
}
#undef arguments
#define arguments
for(uint12 id : range(4096)) {
if(armInstruction[id]) continue;
auto opcode = pattern(".... ???? ???? ---- ---- ---- ???? ----") | id.bit(0,3) << 4 | id.bit(4,11) << 20;
bind(opcode, Undefined);
}
#undef arguments
#undef bind
#undef pattern
}
auto ARM7TDMI::thumbInitialize() -> void {
#define bind(id, name, ...) { \
assert(!thumbInstruction[id]); \
thumbInstruction[id] = [=] { return thumbInstruction##name(__VA_ARGS__); }; \
thumbDisassemble[id] = [=] { return thumbDisassemble##name(__VA_ARGS__); }; \
}
#define pattern(s) \
std::integral_constant<uint16_t, bit::test(s)>::value
for(uint3 d : range(8))
for(uint3 m : range(8))
for(uint4 mode : range(16)) {
auto opcode = pattern("0100 00?? ???? ????") | d << 0 | m << 3 | mode << 6;
bind(opcode, ALU, d, m, mode);
}
for(uint4 d : range(16))
for(uint4 m : range(16))
for(uint2 mode : range(4)) {
if(mode == 3) continue;
auto opcode = pattern("0100 01?? ???? ????") | d.bit(0,2) << 0 | m << 3 | d.bit(3) << 7 | mode << 8;
bind(opcode, ALUExtended, d, m, mode);
}
for(uint8 immediate : range(256))
for(uint3 d : range(8))
for(uint1 mode : range(2)) {
auto opcode = pattern("1010 ???? ???? ????") | immediate << 0 | d << 8 | mode << 11;
bind(opcode, AddRegister, immediate, d, mode);
}
for(uint3 d : range(8))
for(uint3 n : range(8))
for(uint3 immediate : range(8))
for(uint1 mode : range(2)) {
auto opcode = pattern("0001 11?? ???? ????") | d << 0 | n << 3 | immediate << 6 | mode << 9;
bind(opcode, AdjustImmediate, d, n, immediate, mode);
}
for(uint3 d : range(8))
for(uint3 n : range(8))
for(uint3 m : range(8))
for(uint1 mode : range(2)) {
auto opcode = pattern("0001 10?? ???? ????") | d << 0 | n << 3 | m << 6 | mode << 9;
bind(opcode, AdjustRegister, d, n, m, mode);
}
for(uint7 immediate : range(128))
for(uint1 mode : range(2)) {
auto opcode = pattern("1011 0000 ???? ????") | immediate << 0 | mode << 7;
bind(opcode, AdjustStack, immediate, mode);
}
for(uint3 _ : range(8))
for(uint4 m : range(16)) {
auto opcode = pattern("0100 0111 0??? ?---") | _ << 0 | m << 3;
bind(opcode, BranchExchange, m);
}
for(uint11 displacement : range(2048)) {
auto opcode = pattern("1111 0??? ???? ????") | displacement << 0;
bind(opcode, BranchFarPrefix, displacement);
}
for(uint11 displacement : range(2048)) {
auto opcode = pattern("1111 1??? ???? ????") | displacement << 0;
bind(opcode, BranchFarSuffix, displacement);
}
for(uint11 displacement : range(2048)) {
auto opcode = pattern("1110 0??? ???? ????") | displacement << 0;
bind(opcode, BranchNear, displacement);
}
for(uint8 displacement : range(256))
for(uint4 condition : range(16)) {
if(condition == 15) continue; //BNV
auto opcode = pattern("1101 ???? ???? ????") | displacement << 0 | condition << 8;
bind(opcode, BranchTest, displacement, condition);
}
for(uint8 immediate : range(256))
for(uint3 d : range(8))
for(uint2 mode : range(4)) {
auto opcode = pattern("001? ???? ???? ????") | immediate << 0 | d << 8 | mode << 11;
bind(opcode, Immediate, immediate, d, mode);
}
for(uint8 displacement : range(256))
for(uint3 d : range(8)) {
auto opcode = pattern("0100 1??? ???? ????") | displacement << 0 | d << 8;
bind(opcode, LoadLiteral, displacement, d);
}
for(uint3 d : range(8))
for(uint3 n : range(8))
for(uint5 immediate : range(32))
for(uint1 mode : range(2)) {
auto opcode = pattern("0111 ???? ???? ????") | d << 0 | n << 3 | immediate << 6 | mode << 11;
bind(opcode, MoveByteImmediate, d, n, immediate, mode);
}
for(uint3 d : range(8))
for(uint3 n : range(8))
for(uint5 immediate : range(32))
for(uint1 mode : range(2)) {
auto opcode = pattern("1000 ???? ???? ????") | d << 0 | n << 3 | immediate << 6 | mode << 11;
bind(opcode, MoveHalfImmediate, d, n, immediate, mode);
}
for(uint8 list : range(256))
for(uint3 n : range(8))
for(uint1 mode : range(2)) {
auto opcode = pattern("1100 ???? ???? ????") | list << 0 | n << 8 | mode << 11;
bind(opcode, MoveMultiple, list, n, mode);
}
for(uint3 d : range(8))
for(uint3 n : range(8))
for(uint3 m : range(8))
for(uint3 mode : range(8)) {
auto opcode = pattern("0101 ???? ???? ????") | d << 0 | n << 3 | m << 6 | mode << 9;
bind(opcode, MoveRegisterOffset, d, n, m, mode);
}
for(uint8 immediate : range(256))
for(uint3 d : range(8))
for(uint1 mode : range(2)) {
auto opcode = pattern("1001 ???? ???? ????") | immediate << 0 | d << 8 | mode << 11;
bind(opcode, MoveStack, immediate, d, mode);
}
for(uint3 d : range(8))
for(uint3 n : range(8))
for(uint5 offset : range(32))
for(uint1 mode : range(2)) {
auto opcode = pattern("0110 ???? ???? ????") | d << 0 | n << 3 | offset << 6 | mode << 11;
bind(opcode, MoveWordImmediate, d, n, offset, mode);
}
for(uint3 d : range(8))
for(uint3 m : range(8))
for(uint5 immediate : range(32))
for(uint2 mode : range(4)) {
if(mode == 3) continue;
auto opcode = pattern("000? ???? ???? ????") | d << 0 | m << 3 | immediate << 6 | mode << 11;
bind(opcode, ShiftImmediate, d, m, immediate, mode);
}
for(uint8 immediate : range(256)) {
auto opcode = pattern("1101 1111 ???? ????") | immediate << 0;
bind(opcode, SoftwareInterrupt, immediate);
}
for(uint8 list : range(256))
for(uint1 lrpc : range(2))
for(uint1 mode : range(2)) {
auto opcode = pattern("1011 ?10? ???? ????") | list << 0 | lrpc << 8 | mode << 11;
bind(opcode, StackMultiple, list, lrpc, mode);
}
for(uint16 id : range(65536)) {
if(thumbInstruction[id]) continue;
auto opcode = pattern("???? ???? ???? ????") | id << 0;
bind(opcode, Undefined);
}
#undef bind
#undef pattern
}
@@ -1,314 +0,0 @@
auto ARM7TDMI::armALU(uint4 mode, uint4 d, uint4 n, uint32 rm) -> void {
uint32 rn = r(n);
switch(mode) {
case 0: r(d) = BIT(rn & rm); break; //AND
case 1: r(d) = BIT(rn ^ rm); break; //EOR
case 2: r(d) = SUB(rn, rm, 1); break; //SUB
case 3: r(d) = SUB(rm, rn, 1); break; //RSB
case 4: r(d) = ADD(rn, rm, 0); break; //ADD
case 5: r(d) = ADD(rn, rm, cpsr().c); break; //ADC
case 6: r(d) = SUB(rn, rm, cpsr().c); break; //SBC
case 7: r(d) = SUB(rm, rn, cpsr().c); break; //RSC
case 8: BIT(rn & rm); break; //TST
case 9: BIT(rn ^ rm); break; //TEQ
case 10: SUB(rn, rm, 1); break; //CMP
case 11: ADD(rn, rm, 0); break; //CMN
case 12: r(d) = BIT(rn | rm); break; //ORR
case 13: r(d) = BIT(rm); break; //MOV
case 14: r(d) = BIT(rn & ~rm); break; //BIC
case 15: r(d) = BIT(~rm); break; //MVN
}
if(exception() && d == 15 && opcode.bit(20)) {
cpsr() = spsr();
}
}
auto ARM7TDMI::armMoveToStatus(uint4 field, uint1 mode, uint32 data) -> void {
if(mode && (cpsr().m == PSR::USR || cpsr().m == PSR::SYS)) return;
PSR& psr = mode ? spsr() : cpsr();
if(field.bit(0)) {
if(mode || privileged()) {
psr.m = data.bit(0,4);
psr.t = data.bit(5);
psr.f = data.bit(6);
psr.i = data.bit(7);
if(!mode && psr.t) r(15).data += 2;
}
}
if(field.bit(3)) {
psr.v = data.bit(28);
psr.c = data.bit(29);
psr.z = data.bit(30);
psr.n = data.bit(31);
}
}
//
auto ARM7TDMI::armInstructionBranch
(int24 displacement, uint1 link) -> void {
if(link) r(14) = r(15) - 4;
r(15) = r(15) + displacement * 4;
}
auto ARM7TDMI::armInstructionBranchExchangeRegister
(uint4 m) -> void {
uint32 address = r(m);
cpsr().t = address.bit(0);
r(15) = address;
}
auto ARM7TDMI::armInstructionDataImmediate
(uint8 immediate, uint4 shift, uint4 d, uint4 n, uint1 save, uint4 mode) -> void {
uint32 data = immediate;
carry = cpsr().c;
if(shift) data = ROR(data, shift << 1);
armALU(mode, d, n, data);
}
auto ARM7TDMI::armInstructionDataImmediateShift
(uint4 m, uint2 type, uint5 shift, uint4 d, uint4 n, uint1 save, uint4 mode) -> void {
uint32 rm = r(m);
carry = cpsr().c;
switch(type) {
case 0: rm = LSL(rm, shift); break;
case 1: rm = LSR(rm, shift ? (uint)shift : 32); break;
case 2: rm = ASR(rm, shift ? (uint)shift : 32); break;
case 3: rm = shift ? ROR(rm, shift) : RRX(rm); break;
}
armALU(mode, d, n, rm);
}
auto ARM7TDMI::armInstructionDataRegisterShift
(uint4 m, uint2 type, uint4 s, uint4 d, uint4 n, uint1 save, uint4 mode) -> void {
uint8 rs = r(s) + (s == 15 ? 4 : 0);
uint32 rm = r(m) + (m == 15 ? 4 : 0);
carry = cpsr().c;
switch(type) {
case 0: rm = LSL(rm, rs < 33 ? rs : (uint8)33); break;
case 1: rm = LSR(rm, rs < 33 ? rs : (uint8)33); break;
case 2: rm = ASR(rm, rs < 32 ? rs : (uint8)32); break;
case 3: if(rs) rm = ROR(rm, rs & 31 ? uint(rs & 31) : 32); break;
}
armALU(mode, d, n, rm);
}
auto ARM7TDMI::armInstructionLoadImmediate
(uint8 immediate, uint1 half, uint4 d, uint4 n, uint1 writeback, uint1 up, uint1 pre) -> void {
uint32 rn = r(n);
uint32 rd = r(d);
if(pre == 1) rn = up ? rn + immediate : rn - immediate;
rd = load((half ? Half : Byte) | Nonsequential | Signed, rn);
if(pre == 0) rn = up ? rn + immediate : rn - immediate;
if(pre == 0 || writeback) r(n) = rn;
r(d) = rd;
}
auto ARM7TDMI::armInstructionLoadRegister
(uint4 m, uint1 half, uint4 d, uint4 n, uint1 writeback, uint1 up, uint1 pre) -> void {
uint32 rn = r(n);
uint32 rm = r(m);
uint32 rd = r(d);
if(pre == 1) rn = up ? rn + rm : rn - rm;
rd = load((half ? Half : Byte) | Nonsequential | Signed, rn);
if(pre == 0) rn = up ? rn + rm : rn - rm;
if(pre == 0 || writeback) r(n) = rn;
r(d) = rd;
}
auto ARM7TDMI::armInstructionMemorySwap
(uint4 m, uint4 d, uint4 n, uint1 byte) -> void {
uint32 word = load((byte ? Byte : Word) | Nonsequential, r(n));
store((byte ? Byte : Word) | Nonsequential, r(n), r(m));
r(d) = word;
}
auto ARM7TDMI::armInstructionMoveHalfImmediate
(uint8 immediate, uint4 d, uint4 n, uint1 mode, uint1 writeback, uint1 up, uint1 pre) -> void {
uint32 rn = r(n);
uint32 rd = r(d);
if(pre == 1) rn = up ? rn + immediate : rn - immediate;
if(mode == 1) rd = load(Half | Nonsequential, rn);
if(mode == 0) store(Half | Nonsequential, rn, rd);
if(pre == 0) rn = up ? rn + immediate : rn - immediate;
if(pre == 0 || writeback) r(n) = rn;
if(mode == 1) r(d) = rd;
}
auto ARM7TDMI::armInstructionMoveHalfRegister
(uint4 m, uint4 d, uint4 n, uint1 mode, uint1 writeback, uint1 up, uint1 pre) -> void {
uint32 rn = r(n);
uint32 rm = r(m);
uint32 rd = r(d);
if(pre == 1) rn = up ? rn + rm : rn - rm;
if(mode == 1) rd = load(Half | Nonsequential, rn);
if(mode == 0) store(Half | Nonsequential, rn, rd);
if(pre == 0) rn = up ? rn + rm : rn - rm;
if(pre == 0 || writeback) r(n) = rn;
if(mode == 1) r(d) = rd;
}
auto ARM7TDMI::armInstructionMoveImmediateOffset
(uint12 immediate, uint4 d, uint4 n, uint1 mode, uint1 writeback, uint1 byte, uint1 up, uint1 pre) -> void {
uint32 rn = r(n);
uint32 rd = r(d);
if(pre == 1) rn = up ? rn + immediate : rn - immediate;
if(mode == 1) rd = load((byte ? Byte : Word) | Nonsequential, rn);
if(mode == 0) store((byte ? Byte : Word) | Nonsequential, rn, rd);
if(pre == 0) rn = up ? rn + immediate : rn - immediate;
if(pre == 0 || writeback) r(n) = rn;
if(mode == 1) r(d) = rd;
}
auto ARM7TDMI::armInstructionMoveMultiple
(uint16 list, uint4 n, uint1 mode, uint1 writeback, uint1 type, uint1 up, uint1 pre) -> void {
uint32 rn = r(n);
if(pre == 0 && up == 1) rn = rn + 0; //IA
if(pre == 1 && up == 1) rn = rn + 4; //IB
if(pre == 1 && up == 0) rn = rn - bit::count(list) * 4 + 0; //DB
if(pre == 0 && up == 0) rn = rn - bit::count(list) * 4 + 4; //DA
if(writeback && mode == 1) {
if(up == 1) r(n) = r(n) + bit::count(list) * 4; //IA,IB
if(up == 0) r(n) = r(n) - bit::count(list) * 4; //DA,DB
}
auto cpsrMode = cpsr().m;
bool usr = false;
if(type && mode == 1 && !list.bit(15)) usr = true;
if(type && mode == 0) usr = true;
if(usr) cpsr().m = PSR::USR;
uint sequential = Nonsequential;
for(uint m : range(16)) {
if(!list.bit(m)) continue;
if(mode == 1) r(m) = read(Word | sequential, rn);
if(mode == 0) write(Word | sequential, rn, r(m));
rn += 4;
sequential = Sequential;
}
if(usr) cpsr().m = cpsrMode;
if(mode) {
idle();
if(type && list.bit(15) && cpsr().m != PSR::USR && cpsr().m != PSR::SYS) {
cpsr() = spsr();
}
} else {
pipeline.nonsequential = true;
}
if(writeback && mode == 0) {
if(up == 1) r(n) = r(n) + bit::count(list) * 4; //IA,IB
if(up == 0) r(n) = r(n) - bit::count(list) * 4; //DA,DB
}
}
auto ARM7TDMI::armInstructionMoveRegisterOffset
(uint4 m, uint2 type, uint5 shift, uint4 d, uint4 n, uint1 mode, uint1 writeback, uint1 byte, uint1 up, uint1 pre) -> void {
uint32 rm = r(m);
uint32 rd = r(d);
uint32 rn = r(n);
carry = cpsr().c;
switch(type) {
case 0: rm = LSL(rm, shift); break;
case 1: rm = LSR(rm, shift ? (uint)shift : 32); break;
case 2: rm = ASR(rm, shift ? (uint)shift : 32); break;
case 3: rm = shift ? ROR(rm, shift) : RRX(rm); break;
}
if(pre == 1) rn = up ? rn + rm : rn - rm;
if(mode == 1) rd = load((byte ? Byte : Word) | Nonsequential, rn);
if(mode == 0) store((byte ? Byte : Word) | Nonsequential, rn, rd);
if(pre == 0) rn = up ? rn + rm : rn - rm;
if(pre == 0 || writeback) r(n) = rn;
if(mode == 1) r(d) = rd;
}
auto ARM7TDMI::armInstructionMoveToRegisterFromStatus
(uint4 d, uint1 mode) -> void {
if(mode && (cpsr().m == PSR::USR || cpsr().m == PSR::SYS)) return;
r(d) = mode ? spsr() : cpsr();
}
auto ARM7TDMI::armInstructionMoveToStatusFromImmediate
(uint8 immediate, uint4 rotate, uint4 field, uint1 mode) -> void {
uint32 data = immediate;
if(rotate) data = ROR(data, rotate << 1);
armMoveToStatus(field, mode, data);
}
auto ARM7TDMI::armInstructionMoveToStatusFromRegister
(uint4 m, uint4 field, uint1 mode) -> void {
armMoveToStatus(field, mode, r(m));
}
auto ARM7TDMI::armInstructionMultiply
(uint4 m, uint4 s, uint4 n, uint4 d, uint1 save, uint1 accumulate) -> void {
if(accumulate) idle();
r(d) = MUL(accumulate ? r(n) : 0, r(m), r(s));
}
auto ARM7TDMI::armInstructionMultiplyLong
(uint4 m, uint4 s, uint4 l, uint4 h, uint1 save, uint1 accumulate, uint1 sign) -> void {
uint64 rm = r(m);
uint64 rs = r(s);
idle();
idle();
if(accumulate) idle();
if(sign) {
if(rs >> 8 && rs >> 8 != 0xffffff) idle();
if(rs >> 16 && rs >> 16 != 0xffff) idle();
if(rs >> 24 && rs >> 24 != 0xff) idle();
rm = (int32)rm;
rs = (int32)rs;
} else {
if(rs >> 8) idle();
if(rs >> 16) idle();
if(rs >> 24) idle();
}
uint64 rd = rm * rs;
if(accumulate) rd += (uint64)r(h) << 32 | (uint64)r(l) << 0;
r(h) = rd >> 32;
r(l) = rd >> 0;
if(save) {
cpsr().z = rd == 0;
cpsr().n = rd.bit(63);
}
}
auto ARM7TDMI::armInstructionSoftwareInterrupt
(uint24 immediate) -> void {
exception(PSR::SVC, 0x08);
}
auto ARM7TDMI::armInstructionUndefined
() -> void {
exception(PSR::UND, 0x04);
}
@@ -1,225 +0,0 @@
auto ARM7TDMI::thumbInstructionALU
(uint3 d, uint3 m, uint4 mode) -> void {
switch(mode) {
case 0: r(d) = BIT(r(d) & r(m)); break; //AND
case 1: r(d) = BIT(r(d) ^ r(m)); break; //EOR
case 2: r(d) = BIT(LSL(r(d), r(m))); break; //LSL
case 3: r(d) = BIT(LSR(r(d), r(m))); break; //LSR
case 4: r(d) = BIT(ASR(r(d), r(m))); break; //ASR
case 5: r(d) = ADD(r(d), r(m), cpsr().c); break; //ADC
case 6: r(d) = SUB(r(d), r(m), cpsr().c); break; //SBC
case 7: r(d) = BIT(ROR(r(d), r(m))); break; //ROR
case 8: BIT(r(d) & r(m)); break; //TST
case 9: r(d) = SUB(0, r(m), 1); break; //NEG
case 10: SUB(r(d), r(m), 1); break; //CMP
case 11: ADD(r(d), r(m), 0); break; //CMN
case 12: r(d) = BIT(r(d) | r(m)); break; //ORR
case 13: r(d) = MUL(0, r(m), r(d)); break; //MUL
case 14: r(d) = BIT(r(d) & ~r(m)); break; //BIC
case 15: r(d) = BIT(~r(m)); break; //MVN
}
}
auto ARM7TDMI::thumbInstructionALUExtended
(uint4 d, uint4 m, uint2 mode) -> void {
switch(mode) {
case 0: r(d) = r(d) + r(m); break; //ADD
case 1: SUB(r(d), r(m), 1); break; //SUBS
case 2: r(d) = r(m); break; //MOV
}
}
auto ARM7TDMI::thumbInstructionAddRegister
(uint8 immediate, uint3 d, uint1 mode) -> void {
switch(mode) {
case 0: r(d) = (r(15) & ~3) + immediate * 4; break; //ADD pc
case 1: r(d) = r(13) + immediate * 4; break; //ADD sp
}
}
auto ARM7TDMI::thumbInstructionAdjustImmediate
(uint3 d, uint3 n, uint3 immediate, uint1 mode) -> void {
switch(mode) {
case 0: r(d) = ADD(r(n), immediate, 0); break; //ADD
case 1: r(d) = SUB(r(n), immediate, 1); break; //SUB
}
}
auto ARM7TDMI::thumbInstructionAdjustRegister
(uint3 d, uint3 n, uint3 m, uint1 mode) -> void {
switch(mode) {
case 0: r(d) = ADD(r(n), r(m), 0); break; //ADD
case 1: r(d) = SUB(r(n), r(m), 1); break; //SUB
}
}
auto ARM7TDMI::thumbInstructionAdjustStack
(uint7 immediate, uint1 mode) -> void {
switch(mode) {
case 0: r(13) = r(13) + immediate * 4; break; //ADD
case 1: r(13) = r(13) - immediate * 4; break; //SUB
}
}
auto ARM7TDMI::thumbInstructionBranchExchange
(uint4 m) -> void {
uint32 address = r(m);
cpsr().t = address.bit(0);
r(15) = address;
}
auto ARM7TDMI::thumbInstructionBranchFarPrefix
(int11 displacement) -> void {
r(14) = r(15) + (displacement * 2 << 11);
}
auto ARM7TDMI::thumbInstructionBranchFarSuffix
(uint11 displacement) -> void {
r(15) = r(14) + (displacement * 2);
r(14) = pipeline.decode.address | 1;
}
auto ARM7TDMI::thumbInstructionBranchNear
(int11 displacement) -> void {
r(15) = r(15) + displacement * 2;
}
auto ARM7TDMI::thumbInstructionBranchTest
(int8 displacement, uint4 condition) -> void {
if(!TST(condition)) return;
r(15) = r(15) + displacement * 2;
}
auto ARM7TDMI::thumbInstructionImmediate
(uint8 immediate, uint3 d, uint2 mode) -> void {
switch(mode) {
case 0: r(d) = BIT(immediate); break; //MOV
case 1: SUB(r(d), immediate, 1); break; //CMP
case 2: r(d) = ADD(r(d), immediate, 0); break; //ADD
case 3: r(d) = SUB(r(d), immediate, 1); break; //SUB
}
}
auto ARM7TDMI::thumbInstructionLoadLiteral
(uint8 displacement, uint3 d) -> void {
uint32 address = (r(15) & ~3) + (displacement << 2);
r(d) = load(Word | Nonsequential, address);
}
auto ARM7TDMI::thumbInstructionMoveByteImmediate
(uint3 d, uint3 n, uint5 offset, uint1 mode) -> void {
switch(mode) {
case 0: store(Byte | Nonsequential, r(n) + offset, r(d)); break; //STRB
case 1: r(d) = load(Byte | Nonsequential, r(n) + offset); break; //LDRB
}
}
auto ARM7TDMI::thumbInstructionMoveHalfImmediate
(uint3 d, uint3 n, uint5 offset, uint1 mode) -> void {
switch(mode) {
case 0: store(Half | Nonsequential, r(n) + offset * 2, r(d)); break; //STRH
case 1: r(d) = load(Half | Nonsequential, r(n) + offset * 2); break; //LDRH
}
}
auto ARM7TDMI::thumbInstructionMoveMultiple
(uint8 list, uint3 n, uint1 mode) -> void {
uint32 rn = r(n);
for(uint m : range(8)) {
if(!list.bit(m)) continue;
switch(mode) {
case 0: write(Word | Nonsequential, rn, r(m)); break; //STMIA
case 1: r(m) = read(Word | Nonsequential, rn); break; //LDMIA
}
rn += 4;
}
if(mode == 0 || !list.bit(n)) r(n) = rn;
if(mode == 1) idle();
}
auto ARM7TDMI::thumbInstructionMoveRegisterOffset
(uint3 d, uint3 n, uint3 m, uint3 mode) -> void {
switch(mode) {
case 0: store(Word | Nonsequential, r(n) + r(m), r(d)); break; //STR
case 1: store(Half | Nonsequential, r(n) + r(m), r(d)); break; //STRH
case 2: store(Byte | Nonsequential, r(n) + r(m), r(d)); break; //STRB
case 3: r(d) = load(Byte | Nonsequential | Signed, r(n) + r(m)); break; //LDSB
case 4: r(d) = load(Word | Nonsequential, r(n) + r(m)); break; //LDR
case 5: r(d) = load(Half | Nonsequential, r(n) + r(m)); break; //LDRH
case 6: r(d) = load(Byte | Nonsequential, r(n) + r(m)); break; //LDRB
case 7: r(d) = load(Half | Nonsequential | Signed, r(n) + r(m)); break; //LDSH
}
}
auto ARM7TDMI::thumbInstructionMoveStack
(uint8 immediate, uint3 d, uint1 mode) -> void {
switch(mode) {
case 0: store(Word | Nonsequential, r(13) + immediate * 4, r(d)); break; //STR
case 1: r(d) = load(Word | Nonsequential, r(13) + immediate * 4); break; //LDR
}
}
auto ARM7TDMI::thumbInstructionMoveWordImmediate
(uint3 d, uint3 n, uint5 offset, uint1 mode) -> void {
switch(mode) {
case 0: store(Word | Nonsequential, r(n) + offset * 4, r(d)); break; //STR
case 1: r(d) = load(Word | Nonsequential, r(n) + offset * 4); break; //LDR
}
}
auto ARM7TDMI::thumbInstructionShiftImmediate
(uint3 d, uint3 m, uint5 immediate, uint2 mode) -> void {
switch(mode) {
case 0: r(d) = BIT(LSL(r(m), immediate)); break; //LSL
case 1: r(d) = BIT(LSR(r(m), immediate ? (uint)immediate : 32)); break; //LSR
case 2: r(d) = BIT(ASR(r(m), immediate ? (uint)immediate : 32)); break; //ASR
}
}
auto ARM7TDMI::thumbInstructionSoftwareInterrupt
(uint8 immediate) -> void {
exception(PSR::SVC, 0x08);
}
auto ARM7TDMI::thumbInstructionStackMultiple
(uint8 list, uint1 lrpc, uint1 mode) -> void {
uint32 sp;
switch(mode) {
case 0: sp = r(13) - (bit::count(list) + lrpc) * 4; break; //PUSH
case 1: sp = r(13); //POP
}
uint sequential = Nonsequential;
for(uint m : range(8)) {
if(!list.bit(m)) continue;
switch(mode) {
case 0: write(Word | sequential, sp, r(m)); break; //PUSH
case 1: r(m) = read(Word | sequential, sp); break; //POP
}
sp += 4;
sequential = Sequential;
}
if(lrpc) {
switch(mode) {
case 0: write(Word | sequential, sp, r(14)); break; //PUSH
case 1: r(15) = read(Word | sequential, sp); break; //POP
}
sp += 4;
}
if(mode == 1) {
idle();
r(13) = r(13) + (bit::count(list) + lrpc) * 4; //POP
} else {
pipeline.nonsequential = true;
r(13) = r(13) - (bit::count(list) + lrpc) * 4; //PUSH
}
}
auto ARM7TDMI::thumbInstructionUndefined
() -> void {
exception(PSR::UND, 0x04);
}
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