mirror of
https://github.com/ares-emulator/ares.git
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No files matched your search
@@ -1,27 +0,0 @@
|
||||
---
|
||||
name: Bug report
|
||||
about: Report a bug *not* relating to game compatibility
|
||||
title: ''
|
||||
labels: ''
|
||||
assignees: ''
|
||||
|
||||
---
|
||||
|
||||
**Describe the bug**
|
||||
A clear and concise description of what the bug is.
|
||||
|
||||
**To Reproduce**
|
||||
Steps to reproduce the behavior:
|
||||
1. Go to '...'
|
||||
2. Click on '....'
|
||||
3. Scroll down to '....'
|
||||
4. See error
|
||||
|
||||
**Expected behavior**
|
||||
A clear and concise description of what you expected to happen.
|
||||
|
||||
**Screenshots**
|
||||
If applicable, add screenshots to help explain your problem.
|
||||
|
||||
**Additional context**
|
||||
Add any other context about the problem here.
|
||||
@@ -1,20 +0,0 @@
|
||||
---
|
||||
name: Feature request
|
||||
about: Suggest an idea for this project
|
||||
title: ''
|
||||
labels: ''
|
||||
assignees: ''
|
||||
|
||||
---
|
||||
|
||||
**Is your feature request related to a problem? Please describe.**
|
||||
A clear and concise description of what the problem is. Ex. I'm always frustrated when [...]
|
||||
|
||||
**Describe the solution you'd like**
|
||||
A clear and concise description of what you want to happen.
|
||||
|
||||
**Describe alternatives you've considered**
|
||||
A clear and concise description of any alternative solutions or features you've considered.
|
||||
|
||||
**Additional context**
|
||||
Add any other context or screenshots about the feature request here.
|
||||
@@ -1,22 +0,0 @@
|
||||
---
|
||||
name: Game Issue Report
|
||||
about: Report an issue running a specific game in ares
|
||||
title: "[system] Game"
|
||||
labels: bug
|
||||
assignees: ''
|
||||
|
||||
---
|
||||
|
||||
Before submitting an issue, please use the search to make sure an issue doesn't already exist, you should also make sure your rom is not a bad dump, by comparing against the hashes in the No-Intro (Cartridges) or Redump (CD-ROM) databases.
|
||||
|
||||
**Describe the issue**
|
||||
A clear and concise description of what the bug is.
|
||||
|
||||
**Rom Information**
|
||||
Specify the impacted rom filename and any associated hashes (sha256 preferred);.
|
||||
The easiest way to do this is to open the game in ares, and go to "Tools -> Manifest" and copy/paste the contents.
|
||||
|
||||
```
|
||||
file: Some Game (REGION).ext
|
||||
sha256: <hash>
|
||||
```
|
||||
@@ -1,334 +0,0 @@
|
||||
name: Build
|
||||
on:
|
||||
push:
|
||||
branches: [ master ]
|
||||
tags: [ 'v*' ]
|
||||
pull_request:
|
||||
branches: [ master ]
|
||||
jobs:
|
||||
build:
|
||||
strategy:
|
||||
fail-fast: false
|
||||
matrix:
|
||||
program:
|
||||
- ares
|
||||
platform:
|
||||
- name: windows
|
||||
os: windows-latest
|
||||
compiler: clang++
|
||||
windres: windres
|
||||
shell: 'msys2 {0}'
|
||||
msystem: clang64
|
||||
install: mingw-w64-clang-x86_64-clang mingw-w64-clang-x86_64-pkgconf mingw-w64-clang-x86_64-SDL2
|
||||
- name: windows-arm64
|
||||
os: windows-latest
|
||||
compiler: clang++ --target=aarch64-w64-windows-gnu --sysroot=/clangarm64 -resource-dir=/clangarm64/lib/clang/$(basename "$(clang++ -print-resource-dir)")
|
||||
windres: windres --target=aarch64-w64-windows-gnu
|
||||
shell: 'msys2 {0}'
|
||||
msystem: clang64
|
||||
install: mingw-w64-clang-x86_64-clang mingw-w64-clang-aarch64-clang mingw-w64-clang-aarch64-pkgconf mingw-w64-clang-aarch64-SDL2
|
||||
- name: windows-msvc-x64
|
||||
os: windows-latest
|
||||
compiler: clang++
|
||||
windres: llvm-rc
|
||||
shell: bash
|
||||
msvc-arch: x64
|
||||
- name: windows-msvc-arm64
|
||||
os: windows-latest
|
||||
compiler: clang++ --target=aarch64-w64-windows-msvc
|
||||
windres: llvm-rc
|
||||
shell: bash
|
||||
msvc-arch: x64_arm64
|
||||
- name: windows-cl-x64
|
||||
os: windows-latest
|
||||
compiler: cl
|
||||
windres: rc
|
||||
shell: bash
|
||||
msvc-arch: x64
|
||||
- name: windows-cl-arm64
|
||||
os: windows-latest
|
||||
compiler: cl
|
||||
windres: rc
|
||||
shell: bash
|
||||
msvc-arch: x64_arm64
|
||||
- name: macos-compat
|
||||
os: macos-12
|
||||
compiler: clang++
|
||||
shell: sh
|
||||
- name: macos-latest
|
||||
os: macos-latest
|
||||
compiler: clang++
|
||||
shell: sh
|
||||
- name: ubuntu
|
||||
os: ubuntu-latest
|
||||
compiler: g++
|
||||
shell: sh
|
||||
name: ${{ matrix.program }}-${{ matrix.platform.name }}
|
||||
runs-on: ${{ matrix.platform.os }}
|
||||
defaults:
|
||||
run:
|
||||
shell: ${{ matrix.platform.shell }}
|
||||
steps:
|
||||
- name: Install MSYS2 Dependencies
|
||||
if: matrix.platform.shell == 'msys2 {0}'
|
||||
uses: msys2/setup-msys2@v2
|
||||
with:
|
||||
msystem: ${{ matrix.platform.msystem }}
|
||||
install: make ${{ matrix.platform.install }}
|
||||
- name: Install Linux Dependencies
|
||||
if: runner.os == 'Linux'
|
||||
run: |
|
||||
sudo apt-get update -y -qq
|
||||
sudo apt-get install libsdl2-dev libgtk-3-dev libao-dev libopenal-dev
|
||||
- name: "macOS: Import Certificate"
|
||||
if: runner.os == 'macOS' && github.event_name != 'pull_request'
|
||||
continue-on-error: ${{ github.repository != 'ares-emulator/ares' }}
|
||||
uses: wpilibsuite/import-signing-certificate@2ac4f44d28045073d23153256efbb4c4b2d8aa22 # Don't use rolling branch for security reasons
|
||||
with:
|
||||
certificate-data: ${{ secrets.MACOS_CERTIFICATE_DATA }}
|
||||
certificate-passphrase: ${{ secrets.MACOS_CERTIFICATE_PASSPHRASE }}
|
||||
keychain-name: ares-macos-keychain
|
||||
keychain-password: ${{ secrets.MACOS_KEYCHAIN_PASSWORD }}
|
||||
- name: Checkout source code
|
||||
uses: actions/checkout@v4
|
||||
- name: Install Windows Dependencies
|
||||
if: runner.os == 'Windows'
|
||||
run: |
|
||||
export PATH="/c/Users/runneradmin/.cargo/bin:$PATH" # correct on windows-latest as of 2024-02-19
|
||||
if [[ ${{ matrix.platform.name }} == *-arm64 ]]; then
|
||||
rustup toolchain install nightly
|
||||
rustup default nightly
|
||||
rustup target add aarch64-pc-windows-msvc
|
||||
pushd thirdparty/librashader
|
||||
./build-librashader.sh aarch64-pc-windows-msvc
|
||||
popd
|
||||
else
|
||||
rustup toolchain install nightly
|
||||
rustup default nightly
|
||||
pushd thirdparty/librashader
|
||||
./build-librashader.sh
|
||||
popd
|
||||
fi
|
||||
- name: "macOS: recover MoltenVK cache"
|
||||
if: runner.os == 'macOS'
|
||||
uses: actions/cache@v4
|
||||
env:
|
||||
cache-name: moltenvk
|
||||
with:
|
||||
path: thirdparty/MoltenVK/MoltenVK
|
||||
key: ${{ runner.os }}-build-${{ env.cache-name }}-${{ hashFiles('thirdparty/MoltenVK/HEAD') }}
|
||||
- name: Install macOS Dependencies
|
||||
if: runner.os == 'macOS'
|
||||
run: |
|
||||
if [ $ImageOS == "macos14" ]; then
|
||||
sudo xcode-select -s /Applications/Xcode_15.2.app/Contents/Developer
|
||||
export MACOSX_DEPLOYMENT_TARGET=10.13
|
||||
echo "Set Xcode version to 15.2 for macos-latest build."
|
||||
elif [ $ImageOS == "macos12" ]; then
|
||||
sudo xcode-select -s /Applications/Xcode_13.4.app/Contents/Developer
|
||||
export MACOSX_DEPLOYMENT_TARGET=10.9
|
||||
echo "Set Xcode version to 13.4 for macos-compat build."
|
||||
fi
|
||||
brew install make ninja cmake
|
||||
pip install --no-input setuptools
|
||||
rustup toolchain install nightly
|
||||
rustup default nightly
|
||||
rustup target add x86_64-apple-darwin
|
||||
rustup target add aarch64-apple-darwin
|
||||
echo "MAKE=gmake" >> $GITHUB_ENV
|
||||
pushd thirdparty/SDL
|
||||
./build-SDL.sh
|
||||
popd
|
||||
pushd thirdparty/MoltenVK
|
||||
./build-moltenvk.sh
|
||||
popd
|
||||
export MACOSX_DEPLOYMENT_TARGET=10.15
|
||||
pushd thirdparty/librashader
|
||||
./build-librashader.sh
|
||||
popd
|
||||
- name: Set up MSVC environment
|
||||
if: matrix.platform.msvc-arch != ''
|
||||
uses: ilammy/msvc-dev-cmd@v1
|
||||
with:
|
||||
arch: ${{ matrix.platform.msvc-arch }}
|
||||
- name: Make
|
||||
if: runner.os != 'macOS'
|
||||
run: ${MAKE:-make} -j4 -C desktop-ui build=optimized local=false compiler="${{ matrix.platform.compiler }}" windres="${{ matrix.platform.windres }}"
|
||||
- name: "macOS: Make universal app"
|
||||
if: runner.os == 'macOS'
|
||||
run: scripts/macos-make-universal.sh build=optimized local=false
|
||||
env:
|
||||
MAKEFLAGS: -j3
|
||||
MACOS_CERTIFICATE_NAME: ${{ secrets.MACOS_CERTIFICATE_NAME }}
|
||||
MACOS_KEYCHAIN_NAME: ares-macos-keychain
|
||||
MACOS_KEYCHAIN_PASSWORD: ${{ secrets.MACOS_KEYCHAIN_PASSWORD }}
|
||||
- name: "Windows: sign"
|
||||
if: runner.os == 'Windows' && github.event_name != 'pull_request'
|
||||
uses: DanaBear/code-sign-action@98c79121b376beab8d6a9484f445089db4461bca
|
||||
with:
|
||||
certificate: '${{ secrets.WIN_CERTIFICATE }}'
|
||||
password: '${{ secrets.WIN_PASSWORD }}'
|
||||
certificatesha1: '${{ secrets.WIN_CERTHASH }}'
|
||||
certificatename: '${{ secrets.WIN_CERTNAME }}'
|
||||
folder: 'desktop-ui/out'
|
||||
timestampUrl: 'http://timestamp.digicert.com'
|
||||
- name: "macOS: notarize"
|
||||
if: runner.os == 'macOS' && github.event_name != 'pull_request'
|
||||
continue-on-error: ${{ github.repository != 'ares-emulator/ares' }}
|
||||
run: |
|
||||
ditto -c -k --keepParent desktop-ui/out/ares.app /tmp/ares.zip
|
||||
xcrun notarytool submit /tmp/ares.zip --apple-id "$MACOS_NOTARIZATION_USERNAME" --password "$MACOS_NOTARIZATION_PASSWORD" --team-id "$MACOS_NOTARIZATION_TEAMID" --wait
|
||||
xcrun stapler staple desktop-ui/out/ares.app
|
||||
env:
|
||||
MACOS_NOTARIZATION_USERNAME: ${{ secrets.MACOS_NOTARIZATION_USERNAME }}
|
||||
MACOS_NOTARIZATION_PASSWORD: ${{ secrets.MACOS_NOTARIZATION_PASSWORD }}
|
||||
MACOS_NOTARIZATION_TEAMID: ${{ secrets.MACOS_NOTARIZATION_TEAMID }}
|
||||
- name: Upload
|
||||
uses: actions/upload-artifact@v4
|
||||
with:
|
||||
name: ${{ matrix.program }}-${{ matrix.platform.name }}
|
||||
path: desktop-ui/out/*
|
||||
|
||||
|
||||
release:
|
||||
if: github.ref == 'refs/heads/master' || startsWith(github.ref, 'refs/tags/')
|
||||
runs-on: ubuntu-latest
|
||||
needs:
|
||||
- build
|
||||
steps:
|
||||
- uses: actions/checkout@v4
|
||||
with:
|
||||
path: 'src'
|
||||
- name: Download Artifacts
|
||||
uses: actions/download-artifact@v4
|
||||
with:
|
||||
path: 'bin'
|
||||
- name: Package Artifacts
|
||||
run: |
|
||||
set -eu
|
||||
case ${GITHUB_REF} in
|
||||
refs/tags/*) suffix="-${GITHUB_REF#refs/tags/}" ;;
|
||||
refs/heads/master) suffix="-nightly" ;;
|
||||
*) suffix="" ;;
|
||||
esac
|
||||
|
||||
srcdir="${GITHUB_WORKSPACE}/src"
|
||||
bindir="${GITHUB_WORKSPACE}/bin"
|
||||
|
||||
# Hack: Workaround for GitHub artifacts losing attributes.
|
||||
chmod +x ${bindir}/ares-macos-latest/ares.app/Contents/MacOS/ares
|
||||
chmod +x ${bindir}/ares-macos-compat/ares.app/Contents/MacOS/ares
|
||||
|
||||
for package in windows windows-msvc-arm64 macos-latest macos-compat
|
||||
do
|
||||
mkdir "${package}"
|
||||
cd "${package}"
|
||||
|
||||
# Package ares.
|
||||
outdir=ares${suffix}
|
||||
mkdir ${outdir}
|
||||
cp -ar ${bindir}/ares-${package}/* ${outdir}
|
||||
zip -r ../ares-${package}.zip ${outdir}
|
||||
|
||||
cd -
|
||||
done
|
||||
- name: Create Release
|
||||
id: release
|
||||
env:
|
||||
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
|
||||
run: |
|
||||
set -eu
|
||||
github_rest()
|
||||
{
|
||||
local method="${1}"
|
||||
local url="https://api.github.com${2}"
|
||||
shift 2
|
||||
>&2 echo "${method} ${url}"
|
||||
curl \
|
||||
--fail \
|
||||
-H "Accept: application/vnd.github.v3+json" \
|
||||
-H "Authorization: token ${GITHUB_TOKEN}" \
|
||||
-X "${method}" \
|
||||
"${url}" \
|
||||
"$@"
|
||||
}
|
||||
github_get_release_id_for_tag()
|
||||
{
|
||||
payload=$(github_rest GET "/repos/${GITHUB_REPOSITORY}/releases/tags/${1}") || return
|
||||
echo "${payload}" | jq .id
|
||||
}
|
||||
github_delete_release_by_id()
|
||||
{
|
||||
github_rest DELETE "/repos/${GITHUB_REPOSITORY}/releases/${1}"
|
||||
}
|
||||
github_create_release()
|
||||
{
|
||||
local payload="{
|
||||
\"tag_name\": \"${1}\",
|
||||
\"target_commitish\": \"${2}\",
|
||||
\"name\": \"${3}\",
|
||||
\"body\": \"${4}\",
|
||||
\"draft\": ${5},
|
||||
\"prerelease\": ${6}
|
||||
}"
|
||||
github_rest POST "/repos/${GITHUB_REPOSITORY}/releases" -d "${payload}"
|
||||
}
|
||||
make_nightly_release()
|
||||
{
|
||||
github_create_release \
|
||||
nightly \
|
||||
"${GITHUB_SHA}" \
|
||||
"ares nightly $(date +"%Y-%m-%d")" \
|
||||
"Auto-generated nightly release on $(date -u +"%Y-%m-%d %T %Z")" \
|
||||
false \
|
||||
true
|
||||
}
|
||||
make_version_release()
|
||||
{
|
||||
github_create_release \
|
||||
"${1}" \
|
||||
"${GITHUB_SHA}" \
|
||||
"ares ${1}" \
|
||||
"This is ares ${1}, released on $(date +"%Y-%m-%d")." \
|
||||
false \
|
||||
false
|
||||
}
|
||||
case ${GITHUB_REF} in
|
||||
refs/tags/*)
|
||||
# Create a new version release using the current revision.
|
||||
echo "UPLOAD_URL=$(make_version_release ${GITHUB_REF#refs/tags/} | jq -r .upload_url)" >> $GITHUB_ENV
|
||||
;;
|
||||
refs/heads/master)
|
||||
# Check for an existing nightly release.
|
||||
{ release_id=$(github_get_release_id_for_tag nightly); status=$?; } || true
|
||||
# Delete existing nightly release if it exists.
|
||||
case ${status} in
|
||||
0) github_delete_release_by_id "${release_id}" ;;
|
||||
22) >&2 echo "No current nightly release; skipping tag deletion." ;;
|
||||
*) >&2 echo "API call failed unexpectedly." && exit 1 ;;
|
||||
esac
|
||||
# Create a new nightly release using the current revision.
|
||||
echo "UPLOAD_URL=$(make_nightly_release | jq -r .upload_url)" >> $GITHUB_ENV
|
||||
;;
|
||||
esac
|
||||
- name: Upload ares-windows
|
||||
uses: actions/upload-release-asset@v1
|
||||
env: { GITHUB_TOKEN: '${{ secrets.GITHUB_TOKEN }}' }
|
||||
with: { upload_url: '${{ env.UPLOAD_URL }}', asset_path: 'ares-windows.zip', asset_name: 'ares-windows.zip', asset_content_type: 'application/zip' }
|
||||
- name: Upload ares-windows-msvc-arm64
|
||||
uses: actions/upload-release-asset@v1
|
||||
env: { GITHUB_TOKEN: '${{ secrets.GITHUB_TOKEN }}' }
|
||||
with: { upload_url: '${{ env.UPLOAD_URL }}', asset_path: 'ares-windows-msvc-arm64.zip', asset_name: 'ares-windows-msvc-arm64.zip', asset_content_type: 'application/zip' }
|
||||
- name: Upload ares-macos-latest
|
||||
uses: actions/upload-release-asset@v1
|
||||
env: { GITHUB_TOKEN: '${{ secrets.GITHUB_TOKEN }}' }
|
||||
with: { upload_url: '${{ env.UPLOAD_URL }}', asset_path: 'ares-macos-latest.zip', asset_name: 'ares-macos-latest.zip', asset_content_type: 'application/zip' }
|
||||
- name: Upload ares-macos-compat
|
||||
uses: actions/upload-release-asset@v1
|
||||
env: { GITHUB_TOKEN: '${{ secrets.GITHUB_TOKEN }}' }
|
||||
with: { upload_url: '${{ env.UPLOAD_URL }}', asset_path: 'ares-macos-compat.zip', asset_name: 'ares-macos-compat.zip', asset_content_type: 'application/zip' }
|
||||
# - name: Upload ares-ubuntu
|
||||
# uses: actions/upload-release-asset@v1
|
||||
# env: { GITHUB_TOKEN: '${{ secrets.GITHUB_TOKEN }}' }
|
||||
# with: { upload_url: '${{ env.UPLOAD_URL }}', asset_path: 'ares-ubuntu.zip', asset_name: 'ares-ubuntu.zip', asset_content_type: 'application/zip' }
|
||||
|
||||
-18
@@ -1,18 +0,0 @@
|
||||
*.moc
|
||||
*.user
|
||||
*.xcuserdata
|
||||
.vs/
|
||||
.vscode/
|
||||
.idea/
|
||||
cmake-*/
|
||||
obj/
|
||||
out/
|
||||
obj-amd64/
|
||||
obj-arm64/
|
||||
out-amd64/
|
||||
out-arm64/
|
||||
thirdparty/SDL/SDL
|
||||
thirdparty/SDL/libSDL2-2.0.0.dylib
|
||||
macos-xcode/
|
||||
.swiftpm
|
||||
*.xcodeproj
|
||||
@@ -1,6 +0,0 @@
|
||||
targets = all clean install uninstall verbose
|
||||
|
||||
$(targets):
|
||||
@$(MAKE) -C desktop-ui $@
|
||||
|
||||
.PHONY: $(targets)
|
||||
@@ -1,831 +0,0 @@
|
||||
----------------------------------------------------------------------
|
||||
ares
|
||||
|
||||
Copyright (c) 2004-2021 ares team, Near et al
|
||||
|
||||
Permission to use, copy, modify, and/or distribute this software for any
|
||||
purpose with or without fee is hereby granted, provided that the above
|
||||
copyright notice and this permission notice appear in all copies.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
----------------------------------------------------------------------
|
||||
|
||||
----------------------------------------------------------------------
|
||||
Stack-less Just-In-Time compiler
|
||||
|
||||
Copyright Zoltan Herczeg ([email protected]). All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are
|
||||
met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS
|
||||
``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
----------------------------------------------------------------------
|
||||
|
||||
----------------------------------------------------------------------
|
||||
libchdr
|
||||
|
||||
Copyright Romain Tisserand
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
* Redistributions of source code must retain the above copyright
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
* Neither the name of the <organization> nor the
|
||||
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|
||||
derived from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
|
||||
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|
||||
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|
||||
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|
||||
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
----------------------------------------------------------------------
|
||||
|
||||
----------------------------------------------------------------------
|
||||
LZMA SDK is placed in the public domain.
|
||||
|
||||
Anyone is free to copy, modify, publish, use, compile, sell, or distribute
|
||||
the original LZMA SDK code, either in source code form or as a compiled binary,
|
||||
for any purpose, commercial or non-commercial, and by any means.
|
||||
----------------------------------------------------------------------
|
||||
|
||||
----------------------------------------------------------------------
|
||||
zlib
|
||||
|
||||
(C) 1995-2017 Jean-loup Gailly and Mark Adler
|
||||
|
||||
This software is provided 'as-is', without any express or implied
|
||||
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|
||||
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|
||||
|
||||
Permission is granted to anyone to use this software for any purpose,
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
3. This notice may not be removed or altered from any source distribution.
|
||||
|
||||
Jean-loup Gailly Mark Adler
|
||||
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|
||||
|
||||
If you use the zlib library in a product, we would appreciate *not* receiving
|
||||
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|
||||
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|
||||
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|
||||
|
||||
If you redistribute modified sources, we would appreciate that you include in
|
||||
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|
||||
the FAQ for more information on the distribution of modified source versions.
|
||||
----------------------------------------------------------------------
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
xxHash - Extremely Fast Hash algorithm
|
||||
Header File
|
||||
Copyright (C) 2012-2021 Yann Collet
|
||||
|
||||
BSD 2-Clause License (https://www.opensource.org/licenses/bsd-license.php)
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
You can contact the author at:
|
||||
- xxHash homepage: https://www.xxhash.com
|
||||
- xxHash source repository: https://github.com/Cyan4973/xxHash
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
MoltenVK
|
||||
|
||||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
|
||||
|
||||
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|
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|
||||
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|
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----------------------------------------------------------------------
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||||
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||||
----------------------------------------------------------------------
|
||||
TZXFile
|
||||
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||||
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|
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||||
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||||
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||||
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|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
SOFTWARE.
|
||||
----------------------------------------------------------------------
|
||||
|
||||
----------------------------------------------------------------------
|
||||
ymfm
|
||||
|
||||
BSD 3-Clause License
|
||||
|
||||
Copyright (c) 2021, Aaron Giles
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the copyright holder nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
----------------------------------------------------------------------
|
||||
|
||||
----------------------------------------------------------------------
|
||||
librashader
|
||||
Mozilla Public License Version 2.0
|
||||
==================================
|
||||
|
||||
### 1. Definitions
|
||||
|
||||
**1.1. “Contributor”**
|
||||
means each individual or legal entity that creates, contributes to
|
||||
the creation of, or owns Covered Software.
|
||||
|
||||
**1.2. “Contributor Version”**
|
||||
means the combination of the Contributions of others (if any) used
|
||||
by a Contributor and that particular Contributor's Contribution.
|
||||
|
||||
**1.3. “Contribution”**
|
||||
means Covered Software of a particular Contributor.
|
||||
|
||||
**1.4. “Covered Software”**
|
||||
means Source Code Form to which the initial Contributor has attached
|
||||
the notice in Exhibit A, the Executable Form of such Source Code
|
||||
Form, and Modifications of such Source Code Form, in each case
|
||||
including portions thereof.
|
||||
|
||||
**1.5. “Incompatible With Secondary Licenses”**
|
||||
means
|
||||
|
||||
* **(a)** that the initial Contributor has attached the notice described
|
||||
in Exhibit B to the Covered Software; or
|
||||
* **(b)** that the Covered Software was made available under the terms of
|
||||
version 1.1 or earlier of the License, but not also under the
|
||||
terms of a Secondary License.
|
||||
|
||||
**1.6. “Executable Form”**
|
||||
means any form of the work other than Source Code Form.
|
||||
|
||||
**1.7. “Larger Work”**
|
||||
means a work that combines Covered Software with other material, in
|
||||
a separate file or files, that is not Covered Software.
|
||||
|
||||
**1.8. “License”**
|
||||
means this document.
|
||||
|
||||
**1.9. “Licensable”**
|
||||
means having the right to grant, to the maximum extent possible,
|
||||
whether at the time of the initial grant or subsequently, any and
|
||||
all of the rights conveyed by this License.
|
||||
|
||||
**1.10. “Modifications”**
|
||||
means any of the following:
|
||||
|
||||
* **(a)** any file in Source Code Form that results from an addition to,
|
||||
deletion from, or modification of the contents of Covered
|
||||
Software; or
|
||||
* **(b)** any new file in Source Code Form that contains any Covered
|
||||
Software.
|
||||
|
||||
**1.11. “Patent Claims” of a Contributor**
|
||||
means any patent claim(s), including without limitation, method,
|
||||
process, and apparatus claims, in any patent Licensable by such
|
||||
Contributor that would be infringed, but for the grant of the
|
||||
License, by the making, using, selling, offering for sale, having
|
||||
made, import, or transfer of either its Contributions or its
|
||||
Contributor Version.
|
||||
|
||||
**1.12. “Secondary License”**
|
||||
means either the GNU General Public License, Version 2.0, the GNU
|
||||
Lesser General Public License, Version 2.1, the GNU Affero General
|
||||
Public License, Version 3.0, or any later versions of those
|
||||
licenses.
|
||||
|
||||
**1.13. “Source Code Form”**
|
||||
means the form of the work preferred for making modifications.
|
||||
|
||||
**1.14. “You” (or “Your”)**
|
||||
means an individual or a legal entity exercising rights under this
|
||||
License. For legal entities, “You” includes any entity that
|
||||
controls, is controlled by, or is under common control with You. For
|
||||
purposes of this definition, “control” means **(a)** the power, direct
|
||||
or indirect, to cause the direction or management of such entity,
|
||||
whether by contract or otherwise, or **(b)** ownership of more than
|
||||
fifty percent (50%) of the outstanding shares or beneficial
|
||||
ownership of such entity.
|
||||
|
||||
|
||||
### 2. License Grants and Conditions
|
||||
|
||||
#### 2.1. Grants
|
||||
|
||||
Each Contributor hereby grants You a world-wide, royalty-free,
|
||||
non-exclusive license:
|
||||
|
||||
* **(a)** under intellectual property rights (other than patent or trademark)
|
||||
Licensable by such Contributor to use, reproduce, make available,
|
||||
modify, display, perform, distribute, and otherwise exploit its
|
||||
Contributions, either on an unmodified basis, with Modifications, or
|
||||
as part of a Larger Work; and
|
||||
* **(b)** under Patent Claims of such Contributor to make, use, sell, offer
|
||||
for sale, have made, import, and otherwise transfer either its
|
||||
Contributions or its Contributor Version.
|
||||
|
||||
#### 2.2. Effective Date
|
||||
|
||||
The licenses granted in Section 2.1 with respect to any Contribution
|
||||
become effective for each Contribution on the date the Contributor first
|
||||
distributes such Contribution.
|
||||
|
||||
#### 2.3. Limitations on Grant Scope
|
||||
|
||||
The licenses granted in this Section 2 are the only rights granted under
|
||||
this License. No additional rights or licenses will be implied from the
|
||||
distribution or licensing of Covered Software under this License.
|
||||
Notwithstanding Section 2.1(b) above, no patent license is granted by a
|
||||
Contributor:
|
||||
|
||||
* **(a)** for any code that a Contributor has removed from Covered Software;
|
||||
or
|
||||
* **(b)** for infringements caused by: **(i)** Your and any other third party's
|
||||
modifications of Covered Software, or **(ii)** the combination of its
|
||||
Contributions with other software (except as part of its Contributor
|
||||
Version); or
|
||||
* **(c)** under Patent Claims infringed by Covered Software in the absence of
|
||||
its Contributions.
|
||||
|
||||
This License does not grant any rights in the trademarks, service marks,
|
||||
or logos of any Contributor (except as may be necessary to comply with
|
||||
the notice requirements in Section 3.4).
|
||||
|
||||
#### 2.4. Subsequent Licenses
|
||||
|
||||
No Contributor makes additional grants as a result of Your choice to
|
||||
distribute the Covered Software under a subsequent version of this
|
||||
License (see Section 10.2) or under the terms of a Secondary License (if
|
||||
permitted under the terms of Section 3.3).
|
||||
|
||||
#### 2.5. Representation
|
||||
|
||||
Each Contributor represents that the Contributor believes its
|
||||
Contributions are its original creation(s) or it has sufficient rights
|
||||
to grant the rights to its Contributions conveyed by this License.
|
||||
|
||||
#### 2.6. Fair Use
|
||||
|
||||
This License is not intended to limit any rights You have under
|
||||
applicable copyright doctrines of fair use, fair dealing, or other
|
||||
equivalents.
|
||||
|
||||
#### 2.7. Conditions
|
||||
|
||||
Sections 3.1, 3.2, 3.3, and 3.4 are conditions of the licenses granted
|
||||
in Section 2.1.
|
||||
|
||||
|
||||
### 3. Responsibilities
|
||||
|
||||
#### 3.1. Distribution of Source Form
|
||||
|
||||
All distribution of Covered Software in Source Code Form, including any
|
||||
Modifications that You create or to which You contribute, must be under
|
||||
the terms of this License. You must inform recipients that the Source
|
||||
Code Form of the Covered Software is governed by the terms of this
|
||||
License, and how they can obtain a copy of this License. You may not
|
||||
attempt to alter or restrict the recipients' rights in the Source Code
|
||||
Form.
|
||||
|
||||
#### 3.2. Distribution of Executable Form
|
||||
|
||||
If You distribute Covered Software in Executable Form then:
|
||||
|
||||
* **(a)** such Covered Software must also be made available in Source Code
|
||||
Form, as described in Section 3.1, and You must inform recipients of
|
||||
the Executable Form how they can obtain a copy of such Source Code
|
||||
Form by reasonable means in a timely manner, at a charge no more
|
||||
than the cost of distribution to the recipient; and
|
||||
|
||||
* **(b)** You may distribute such Executable Form under the terms of this
|
||||
License, or sublicense it under different terms, provided that the
|
||||
license for the Executable Form does not attempt to limit or alter
|
||||
the recipients' rights in the Source Code Form under this License.
|
||||
|
||||
#### 3.3. Distribution of a Larger Work
|
||||
|
||||
You may create and distribute a Larger Work under terms of Your choice,
|
||||
provided that You also comply with the requirements of this License for
|
||||
the Covered Software. If the Larger Work is a combination of Covered
|
||||
Software with a work governed by one or more Secondary Licenses, and the
|
||||
Covered Software is not Incompatible With Secondary Licenses, this
|
||||
License permits You to additionally distribute such Covered Software
|
||||
under the terms of such Secondary License(s), so that the recipient of
|
||||
the Larger Work may, at their option, further distribute the Covered
|
||||
Software under the terms of either this License or such Secondary
|
||||
License(s).
|
||||
|
||||
#### 3.4. Notices
|
||||
|
||||
You may not remove or alter the substance of any license notices
|
||||
(including copyright notices, patent notices, disclaimers of warranty,
|
||||
or limitations of liability) contained within the Source Code Form of
|
||||
the Covered Software, except that You may alter any license notices to
|
||||
the extent required to remedy known factual inaccuracies.
|
||||
|
||||
#### 3.5. Application of Additional Terms
|
||||
|
||||
You may choose to offer, and to charge a fee for, warranty, support,
|
||||
indemnity or liability obligations to one or more recipients of Covered
|
||||
Software. However, You may do so only on Your own behalf, and not on
|
||||
behalf of any Contributor. You must make it absolutely clear that any
|
||||
such warranty, support, indemnity, or liability obligation is offered by
|
||||
You alone, and You hereby agree to indemnify every Contributor for any
|
||||
liability incurred by such Contributor as a result of warranty, support,
|
||||
indemnity or liability terms You offer. You may include additional
|
||||
disclaimers of warranty and limitations of liability specific to any
|
||||
jurisdiction.
|
||||
|
||||
|
||||
### 4. Inability to Comply Due to Statute or Regulation
|
||||
|
||||
If it is impossible for You to comply with any of the terms of this
|
||||
License with respect to some or all of the Covered Software due to
|
||||
statute, judicial order, or regulation then You must: **(a)** comply with
|
||||
the terms of this License to the maximum extent possible; and **(b)**
|
||||
describe the limitations and the code they affect. Such description must
|
||||
be placed in a text file included with all distributions of the Covered
|
||||
Software under this License. Except to the extent prohibited by statute
|
||||
or regulation, such description must be sufficiently detailed for a
|
||||
recipient of ordinary skill to be able to understand it.
|
||||
|
||||
|
||||
### 5. Termination
|
||||
|
||||
**5.1.** The rights granted under this License will terminate automatically
|
||||
if You fail to comply with any of its terms. However, if You become
|
||||
compliant, then the rights granted under this License from a particular
|
||||
Contributor are reinstated **(a)** provisionally, unless and until such
|
||||
Contributor explicitly and finally terminates Your grants, and **(b)** on an
|
||||
ongoing basis, if such Contributor fails to notify You of the
|
||||
non-compliance by some reasonable means prior to 60 days after You have
|
||||
come back into compliance. Moreover, Your grants from a particular
|
||||
Contributor are reinstated on an ongoing basis if such Contributor
|
||||
notifies You of the non-compliance by some reasonable means, this is the
|
||||
first time You have received notice of non-compliance with this License
|
||||
from such Contributor, and You become compliant prior to 30 days after
|
||||
Your receipt of the notice.
|
||||
|
||||
**5.2.** If You initiate litigation against any entity by asserting a patent
|
||||
infringement claim (excluding declaratory judgment actions,
|
||||
counter-claims, and cross-claims) alleging that a Contributor Version
|
||||
directly or indirectly infringes any patent, then the rights granted to
|
||||
You by any and all Contributors for the Covered Software under Section
|
||||
2.1 of this License shall terminate.
|
||||
|
||||
**5.3.** In the event of termination under Sections 5.1 or 5.2 above, all
|
||||
end user license agreements (excluding distributors and resellers) which
|
||||
have been validly granted by You or Your distributors under this License
|
||||
prior to termination shall survive termination.
|
||||
|
||||
|
||||
### 6. Disclaimer of Warranty
|
||||
|
||||
> Covered Software is provided under this License on an “as is”
|
||||
> basis, without warranty of any kind, either expressed, implied, or
|
||||
> statutory, including, without limitation, warranties that the
|
||||
> Covered Software is free of defects, merchantable, fit for a
|
||||
> particular purpose or non-infringing. The entire risk as to the
|
||||
> quality and performance of the Covered Software is with You.
|
||||
> Should any Covered Software prove defective in any respect, You
|
||||
> (not any Contributor) assume the cost of any necessary servicing,
|
||||
> repair, or correction. This disclaimer of warranty constitutes an
|
||||
> essential part of this License. No use of any Covered Software is
|
||||
> authorized under this License except under this disclaimer.
|
||||
|
||||
### 7. Limitation of Liability
|
||||
|
||||
> Under no circumstances and under no legal theory, whether tort
|
||||
> (including negligence), contract, or otherwise, shall any
|
||||
> Contributor, or anyone who distributes Covered Software as
|
||||
> permitted above, be liable to You for any direct, indirect,
|
||||
> special, incidental, or consequential damages of any character
|
||||
> including, without limitation, damages for lost profits, loss of
|
||||
> goodwill, work stoppage, computer failure or malfunction, or any
|
||||
> and all other commercial damages or losses, even if such party
|
||||
> shall have been informed of the possibility of such damages. This
|
||||
> limitation of liability shall not apply to liability for death or
|
||||
> personal injury resulting from such party's negligence to the
|
||||
> extent applicable law prohibits such limitation. Some
|
||||
> jurisdictions do not allow the exclusion or limitation of
|
||||
> incidental or consequential damages, so this exclusion and
|
||||
> limitation may not apply to You.
|
||||
|
||||
|
||||
### 8. Litigation
|
||||
|
||||
Any litigation relating to this License may be brought only in the
|
||||
courts of a jurisdiction where the defendant maintains its principal
|
||||
place of business and such litigation shall be governed by laws of that
|
||||
jurisdiction, without reference to its conflict-of-law provisions.
|
||||
Nothing in this Section shall prevent a party's ability to bring
|
||||
cross-claims or counter-claims.
|
||||
|
||||
|
||||
### 9. Miscellaneous
|
||||
|
||||
This License represents the complete agreement concerning the subject
|
||||
matter hereof. If any provision of this License is held to be
|
||||
unenforceable, such provision shall be reformed only to the extent
|
||||
necessary to make it enforceable. Any law or regulation which provides
|
||||
that the language of a contract shall be construed against the drafter
|
||||
shall not be used to construe this License against a Contributor.
|
||||
|
||||
|
||||
### 10. Versions of the License
|
||||
|
||||
#### 10.1. New Versions
|
||||
|
||||
Mozilla Foundation is the license steward. Except as provided in Section
|
||||
10.3, no one other than the license steward has the right to modify or
|
||||
publish new versions of this License. Each version will be given a
|
||||
distinguishing version number.
|
||||
|
||||
#### 10.2. Effect of New Versions
|
||||
|
||||
You may distribute the Covered Software under the terms of the version
|
||||
of the License under which You originally received the Covered Software,
|
||||
or under the terms of any subsequent version published by the license
|
||||
steward.
|
||||
|
||||
#### 10.3. Modified Versions
|
||||
|
||||
If you create software not governed by this License, and you want to
|
||||
create a new license for such software, you may create and use a
|
||||
modified version of this License if you rename the license and remove
|
||||
any references to the name of the license steward (except to note that
|
||||
such modified license differs from this License).
|
||||
|
||||
#### 10.4. Distributing Source Code Form that is Incompatible With Secondary Licenses
|
||||
|
||||
If You choose to distribute Source Code Form that is Incompatible With
|
||||
Secondary Licenses under the terms of this version of the License, the
|
||||
notice described in Exhibit B of this License must be attached.
|
||||
|
||||
## Exhibit A - Source Code Form License Notice
|
||||
|
||||
This Source Code Form is subject to the terms of the Mozilla Public
|
||||
License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
file, You can obtain one at http://mozilla.org/MPL/2.0/.
|
||||
|
||||
If it is not possible or desirable to put the notice in a particular
|
||||
file, then You may include the notice in a location (such as a LICENSE
|
||||
file in a relevant directory) where a recipient would be likely to look
|
||||
for such a notice.
|
||||
|
||||
You may add additional accurate notices of copyright ownership.
|
||||
|
||||
## Exhibit B - “Incompatible With Secondary Licenses” Notice
|
||||
|
||||
This Source Code Form is "Incompatible With Secondary Licenses", as
|
||||
defined by the Mozilla Public License, v. 2.0.
|
||||
|
||||
----------------------------------------------------------------------
|
||||
@@ -1,191 +0,0 @@
|
||||
|
||||
|
||||
[](https://github.com/higan-emu/ares/blob/master/LICENSE)
|
||||
|
||||
**ares** is a multi-system emulator that began development on October 14th, 2004.
|
||||
It is a descendant of [higan](https://github.com/higan-emu/higan) and [bsnes](https://github.com/bsnes-emu/bsnes/), and focuses on accuracy and preservation.
|
||||
|
||||
Official Releases
|
||||
-----------------
|
||||
|
||||
Official releases are available from
|
||||
[the ares website](https://ares-emu.net).
|
||||
|
||||
Nightly Builds
|
||||
--------------
|
||||
|
||||
Automated, untested builds of ares are available for Windows and macOS as a [pre-release](https://github.com/higan-emu/ares/releases/tag/nightly).
|
||||
Only the latest nightly build is kept.
|
||||
|
||||
Prerequisites
|
||||
-------------
|
||||
|
||||
### *nix building
|
||||
|
||||
###### Minimum required packages:
|
||||
```
|
||||
g++ make pkg-config libgtk-3-dev libcanberra-gtk-module libgl-dev libasound2-dev
|
||||
```
|
||||
###### Additional Audio Drivers
|
||||
ares supports additional audio drivers besides the ALSA drivers included above. Installing these additional packages will allow them to be selected in Settings > Drivers:
|
||||
`libao-dev libopenal-dev`
|
||||
|
||||
###### GTK2 & GTK3
|
||||
By default, GTK3 is used, but support for GTK2 is available. You will need to install the additional package `libgtk2.0-dev` as well as specifying the command line option `hiro=gtk2` at compile time.
|
||||
|
||||
###### SDL2 for input
|
||||
If you would like to use SDL for input (e.g. for using a controller), you will need to install the `libsdl2-dev` and `libsdl2-2.0-0` packages and perform a clean build of ares.
|
||||
You should then be able to select SDL for input in the Settings > Drivers menu.
|
||||
|
||||
##### Building with clang
|
||||
|
||||
clang++ is now the preferred compiler for ares. If clang is detected on Windows/macOS/BSD, it will be selected by default. On Linux and other platforms, g++ remains the default if present. To build with clang, it is necessary to install both the `clang` and `lld` packages. If you would like to manually specify a compiler, you can use the following option: `compiler=[g++|clang++]`
|
||||
|
||||
##### Librashader Support
|
||||
If you do not want to include librashader support, you can pass the following option to the `make` command to skip these requirements using: `librashader=false`
|
||||
|
||||
Librashader requires rust in order to build. You can install it with the following command:
|
||||
```
|
||||
curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh
|
||||
source ~/.cargo/env
|
||||
rustup toolchain install nightly
|
||||
```
|
||||
|
||||
In order to build librashader, change into the `ares/thirdparty/librashader` directory and run the script `build-librashader.sh`
|
||||
Note that once the build completes, it will instruct you to run three copy commands to install the library on your system. These paths may be different depending on Linux distribution.
|
||||
|
||||
--------------
|
||||
|
||||
### Windows building
|
||||
|
||||
To build on Windows, using MSYS2 is recommended which can be download [here](https://www.msys2.org/). Follow the instructions
|
||||
on this page to install and setup an appropriate MINGW64 environment. Running the command:
|
||||
```
|
||||
pacman -S --needed base-devel mingw-w64-x86_64-toolchain mingw-w64-x86_64-SDL2
|
||||
```
|
||||
from the MSYS2 MSYS terminal should setup everything you need to compile ares. Note that in order to compile, you will want to be in a MINGW64 terminal window after install and setup is complete.
|
||||
|
||||
##### Building with clang
|
||||
|
||||
clang is available through Visual Studio (or Build Tools for Visual Studio) through its installer and can be used to build ares. You will still need to supply GNU make in this instance. MSYS2 also offers a clang environment. You will want to make sure you select the clangw64 option during installation of MSYS2 which should provide and additional CLANG64 pre-configured environment. Install the clang toolchain package from the MSYS2 terminal:
|
||||
```
|
||||
pacman -S mingw-w64-clang-x86_64-toolchain mingw-w64-clang-x86_64-SDL2
|
||||
```
|
||||
Once complete, open a CLANG64 terminal window and proceed with building ares.
|
||||
|
||||
###### Debug Symbols
|
||||
When building with clang, by default symbols will be generated for debug builds using an MSVC compatible format (CodeView) for use with Windows debugging tools. In order to generate GDB compatible symbols, specify the following option: `symformat=gdb`
|
||||
|
||||
###### Librashader Support
|
||||
ares has introduced support for the [librashader](https://github.com/SnowflakePowered/librashader) library, which is a preprocessor, compiler, and runtime for RetroArch 'slang' shaders. If you are not interested in working with librashaders, you can pass the following option to the `make` command to skip these requirements using: `librashader=false`
|
||||
|
||||
Building the librashader library on Windows requires Rust. Follow these steps to prepare your system and build the librashader library:
|
||||
|
||||
1. Download and execute the rustup-init.exe installer from: https://rustup.rs/
|
||||
2. Open a new Windows terminal and run the following commands:
|
||||
```
|
||||
rustup toolchain install nightly
|
||||
rustup default nightly
|
||||
```
|
||||
3. With Rust successfully installed, you will need to update your PATH environment variable within your MSYS2 environment. In an MSYS2 shell, open $HOME/.bash_profile and append something like the following (note you will need to replace both instances of %USER_NAME% with the real user name you used to install Rust):
|
||||
```
|
||||
if [ -d "/C/Users/%USER_NAME%/.cargo/bin" ] ; then
|
||||
PATH="/C/Users/%USER_NAME%/.cargo/bin:${PATH}"
|
||||
fi
|
||||
```
|
||||
4. Open a new MSYS2 based shell for the compiler you are using (MinGW64|CLANG64|UCRT64), execute `rustup` to validate the path is set properly within your MSYS2 environment.
|
||||
5. In your MSYS2 compiler shell, `cd` into the `ares/thirdparty/librashader` directory
|
||||
6. Execute the build script, build should complete successfully:
|
||||
```
|
||||
./build-librashader.sh
|
||||
```
|
||||
|
||||
This only needs to be done once, or anytime the librashader library is updated. Once built, ares will build with librashader support by default requiring no additional flags.
|
||||
|
||||
Compilation
|
||||
-----------
|
||||
|
||||
Check out the source code by running this command:
|
||||
|
||||
```
|
||||
git clone https://github.com/ares-emulator/ares.git
|
||||
```
|
||||
|
||||
From the root of the project directory run:
|
||||
|
||||
```
|
||||
make -j4
|
||||
```
|
||||
|
||||
`-j#` indicates number of parallel build processes, and shouldn't be set higher than N-1 cores on your processor. Specifying this option can significantly decrease the time to build this project. There are multiple build types available and it defaults to an 'optimized' build. Build types can be specified using: `build=[debug|stable|release|minified|optimized]`
|
||||
|
||||
Build options can be found in the following two make files: nall/GNUmakefile desktop-ui/GNUmakefile
|
||||
|
||||
To start compilation from the beginning, run the following prior to compiling:
|
||||
|
||||
```
|
||||
make clean
|
||||
```
|
||||
|
||||
#### Building specific cores
|
||||
If you would like to build a subset of cores, you can specify the `cores="core1 core2"` option. Currently available cores:
|
||||
```
|
||||
a26 fc sfc n64 sg ms md ps1 pce ng msx cv myvision gb gba ws ngp spec
|
||||
```
|
||||
|
||||
Build Output
|
||||
------------
|
||||
|
||||
There is a single binary produced at the end of compilation which can be found in `desktop-ui/out`. On OS's besides Linux, the `Database` & `Shader` directories are copied over here as well. On Linux, running `make install` after compilation will copy these directories and binary into suitable locations (see desktop-ui/GNUmakefile for details). Alternatively, these directories can be copied from `thirdparty/slang-shaders/*` into a `Shader` directory, and by copying `mia/Database/*`
|
||||
|
||||
|
||||
Command-line options
|
||||
--------------------
|
||||
|
||||
When started from the command-line, ares accepts a few options.
|
||||
|
||||
```
|
||||
Usage: ./ares [options] game(s)
|
||||
|
||||
--help Displays available options and exit
|
||||
--fullscreen Start in full screen mode
|
||||
--system system Specify the system name
|
||||
--shader shader Specify GLSL shader name to load (requires OpenGL driver)
|
||||
--setting name=value Specify a value for a setting
|
||||
--dump-all-settings Show a list of all existing settings and exit
|
||||
--no-file-prompt Do not prompt to load (optional) additional roms (eg: 64DD)
|
||||
```
|
||||
|
||||
The --system option is useful when the system type cannot be auto-detected.
|
||||
--fullscreen will only have an effect if a game is also passed in argument.
|
||||
|
||||
Example:
|
||||
`ares --system MSX examples.rom --fullscreen`
|
||||
|
||||
Specifying multiple games allows for multi-cart support. For example, to load
|
||||
the Super GameBoy BIOS and a game in one command (to avoid a file prompt), you
|
||||
can do:
|
||||
|
||||
`ares "Super GameBoy.sfc" "Super Mario Land.gb"`
|
||||
|
||||
The --no-file-prompt option is useful if you wish to launch a game from CLI
|
||||
without being prompted to load additional roms. For example, some Nintendo 64
|
||||
games optionally support 64DD expansion disks, so this option can be used to
|
||||
suppress the "64DD Disk" file dialog, and assume any secondary content is
|
||||
disconnected.
|
||||
|
||||
High-level Components
|
||||
---------------------
|
||||
|
||||
* __ares__: emulator cores and component implementations
|
||||
* __desktop-ui__: main GUI implementation for this project
|
||||
* __hiro__: cross-platform GUI toolkit that utilizes native APIs on supported platforms
|
||||
* __nall__: Near's alternative to the C++ standard library
|
||||
* __ruby__: interface between a hiro application and platform-specific APIs for emulator video, audio, and input
|
||||
* __mia__: internal ROM database and ROM/image loader
|
||||
* __libco__: cooperative multithreading library
|
||||
|
||||
Contributing
|
||||
------------
|
||||
|
||||
Please join our discord to chat with other ares developers: https://discord.com/invite/gz2quhk2kv
|
||||
@@ -1,108 +0,0 @@
|
||||
ifeq ($(platform),windows)
|
||||
options += $(call lib,uuid kernel32 user32 gdi32 comctl32 comdlg32 shell32)
|
||||
else ifeq ($(platform),macos)
|
||||
else ifneq ($(filter $(platform),linux bsd),)
|
||||
options += -Wl,-export-dynamic
|
||||
options += -lX11 -lXext
|
||||
else
|
||||
$(error "ares is a library and cannot be built directly.")
|
||||
endif
|
||||
|
||||
ares.objects := ares ares-fixed-allocator
|
||||
|
||||
$(object.path)/ares.o: $(ares.path)/ares/ares.cpp
|
||||
$(object.path)/ares-fixed-allocator.o: $(ares.path)/ares/memory/fixed-allocator.cpp
|
||||
|
||||
ifeq ($(vulkan),true)
|
||||
flags += -DVULKAN
|
||||
endif
|
||||
|
||||
ifeq ($(profile),accuracy)
|
||||
flags += -DPROFILE_ACCURACY
|
||||
endif
|
||||
|
||||
ifeq ($(profile),performance)
|
||||
flags += -DPROFILE_PERFORMANCE
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),a26),)
|
||||
include $(ares.path)/a26/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),fc),)
|
||||
include $(ares.path)/fc/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),sfc),)
|
||||
include $(ares.path)/sfc/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),n64),)
|
||||
include $(ares.path)/n64/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),sg),)
|
||||
include $(ares.path)/sg/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),ms),)
|
||||
include $(ares.path)/ms/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),md),)
|
||||
include $(ares.path)/md/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),saturn),)
|
||||
include $(ares.path)/saturn/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),ps1),)
|
||||
include $(ares.path)/ps1/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),pce),)
|
||||
include $(ares.path)/pce/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),msx),)
|
||||
include $(ares.path)/msx/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),cv),)
|
||||
include $(ares.path)/cv/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),myvision),)
|
||||
include $(ares.path)/myvision/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),gb),)
|
||||
include $(ares.path)/gb/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),gba),)
|
||||
include $(ares.path)/gba/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),ws),)
|
||||
include $(ares.path)/ws/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),ng),)
|
||||
include $(ares.path)/ng/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),ngp),)
|
||||
include $(ares.path)/ngp/GNUmakefile
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(cores),spec),)
|
||||
include $(ares.path)/spec/GNUmakefile
|
||||
endif
|
||||
|
||||
include $(ares.path)/component/GNUmakefile
|
||||
|
||||
flags += $(foreach c,$(call strupper,$(cores)),-DCORE_$c)
|
||||
|
||||
ares.objects := $(ares.objects:%=$(object.path)/%.o)
|
||||
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
Whitespace-only changes.
@@ -1,122 +0,0 @@
|
||||
layout
|
||||
name: Japanese
|
||||
|
||||
//row 0
|
||||
key: 0 わ を
|
||||
key: 1 ! ぬ
|
||||
key: 2 " ふ
|
||||
key: 3 # あ ぁ
|
||||
key: 4 $ う ぅ
|
||||
key: 5 % え ぇ
|
||||
key: 6 & お ぉ
|
||||
key: 7 ’ や ゃ
|
||||
|
||||
//row 1
|
||||
key: 8 ( ゆ ゅ
|
||||
key: 9 ) よ ょ
|
||||
key: - = ほ
|
||||
key: ^ ~ へ
|
||||
key: ¥ | ー
|
||||
key: @ ‘ "
|
||||
key: [ { 。
|
||||
key: ; + れ
|
||||
|
||||
//row 2
|
||||
key: : * け
|
||||
key: ] } む
|
||||
key: , < ね `
|
||||
key: . > る 。
|
||||
key: / ? め .
|
||||
key: - ろ
|
||||
key: A ち
|
||||
key: B こ
|
||||
|
||||
//row 3
|
||||
key: C そ
|
||||
key: D し
|
||||
key: E い ぃ
|
||||
key: F は
|
||||
key: G き
|
||||
key: H く
|
||||
key: I に
|
||||
key: J ま
|
||||
|
||||
//row 4
|
||||
key: K の
|
||||
key: L り
|
||||
key: M も
|
||||
key: N み
|
||||
key: O ら
|
||||
key: P せ
|
||||
key: Q た
|
||||
key: R す
|
||||
|
||||
//row 5
|
||||
key: S と
|
||||
key: T か
|
||||
key: U な
|
||||
key: V ひ
|
||||
key: W て
|
||||
key: X さ
|
||||
key: Y ん
|
||||
key: Z つ っ
|
||||
|
||||
//row 6
|
||||
key: SHIFT
|
||||
key: CTRL
|
||||
key: GRAPH
|
||||
key: CAPS
|
||||
key: かな
|
||||
key: F1 F6
|
||||
key: F2 F7
|
||||
key: F3 F8
|
||||
|
||||
//row 7
|
||||
key: F4 F9
|
||||
key: F5 F10
|
||||
key: ESC
|
||||
key: TAB
|
||||
key: STOP
|
||||
key: BS
|
||||
key: SELECT
|
||||
key: RETURN
|
||||
|
||||
//row 8
|
||||
key: SPACE
|
||||
key: CLS/HOME
|
||||
key: INS
|
||||
key: DEL
|
||||
key: ←
|
||||
key: ↑
|
||||
key: ↓
|
||||
key: →
|
||||
|
||||
//row 9
|
||||
key: *
|
||||
key: +
|
||||
key: /
|
||||
key: 0
|
||||
key: 1
|
||||
key: 2
|
||||
key: 3
|
||||
key: 4
|
||||
|
||||
//row 10
|
||||
key: 5
|
||||
key: 6
|
||||
key: 7
|
||||
key: 8
|
||||
key: 9
|
||||
key: -
|
||||
key: ,
|
||||
key: .
|
||||
|
||||
//row 11
|
||||
key:
|
||||
key: 実行
|
||||
key:
|
||||
key: 取消
|
||||
key:
|
||||
key:
|
||||
key:
|
||||
key:
|
||||
Binary file not shown.
Whitespace-only changes.
@@ -1,122 +0,0 @@
|
||||
layout
|
||||
name: Japanese
|
||||
|
||||
//row 0
|
||||
key: 0 わ を
|
||||
key: 1 ! ぬ
|
||||
key: 2 " ふ
|
||||
key: 3 # あ ぁ
|
||||
key: 4 $ う ぅ
|
||||
key: 5 % え ぇ
|
||||
key: 6 & お ぉ
|
||||
key: 7 ’ や ゃ
|
||||
|
||||
//row 1
|
||||
key: 8 ( ゆ ゅ
|
||||
key: 9 ) よ ょ
|
||||
key: - = ほ
|
||||
key: ^ ~ へ
|
||||
key: ¥ | ー
|
||||
key: @ ‘ "
|
||||
key: [ { 。
|
||||
key: ; + れ
|
||||
|
||||
//row 2
|
||||
key: : * け
|
||||
key: ] } む
|
||||
key: , < ね `
|
||||
key: . > る 。
|
||||
key: / ? め .
|
||||
key: - ろ
|
||||
key: A ち
|
||||
key: B こ
|
||||
|
||||
//row 3
|
||||
key: C そ
|
||||
key: D し
|
||||
key: E い ぃ
|
||||
key: F は
|
||||
key: G き
|
||||
key: H く
|
||||
key: I に
|
||||
key: J ま
|
||||
|
||||
//row 4
|
||||
key: K の
|
||||
key: L り
|
||||
key: M も
|
||||
key: N み
|
||||
key: O ら
|
||||
key: P せ
|
||||
key: Q た
|
||||
key: R す
|
||||
|
||||
//row 5
|
||||
key: S と
|
||||
key: T か
|
||||
key: U な
|
||||
key: V ひ
|
||||
key: W て
|
||||
key: X さ
|
||||
key: Y ん
|
||||
key: Z つ っ
|
||||
|
||||
//row 6
|
||||
key: SHIFT
|
||||
key: CTRL
|
||||
key: GRAPH
|
||||
key: CAPS
|
||||
key: かな
|
||||
key: F1 F6
|
||||
key: F2 F7
|
||||
key: F3 F8
|
||||
|
||||
//row 7
|
||||
key: F4 F9
|
||||
key: F5 F10
|
||||
key: ESC
|
||||
key: TAB
|
||||
key: STOP
|
||||
key: BS
|
||||
key: SELECT
|
||||
key: RETURN
|
||||
|
||||
//row 8
|
||||
key: SPACE
|
||||
key: CLS/HOME
|
||||
key: INS
|
||||
key: DEL
|
||||
key: ←
|
||||
key: ↑
|
||||
key: ↓
|
||||
key: →
|
||||
|
||||
//row 9
|
||||
key: *
|
||||
key: +
|
||||
key: /
|
||||
key: 0
|
||||
key: 1
|
||||
key: 2
|
||||
key: 3
|
||||
key: 4
|
||||
|
||||
//row 10
|
||||
key: 5
|
||||
key: 6
|
||||
key: 7
|
||||
key: 8
|
||||
key: 9
|
||||
key: -
|
||||
key: ,
|
||||
key: .
|
||||
|
||||
//row 11
|
||||
key:
|
||||
key: 実行
|
||||
key:
|
||||
key: 取消
|
||||
key:
|
||||
key:
|
||||
key:
|
||||
key:
|
||||
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Binary file not shown.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Binary file not shown.
Binary file not shown.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Binary file not shown.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
Whitespace-only changes.
@@ -1,970 +0,0 @@
|
||||
database
|
||||
revision: 2020-11-09
|
||||
|
||||
//Boards (Production)
|
||||
|
||||
database
|
||||
revision: 2020-01-21
|
||||
|
||||
board: BANDAI-PT-923
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
slot type=SufamiTurbo
|
||||
rom
|
||||
map address=20-3f,a0-bf:8000-ffff mask=0x8000
|
||||
ram
|
||||
map address=60-6f,e0-ef:0000-ffff
|
||||
slot type=SufamiTurbo
|
||||
rom
|
||||
map address=40-5f,c0-df:0000-ffff mask=0x8000
|
||||
ram
|
||||
map address=70-7d,f0-ff:0000-ffff
|
||||
|
||||
board: BSC-1A5B9P-01
|
||||
memory type=RAM content=Save
|
||||
map address=10-17:5000-5fff mask=0xf000
|
||||
processor identifier=MCC
|
||||
map address=00-0f:5000-5fff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
map address=20-3f,a0-bf:6000-7fff
|
||||
memory type=ROM content=Program
|
||||
memory type=RAM content=Download
|
||||
slot type=BSMemory
|
||||
|
||||
board: BSC-1A5M-02
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
|
||||
map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
|
||||
map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
|
||||
map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
slot type=BSMemory
|
||||
map address=c0-ef:0000-ffff
|
||||
|
||||
board: BSC-1A7M-(01,10)
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
|
||||
map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
|
||||
map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
|
||||
map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
slot type=BSMemory
|
||||
map address=c0-ef:0000-ffff
|
||||
|
||||
board: BSC-1J3M-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff
|
||||
map address=40-5f,c0-df:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
slot type=BSMemory
|
||||
map address=20-3f,a0-bf:8000-ffff
|
||||
map address=60-7d,e0-ff:0000-ffff
|
||||
|
||||
board: BSC-1J5M-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff
|
||||
map address=40-5f,c0-df:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
slot type=BSMemory
|
||||
map address=20-3f,a0-bf:8000-ffff
|
||||
map address=60-7d,e0-ff:0000-ffff
|
||||
|
||||
board: BSC-1L3B-01
|
||||
processor architecture=W65C816S
|
||||
map address=00-3f,80-bf:2200-23ff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x408000
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
slot type=BSMemory
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=40-4f:0000-ffff
|
||||
memory type=RAM content=Internal
|
||||
map address=00-3f,80-bf:3000-37ff size=0x800
|
||||
|
||||
board: BSC-1L5B-01
|
||||
processor architecture=W65C816S
|
||||
map address=00-3f,80-bf:2200-23ff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x408000
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
slot type=BSMemory
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=40-4f:0000-ffff
|
||||
memory type=RAM content=Internal
|
||||
map address=00-3f,80-bf:3000-37ff size=0x800
|
||||
|
||||
board: SGB-R-10
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
map address=40-7d,c0-ff:0000-7fff mask=0x8000
|
||||
processor identifier=ICD revision=2
|
||||
map address=00-3f,80-bf:6000-67ff,7000-7fff
|
||||
memory type=ROM content=Boot architecture=SM83
|
||||
slot type=GameBoy
|
||||
|
||||
board: SHVC-1A0N-(01,02,10,20,30)
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
map address=40-7d,c0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-1A1B-(04,05,06)
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-ffff
|
||||
|
||||
board: SHVC-1A1M-(01,10,11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-1A3B-(11,12,13)
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-ffff
|
||||
|
||||
board: SHVC-1A3B-20
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-1A3M-(10,20,21,30)
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-1A5B-(02,04)
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-ffff
|
||||
|
||||
board: SHVC-1A5M-(01,11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-1B0N-(02,03,10)
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
processor architecture=uPD7725
|
||||
map address=30-3f,b0-bf:8000-ffff mask=0x3fff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: SHVC-1B5B-02
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-ffff
|
||||
processor architecture=uPD7725
|
||||
map address=20-3f,a0-bf:8000-ffff mask=0x3fff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: SHVC-1C0N
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=60-7d,e0-ff:0000-ffff
|
||||
|
||||
board: SHVC-1C0N5S-01
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=60-7d,e0-ff:0000-ffff
|
||||
|
||||
board: SHVC-1CA0N5S-01
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
map address=40-5f,c0-df:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=70-71,f0-f1:0000-ffff
|
||||
|
||||
board: SHVC-1CA0N6S-01
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
map address=40-5f,c0-df:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=70-71,f0-f1:0000-ffff
|
||||
|
||||
board: SHVC-1CA6B-01
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
map address=40-5f,c0-df:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=70-71,f0-f1:0000-ffff
|
||||
|
||||
board: SHVC-1CB0N7S-01
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f:8000-ffff mask=0x8000
|
||||
map address=40-5f:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=70-71:0000-ffff
|
||||
|
||||
board: SHVC-1CB5B-(01,20)
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f:8000-ffff mask=0x8000
|
||||
map address=40-5f:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=70-71:0000-ffff
|
||||
|
||||
board: SHVC-1CB7B-01
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f:8000-ffff mask=0x8000
|
||||
map address=40-5f:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=70-71:0000-ffff
|
||||
|
||||
board: SHVC-1DC0N-01
|
||||
processor architecture=HG51BS169
|
||||
map address=00-3f,80-bf:6c00-6fff,7c00-7fff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-77:0000-7fff
|
||||
memory type=ROM content=Data architecture=HG51BS169
|
||||
memory type=RAM content=Data architecture=HG51BS169
|
||||
map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
|
||||
oscillator
|
||||
|
||||
board: SHVC-1DS0B-20
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
processor architecture=uPD96050
|
||||
map address=60-67,e0-e7:0000-3fff
|
||||
memory type=ROM content=Program architecture=uPD96050
|
||||
memory type=ROM content=Data architecture=uPD96050
|
||||
memory type=RAM content=Data architecture=uPD96050
|
||||
map address=68-6f,e8-ef:0000-7fff mask=0x8000
|
||||
oscillator
|
||||
|
||||
board: SHVC-1J0N-(01,10,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
|
||||
board: SHVC-1J1M-(11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-1J3B-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-1J3M-(01,11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-1J5M-(01,11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-1K0N-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
processor architecture=uPD7725
|
||||
map address=00-1f,80-9f:6000-7fff mask=0xfff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: SHVC-1K1B-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
processor architecture=uPD7725
|
||||
map address=00-1f,80-9f:6000-7fff mask=0xfff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: SHVC-1K1X-10
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
processor architecture=uPD7725
|
||||
map address=00-1f,80-9f:6000-7fff mask=0xfff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: SHVC-1L0N3S-01
|
||||
processor architecture=W65C816S
|
||||
map address=00-3f,80-bf:2200-23ff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x408000
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=40-4f:0000-ffff
|
||||
memory type=RAM content=Internal
|
||||
map address=00-3f,80-bf:3000-37ff size=0x800
|
||||
|
||||
board: SHVC-1L3B-(02,11)
|
||||
processor architecture=W65C816S
|
||||
map address=00-3f,80-bf:2200-23ff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x408000
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=40-4f:0000-ffff
|
||||
memory type=RAM content=Internal
|
||||
map address=00-3f,80-bf:3000-37ff size=0x800
|
||||
|
||||
board: SHVC-1L5B-(11,20)
|
||||
processor architecture=W65C816S
|
||||
map address=00-3f,80-bf:2200-23ff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x408000
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=40-4f:0000-ffff
|
||||
memory type=RAM content=Internal
|
||||
map address=00-3f,80-bf:3000-37ff size=0x800
|
||||
|
||||
board: SHVC-1N0N-(01,10)
|
||||
processor identifier=SDD1
|
||||
map address=00-3f,80-bf:4800-480f
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
|
||||
board: SHVC-2A0N-01#A
|
||||
memory type=ROM content=Program
|
||||
map address=00-2f,80-af:8000-ffff mask=0x8000
|
||||
map address=40-6f,c0-ef:0000-ffff mask=0x8000
|
||||
|
||||
board: SHVC-2A0N-(01,10,11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
map address=40-7d,c0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-2A1M-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-2A3B-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-2A3M-01#A
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-2A3M-(01,11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-2A5M-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-2B3B-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
processor architecture=uPD7725
|
||||
map address=60-6f,e0-ef:0000-7fff mask=0x3fff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: SHVC-2DC0N-01
|
||||
processor architecture=HG51BS169
|
||||
map address=00-3f,80-bf:6c00-6fff,7c00-7fff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-77:0000-7fff
|
||||
memory type=ROM content=Data architecture=HG51BS169
|
||||
memory type=RAM content=Data architecture=HG51BS169
|
||||
map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
|
||||
oscillator
|
||||
|
||||
board: SHVC-2E3M-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
processor identifier=OBC1
|
||||
map address=00-3f,80-bf:6000-7fff mask=0xe000
|
||||
map address=70-71,f0-f1:6000-7fff,e000-ffff mask=0xe000
|
||||
memory type=RAM content=Save
|
||||
|
||||
board: SHVC-2J0N-(01,10,11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
|
||||
board: SHVC-2J3M-(01,11,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=10-1f,30-3f,90-9f,b0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-2J5M-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=10-1f,30-3f,90-9f,b0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-3J0N-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-2f,80-af:8000-ffff
|
||||
map address=40-6f,c0-ef:0000-ffff
|
||||
|
||||
board: SHVC-BA0N-(01,10)
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
map address=40-7d,c0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-BA1M-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-BA3M-(01,10)
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-BJ0N-(01,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
|
||||
board: SHVC-BJ1M-(10,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-BJ3M-(10,20)
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-LDH3C-01
|
||||
processor identifier=SPC7110
|
||||
map address=00-3f,80-bf:4800-483f
|
||||
map address=50,58:0000-ffff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x800000
|
||||
map address=c0-ff:0000-ffff mask=0xc00000
|
||||
memory type=ROM content=Program
|
||||
memory type=ROM content=Data
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff mask=0xe000
|
||||
rtc manufacturer=Epson
|
||||
map address=00-3f,80-bf:4840-4842
|
||||
memory type=RTC content=Time manufacturer=Epson
|
||||
|
||||
board: SHVC-LJ3M-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f:8000-ffff base=0x400000
|
||||
map address=40-7d:0000-ffff base=0x400000
|
||||
map address=80-bf:8000-ffff mask=0xc00000
|
||||
map address=c0-ff:0000-ffff mask=0xc00000
|
||||
memory type=RAM content=Save
|
||||
map address=80-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SHVC-LN3B-01
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff mask=0xe000
|
||||
map address=70-73:0000-ffff
|
||||
processor identifier=SDD1
|
||||
map address=00-3f,80-bf:4800-480f
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
|
||||
board: SHVC-SGB2-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
map address=40-7d,c0-ff:0000-7fff mask=0x8000
|
||||
processor identifier=ICD revision=2
|
||||
map address=00-3f,80-bf:6000-67ff,7000-7fff
|
||||
memory type=ROM content=Boot architecture=SM83
|
||||
oscillator
|
||||
slot type=GameBoy
|
||||
|
||||
board: SHVC-YA0N-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
map address=40-7d,c0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: SHVC-YJ0N-01
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
|
||||
//Boards (Generic)
|
||||
|
||||
database
|
||||
revision: 2020-11-09
|
||||
|
||||
board: ARM-LOROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
map address=40-6f,c0-ef:0000-7fff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-ffff
|
||||
processor architecture=ARM6
|
||||
map address=00-3f,80-bf:3800-38ff
|
||||
memory type=ROM content=Program architecture=ARM6
|
||||
memory type=ROM content=Data architecture=ARM6
|
||||
memory type=RAM content=Data architecture=ARM6
|
||||
oscillator
|
||||
|
||||
board: BS-HIROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff
|
||||
map address=40-5f,c0-df:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
slot type=BSMemory
|
||||
map address=20-3f,a0-bf:8000-ffff
|
||||
map address=60-7d,e0-ff:0000-ffff
|
||||
|
||||
board: BS-LOROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
|
||||
map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
|
||||
map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
|
||||
map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
slot type=BSMemory
|
||||
map address=c0-ef:0000-ffff
|
||||
|
||||
board: BS-MCC-RAM
|
||||
memory type=RAM content=Save
|
||||
map address=10-17:5000-5fff mask=0xf000
|
||||
processor identifier=MCC
|
||||
map address=00-0f:5000-5fff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
map address=20-3f,a0-bf:6000-7fff
|
||||
memory type=ROM content=Program
|
||||
memory type=RAM content=Download
|
||||
slot type=BSMemory
|
||||
|
||||
board: BS-SA1-RAM
|
||||
processor architecture=W65C816S
|
||||
map address=00-3f,80-bf:2200-23ff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x408000
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
slot type=BSMemory
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=40-4f:0000-ffff
|
||||
memory type=RAM content=Internal
|
||||
map address=00-3f,80-bf:3000-37ff size=0x800
|
||||
|
||||
board: EVENT-CC92
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
processor manufacturer=NEC architecture=uPD78214
|
||||
identifier: Campus Challenge '92
|
||||
map address=c0,e0:0000
|
||||
mcu
|
||||
map address=00-1f,80-9f:8000-ffff
|
||||
memory type=ROM content=Program
|
||||
memory type=ROM content=Level-1
|
||||
memory type=ROM content=Level-2
|
||||
memory type=ROM content=Level-3
|
||||
dip
|
||||
processor manufacturer=NEC architecture=uPD7725
|
||||
map address=20-3f,a0-bf:8000-ffff mask=0x7fff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: EVENT-PF94
|
||||
memory type=RAM content=Save
|
||||
map address=30-3f,b0-bf:6000-7fff mask=0xe000
|
||||
processor manufacturer=NEC architecture=uPD78214
|
||||
identifier: PowerFest '94
|
||||
map address=10,20:6000
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
memory type=ROM content=Level-1
|
||||
memory type=ROM content=Level-2
|
||||
memory type=ROM content=Level-3
|
||||
dip
|
||||
processor manufacturer=NEC architecture=uPD7725
|
||||
map address=00-0f,80-8f:6000-7fff mask=0xfff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: EXHIROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f:8000-ffff base=0x400000
|
||||
map address=40-7d:0000-ffff base=0x400000
|
||||
map address=80-bf:8000-ffff mask=0xc00000
|
||||
map address=c0-ff:0000-ffff mask=0xc00000
|
||||
|
||||
board: EXHIROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f:8000-ffff base=0x400000
|
||||
map address=40-7d:0000-ffff base=0x400000
|
||||
map address=80-bf:8000-ffff mask=0xc00000
|
||||
map address=c0-ff:0000-ffff mask=0xc00000
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: EXHIROM-RAM-SHARPRTC
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f:8000-ffff base=0x400000
|
||||
map address=40-7d:0000-ffff base=0x400000
|
||||
map address=80-bf:8000-ffff mask=0xc00000
|
||||
map address=c0-ff:0000-ffff mask=0xc00000
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
rtc manufacturer=Sharp
|
||||
map address=00-3f,80-bf:2800-2801
|
||||
memory type=RTC content=Time manufacturer=Sharp
|
||||
|
||||
board: EXLOROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d:8000-ffff mask=0x808000 base=0x400000
|
||||
map address=80-ff:8000-ffff mask=0x808000 base=0x000000
|
||||
|
||||
board: EXLOROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d:8000-ffff mask=0x808000 base=0x400000
|
||||
map address=80-ff:8000-ffff mask=0x808000 base=0x000000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: EXNEC-LOROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
processor architecture=uPD96050
|
||||
map address=60-67,e0-e7:0000-3fff
|
||||
memory type=ROM content=Program architecture=uPD96050
|
||||
memory type=ROM content=Data architecture=uPD96050
|
||||
memory type=RAM content=Data architecture=uPD96050
|
||||
map address=68-6f,e8-ef:0000-7fff mask=0x8000
|
||||
oscillator
|
||||
|
||||
board: EXSPC7110-RAM-EPSONRTC
|
||||
memory type=ROM content=Expansion
|
||||
map address=40-4f:0000-ffff
|
||||
processor identifier=SPC7110
|
||||
map address=00-3f,80-bf:4800-483f
|
||||
map address=50,58:0000-ffff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x800000
|
||||
map address=c0-ff:0000-ffff mask=0xc00000
|
||||
memory type=ROM content=Program
|
||||
memory type=ROM content=Data
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff mask=0xe000
|
||||
rtc manufacturer=Epson
|
||||
map address=00-3f,80-bf:4840-4842
|
||||
memory type=RTC content=Time manufacturer=Epson
|
||||
|
||||
board: GB-LOROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
map address=40-7d,c0-ff:0000-7fff mask=0x8000
|
||||
processor identifier=ICD revision=2
|
||||
map address=00-3f,80-bf:6000-67ff,7000-7fff
|
||||
memory type=ROM content=Boot architecture=SM83
|
||||
oscillator
|
||||
slot type=GameBoy
|
||||
|
||||
board: GSU-RAM
|
||||
processor architecture=GSU
|
||||
map address=00-3f,80-bf:3000-34ff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
map address=40-5f,c0-df:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=70-71,f0-f1:0000-ffff
|
||||
|
||||
board: HIROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
|
||||
board: HIROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: HITACHI-LOROM
|
||||
processor architecture=HG51BS169
|
||||
map address=00-3f,80-bf:6c00-6fff,7c00-7fff
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-77:0000-7fff
|
||||
memory type=ROM content=Data architecture=HG51BS169
|
||||
memory type=RAM content=Data architecture=HG51BS169
|
||||
map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
|
||||
oscillator
|
||||
|
||||
board: LOROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
|
||||
board: LOROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-7d,80-ff:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
|
||||
board: LOROM-RAM#A
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-ffff mask=0x8000
|
||||
|
||||
board: NEC-HIROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
processor architecture=uPD7725
|
||||
map address=00-1f,80-9f:6000-7fff mask=0xfff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: NEC-HIROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=40-7d,c0-ff:0000-ffff
|
||||
memory type=RAM content=Save
|
||||
map address=20-3f,a0-bf:6000-7fff mask=0xe000
|
||||
processor architecture=uPD7725
|
||||
map address=00-1f,80-9f:6000-7fff mask=0xfff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: NEC-LOROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
processor architecture=uPD7725
|
||||
map address=30-3f,b0-bf:8000-ffff mask=0x3fff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: NEC-LOROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-7fff mask=0x8000
|
||||
processor architecture=uPD7725
|
||||
map address=60-6f,e0-ef:0000-7fff mask=0x3fff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: NEC-LOROM-RAM#A
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
memory type=RAM content=Save
|
||||
map address=70-7d,f0-ff:0000-ffff
|
||||
processor architecture=uPD7725
|
||||
map address=20-3f,a0-bf:8000-ffff mask=0x3fff
|
||||
memory type=ROM content=Program architecture=uPD7725
|
||||
memory type=ROM content=Data architecture=uPD7725
|
||||
memory type=RAM content=Data architecture=uPD7725
|
||||
oscillator
|
||||
|
||||
board: OBC1-LOROM-RAM
|
||||
memory type=ROM content=Program
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x8000
|
||||
processor identifier=OBC1
|
||||
map address=00-3f,80-bf:6000-7fff mask=0xe000
|
||||
map address=70-71,f0-f1:6000-7fff,e000-ffff mask=0xe000
|
||||
memory type=RAM content=Save
|
||||
|
||||
board: SA1
|
||||
processor architecture=W65C816S
|
||||
map address=00-3f,80-bf:2200-23ff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x408000
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
memory type=RAM content=Internal
|
||||
map address=00-3f,80-bf:3000-37ff size=0x800
|
||||
|
||||
board: SA1-RAM
|
||||
processor architecture=W65C816S
|
||||
map address=00-3f,80-bf:2200-23ff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x408000
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff size=0x2000
|
||||
map address=40-4f:0000-ffff
|
||||
memory type=RAM content=Internal
|
||||
map address=00-3f,80-bf:3000-37ff size=0x800
|
||||
|
||||
board: SDD1
|
||||
processor identifier=SDD1
|
||||
map address=00-3f,80-bf:4800-480f
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
|
||||
board: SDD1-RAM
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff mask=0xe000
|
||||
map address=70-73:0000-ffff mask=0x8000
|
||||
processor identifier=SDD1
|
||||
map address=00-3f,80-bf:4800-480f
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff
|
||||
map address=c0-ff:0000-ffff
|
||||
memory type=ROM content=Program
|
||||
|
||||
board: SPC7110-RAM
|
||||
processor identifier=SPC7110
|
||||
map address=00-3f,80-bf:4800-483f
|
||||
map address=50,58:0000-ffff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x800000
|
||||
map address=c0-ff:0000-ffff mask=0xc00000
|
||||
memory type=ROM content=Program
|
||||
memory type=ROM content=Data
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff mask=0xe000
|
||||
|
||||
board: SPC7110-RAM-EPSONRTC
|
||||
processor identifier=SPC7110
|
||||
map address=00-3f,80-bf:4800-483f
|
||||
map address=50,58:0000-ffff
|
||||
mcu
|
||||
map address=00-3f,80-bf:8000-ffff mask=0x800000
|
||||
map address=c0-ff:0000-ffff mask=0xc00000
|
||||
memory type=ROM content=Program
|
||||
memory type=ROM content=Data
|
||||
memory type=RAM content=Save
|
||||
map address=00-3f,80-bf:6000-7fff mask=0xe000
|
||||
rtc manufacturer=Epson
|
||||
map address=00-3f,80-bf:4840-4842
|
||||
memory type=RTC content=Time manufacturer=Epson
|
||||
|
||||
board: ST-LOROM
|
||||
memory type=ROM content=Program
|
||||
map address=00-1f,80-9f:8000-ffff mask=0x8000
|
||||
slot type=SufamiTurbo
|
||||
rom
|
||||
map address=20-3f,a0-bf:8000-ffff mask=0x8000
|
||||
ram
|
||||
map address=60-6f,e0-ef:0000-ffff
|
||||
slot type=SufamiTurbo
|
||||
rom
|
||||
map address=40-5f,c0-df:0000-ffff mask=0x8000
|
||||
ram
|
||||
map address=70-7d,f0-ff:0000-ffff
|
||||
|
||||
Binary file not shown.
Whitespace-only changes.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@@ -1,15 +0,0 @@
|
||||
ares.components += mos6502
|
||||
|
||||
ares.objects += ares-a26-system
|
||||
ares.objects += ares-a26-controller
|
||||
ares.objects += ares-a26-cartridge
|
||||
ares.objects += ares-a26-cpu
|
||||
ares.objects += ares-a26-tia
|
||||
ares.objects += ares-a26-riot
|
||||
|
||||
$(object.path)/ares-a26-system.o: $(ares.path)/a26/system/system.cpp
|
||||
$(object.path)/ares-a26-controller.o: $(ares.path)/a26/controller/controller.cpp
|
||||
$(object.path)/ares-a26-cartridge.o: $(ares.path)/a26/cartridge/cartridge.cpp
|
||||
$(object.path)/ares-a26-cpu.o: $(ares.path)/a26/cpu/cpu.cpp
|
||||
$(object.path)/ares-a26-tia.o: $(ares.path)/a26/tia/tia.cpp
|
||||
$(object.path)/ares-a26-riot.o: $(ares.path)/a26/riot/riot.cpp
|
||||
@@ -1,25 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#include <ares/ares.hpp>
|
||||
|
||||
#include <component/processor/mos6502/mos6502.hpp>
|
||||
|
||||
namespace ares::Atari2600 {
|
||||
#include <ares/inline.hpp>
|
||||
auto enumerate() -> vector<string>;
|
||||
auto load(Node::System& node, string name) -> bool;
|
||||
|
||||
struct Region {
|
||||
static inline auto NTSC() -> bool;
|
||||
static inline auto PAL() -> bool;
|
||||
static inline auto SECAM() -> bool;
|
||||
};
|
||||
|
||||
#include <a26/controller/controller.hpp>
|
||||
#include <a26/system/system.hpp>
|
||||
#include <a26/cartridge/cartridge.hpp>
|
||||
#include <a26/cpu/cpu.hpp>
|
||||
#include <a26/tia/tia.hpp>
|
||||
#include <a26/riot/riot.hpp>
|
||||
}
|
||||
|
||||
@@ -1,58 +0,0 @@
|
||||
struct Atari16k : Interface {
|
||||
using Interface::Interface;
|
||||
Memory::Readable<n8> rom;
|
||||
Memory::Writable<n8> ram;
|
||||
n2 bank;
|
||||
bool hasRam;
|
||||
|
||||
auto load() -> void override {
|
||||
Interface::load(rom, "program.rom");
|
||||
}
|
||||
|
||||
auto save() -> void override {
|
||||
}
|
||||
|
||||
auto unload() -> void override {
|
||||
}
|
||||
|
||||
auto read(n16 address) -> n8 override {
|
||||
if(address == 0x1ff6) bank = 0;
|
||||
if(address == 0x1ff7) bank = 1;
|
||||
if(address == 0x1ff8) bank = 2;
|
||||
if(address == 0x1ff9) bank = 3;
|
||||
|
||||
if(address.bit(12)) {
|
||||
if(hasRam && address >= 0x1080 && address <= 0x10ff) return ram.read(address & 0x7f);
|
||||
return rom.read((bank * 0x1000) + (address & 0xfff));
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto write(n16 address, n8 data) -> bool override {
|
||||
if(address == 0x1ff6) bank = 0;
|
||||
if(address == 0x1ff7) bank = 1;
|
||||
if(address == 0x1ff8) bank = 2;
|
||||
if(address == 0x1ff9) bank = 3;
|
||||
|
||||
if(address >= 0x1000 && address <= 0x107f) {
|
||||
hasRam = true;
|
||||
ram.write(address & 0x7f, data);
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
auto power() -> void override {
|
||||
bank = 0;
|
||||
hasRam = 0;
|
||||
ram.allocate(128);
|
||||
}
|
||||
|
||||
auto serialize(serializer& s) -> void override {
|
||||
s(bank);
|
||||
s(hasRam);
|
||||
s(ram);
|
||||
}
|
||||
};
|
||||
@@ -1,66 +0,0 @@
|
||||
struct Atari32k : Interface {
|
||||
using Interface::Interface;
|
||||
Memory::Readable<n8> rom;
|
||||
Memory::Writable<n8> ram;
|
||||
n3 bank;
|
||||
bool hasRam;
|
||||
|
||||
auto load() -> void override {
|
||||
Interface::load(rom, "program.rom");
|
||||
}
|
||||
|
||||
auto save() -> void override {
|
||||
}
|
||||
|
||||
auto unload() -> void override {
|
||||
}
|
||||
|
||||
auto read(n16 address) -> n8 override {
|
||||
if(address == 0x1ff4) bank = 0;
|
||||
if(address == 0x1ff5) bank = 1;
|
||||
if(address == 0x1ff6) bank = 2;
|
||||
if(address == 0x1ff7) bank = 3;
|
||||
if(address == 0x1ff8) bank = 4;
|
||||
if(address == 0x1ff9) bank = 5;
|
||||
if(address == 0x1ffa) bank = 6;
|
||||
if(address == 0x1ffb) bank = 7;
|
||||
|
||||
if(address.bit(12)) {
|
||||
if(hasRam && address >= 0x1080 && address <= 0x10ff) return ram.read(address & 0x7f);
|
||||
return rom.read((bank * 0x1000) + (address & 0xfff));
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto write(n16 address, n8 data) -> bool override {
|
||||
if(address == 0x1ff4) bank = 0;
|
||||
if(address == 0x1ff5) bank = 1;
|
||||
if(address == 0x1ff6) bank = 2;
|
||||
if(address == 0x1ff7) bank = 3;
|
||||
if(address == 0x1ff8) bank = 4;
|
||||
if(address == 0x1ff9) bank = 5;
|
||||
if(address == 0x1ffa) bank = 6;
|
||||
if(address == 0x1ffb) bank = 7;
|
||||
|
||||
if(address >= 0x1000 && address <= 0x107f) {
|
||||
hasRam = true;
|
||||
ram.write(address & 0x7f, data);
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
auto power() -> void override {
|
||||
bank = 0;
|
||||
hasRam = 0;
|
||||
ram.allocate(128);
|
||||
}
|
||||
|
||||
auto serialize(serializer& s) -> void override {
|
||||
s(bank);
|
||||
s(hasRam);
|
||||
s(ram);
|
||||
}
|
||||
};
|
||||
@@ -1,54 +0,0 @@
|
||||
struct Atari8k : Interface {
|
||||
using Interface::Interface;
|
||||
Memory::Readable<n8> rom;
|
||||
Memory::Writable<n8> ram;
|
||||
n1 bank;
|
||||
bool hasRam;
|
||||
|
||||
auto load() -> void override {
|
||||
Interface::load(rom, "program.rom");
|
||||
}
|
||||
|
||||
auto save() -> void override {
|
||||
}
|
||||
|
||||
auto unload() -> void override {
|
||||
}
|
||||
|
||||
auto read(n16 address) -> n8 override {
|
||||
if(address == 0x1ff8) bank = 0;
|
||||
if(address == 0x1ff9) bank = 1;
|
||||
|
||||
if(address.bit(12)) {
|
||||
if(hasRam && address >= 0x1080 && address <= 0x10ff) return ram.read(address & 0x7f);
|
||||
return rom.read((bank * 0x1000) + (address & 0xfff));
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto write(n16 address, n8 data) -> bool override {
|
||||
if(address == 0x1ff8) bank = 0;
|
||||
if(address == 0x1ff9) bank = 1;
|
||||
|
||||
if(address >= 0x1000 && address <= 0x107f) {
|
||||
hasRam = true;
|
||||
ram.write(address & 0x7f, data);
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
auto power() -> void override {
|
||||
bank = 0;
|
||||
hasRam = 0;
|
||||
ram.allocate(128);
|
||||
}
|
||||
|
||||
auto serialize(serializer& s) -> void override {
|
||||
s(bank);
|
||||
s(hasRam);
|
||||
s(ram);
|
||||
}
|
||||
};
|
||||
@@ -1,37 +0,0 @@
|
||||
namespace Board {
|
||||
|
||||
#include "linear.cpp"
|
||||
#include "atari8k.cpp"
|
||||
#include "atari16k.cpp"
|
||||
#include "atari32k.cpp"
|
||||
#include "commavid.cpp"
|
||||
#include "parker-bros.cpp"
|
||||
#include "tigervision.cpp"
|
||||
|
||||
auto Interface::load(Memory::Readable<n8>& memory, string name) -> bool {
|
||||
if(auto fp = pak->read(name)) {
|
||||
memory.allocate(fp->size());
|
||||
memory.load(fp);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
auto Interface::load(Memory::Writable<n8>& memory, string name) -> bool {
|
||||
if(auto fp = pak->read(name)) {
|
||||
memory.allocate(fp->size());
|
||||
memory.load(fp);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
auto Interface::save(Memory::Writable<n8>& memory, string name) -> bool {
|
||||
if(auto fp = pak->write(name)) {
|
||||
memory.save(fp);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
}
|
||||
@@ -1,23 +0,0 @@
|
||||
namespace Board {
|
||||
|
||||
struct Interface {
|
||||
VFS::Pak pak;
|
||||
|
||||
Interface(Cartridge& cartridge) : cartridge(cartridge) {}
|
||||
virtual ~Interface() = default;
|
||||
virtual auto load() -> void {}
|
||||
virtual auto save() -> void {}
|
||||
virtual auto unload() -> void {}
|
||||
virtual auto read(n16 address) -> n8 { return 0xff; }
|
||||
virtual auto write(n16 address, n8 data) -> bool { return false; }
|
||||
virtual auto power() -> void {}
|
||||
virtual auto serialize(serializer&) -> void {}
|
||||
|
||||
auto load(Memory::Readable<n8>&, string name) -> bool;
|
||||
auto load(Memory::Writable<n8>&, string name) -> bool;
|
||||
auto save(Memory::Writable<n8>&, string name) -> bool;
|
||||
|
||||
Cartridge& cartridge;
|
||||
};
|
||||
|
||||
}
|
||||
@@ -1,41 +0,0 @@
|
||||
struct Commavid : Interface {
|
||||
using Interface::Interface;
|
||||
Memory::Readable<n8> rom;
|
||||
Memory::Writable<n8> ram;
|
||||
|
||||
auto load() -> void override {
|
||||
Interface::load(rom, "program.rom");
|
||||
}
|
||||
|
||||
auto save() -> void override {
|
||||
}
|
||||
|
||||
auto unload() -> void override {
|
||||
}
|
||||
|
||||
auto read(n16 address) -> n8 override {
|
||||
if(address.bit(12)) {
|
||||
if(address >= 0x1000 && address <= 0x13ff) return ram.read(address & 0x3ff);
|
||||
return rom.read(address & 0xfff);
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto write(n16 address, n8 data) -> bool override {
|
||||
if(address >= 0x1400 && address <= 0x17ff) {
|
||||
ram.write(address & 0x3ff, data);
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
auto power() -> void override {
|
||||
ram.allocate(1_KiB);
|
||||
}
|
||||
|
||||
auto serialize(serializer& s) -> void override {
|
||||
s(ram);
|
||||
}
|
||||
};
|
||||
@@ -1,45 +0,0 @@
|
||||
struct Linear : Interface {
|
||||
using Interface::Interface;
|
||||
Memory::Readable<n8> rom;
|
||||
Memory::Writable<n8> ram;
|
||||
bool hasRam;
|
||||
|
||||
auto load() -> void override {
|
||||
Interface::load(rom, "program.rom");
|
||||
}
|
||||
|
||||
auto save() -> void override {
|
||||
}
|
||||
|
||||
auto unload() -> void override {
|
||||
}
|
||||
|
||||
auto read(n16 address) -> n8 override {
|
||||
if(address.bit(12)) {
|
||||
if(hasRam && address >= 0x1080 && address <= 0x10ff) return ram.read(address & 0x7f);
|
||||
return rom.read(address & 0xfff);
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto write(n16 address, n8 data) -> bool override {
|
||||
if(address >= 0x1000 && address <= 0x107f) {
|
||||
hasRam = true;
|
||||
ram.write(address & 0x7f, data);
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
auto power() -> void override {
|
||||
hasRam = 0;
|
||||
ram.allocate(128);
|
||||
}
|
||||
|
||||
auto serialize(serializer& s) -> void override {
|
||||
s(hasRam);
|
||||
s(ram);
|
||||
}
|
||||
};
|
||||
@@ -1,51 +0,0 @@
|
||||
struct ParkerBros : Interface {
|
||||
using Interface::Interface;
|
||||
Memory::Readable<n8> rom;
|
||||
n3 banks[3];
|
||||
|
||||
auto load() -> void override {
|
||||
Interface::load(rom, "program.rom");
|
||||
}
|
||||
|
||||
auto save() -> void override {
|
||||
}
|
||||
|
||||
auto unload() -> void override {
|
||||
}
|
||||
|
||||
auto read(n16 address) -> n8 override {
|
||||
bankswitch(address);
|
||||
|
||||
if(address.bit(12)) {
|
||||
if(address >= 0x1000 && address <= 0x13ff) return rom.read((banks[0] * 0x400) + (address & 0x3ff));
|
||||
if(address >= 0x1400 && address <= 0x17ff) return rom.read((banks[1] * 0x400) + (address & 0x3ff));
|
||||
if(address >= 0x1800 && address <= 0x1bff) return rom.read((banks[2] * 0x400) + (address & 0x3ff));
|
||||
if(address >= 0x1c00 && address <= 0x1fff) return rom.read(( 7 * 0x400) + (address & 0x3ff));
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto write(n16 address, n8 data) -> bool override {
|
||||
bankswitch(address);
|
||||
return false;
|
||||
}
|
||||
|
||||
auto bankswitch(n16 address) -> void {
|
||||
if(address >= 0x1fe0 && address <= 0x1fe7) banks[0] = address - 0x1fe0;
|
||||
if(address >= 0x1fe8 && address <= 0x1fef) banks[1] = address - 0x1fe8;
|
||||
if(address >= 0x1ff0 && address <= 0x1ff7) banks[2] = address - 0x1ff0;
|
||||
}
|
||||
|
||||
auto power() -> void override {
|
||||
banks[0] = 0;
|
||||
banks[1] = 1;
|
||||
banks[2] = 2;
|
||||
}
|
||||
|
||||
auto serialize(serializer& s) -> void override {
|
||||
s(banks[0]);
|
||||
s(banks[1]);
|
||||
s(banks[2]);
|
||||
}
|
||||
};
|
||||
@@ -1,42 +0,0 @@
|
||||
struct Tigervision : Interface {
|
||||
using Interface::Interface;
|
||||
Memory::Readable<n8> rom;
|
||||
n8 bank;
|
||||
n8 nextBank;
|
||||
|
||||
auto load() -> void override {
|
||||
Interface::load(rom, "program.rom");
|
||||
}
|
||||
|
||||
auto save() -> void override {
|
||||
}
|
||||
|
||||
auto unload() -> void override {
|
||||
}
|
||||
|
||||
auto read(n16 address) -> n8 override {
|
||||
if(address.bit(12)) {
|
||||
if(bank != nextBank) bank = nextBank;
|
||||
if(address <= 0x17ff) return rom.read((bank * 0x800) + (address & 0x7ff));
|
||||
return rom.read((rom.size() - 0x800) + (address & 0x7ff));
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto write(n16 address, n8 data) -> bool override {
|
||||
if(address.bit(12) && bank != nextBank) bank = nextBank;
|
||||
if(address <= 0x3f) nextBank = data;
|
||||
return false;
|
||||
}
|
||||
|
||||
auto power() -> void override {
|
||||
bank = 0;
|
||||
nextBank = 0;
|
||||
}
|
||||
|
||||
auto serialize(serializer& s) -> void override {
|
||||
s(bank);
|
||||
s(nextBank);
|
||||
}
|
||||
};
|
||||
@@ -1,66 +0,0 @@
|
||||
#include <a26/a26.hpp>
|
||||
|
||||
namespace ares::Atari2600 {
|
||||
|
||||
Cartridge& cartridge = cartridgeSlot.cartridge;
|
||||
#include "board/board.cpp"
|
||||
#include "slot.cpp"
|
||||
#include "serialization.cpp"
|
||||
|
||||
auto Cartridge::allocate(Node::Port parent) -> Node::Peripheral {
|
||||
return node = parent->append<Node::Peripheral>(string{system.name(), " Cartridge"});
|
||||
}
|
||||
|
||||
auto Cartridge::connect() -> void {
|
||||
if(!node->setPak(pak = platform->pak(node))) return;
|
||||
|
||||
information = {};
|
||||
information.title = pak->attribute("title");
|
||||
information.region = pak->attribute("region");
|
||||
information.board = pak->attribute("board");
|
||||
|
||||
if(information.board == "Linear") board = new Board::Linear{*this};
|
||||
if(information.board == "Atari8k") board = new Board::Atari8k{*this};
|
||||
if(information.board == "Atari16k") board = new Board::Atari16k{*this};
|
||||
if(information.board == "Atari32k") board = new Board::Atari32k{*this};
|
||||
if(information.board == "Commavid") board = new Board::Commavid{*this};
|
||||
if(information.board == "ParkerBros8k") board = new Board::ParkerBros{*this};
|
||||
if(information.board == "Tigervision") board = new Board::Tigervision{*this};
|
||||
|
||||
if(!board) board = new Board::Interface{*this};
|
||||
board->pak = pak;
|
||||
board->load();
|
||||
power();
|
||||
}
|
||||
|
||||
auto Cartridge::disconnect() -> void {
|
||||
if(!node || !board) return;
|
||||
board->unload();
|
||||
board->pak.reset();
|
||||
board.reset();
|
||||
node.reset();
|
||||
}
|
||||
|
||||
auto Cartridge::save() -> void {
|
||||
if(!node) return;
|
||||
if(board) board->save();
|
||||
}
|
||||
|
||||
auto Cartridge::power() -> void {
|
||||
if(board) board->power();
|
||||
}
|
||||
|
||||
auto Cartridge::read(n16 address) -> n8 {
|
||||
if(!node) return 0xff;
|
||||
if(board) return board->read(address);
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto Cartridge::write(n16 address, n8 data) -> bool {
|
||||
if(!node) return false;
|
||||
if(board) return board->write(address, data);
|
||||
return false;
|
||||
}
|
||||
|
||||
}
|
||||
@@ -1,36 +0,0 @@
|
||||
struct Cartridge;
|
||||
#include "board/board.hpp"
|
||||
|
||||
struct Cartridge {
|
||||
Node::Peripheral node;
|
||||
VFS::Pak pak;
|
||||
|
||||
auto title() const -> string { return information.title; }
|
||||
auto region() const -> string { return information.region; }
|
||||
|
||||
//cartridge.cpp
|
||||
auto allocate(Node::Port) -> Node::Peripheral;
|
||||
auto connect() -> void;
|
||||
auto disconnect() -> void;
|
||||
|
||||
auto save() -> void;
|
||||
auto power() -> void;
|
||||
|
||||
auto read(n16 address) -> n8;
|
||||
auto write(n16 address, n8 data) -> bool;
|
||||
|
||||
//serialization.cpp
|
||||
auto serialize(serializer&) -> void;
|
||||
|
||||
unique_pointer<Board::Interface> board;
|
||||
|
||||
//private:
|
||||
struct Information {
|
||||
string title;
|
||||
string region;
|
||||
string board;
|
||||
} information;
|
||||
};
|
||||
|
||||
#include "slot.hpp"
|
||||
extern Cartridge& cartridge;
|
||||
@@ -1,3 +0,0 @@
|
||||
auto Cartridge::serialize(serializer& s) -> void {
|
||||
if(board) s(*board);
|
||||
}
|
||||
@@ -1,18 +0,0 @@
|
||||
CartridgeSlot cartridgeSlot{"Cartridge Slot"};
|
||||
|
||||
CartridgeSlot::CartridgeSlot(string name) : name(name) {
|
||||
}
|
||||
|
||||
auto CartridgeSlot::load(Node::Object parent) -> void {
|
||||
port = parent->append<Node::Port>(name);
|
||||
port->setFamily(system.name());
|
||||
port->setType("Cartridge");
|
||||
port->setAllocate([&](auto name) { return cartridge.allocate(port); });
|
||||
port->setConnect([&] { return cartridge.connect(); });
|
||||
port->setDisconnect([&] { return cartridge.disconnect(); });
|
||||
}
|
||||
|
||||
auto CartridgeSlot::unload() -> void {
|
||||
cartridge.disconnect();
|
||||
port = {};
|
||||
}
|
||||
@@ -1,13 +0,0 @@
|
||||
struct CartridgeSlot {
|
||||
Node::Port port;
|
||||
Cartridge cartridge;
|
||||
|
||||
//slot.cpp
|
||||
CartridgeSlot(string name);
|
||||
auto load(Node::Object) -> void;
|
||||
auto unload() -> void;
|
||||
|
||||
const string name;
|
||||
};
|
||||
|
||||
extern CartridgeSlot cartridgeSlot;
|
||||
@@ -1,8 +0,0 @@
|
||||
#include <a26/a26.hpp>
|
||||
|
||||
namespace ares::Atari2600 {
|
||||
|
||||
#include "port.cpp"
|
||||
#include "gamepad/gamepad.cpp"
|
||||
|
||||
}
|
||||
@@ -1,11 +0,0 @@
|
||||
struct Controller {
|
||||
Node::Peripheral node;
|
||||
|
||||
virtual ~Controller() = default;
|
||||
|
||||
virtual auto read() -> n8 { return 0xff; }
|
||||
virtual auto write(n8 data) -> void {}
|
||||
};
|
||||
|
||||
#include "port.hpp"
|
||||
#include "gamepad/gamepad.hpp"
|
||||
@@ -1,37 +0,0 @@
|
||||
Gamepad::Gamepad(Node::Port parent) {
|
||||
node = parent->append<Node::Peripheral>("Gamepad");
|
||||
|
||||
up = node->append<Node::Input::Button>("Up");
|
||||
down = node->append<Node::Input::Button>("Down");
|
||||
left = node->append<Node::Input::Button>("Left");
|
||||
right = node->append<Node::Input::Button>("Right");
|
||||
fire = node->append<Node::Input::Button>("Fire");
|
||||
}
|
||||
|
||||
auto Gamepad::read() -> n8 {
|
||||
platform->input(up);
|
||||
platform->input(down);
|
||||
platform->input(left);
|
||||
platform->input(right);
|
||||
platform->input(fire);
|
||||
|
||||
if(!(up->value() & down->value())) {
|
||||
yHold = 0, upLatch = up->value(), downLatch = down->value();
|
||||
} else if(!yHold) {
|
||||
yHold = 1, swap(upLatch, downLatch);
|
||||
}
|
||||
|
||||
if(!(left->value() & right->value())) {
|
||||
xHold = 0, leftLatch = left->value(), rightLatch = right->value();
|
||||
} else if(!xHold) {
|
||||
xHold = 1, swap(leftLatch, rightLatch);
|
||||
}
|
||||
|
||||
n8 data = 0xff;
|
||||
data.bit(0) = !upLatch;
|
||||
data.bit(1) = !downLatch;
|
||||
data.bit(2) = !leftLatch;
|
||||
data.bit(3) = !rightLatch;
|
||||
data.bit(4) = !fire->value();
|
||||
return data;
|
||||
}
|
||||
@@ -1,19 +0,0 @@
|
||||
struct Gamepad : Controller {
|
||||
Node::Input::Button up;
|
||||
Node::Input::Button down;
|
||||
Node::Input::Button left;
|
||||
Node::Input::Button right;
|
||||
Node::Input::Button fire;
|
||||
|
||||
Gamepad(Node::Port);
|
||||
|
||||
auto read() -> n8 override;
|
||||
|
||||
private:
|
||||
b1 yHold;
|
||||
b1 upLatch;
|
||||
b1 downLatch;
|
||||
b1 xHold;
|
||||
b1 leftLatch;
|
||||
b1 rightLatch;
|
||||
};
|
||||
@@ -1,29 +0,0 @@
|
||||
ControllerPort controllerPort1{"Controller Port 1"};
|
||||
ControllerPort controllerPort2{"Controller Port 2"};
|
||||
|
||||
ControllerPort::ControllerPort(string name) : name(name) {
|
||||
}
|
||||
|
||||
auto ControllerPort::load(Node::Object parent) -> void {
|
||||
port = parent->append<Node::Port>(name);
|
||||
port->setFamily(system.name());
|
||||
port->setType("Controller");
|
||||
port->setHotSwappable(true);
|
||||
port->setAllocate([&](auto name) { return allocate(name); });
|
||||
port->setDisconnect([&] { device.reset(); });
|
||||
port->setSupported({"Gamepad"});
|
||||
}
|
||||
|
||||
auto ControllerPort::unload() -> void {
|
||||
device = {};
|
||||
port = {};
|
||||
}
|
||||
|
||||
auto ControllerPort::allocate(string name) -> Node::Peripheral {
|
||||
if(name == "Gamepad") device = new Gamepad(port);
|
||||
if(device) return device->node;
|
||||
return {};
|
||||
}
|
||||
|
||||
auto ControllerPort::serialize(serializer& s) -> void {
|
||||
}
|
||||
@@ -1,20 +0,0 @@
|
||||
struct ControllerPort {
|
||||
Node::Port port;
|
||||
unique_pointer<Controller> device;
|
||||
|
||||
//port.cpp
|
||||
ControllerPort(string name);
|
||||
auto load(Node::Object) -> void;
|
||||
auto unload() -> void;
|
||||
auto allocate(string name) -> Node::Peripheral;
|
||||
|
||||
auto read() -> n8 { if(device) return device->read(); return 0xff; }
|
||||
auto write(n8 data) -> void { if(device) return device->write(data); }
|
||||
|
||||
auto serialize(serializer&) -> void;
|
||||
|
||||
const string name;
|
||||
};
|
||||
|
||||
extern ControllerPort controllerPort1;
|
||||
extern ControllerPort controllerPort2;
|
||||
@@ -1,40 +0,0 @@
|
||||
#include <a26/a26.hpp>
|
||||
|
||||
namespace ares::Atari2600 {
|
||||
|
||||
CPU cpu;
|
||||
#include "memory.cpp"
|
||||
#include "timing.cpp"
|
||||
#include "debugger.cpp"
|
||||
#include "serialization.cpp"
|
||||
|
||||
auto CPU::load(Node::Object parent) -> void {
|
||||
node = parent->append<Node::Object>("CPU");
|
||||
debugger.load(node);
|
||||
}
|
||||
|
||||
auto CPU::unload() -> void {
|
||||
debugger = {};
|
||||
node = {};
|
||||
}
|
||||
|
||||
auto CPU::main() -> void {
|
||||
debugger.instruction();
|
||||
instruction();
|
||||
}
|
||||
|
||||
auto CPU::step(u32 clocks) -> void {
|
||||
if(io.rdyLine == 1) io.scanlineCycles += clocks;
|
||||
Thread::step(clocks);
|
||||
Thread::synchronize();
|
||||
}
|
||||
|
||||
auto CPU::power(bool reset) -> void {
|
||||
MOS6502::BCD = 1;
|
||||
MOS6502::power();
|
||||
Thread::create(system.frequency() / 3, {&CPU::main, this});
|
||||
|
||||
io = {};
|
||||
}
|
||||
|
||||
}
|
||||
@@ -1,48 +0,0 @@
|
||||
struct CPU : MOS6502, Thread {
|
||||
Node::Object node;
|
||||
|
||||
struct Debugger {
|
||||
//debugger.cpp
|
||||
auto load(Node::Object) -> void;
|
||||
auto instruction() -> void;
|
||||
|
||||
struct Tracer {
|
||||
Node::Debugger::Tracer::Instruction instruction;
|
||||
} tracer;
|
||||
} debugger;
|
||||
|
||||
//cpu.cpp
|
||||
auto load(Node::Object) -> void;
|
||||
auto unload() -> void;
|
||||
|
||||
auto main() -> void;
|
||||
auto step(u32 clocks) -> void;
|
||||
|
||||
auto power(bool reset) -> void;
|
||||
|
||||
//memory.cpp
|
||||
auto readBus(n16 address) -> n8;
|
||||
auto writeBus(n16 address, n8 data) -> void;
|
||||
|
||||
auto readIO(n16 address) -> n8;
|
||||
auto writeIO(n16 address, n8 data) -> void;
|
||||
|
||||
auto readDebugger(n16 address) -> n8 override;
|
||||
|
||||
auto serialize(serializer&) -> void;
|
||||
|
||||
//timing.cpp
|
||||
auto read(n16 address) -> n8 override;
|
||||
auto write(n16 address, n8 data) -> void override;
|
||||
|
||||
auto rdyLine(bool) -> void;
|
||||
|
||||
//protected:
|
||||
struct IO {
|
||||
n1 rdyLine = 1;
|
||||
n32 scanlineCycles = 0;
|
||||
n8 openBus = 0;
|
||||
} io;
|
||||
};
|
||||
|
||||
extern CPU cpu;
|
||||
@@ -1,12 +0,0 @@
|
||||
auto CPU::Debugger::load(Node::Object parent) -> void {
|
||||
tracer.instruction = parent->append<Node::Debugger::Tracer::Instruction>("Instruction", "CPU");
|
||||
tracer.instruction->setAddressBits(16);
|
||||
}
|
||||
|
||||
auto CPU::Debugger::instruction() -> void {
|
||||
if(tracer.instruction->enabled() && tracer.instruction->address(cpu.PC)) {
|
||||
tracer.instruction->notify(cpu.disassembleInstruction(), {cpu.disassembleContext(), " [c:", cpu.io.scanlineCycles, " l:", tia.io.vcounter, " p:", tia.io.hcounter, "]"});
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -1,42 +0,0 @@
|
||||
inline auto CPU::readBus(n16 address) -> n8 {
|
||||
address &= 0x1fff;
|
||||
if(auto result = platform->cheat(address)) return *result;
|
||||
|
||||
n8 data = cartridge.read(address);
|
||||
|
||||
if(address.bit(12) == 0 && address.bit(7) == 0) {
|
||||
return tia.read(address & 0xf);
|
||||
}
|
||||
|
||||
if(address.bit(12) == 0 && address.bit(9) == 0 && address.bit(7) == 1) {
|
||||
return riot.readRam(address & 0x7f);
|
||||
}
|
||||
|
||||
if(address.bit(12) == 0 && address.bit(9) == 1 && address.bit(7) == 1) {
|
||||
return riot.readIo((address - 0x80) & 0x1f);
|
||||
}
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
inline auto CPU::writeBus(n16 address, n8 data) -> void {
|
||||
address &= 0x1fff;
|
||||
cartridge.write(address, data);
|
||||
|
||||
if(address.bit(12) == 0 && address.bit(7) == 0) {
|
||||
return tia.write(address & 0x3f, data);
|
||||
}
|
||||
|
||||
if(address.bit(12) == 0 && address.bit(9) == 0 && address.bit(7) == 1) {
|
||||
return riot.writeRam(address & 0x7f, data);
|
||||
}
|
||||
|
||||
if(address.bit(12) == 0 && address.bit(9) == 1 && address.bit(7) == 1) {
|
||||
return riot.writeIo((address - 0x80) & 0x1f, data);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
auto CPU::readDebugger(n16 address) -> n8 {
|
||||
return readBus(address);
|
||||
}
|
||||
@@ -1,6 +0,0 @@
|
||||
auto CPU::serialize(serializer& s) -> void {
|
||||
MOS6502::serialize(s);
|
||||
Thread::serialize(s);
|
||||
s(io.rdyLine);
|
||||
s(io.openBus);
|
||||
}
|
||||
@@ -1,24 +0,0 @@
|
||||
auto CPU::read(n16 address) -> n8 {
|
||||
step(1);
|
||||
|
||||
if(io.rdyLine == 0) {
|
||||
while(io.rdyLine == 0) {
|
||||
step(1);
|
||||
}
|
||||
|
||||
io.openBus = readBus(address);
|
||||
return io.openBus;
|
||||
}
|
||||
|
||||
io.openBus = readBus(address);
|
||||
return io.openBus;
|
||||
}
|
||||
|
||||
auto CPU::write(n16 address, n8 data) -> void {
|
||||
step(1);
|
||||
writeBus(address, io.openBus = data);
|
||||
}
|
||||
|
||||
auto CPU::rdyLine(bool line) -> void {
|
||||
io.rdyLine = line;
|
||||
}
|
||||
@@ -1,96 +0,0 @@
|
||||
auto RIOT::readRam(n8 address) -> n8 {
|
||||
return ram[address];
|
||||
}
|
||||
|
||||
auto RIOT::writeRam(n8 address, n8 data) -> void {
|
||||
ram[address] = data;
|
||||
}
|
||||
|
||||
auto RIOT::readIo(n8 address) -> n8 {
|
||||
switch(address.bit(0, 2)) {
|
||||
case 0x00: return readPortA();
|
||||
case 0x01: return port[0].direction;
|
||||
case 0x02: return readPortB();
|
||||
case 0x03: return port[1].direction;
|
||||
case 0x04: timer.interruptFlag = address.bit(3); return timer.counter;
|
||||
case 0x05: case 0x07: {
|
||||
n8 output = 0;
|
||||
output.bit(6) = 0; //TODO: PA7 IRQ Flag
|
||||
output.bit(7) = timer.interruptFlag;
|
||||
return output;
|
||||
}
|
||||
}
|
||||
|
||||
debug(unimplemented, "[RIOT] IO read ", hex(address));
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto RIOT::writeIo(n8 address, n8 data) -> void {
|
||||
switch(address) {
|
||||
case 0x00: writePortA(data); return;
|
||||
case 0x01: port[0].direction = data; return;
|
||||
case 0x02: writePortB(data); return;
|
||||
case 0x03: port[1].direction = data; return;
|
||||
case 0x14: case 0x15: case 0x16: case 0x17:
|
||||
case 0x1c: case 0x1d: case 0x1e: case 0x1f: {
|
||||
const n16 intervals[] = {1, 8, 64, 1024};
|
||||
timer.counter = data;
|
||||
timer.interval = intervals[address.bit(0, 1)];
|
||||
timer.reload = timer.interval;
|
||||
timer.interruptFlag = 0;
|
||||
timer.interruptEnable = address.bit(3);
|
||||
return; }
|
||||
}
|
||||
|
||||
debug(unimplemented, "[RIOT] IO write ",hex(address), " = ", hex(data));
|
||||
}
|
||||
|
||||
auto RIOT::readPortA() -> n8 {
|
||||
n8 data;
|
||||
// TODO: Handle when configured as outputs
|
||||
data.bit(0, 3) = controllerPort2.read().bit(0, 4);
|
||||
data.bit(4, 7) = controllerPort1.read().bit(0, 4);
|
||||
return data;
|
||||
}
|
||||
|
||||
auto RIOT::writePortA(n8 data) -> void {
|
||||
port[0].data = data;
|
||||
}
|
||||
|
||||
auto RIOT::readPortB() -> n8 {
|
||||
system.controls.poll();
|
||||
|
||||
n8 data;
|
||||
|
||||
for(auto n : range(8)) if(port[1].direction.bit(n)) { data.bit(n) = port[1].data.bit(n); }
|
||||
|
||||
// Atari hard-wires these bits as input
|
||||
data.bit(0) = !system.controls.reset->value();
|
||||
data.bit(1) = !system.controls.select->value();
|
||||
|
||||
// These are toggle switches; flip the values on the rising edge
|
||||
if(system.controls.tvType->value() && !tvTypeLatch) {
|
||||
tvType = !tvType;
|
||||
}
|
||||
tvTypeLatch = system.controls.tvType->value();
|
||||
|
||||
if(system.controls.leftDifficulty->value() && !leftDifficultyLatch) {
|
||||
leftDifficulty = !leftDifficulty;
|
||||
}
|
||||
leftDifficultyLatch = system.controls.leftDifficulty->value();
|
||||
|
||||
if(system.controls.rightDifficulty->value() && !rightDifficultyLatch) {
|
||||
rightDifficulty = !rightDifficulty;
|
||||
}
|
||||
rightDifficultyLatch = system.controls.rightDifficulty->value();
|
||||
|
||||
data.bit(3) = tvType;
|
||||
data.bit(6) = leftDifficulty;
|
||||
data.bit(7) = rightDifficulty;
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
auto RIOT::writePortB(n8 data) -> void {
|
||||
port[1].data = data;
|
||||
}
|
||||
@@ -1,47 +0,0 @@
|
||||
#include <a26/a26.hpp>
|
||||
|
||||
namespace ares::Atari2600 {
|
||||
|
||||
RIOT riot;
|
||||
|
||||
#include "io.cpp"
|
||||
#include "serialization.cpp"
|
||||
|
||||
auto RIOT::load(Node::Object parent) -> void {
|
||||
node = parent->append<Node::Object>("RIOT");
|
||||
|
||||
ram.allocate(128);
|
||||
}
|
||||
|
||||
auto RIOT::unload() -> void {
|
||||
ram.reset();
|
||||
node.reset();
|
||||
}
|
||||
|
||||
auto RIOT::main() -> void {
|
||||
if(--timer.counter == 0xff) {
|
||||
timer.interval = 1;
|
||||
timer.interruptFlag = 1;
|
||||
}
|
||||
|
||||
step(timer.interval);
|
||||
}
|
||||
|
||||
auto RIOT::step(u32 clocks) -> void {
|
||||
Thread::step(clocks);
|
||||
Thread::synchronize();
|
||||
}
|
||||
|
||||
auto RIOT::power(bool reset) -> void {
|
||||
Thread::create(system.frequency() / 3, {&RIOT::main, this});
|
||||
timer = {};
|
||||
port[0] = {};
|
||||
port[0].data = 0xff;
|
||||
port[1] = {};
|
||||
port[1].data = 0xff;
|
||||
leftDifficulty = 1;
|
||||
rightDifficulty = 1;
|
||||
tvType = 1;
|
||||
}
|
||||
|
||||
}
|
||||
@@ -1,50 +0,0 @@
|
||||
struct RIOT : Thread {
|
||||
Node::Object node;
|
||||
Memory::Writable<n8> ram;
|
||||
|
||||
//riot.cpp
|
||||
auto load(Node::Object) -> void;
|
||||
auto unload() -> void;
|
||||
|
||||
auto main() -> void;
|
||||
auto step(u32 clocks) -> void;
|
||||
auto power(bool reset) -> void;
|
||||
|
||||
auto decrementTimer() -> void;
|
||||
|
||||
//io.cpp
|
||||
auto readRam(n8 address) -> n8;
|
||||
auto writeRam(n8 address, n8 data) -> void;
|
||||
auto readIo(n8 address) -> n8;
|
||||
auto writeIo(n8 address, n8 data) -> void;
|
||||
|
||||
auto readPortA() -> n8;
|
||||
auto readPortB() -> n8;
|
||||
auto writePortA(n8 data) -> void;
|
||||
auto writePortB(n8 data) -> void;
|
||||
|
||||
//serialization.cpp
|
||||
auto serialize(serializer&) -> void;
|
||||
|
||||
struct {
|
||||
u8 counter;
|
||||
n16 interval;
|
||||
n16 reload;
|
||||
n1 interruptEnable;
|
||||
n1 interruptFlag;
|
||||
} timer;
|
||||
|
||||
struct Port {
|
||||
n8 data;
|
||||
n8 direction;
|
||||
} port[2];
|
||||
|
||||
n1 leftDifficulty;
|
||||
n1 leftDifficultyLatch;
|
||||
n1 rightDifficulty;
|
||||
n1 rightDifficultyLatch;
|
||||
n1 tvType;
|
||||
n1 tvTypeLatch;
|
||||
};
|
||||
|
||||
extern RIOT riot;
|
||||
@@ -1,23 +0,0 @@
|
||||
//serialization.cpp
|
||||
auto RIOT::serialize(serializer& s) -> void {
|
||||
Thread::serialize(s);
|
||||
|
||||
s(ram);
|
||||
s(timer.counter);
|
||||
s(timer.interval);
|
||||
s(timer.reload);
|
||||
s(timer.interruptEnable);
|
||||
s(timer.interruptFlag);
|
||||
|
||||
for(auto n : range(2)) {
|
||||
s(port[n].data);
|
||||
s(port[n].direction);
|
||||
}
|
||||
|
||||
s(leftDifficulty);
|
||||
s(leftDifficultyLatch);
|
||||
s(rightDifficulty);
|
||||
s(rightDifficultyLatch);
|
||||
s(tvType);
|
||||
s(tvTypeLatch);
|
||||
}
|
||||
@@ -1,17 +0,0 @@
|
||||
auto System::Controls::load(Node::Object parent) -> void {
|
||||
node = parent->append<Node::Object>("Controls");
|
||||
|
||||
reset = node->append<Node::Input::Button>("Reset");
|
||||
select = node->append<Node::Input::Button>("Select");
|
||||
leftDifficulty = node->append<Node::Input::Button>("Left Difficulty");
|
||||
rightDifficulty = node->append<Node::Input::Button>("Right Difficulty");
|
||||
tvType = node->append<Node::Input::Button>("TV Type");
|
||||
}
|
||||
|
||||
auto System::Controls::poll() -> void {
|
||||
platform->input(reset);
|
||||
platform->input(select);
|
||||
platform->input(leftDifficulty);
|
||||
platform->input(rightDifficulty);
|
||||
platform->input(tvType);
|
||||
}
|
||||
@@ -1,48 +0,0 @@
|
||||
static const string SerializerVersion = "v139";
|
||||
|
||||
auto System::serialize(bool synchronize) -> serializer {
|
||||
if(synchronize) scheduler.enter(Scheduler::Mode::Synchronize);
|
||||
serializer s;
|
||||
|
||||
u32 signature = SerializerSignature;
|
||||
char version[16] = {};
|
||||
char description[512] = {};
|
||||
memory::copy(&version, (const char*)SerializerVersion, SerializerVersion.size());
|
||||
|
||||
s(signature);
|
||||
s(synchronize);
|
||||
s(version);
|
||||
s(description);
|
||||
|
||||
serialize(s, synchronize);
|
||||
return s;
|
||||
}
|
||||
|
||||
auto System::unserialize(serializer& s) -> bool {
|
||||
u32 signature = 0;
|
||||
bool synchronize = true;
|
||||
char version[16] = {};
|
||||
char description[512] = {};
|
||||
|
||||
s(signature);
|
||||
s(synchronize);
|
||||
s(version);
|
||||
s(description);
|
||||
|
||||
if(signature != SerializerSignature) return false;
|
||||
if(string{version} != SerializerVersion) return false;
|
||||
|
||||
if(synchronize) power(/* reset = */ false);
|
||||
serialize(s, synchronize);
|
||||
return true;
|
||||
}
|
||||
|
||||
auto System::serialize(serializer& s, bool synchronize) -> void {
|
||||
scheduler.setSynchronize(synchronize);
|
||||
s(cartridge);
|
||||
s(cpu);
|
||||
s(tia);
|
||||
s(riot);
|
||||
s(controllerPort1);
|
||||
s(controllerPort2);
|
||||
}
|
||||
@@ -1,105 +0,0 @@
|
||||
#include <a26/a26.hpp>
|
||||
|
||||
namespace ares::Atari2600 {
|
||||
|
||||
auto enumerate() -> vector<string> {
|
||||
return {
|
||||
"[Atari] Atari 2600 (NTSC)",
|
||||
"[Atari] Atari 2600 (PAL)",
|
||||
"[Atari] Atari 2600 (SECAM)",
|
||||
};
|
||||
}
|
||||
|
||||
auto load(Node::System& node, string name) -> bool {
|
||||
if(!enumerate().find(name)) return false;
|
||||
return system.load(node, name);
|
||||
}
|
||||
|
||||
Random random;
|
||||
Scheduler scheduler;
|
||||
System system;
|
||||
#include "controls.cpp"
|
||||
#include "serialization.cpp"
|
||||
|
||||
auto System::game() -> string {
|
||||
if(cartridge.node) {
|
||||
return cartridge.title();
|
||||
}
|
||||
|
||||
return "(no cartridge connected)";
|
||||
}
|
||||
|
||||
auto System::run() -> void {
|
||||
scheduler.enter();
|
||||
}
|
||||
|
||||
auto System::load(Node::System& root, string name) -> bool {
|
||||
if(node) unload();
|
||||
|
||||
information = {};
|
||||
if(name.find("NTSC")) {
|
||||
information.name = "Atari 2600";
|
||||
information.region = Region::NTSC;
|
||||
information.frequency = 3579546;
|
||||
}
|
||||
if(name.find("PAL")) {
|
||||
information.name = "Atari 2600";
|
||||
information.region = Region::PAL;
|
||||
information.frequency = 3546894;
|
||||
}
|
||||
if(name.find("SECAM")) {
|
||||
information.name = "Atari 2600";
|
||||
information.region = Region::SECAM;
|
||||
information.frequency = 3546894;
|
||||
}
|
||||
|
||||
node = Node::System::create(information.name);
|
||||
node->setGame({&System::game, this});
|
||||
node->setRun({&System::run, this});
|
||||
node->setPower({&System::power, this});
|
||||
node->setSave({&System::save, this});
|
||||
node->setUnload({&System::unload, this});
|
||||
node->setSerialize({&System::serialize, this});
|
||||
node->setUnserialize({&System::unserialize, this});
|
||||
root = node;
|
||||
|
||||
scheduler.reset();
|
||||
controls.load(node);
|
||||
riot.load(node);
|
||||
cpu.load(node);
|
||||
tia.load(node);
|
||||
cartridgeSlot.load(node);
|
||||
controllerPort1.load(node);
|
||||
controllerPort2.load(node);
|
||||
return true;
|
||||
}
|
||||
|
||||
auto System::save() -> void {
|
||||
if(!node) return;
|
||||
cartridge.save();
|
||||
}
|
||||
|
||||
auto System::unload() -> void {
|
||||
if(!node) return;
|
||||
save();
|
||||
riot.unload();
|
||||
cpu.unload();
|
||||
tia.unload();
|
||||
cartridgeSlot.unload();
|
||||
controllerPort1.unload();
|
||||
controllerPort2.unload();
|
||||
node = {};
|
||||
}
|
||||
|
||||
auto System::power(bool reset) -> void {
|
||||
for(auto& setting : node->find<Node::Setting::Setting>()) setting->setLatch();
|
||||
|
||||
random.entropy(Random::Entropy::Low);
|
||||
cartridge.power();
|
||||
riot.power(reset);
|
||||
cpu.power(reset);
|
||||
tia.power(reset);
|
||||
scheduler.power(cpu);
|
||||
}
|
||||
|
||||
}
|
||||
@@ -1,53 +0,0 @@
|
||||
extern Random random;
|
||||
|
||||
struct System {
|
||||
Node::System node;
|
||||
|
||||
struct Controls {
|
||||
Node::Object node;
|
||||
Node::Input::Button reset;
|
||||
Node::Input::Button select;
|
||||
Node::Input::Button leftDifficulty;
|
||||
Node::Input::Button rightDifficulty;
|
||||
Node::Input::Button tvType;
|
||||
|
||||
//controls.cpp
|
||||
auto load(Node::Object) -> void;
|
||||
auto poll() -> void;
|
||||
} controls;
|
||||
|
||||
enum class Region : u32 { NTSC, PAL, SECAM };
|
||||
|
||||
auto name() const -> string { return information.name; }
|
||||
auto region() const -> Region { return information.region; }
|
||||
auto frequency() const -> f64 { return information.frequency; }
|
||||
|
||||
//system.cpp
|
||||
auto game() -> string;
|
||||
auto run() -> void;
|
||||
|
||||
auto load(Node::System& node, string name) -> bool;
|
||||
auto save() -> void;
|
||||
auto unload() -> void;
|
||||
auto power(bool reset) -> void;
|
||||
|
||||
//serialization.cpp
|
||||
auto serialize(bool synchronize) -> serializer;
|
||||
auto unserialize(serializer&) -> bool;
|
||||
|
||||
private:
|
||||
struct Information {
|
||||
string name = "Atari 2600";
|
||||
Region region = Region::NTSC;
|
||||
f64 frequency = Constants::Colorburst::NTSC;
|
||||
} information;
|
||||
|
||||
//serialization.cpp
|
||||
auto serialize(serializer&, bool synchronize) -> void;
|
||||
};
|
||||
|
||||
extern System system;
|
||||
|
||||
auto Region::NTSC() -> bool { return system.region() == System::Region::NTSC; }
|
||||
auto Region::PAL() -> bool { return system.region() == System::Region::PAL; }
|
||||
auto Region::SECAM() -> bool { return system.region() == System::Region::SECAM; }
|
||||
@@ -1,64 +0,0 @@
|
||||
auto TIA::runAudio() -> void {
|
||||
if(io.hcounter == 9 || io.hcounter == 81) {
|
||||
audio[0].phase0();
|
||||
audio[1].phase0();
|
||||
}
|
||||
|
||||
if(io.hcounter == 37 || io.hcounter == 149) {
|
||||
auto a = audio[0].phase1();
|
||||
auto b = audio[1].phase1();
|
||||
|
||||
double output = 0;
|
||||
output += volume[a];
|
||||
output += volume[b];
|
||||
|
||||
stream->frame(output / 2.0);
|
||||
}
|
||||
}
|
||||
|
||||
auto TIA::AudioChannel::phase0() -> void {
|
||||
if (enable) {
|
||||
switch (control.bit(0, 1)) {
|
||||
case 0x00: case 0x01: pulseCounterPaused = 0; break;
|
||||
case 0x02: pulseCounterPaused = noiseCounter.bit(1, 4) != 1; break;
|
||||
case 0x03: pulseCounterPaused = !noiseCounter.bit(0); break;
|
||||
}
|
||||
|
||||
noiseFeedback = (noiseCounter.bit(2) ^ noiseCounter.bit(0)) || noiseCounter == 0;
|
||||
if(control.bit(0, 2) == 0) {
|
||||
noiseFeedback = !(control.bit(2, 3)) ||
|
||||
!(noiseCounter || (pulseCounter != 0x0a)) ||
|
||||
(pulseCounter.bit(0) ^ noiseCounter.bit(0));
|
||||
}
|
||||
}
|
||||
|
||||
enable = divCounter == frequency;
|
||||
if (divCounter == frequency || divCounter == 0x1f) {
|
||||
divCounter = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
divCounter++;
|
||||
}
|
||||
|
||||
auto TIA::AudioChannel::phase1() -> u8 {
|
||||
if(!enable) return pulseCounter.bit(0) * volume;
|
||||
|
||||
pulseFeedback = 0;
|
||||
switch(control.bit(2, 3)) {
|
||||
case 0x00: pulseFeedback = pulseCounter != 0x0a && control.bit(0, 2) && (pulseCounter.bit(1) ^ pulseCounter.bit(0)); break;
|
||||
case 0x01: pulseFeedback = !pulseCounter.bit(3); ; break;
|
||||
case 0x02: pulseFeedback = !noiseCounter.bit(0); ; break;
|
||||
case 0x03: pulseFeedback = !(pulseCounter.bit(1) || !pulseCounter.bit(1, 3)); ; break;
|
||||
}
|
||||
|
||||
noiseCounter >>= 1;
|
||||
if (noiseFeedback) noiseCounter.bit(4) = 1;
|
||||
|
||||
if(!pulseCounterPaused) {
|
||||
pulseCounter = ~(pulseCounter >> 1) & 7;
|
||||
if (pulseFeedback) pulseCounter.bit(3) = 1;
|
||||
}
|
||||
|
||||
return pulseCounter.bit(0) * volume;
|
||||
}
|
||||
@@ -1,16 +0,0 @@
|
||||
auto TIA::Ball::reset() -> void {
|
||||
counter = -4; // Resetting takes 4 cycles
|
||||
}
|
||||
|
||||
auto TIA::Ball::step(u8 clocks) -> void {
|
||||
if(!clocks) return;
|
||||
while(clocks--) {
|
||||
if(++counter == 160) {
|
||||
counter = 0;
|
||||
}
|
||||
|
||||
const int ballSizes[4] = {1, 2, 4, 8};
|
||||
output = enable[delay] && counter < ballSizes[size];
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,42 +0,0 @@
|
||||
auto TIA::color(n32 color) -> n64 {
|
||||
u64 ntscColors[128] = {
|
||||
0x0000'0000'0000ull, 0x4040'4040'4040ull, 0x6c6c'6c6c'6c6cull, 0x9090'9090'9090ull, 0xb0b0'b0b0'b0b0ull, 0xc8c8'c8c8'c8c8ull, 0xdcdc'dcdc'dcdcull, 0xecec'ecec'ececull,
|
||||
0x4444'4444'0000ull, 0x6464'6464'1010ull, 0x8484'8484'2424ull, 0xa0a0'a0a0'3434ull, 0xb8b8'b8b8'4040ull, 0xd0d0'd0d0'5050ull, 0xe8e8'e8e8'5c5cull, 0xfcfc'fcfc'6868ull,
|
||||
0x7070'2828'0000ull, 0x8484'4444'1414ull, 0x9898'5c5c'2828ull, 0xacac'7878'3c4cull, 0xbcbc'8c8c'4c4cull, 0xcccc'a0a0'5c5cull, 0xdcdc'b4b4'6868ull, 0xecec'c8c8'7878ull,
|
||||
0x8484'1818'0000ull, 0x9898'3434'1818ull, 0xacac'5050'3030ull, 0xc0c0'6868'4848ull, 0xd0d0'8080'5c5cull, 0xe0e0'9494'7070ull, 0xecec'a8a8'8080ull, 0xfcfc'bcbc'9494ull,
|
||||
0x8888'0000'0000ull, 0x9c9c'2020'2020ull, 0xb0b0'3c3c'3c3cull, 0xc0c0'5858'5858ull, 0xd0d0'7070'7070ull, 0xe0e0'8888'8888ull, 0xecec'a0a0'a0a0ull, 0xfcfc'b4b4'b4b4ull,
|
||||
0x7878'0000'5c5cull, 0x8c8c'2020'7474ull, 0xa0a0'3c3c'8888ull, 0xb0b0'5858'9c9cull, 0xc0c0'7070'b0b0ull, 0xd0d0'8484'c0c0ull, 0xdcdc'9c9c'd0d0ull, 0xecec'b0b0'e0e0ull,
|
||||
0x4848'0000'7878ull, 0x6060'2020'9090ull, 0x7878'3c3c'a4a4ull, 0x8c8c'5858'b8b8ull, 0xa0a0'7070'ccccull, 0xb4b4'8484'dcdcull, 0xc4c4'9c9c'ececull, 0xd4d4'b0b0'fcfcull,
|
||||
0x1414'0000'8484ull, 0x3030'2020'9898ull, 0x4c4c'3c3c'acacull, 0x6868'5858'c0c0ull, 0x7c7c'7070'd0d0ull, 0x9494'8888'e0e0ull, 0xa8a8'a0a0'ececull, 0xbcbc'b4b4'fcfcull,
|
||||
0x0000'0000'8888ull, 0x1c1c'2020'9c9cull, 0x3838'4040'b0b0ull, 0x5050'5c5c'c0c0ull, 0x6868'7474'd0d0ull, 0x7c7c'8c8c'e0e0ull, 0x9090'a4a4'ececull, 0xa4a4'b8b8'fcfcull,
|
||||
0x0000'1818'7c7cull, 0x1c1c'3838'9090ull, 0x3838'5454'a8a8ull, 0x5050'7070'bcbcull, 0x6868'8888'ccccull, 0x7c7c'9c9c'dcdcull, 0x9090'b4b4'ececull, 0xa4a4'c8c8'fcfcull,
|
||||
0x0000'2c2c'5c5cull, 0x1c1c'4c4c'7878ull, 0x3838'6868'9090ull, 0x5050'8484'acacull, 0x6868'9c9c'c0c0ull, 0x7c7c'b4b4'd4d4ull, 0x9090'cccc'e8e8ull, 0xa4a4'e0e0'fcfcull,
|
||||
0x0000'3c3c'2c2cull, 0x1c1c'5c5c'4848ull, 0x3838'7c7c'6464ull, 0x5050'9c9c'8080ull, 0x6868'b4b4'9494ull, 0x7c7c'd0d0'acacull, 0x9090'e4e4'c0c0ull, 0xa4a4'fcfc'd4d4ull,
|
||||
0x0000'3c3c'0000ull, 0x2020'5c5c'2020ull, 0x4040'7c7c'4040ull, 0x5c5c'9c9c'5c5cull, 0x7474'b4b4'7474ull, 0x8c8c'd0d0'8c8cull, 0xa4a4'e4e4'a4a4ull, 0xb8b8'fcfc'b8b8ull,
|
||||
0x1414'3838'0000ull, 0x3434'5c5c'1c1cull, 0x5050'7c7c'3838ull, 0x6c6c'9898'5050ull, 0x8484'b4b4'6868ull, 0x9c9c'cccc'7c7cull, 0xb4b4'e4e4'9090ull, 0xc8c8'fcfc'a4a4ull,
|
||||
0x2c2c'3030'0000ull, 0x4c4c'5050'1c1cull, 0x6868'7070'3434ull, 0x8484'8c8c'4c4cull, 0x9c9c'a8a8'6464ull, 0xb4b4'c0c0'7878ull, 0xcccc'd4d4'8888ull, 0xe0e0'ecec'9c9cull,
|
||||
0x4444'2828'0000ull, 0x6464'4848'1818ull, 0x8484'6868'3030ull, 0xa0a0'8484'4444ull, 0xb8b8'9c9c'5858ull, 0xd0d0'b4b4'6c6cull, 0x8e8c'cccc'7c7cull, 0xfcfc'c0c0'8c8cull,
|
||||
};
|
||||
|
||||
u64 palColors[128] = {
|
||||
0x0000'0000'0000ull, 0x2828'2828'2828ull, 0x5050'5050'5050ull, 0x7474'7474'7474ull, 0x9494'9494'9494ull, 0xb4b4'b4b4'b4b4ull, 0xd0d0'd0d0'd0d0ull, 0xecec'ecec'ececull,
|
||||
0x0000'0000'0000ull, 0x2828'2828'2828ull, 0x5050'5050'5050ull, 0x7474'7474'7474ull, 0x9494'9494'9494ull, 0xb4b4'b4b4'b4b4ull, 0xd0d0'd0d0'd0d0ull, 0xecec'ecec'ececull,
|
||||
0x8080'5858'0000ull, 0x9494'7070'2020ull, 0xa8a8'8484'3c3cull, 0xbcbc'9c9c'5858ull, 0xcccc'acac'7070ull, 0xdcdc'c0c0'8484ull, 0xecec'd0d0'9c9cull, 0xfcfc'e0e0'b0b0ull,
|
||||
0x4444'5c5c'0000ull, 0x5c5c'7878'2020ull, 0x7474'9090'3c3cull, 0x8c8c'acac'5858ull, 0xa0a0'c0c0'7070ull, 0xb0b0'd4d4'8484ull, 0xc4c4'e8e8'9c9cull, 0xd4d4'fcfc'b0b0ull,
|
||||
0x7070'3434'0000ull, 0x8888'5050'2020ull, 0xa0a0'6868'3c3cull, 0xb4b4'8484'5858ull, 0xc8c8'9898'7070ull, 0xdcdc'acac'8484ull, 0xecec'c0c0'9c9cull, 0xfcfc'd4d4'b0b0ull,
|
||||
0x0000'6464'1414ull, 0x2020'8080'3434ull, 0x3c3c'9898'5050ull, 0x5858'b0b0'6c6cull, 0x7070'c4c4'8484ull, 0x8484'd8d8'9c9cull, 0x9c9c'e8e8'b4b4ull, 0xb0b0'fcfc'c8c8ull,
|
||||
0x7070'0000'1414ull, 0x8888'2020'3434ull, 0xa0a0'3c3c'5050ull, 0xb4b4'5858'6c6cull, 0xc8c8'7070'8484ull, 0xdcdc'8484'9c9cull, 0xecec'9c9c'b4b4ull, 0xfcfc'b0b0'c8c8ull,
|
||||
0x0000'5c5c'5c5cull, 0x2020'7474'7474ull, 0x3c3c'8c8c'8c8cull, 0x5858'a4a4'a4a4ull, 0x7070'b8b8'b8b8ull, 0x8484'c8c8'c8c8ull, 0x9c9c'dcdc'dcdcull, 0xb0b0'ecec'ececull,
|
||||
0x7070'0000'5c5cull, 0x8484'2020'7474ull, 0x9494'3c3c'8888ull, 0xa8a8'5858'9c9cull, 0xb4b4'7070'b0b0ull, 0xc4c4'8484'c0c0ull, 0xd0d0'9c9c'd0d0ull, 0xe0e0'b0b0'e0e0ull,
|
||||
0x0000'3c3c'7070ull, 0x1c1c'5858'8888ull, 0x3838'7474'a0a0ull, 0x5050'8c8c'b4b4ull, 0x6868'a4a4'c8c8ull, 0x7c7c'b8b8'dcdcull, 0x9090'cccc'ececull, 0xa4a4'e0e0'fcfcull,
|
||||
0x5858'0000'7070ull, 0x6c6c'2020'8888ull, 0x8080'3c3c'a0a0ull, 0x9494'5858'b4b4ull, 0xa4a4'7070'c8c8ull, 0xb4b4'8484'dcdcull, 0xc4c4'9c9c'ececull, 0xd4d4'b0b0'fcfcull,
|
||||
0x0000'2020'7070ull, 0x1c1c'3c3c'8888ull, 0x3838'5858'a0a0ull, 0x5050'7474'b4b4ull, 0x6868'8888'c8c8ull, 0x7c7c'a0a0'dcdcull, 0x9090'b4b4'ececull, 0xa4a4'c8c8'fcfcull,
|
||||
0x3c3c'0000'8080ull, 0x5454'2020'9494ull, 0x6c6c'3c3c'a8a8ull, 0x8080'5858'bcbcull, 0x9494'7070'ccccull, 0xa8a8'8484'dcdcull, 0xb8b8'9c9c'ececull, 0xc8c8'b0b0'fcfcull,
|
||||
0x0000'0000'8888ull, 0x2020'2020'9c9cull, 0x3c3c'3c3c'b0b0ull, 0x5858'5858'c0c0ull, 0x7070'7070'd0d0ull, 0x8484'8484'e0e0ull, 0x9c9c'9c9c'ececull, 0xb0b0'b0b0'fcfcull,
|
||||
0x0000'0000'0000ull, 0x2828'2828'2828ull, 0x5050'5050'5050ull, 0x7474'7474'7474ull, 0x9494'9494'9494ull, 0xb4b4'b4b4'b4b4ull, 0xd0d0'd0d0'd0d0ull, 0xecec'ecec'ececull,
|
||||
0x0000'0000'0000ull, 0x2828'2828'2828ull, 0x5050'5050'5050ull, 0x7474'7474'7474ull, 0x9494'9494'9494ull, 0xb4b4'b4b4'b4b4ull, 0xd0d0'd0d0'd0d0ull, 0xecec'ecec'ececull,
|
||||
};
|
||||
|
||||
return Region::PAL() ? palColors[color & 0x7f] : ntscColors[color & 0x7f];
|
||||
}
|
||||
|
||||
@@ -1,143 +0,0 @@
|
||||
auto TIA::read(n8 address) -> n8 {
|
||||
n8 value;
|
||||
|
||||
switch(address) {
|
||||
case 0x00: value.bit(7) = collision.M0P1; value.bit(6) = collision.M0P0; return value; // CXM0P
|
||||
case 0x01: value.bit(7) = collision.M1P0; value.bit(6) = collision.M1P1; return value; // CXM1P
|
||||
case 0x02: value.bit(7) = collision.P0PF; value.bit(6) = collision.P0BL; return value; // CX0FB
|
||||
case 0x03: value.bit(7) = collision.P1PF; value.bit(6) = collision.P1BL; return value; // CX1FB
|
||||
case 0x04: value.bit(7) = collision.M0PF; value.bit(6) = collision.M0BL; return value; // CXM0FB
|
||||
case 0x05: value.bit(7) = collision.M1PF; value.bit(6) = collision.M1BL; return value; // CXM1FB
|
||||
case 0x06: value.bit(7) = collision.BLPF; return value; // CXBLPF
|
||||
case 0x07: value.bit(7) = collision.P0P1; value.bit(6) = collision.M0M1; return value; // CXPPMM
|
||||
case 0x0c: value.bit(7) = controllerPort1.read().bit(4); return value; // INPT4
|
||||
case 0x0d: value.bit(7) = controllerPort2.read().bit(4); return value; // INPT5
|
||||
}
|
||||
|
||||
debug(unimplemented, "[TIA] read ", hex(address));
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
auto TIA::write(n8 address, n8 data) -> void {
|
||||
switch(address) {
|
||||
case 0x00: vsync(data.bit(1)); return; // VSYNC
|
||||
case 0x01: writeQueue.add(address, data, 1); return; // VBLANK
|
||||
case 0x02: cpu.rdyLine(0); return; // WSYNC
|
||||
case 0x03: io.hcounter = 0; return; // RSYNC
|
||||
case 0x04: player[0].size = data.bit(0,2); missile[0].size = data.bit(4, 5); return; // NUSIZ1
|
||||
case 0x05: player[1].size = data.bit(0,2); missile[1].size = data.bit(4, 5); return; // NUSIZ1
|
||||
case 0x06: io.p0Color = data.bit(1, 7); return; // COLUP0
|
||||
case 0x07: io.p1Color = data.bit(1, 7); return; // COLUP1
|
||||
case 0x08: io.fgColor = data.bit(1, 7); return; // COLUPF
|
||||
case 0x09: io.bgColor = data.bit(1, 7); return; // COLUBK
|
||||
case 0x0a: ctrlpf(data); return; // CTRLPF
|
||||
case 0x0b: writeQueue.add(address, data, 1); return; // REFP0
|
||||
case 0x0c: writeQueue.add(address, data, 1); return; // REFP1
|
||||
case 0x0d: writeQueue.add(address, data, 2); return; // PF0
|
||||
case 0x0e: writeQueue.add(address, data, 2); return; // PF1
|
||||
case 0x0f: writeQueue.add(address, data, 2); return; // PF2
|
||||
case 0x10: resp(0); return; // RESP0
|
||||
case 0x11: resp(1); return; // RESP1
|
||||
case 0x12: resm(0); return; // RESM0
|
||||
case 0x13: resm(1); return; // RESM1
|
||||
case 0x14: resbl(); return; // RESBL
|
||||
case 0x15: audio[0].control = data; return; // AUDC0
|
||||
case 0x16: audio[1].control = data; return; // AUDC1
|
||||
case 0x17: audio[0].frequency = data; return; // AUDF0
|
||||
case 0x18: audio[1].frequency = data; return; // AUDF1
|
||||
case 0x19: audio[0].volume = data; return; // AUDV0
|
||||
case 0x1a: audio[1].volume = data; return; // AUDV1
|
||||
case 0x1b: writeQueue.add(address, data, 1); return; // GRP0
|
||||
case 0x1c: writeQueue.add(address, data, 1); return; // GRP1
|
||||
case 0x1d: writeQueue.add(address, data, 1); return; // ENAM0
|
||||
case 0x1e: writeQueue.add(address, data, 1); return; // ENAM1
|
||||
case 0x1f: writeQueue.add(address, data, 1); return; // ENAB1
|
||||
case 0x20: writeQueue.add(address, data, 2); return; // HMP0
|
||||
case 0x21: writeQueue.add(address, data, 2); return; // HMP1
|
||||
case 0x22: writeQueue.add(address, data, 2); return; // HMM0
|
||||
case 0x23: writeQueue.add(address, data, 2); return; // HMM1
|
||||
case 0x24: writeQueue.add(address, data, 2); return; // HMBL
|
||||
case 0x25: player[0].delay = data.bit(0); return; // VDELP0
|
||||
case 0x26: player[1].delay = data.bit(0); return; // VDELP1
|
||||
case 0x27: ball.delay = data.bit(0); return; // VDELBL
|
||||
case 0x28: resmp(0, data); return; // RESMP0
|
||||
case 0x29: resmp(1, data); return; // RESMP1
|
||||
case 0x2a: writeQueue.add(address, data, 6); return; // HMOVE
|
||||
case 0x2b: writeQueue.add(address, data, 2); return; // HMCLR
|
||||
case 0x2c: cxclr(); return; // CXCLR
|
||||
}
|
||||
|
||||
debug(unimplemented, "[TIA] write ",hex(address), " = ", hex(data));
|
||||
}
|
||||
|
||||
|
||||
auto TIA::vsync(n1 state) -> void {
|
||||
if(!io.vsync && state) {
|
||||
frame();
|
||||
tia.io.vcounter = 0;
|
||||
}
|
||||
|
||||
io.vsync = state;
|
||||
}
|
||||
|
||||
auto TIA::ctrlpf(n8 data) -> void {
|
||||
playfield.mirror = data.bit(0);
|
||||
playfield.scoreMode = data.bit(1);
|
||||
playfield.priority = data.bit(2);
|
||||
ball.size = data.bit(4, 5);
|
||||
}
|
||||
|
||||
auto TIA::cxclr() -> void {
|
||||
collision.M0P0 = 0;
|
||||
collision.M0P1 = 0;
|
||||
collision.M1P0 = 0;
|
||||
collision.M1P1 = 0;
|
||||
collision.P0PF = 0;
|
||||
collision.P0BL = 0;
|
||||
collision.P1PF = 0;
|
||||
collision.P1BL = 0;
|
||||
collision.M0PF = 0;
|
||||
collision.M0BL = 0;
|
||||
collision.M1PF = 0;
|
||||
collision.M1BL = 0;
|
||||
collision.BLPF = 0;
|
||||
collision.P0P1 = 0;
|
||||
collision.M0M1 = 0;
|
||||
}
|
||||
|
||||
auto TIA::hmove() -> void {
|
||||
u4 mask = 1 << 3;
|
||||
for(auto& p : player) p.step(p.offset ^ mask);
|
||||
for(auto& m : missile) m.step(m.offset ^ mask);
|
||||
ball.step(ball.offset ^ mask);
|
||||
|
||||
io.hmoveTriggered = 1;
|
||||
}
|
||||
|
||||
auto TIA::hmclr() -> void {
|
||||
for(auto& p : player) p.offset = 0;
|
||||
for(auto& m : missile) m.offset = 0;
|
||||
ball.offset = 0;
|
||||
}
|
||||
|
||||
auto TIA::grp(n1 index, n8 data) -> void {
|
||||
player[index].graphics[0] = data;
|
||||
player[!index].graphics[1] = player[!index].graphics[0];
|
||||
if(index) ball.enable[1] = ball.enable[0];
|
||||
}
|
||||
|
||||
auto TIA::resp(n1 index) -> void {
|
||||
player[index].reset();
|
||||
}
|
||||
|
||||
auto TIA::resm(n1 index) -> void {
|
||||
missile[index].reset();
|
||||
}
|
||||
|
||||
auto TIA::resmp(n1 index, n8 data) -> void {
|
||||
missile[index].lockedToPlayer = data.bit(1);
|
||||
}
|
||||
|
||||
auto TIA::resbl() -> void {
|
||||
ball.reset();
|
||||
}
|
||||
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Reference in new issue
Block a user