Release 4.0

* Corrected jumps and remove git messages
* Add ESIL for right shift and correct imm value
* Separate branch with immediate instructions

.travis.yml

@@ -32,32 +32,33 @@ addons:
 env:
   - TESTS="r2pm -i armthumb"
   - TESTS="r2pm -i baleful"
-#  - TESTS="r2pm -i bcl" [BR] https://travis-ci.org/radare/radare2-extras/builds/157522362
+#  - TESTS="r2pm -i bcl" [BR] https://travis-ci.org/radareorg/radare2-extras/builds/157522362
   - TESTS="r2pm -i blackfin"
   - TESTS="r2pm -i blessr2"
-#  - TESTS="r2pm -i bpf" [BR] https://travis-ci.org/radare/radare2-extras/builds/157522362
-#  - TESTS="r2pm -i dlang" [BR] https://travis-ci.org/radare/radare2-extras/builds/157522362
+#  - TESTS="r2pm -i bpf" [BR] https://travis-ci.org/radareorg/radare2-extras/builds/157522362
+#  - TESTS="r2pm -i dlang" [BR] https://travis-ci.org/radareorg/radare2-extras/builds/157522362
   - TESTS="r2pm -i dirtycow"
   - TESTS="r2pm -i lang-duktape"
   - TESTS="git clone git://git.code.sf.net/p/libdwarf/code libdwarf-code && cd libdwarf-code && ./configure && make && cd .. && r2pm -i dwarf-parser && cd radare2-regressions && ./r2r dwarf && cd .. && r2pm -u libdwarf && rm -rf libdwarf-code" #need to remove libdwarf? or travis destroys the vm so no issue in that?
   - TESTS="r2pm -i r2frida"
 #  - TESTS="r2pm -i io-ewf" # https://github.com/travis-ci/apt-package-whitelist/issues/3205
-#  - TESTS="r2pm -i keystone-lib && r2pm -i keystone && cd radare2-regressions && make keystone && cd .." [BR] https://travis-ci.org/radare/radare2-extras/builds/157522362
+#  - TESTS="r2pm -i keystone-lib && r2pm -i keystone && cd radare2-regressions && make keystone && cd .." [BR] https://travis-ci.org/radareorg/radare2-extras/builds/157522362
   - TESTS="r2pm -i mc6809"
-  - TESTS="r2pm -i microblaze"
+  - TESTS="r2pm -i microblaze && cd radare2-regressions && make microblaze"
   - TESTS="r2pm -i msil"
+  - TESTS="r2pm -i pcap"
   - TESTS="r2pm -i ppcdisasm"
   - TESTS="r2pm -i psosvm"
   - TESTS="r2pm -i pyc"
-#  - TESTS="r2pm -i vala && r2pm -i valabind && r2pm -i r2api-python" [BR] https://travis-ci.org/radare/radare2-extras/builds/387043680
-#  - TESTS="r2pm -i r2pipe-cs" [BR] https://travis-ci.org/radare/radare2-extras/builds/157522362
-#  - TESTS="r2pm -i r2pipe-go" [BR] https://travis-ci.org/radare/radare2-extras/builds/387043680
+#  - TESTS="r2pm -i vala && r2pm -i valabind && r2pm -i r2api-python" [BR] https://travis-ci.org/radareorg/radare2-extras/builds/387043680
+#  - TESTS="r2pm -i r2pipe-cs" [BR] https://travis-ci.org/radareorg/radare2-extras/builds/157522362
+#  - TESTS="r2pm -i r2pipe-go" [BR] https://travis-ci.org/radareorg/radare2-extras/builds/387043680
   - TESTS="r2pm -i r2pipe-js"
   - TESTS="r2pm -i r2pipe-py"
   - TESTS="r2pm -i r2pipe-rb"
-#  - TESTS="r2pm -i r2pipe-vala" https://travis-ci.org/radare/radare2-extras/builds/157522362
+#  - TESTS="r2pm -i r2pipe-vala" https://travis-ci.org/radareorg/radare2-extras/builds/157522362
   - TESTS="r2pm -i radare2"
-#  - TESTS="r2pm -i r2snow" https://travis-ci.org/radare/radare2-extras/jobs/199500082
+#  - TESTS="r2pm -i r2snow" https://travis-ci.org/radareorg/radare2-extras/jobs/199500082
 #  - TESTS="r2pm -i radeco" [BR] https://travis-ci.org/radare/radare2-extras/builds/157522362
   - TESTS="r2pm -i retdec"
   - TESTS="r2pm -i swf && cd radare2-regressions && make swf && cd .."
@@ -93,9 +94,9 @@ cache:
 before_script:
   - export WORKING_DIR=${TRAVIS_BUILD_DIR}/..
   - cd ${WORKING_DIR}
-  - rm -rf ~/.nvm && git clone https://github.com/creationix/nvm.git ~/.nvm && (cd ~/.nvm && git checkout `git describe --abbrev=0 --tags`) && source ~/.nvm/nvm.sh && nvm install 7
-  - git clone https://github.com/radare/radare2-regressions
-  - git clone https://github.com/radare/radare2 && cd radare2
+  - rm -rf ~/.nvm && git clone https://github.com/creationix/nvm.git ~/.nvm && (cd ~/.nvm && git checkout `git describe --abbrev=0 --tags`) && source ~/.nvm/nvm.sh && nvm install 10
+  - git clone https://github.com/radareorg/radare2-regressions
+  - git clone https://github.com/radareorg/radare2 && cd radare2
   - export CC=gcc-7
   - ./configure --prefix=${WORKING_DIR}/install > /dev/null
   - make -s -j2 > /dev/null

Makefile.acr

@@ -1,6 +1,5 @@
-VERSION=@VERSION@
-HAVE_LIB_YARA=@HAVE_LIB_YARA@
-PREFIX=@PREFIX@
+include options.mk
+
 DESTDIR?=
 TAR=tar -cvf
 CZ=xz -f
@@ -24,7 +23,9 @@ help:
 	@echo "  yara               - build yara3 r2 plugin"
 	@echo "  (target)-install   - install given plugin"
 	@echo "  (target)-clean     - clean given plugin"
-	@echo "  install-yara{2,3}  - install Yara 2 or 3 from Git"
+
+
+#	@echo "  install-yara{2,3}  - install Yara 2 or 3 from Git"
 
 baleful:
 	$(MAKE) -C baleful

README.md

@@ -1,4 +1,4 @@
-radare2-extras [![Build Status](https://travis-ci.org/radare/radare2-extras.svg?branch=master)](https://travis-ci.org/radare/radare2-extras)
+radare2-extras [![Build Status](https://travis-ci.org/radareorg/radare2-extras.svg?branch=master)](https://travis-ci.org/radareorg/radare2-extras)
 ==============
 This repository contains extra plugins for radare2.
 
@@ -33,4 +33,4 @@ Building
 The recommended way to build and install those plugins for users
 is to use r2pm. See the radare2-pm repository for details:
 
-	https://github.com/radare/radare2-pm
+	https://github.com/radareorg/radare2-pm

baleful/anal/anal_baleful.c

@@ -543,6 +543,32 @@ static int esil_baleful_intr (RAnalEsil *esil, int intr) {
 	return true;
 }
 
+static bool esil_bale_interrupt_wrapper_cb (RAnalEsil *esil, ut32 interrupt, void *user) {	//user is always NULL, bc we has no init and fini
+	return !!esil_baleful_intr(esil, interrupt);
+}
+
+RAnalEsilInterruptHandler bale_intr_handler00 = {
+	.num = 0x00,				//interrupt number
+	.cb = esil_bale_interrupt_wrapper_cb,	//the actual handler
+};
+
+RAnalEsilInterruptHandler bale_intr_handler04 = {
+	.num = 0x04,				//interrupt number
+	.cb = esil_bale_interrupt_wrapper_cb,	//the actual handler
+};
+
+RAnalEsilInterruptHandler bale_intr_handler11 = {
+	.num = 0x11,				//interrupt number
+	.cb = esil_bale_interrupt_wrapper_cb,	//the actual handler
+};
+
+RAnalEsilInterruptHandler *bale_intr_handlers[] = {
+	&bale_intr_handler00,
+	&bale_intr_handler04,
+	&bale_intr_handler11,
+	NULL,
+};
+
 static int set_reg_profile(RAnal *anal) {
 	const char *p = \
 		"=PC    pc\n"
@@ -598,8 +624,10 @@ static int set_reg_profile(RAnal *anal) {
 	return r_reg_set_profile_string (anal->reg, p);
 }
 static int esil_baleful_init (RAnalEsil *esil) {
-	if (!esil)
+	if (!esil) {
 		return false;
+	}
+	return r_anal_esil_load_interrupts (esil, bale_intr_handlers, 0);
 	/*
 	   internalMemory=malloc(4096);
 	   if (!internalMemory) {
@@ -610,7 +638,6 @@ static int esil_baleful_init (RAnalEsil *esil) {
 	 *((ut32 *)internalMemory)=0xdeadbeef;
 	 eprintf("leido :%08x\n",*((ut32 *)internalMemory));
 	 */
-	return true;
 }
 
 static int esil_baleful_fini (RAnalEsil *esil) {
@@ -628,7 +655,6 @@ static RAnalPlugin r_anal_plugin_baleful = {
 	.bits = 32,
 	.esil_init = esil_baleful_init,
 	.esil_fini = esil_baleful_fini,
-	.esil_intr = esil_baleful_intr,
 	.esil = true,
 	.op = &baleful_op,
 	.set_reg_profile = set_reg_profile,

baleful/asm/asm_baleful.c

@@ -211,124 +211,125 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 	const ut8  *r1;
 	const ut32 *imm;
 	const ut32 *imm1;
-
+	char outbuf[32] = {0};
 	switch (*buf) {
 	case 2://8 8 11 5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"+",0);
+		op->size = asm_baleful_getregs(buf,outbuf,"+",0);
 		break;
 	case 3://8 8 11 5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"-",0);
+		op->size = asm_baleful_getregs(buf,outbuf,"-",0);
 		break;
 	case 4://8 8 11 5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"*",0);
+		op->size = asm_baleful_getregs(buf,outbuf,"*",0);
 		break;
 	case 6://8 8 11 5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"^",0);
+		op->size = asm_baleful_getregs(buf,outbuf,"^",0);
 		break;
 	case 9://8 8 11 5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"&",0);
+		op->size = asm_baleful_getregs(buf,outbuf,"&",0);
 		break;
 	case 10://8 8 11 5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"|",0);
+		op->size = asm_baleful_getregs(buf,outbuf,"|",0);
 		break;
 	case 12://8 8 11 5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"<<",0);
+		op->size = asm_baleful_getregs(buf,outbuf,"<<",0);
 		break;
 	case 13://8 8 11 5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,">>",0);
+		op->size = asm_baleful_getregs(buf,outbuf,">>",0);
 		break;
 	case 5: // //9 9 12 6
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"/",1);
+		op->size = asm_baleful_getregs(buf,outbuf,"/",1);
 		break;
 	case 22: // 7 7 10 4
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"and",2);
+		op->size = asm_baleful_getregs(buf,outbuf,"and",2);
 		break;
 	case 23: // 7 7 10 4
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"cmp",2);
+		op->size = asm_baleful_getregs(buf,outbuf,"cmp",2);
 		break;
 	case 24: //7 4
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"mov",3);
+		op->size = asm_baleful_getregs(buf,outbuf,"mov",3);
 		break;
 	case 30: // 6 3
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"push",4);
+		op->size = asm_baleful_getregs(buf,outbuf,"push",4);
 		break;
 	case 15: //5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"call",5);
+		op->size = asm_baleful_getregs(buf,outbuf,"call",5);
 		break;
 	case 14: //5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"jmp",5);
+		op->size = asm_baleful_getregs(buf,outbuf,"jmp",5);
 		break;
 	case 16: //5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"jz",5);
+		op->size = asm_baleful_getregs(buf,outbuf,"jz",5);
 		break;
 	case 17: //5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"js",5);
+		op->size = asm_baleful_getregs(buf,outbuf,"js",5);
 		break;
 	case 18: //5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"jbe",5);
+		op->size = asm_baleful_getregs(buf,outbuf,"jbe",5);
 		break;
 	case 19: //5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"jg",5);
+		op->size = asm_baleful_getregs(buf,outbuf,"jg",5);
 		break;
 	case 20: //5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"jns",5);
+		op->size = asm_baleful_getregs(buf,outbuf,"jns",5);
 		break;
 	case 21: //5
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"jnz",5);
+		op->size = asm_baleful_getregs(buf,outbuf,"jnz",5);
 		break;
 	case 27: //3
 		op->size = 3;
 		r  = buf + 1;
 		r1 = buf + 2;
-		snprintf (op->buf_asm, R_ASM_BUFSIZE, "mov r_%02x,[r_%02x]",*r,*r1);
+		snprintf (outbuf, sizeof (outbuf), "mov r_%02x,[r_%02x]",*r,*r1);
 		break;
 	case 28: //3
 		r  = buf + 1;
 		r1 = buf + 2;
 		op->size = 3;
-		snprintf (op->buf_asm, R_ASM_BUFSIZE, "mov [r_%02x],r_%02x",*r,*r1);
+		snprintf (outbuf, sizeof (outbuf), "mov [r_%02x],r_%02x",*r,*r1);
 		break;
 	case 11: //3
 		op->size = 3;
-		snprintf (op->buf_asm, R_ASM_BUFSIZE, "regX= regY==0");
+		snprintf (outbuf, sizeof (outbuf), "regX= regY==0");
 		break;
 	case 7: //3
 		op->size = 3;
-		snprintf (op->buf_asm, R_ASM_BUFSIZE, "regX= NEG regY");
+		snprintf (outbuf, sizeof (outbuf), "regX= NEG regY");
 		break;
 	case 8: //3
 		op->size = 3;
-		snprintf (op->buf_asm, R_ASM_BUFSIZE, "regX= NOT regY");
+		snprintf (outbuf, sizeof (outbuf), "regX= NOT regY");
 		break;
 	case 25: //2
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"++",6);
+		op->size = asm_baleful_getregs(buf,outbuf,"++",6);
 		break;
 	case 26: //2
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"--",6);
+		op->size = asm_baleful_getregs(buf,outbuf,"--",6);
 		break;
 	case 31: //2
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"pop",6);
+		op->size = asm_baleful_getregs(buf,outbuf,"pop",6);
 		break;
 	case 32: // 2
-		op->size = asm_baleful_getregs(buf,op->buf_asm,"apicall",7);
+		op->size = asm_baleful_getregs(buf,outbuf,"apicall",7);
 		break;
 	case 1:
 		op->size = 1;
-		strcpy (op->buf_asm, "ret");
+		strcpy (outbuf, "ret");
 		break;
 	case 0:
 		op->size = 1;
-		strcpy (op->buf_asm, "nop");
+		strcpy (outbuf, "nop");
 		break;
 	case 29:
 		op->size = 1;
-		strcpy (op->buf_asm, "end virtual");
+		strcpy (outbuf, "end virtual");
 		break;
 	default:
 		op->size = 1;
-		strcpy (op->buf_asm, "nop");
+		strcpy (outbuf, "nop");
 		break;
 	}
+	r_strbuf_set (&op->buf_asm, outbuf);
 	return op->size;
 }
 

blessr2/package.json

@@ -5,7 +5,7 @@
   "main": "index.js",
   "repository": {
     "type": "git",
-    "url": "https://github.com/radare/radare2-bindings.git"
+    "url": "https://github.com/radareorg/radare2-bindings.git"
   },
   "keywords": [
     "radare",
@@ -24,7 +24,7 @@
   },
   "license": "LGPL-3.0",
   "bugs": {
-    "url": "https://github.com/radare/radare2-extras/issues"
+    "url": "https://github.com/radareorg/radare2-extras/issues"
   },
   "homepage": "http://www.radare.org",
   "devDependencies": {

bpf/Makefile

@@ -0,0 +1,31 @@
+R2_PLUGIN_PATH=$(shell r2 -hh|grep LIBR_PLUGINS|awk '{print $$2}')
+R2_INCLUDE_PATH=$(shell r2 -hh|grep INCDIR|awk '{print $$2}')
+R2_LIB_PATH=$(shell r2 -hh|grep LIBDIR|awk '{print $$2}')
+CFLAGS=-g -fPIC
+CFLAGS+=-I$(R2_INCLUDE_PATH)
+SUDO=sudo
+
+LDFLAGS=-shared -L$(R2_LIB_PATH) -lr_util -lr_parse -lr_syscall
+
+EXT_SO=$(shell r2 -hh|grep LIBEXT|awk '{print $$2}')
+
+CC_ASM=$(CC) $(CFLAGS) $(LDFLAGS) $(shell pkg-config --libs r_asm)
+CC_ANA=$(CC) $(CFLAGS) $(LDFLAGS) $(shell pkg-config --libs r_anal)
+CC_BIN=$(CC) $(CFLAGS) $(LDFLAGS) $(shell pkg-config --libs r_bin) -lr_magic
+CC_COR=$(CC) $(CFLAGS) $(LDFLAGS) $(shell pkg-config --libs r_core)
+
+all:
+	$(CC_ASM) -o asm_bpf.$(EXT_SO) asm_bpf.c
+	$(CC_ANA) -o anal_bpf.$(EXT_SO) anal_bpf.c
+	$(CC_BIN) -o bin_bpf.$(EXT_SO) bin_bpf.c
+#	$(CC_COR) -o bpf_core.$(EXT_SO) bpf_core.c
+
+install: all
+	$(SUDO) cp -f *.$(EXT_SO) $(R2_PLUGIN_PATH)
+
+uninstall:
+	for a in *.$(EXT_SO) ; do rm -f $(R2_PLUGIN_PATH)/$$a ; done
+
+clean:
+	rm -f *.$(EXT_SO)
+	rm -rf *.$(EXT_SO).dSYM

bpf/README.md

@@ -0,0 +1,54 @@
+#BPF architecture for radare2
+
+This is meant to add support for Berkeley Packet Filter in radare2, with full [ESIL](https://radare.gitbooks.io/radare2book/content/esil.html) emulation. The main purpose is to ease the analysis of existing filters encountered in reverse engineering, but can also aid filter development through ESIL emulation.
+
+## Components
+
+It is composed by three plugins:
+
+* **asm_bpf** is the disassembler, i'm planning to add also assembler functionality, but for now it's only disassembler - it is mostly ripped from bpf_dbg.c in the Linux kernel
+* **anal_bpf** this is the major contribution of this package, i.e. the analysis plugin which translates everything to ESIL and permits to emulate it completely
+* **bin_bpf** is a placeholder, not sure if it's useful at all since there isn't a specific file format - i'm using it just to remember that data is represented big endian by enforcing this information
+
+## Installing using r2pm
+
+This plugin is available in latest r2pm, therefore can be installed simply by:
+
+```
+r2pm -i bpf
+```
+
+## Building manually
+
+In unix system (tested on mac, but should work in Linux or *BSD out of the box) it should be as easy as doing:
+
+```bash
+make install
+```
+
+There are two known warnings:
+
+* be sure to have the latest [radare2 from git](https://github.com/radareorg/radare2)
+* on mac systems radare2 should be installed with sys/install.sh (and not sys/user.sh) because the Makefile relies on a properly working `pkg-config`
+
+## Example
+
+The provided [bpf.bin](bpf.bin) is ripped from the [berkeley crackme](http://crackmes.de/users/kwisatz_haderach/berkeley/), here is an example session:
+
+[![asciicast](https://asciinema.org/a/1q8oq25bjpp00aut5v5sd4sez.png)](https://asciinema.org/a/1q8oq25bjpp00aut5v5sd4sez)
+
+Moreover, i wrote an [r2pipe script](https://github.com/mrmacete/r2scripts/tree/master/bpf-test/bpftest.py) able to read a pcap file, iterate packets, and test them against the filter by using ESIL emulation.
+
+Here is a not-so-clear live action trying to explain the steps of the above python script:
+
+[![asciicast](https://asciinema.org/a/e22kxl5wncmcnqfvseq0k6dxj.png)](https://asciinema.org/a/e22kxl5wncmcnqfvseq0k6dxj)
+
+## Testing
+
+There's a [python script](https://github.com/mrmacete/r2scripts/tree/master/bpf-test/testtool.py) which parses the Linux kernel's BPF test suite and runs it on radare2's emulated BPF using r2pipe. Until now, all the test which doesn't involve kernel emulation are passing (for the CLASSIC bpf test category only).
+
+If you have collections of test cases you can disclose they're welcome, please open an issue or just PR a test script.
+
+## License
+
+Since most of asm_bpf.c is ripped from Linux kernel, it's licensed on GPLv2.

bpf/anal_bpf.c

@@ -0,0 +1,538 @@
+/*
+ *
+ * Copyright 2015 - mrmacete <[email protected]>
+ * Licensed under the GNU General Public License, version 2.0 (GPLv2)
+ */
+
+#include <string.h>
+#include <r_types.h>
+#include <r_lib.h>
+#include <r_asm.h>
+#include <r_anal.h>
+#include "bpf.h"
+
+#define EMIT_CJMP(op, addr, f)\
+	(op)->type = R_ANAL_OP_TYPE_CJMP;\
+	(op)->jump = (addr) + 8 + (st8) (f)->jt * 8;\
+	(op)->fail = (addr) + 8 + (st8) (f)->jf * 8;
+
+#define EMIT_LOAD(op, addr, size)\
+	(op)->type = R_ANAL_OP_TYPE_LOAD;\
+	(op)->ptr = (addr);\
+	(op)->ptrsize = (size);
+
+#define NEW_SRC_DST(op)\
+	(op)->src[0] = r_anal_value_new ();\
+	(op)->dst = r_anal_value_new ();
+
+#define SET_REG_SRC_DST(op, _src, _dst)\
+	NEW_SRC_DST ((op));\
+	(op)->src[0]->reg = r_reg_get (anal->reg, (_src), R_REG_TYPE_GPR);\
+	(op)->dst->reg = r_reg_get (anal->reg, (_dst), R_REG_TYPE_GPR);
+
+#define SET_REG_DST_IMM(op, _dst, _imm)\
+	NEW_SRC_DST ((op));\
+	(op)->dst->reg = r_reg_get (anal->reg, (_dst), R_REG_TYPE_GPR);\
+	(op)->src[0]->imm = (_imm);
+
+#define SET_A_SRC(op)\
+	(op)->src[0] = r_anal_value_new ();\
+	(op)->src[0]->reg = r_reg_get (anal->reg, "A", R_REG_TYPE_GPR);
+
+#define SET_A_DST(op)\
+	(op)->dst = r_anal_value_new ();\
+	(op)->dst->reg = r_reg_get (anal->reg, "A", R_REG_TYPE_GPR);
+
+#define INSIDE_M(k) ((k) >= 0 && (k) <= 16)
+
+static bool bpf_int_exit(RAnalEsil *esil, ut32 interrupt, void *user);
+RAnalEsilInterruptHandler ih = { 0, NULL, NULL, &bpf_int_exit, NULL };
+
+static const char *M[] = {
+	"M[0]",
+	"M[1]",
+	"M[2]",
+	"M[3]",
+	"M[4]",
+	"M[5]",
+	"M[6]",
+	"M[7]",
+	"M[8]",
+	"M[9]",
+	"M[10]",
+	"M[11]",
+	"M[12]",
+	"M[13]",
+	"M[14]",
+	"M[15]"
+};
+
+static int bpf_anal(RAnal *anal, RAnalOp *op, ut64 addr,
+	const ut8 *data, int len) {
+	RBpfSockFilter *f = (RBpfSockFilter *)data;
+	memset (op, '\0', sizeof (RAnalOp));
+	op->jump = UT64_MAX;
+	op->fail = UT64_MAX;
+	op->ptr = op->val = UT64_MAX;
+	op->type = R_ANAL_OP_TYPE_UNK;
+	op->size = 8;
+	op->addr = addr;
+
+	r_strbuf_init (&op->esil);
+
+	switch (f->code) {
+	case BPF_RET | BPF_A:
+		op->type = R_ANAL_OP_TYPE_RET;
+		esilprintf (op, "A,R0,=,0,$");
+		break;
+	case BPF_RET | BPF_K:
+	case BPF_RET | BPF_X:
+		op->type = R_ANAL_OP_TYPE_RET;
+		if (BPF_SRC (f->code) == BPF_K) {
+			esilprintf (op, "%" PFMT64d ",R0,=,0,$", f->k);
+		} else if (BPF_SRC (f->code) == BPF_X) {
+			esilprintf (op, "X,R0,=,0,$");
+		}
+		break;
+	case BPF_MISC_TAX:
+		op->type = R_ANAL_OP_TYPE_MOV;
+		SET_REG_SRC_DST (op, "A", "X");
+		esilprintf (op, "A,X,=");
+		break;
+	case BPF_MISC_TXA:
+		op->type = R_ANAL_OP_TYPE_MOV;
+		SET_REG_SRC_DST (op, "X", "A");
+		esilprintf (op, "X,A,=");
+		break;
+	case BPF_ST:
+		if (INSIDE_M (f->k)) {
+			op->type = R_ANAL_OP_TYPE_MOV;
+			SET_REG_SRC_DST (op, "A", M[f->k]);
+			esilprintf (op, "A,M[%" PFMT64d "],=", f->k);
+		} else {
+			op->type = R_ANAL_OP_TYPE_ILL;
+		}
+		break;
+	case BPF_STX:
+		if (INSIDE_M (f->k)) {
+			op->type = R_ANAL_OP_TYPE_MOV;
+			SET_REG_SRC_DST (op, "X", M[f->k]);
+			esilprintf (op, "X,M[%" PFMT64d "],=", f->k);
+		} else {
+			op->type = R_ANAL_OP_TYPE_ILL;
+		}
+		break;
+	case BPF_LD_W | BPF_LEN:
+		op->type = R_ANAL_OP_TYPE_MOV;
+		SET_REG_SRC_DST (op, "len", "A");
+		esilprintf (op, "len,A,=", f->k);
+		break;
+	case BPF_LDX | BPF_LEN:
+		op->type = R_ANAL_OP_TYPE_MOV;
+		SET_REG_SRC_DST (op, "len", "X");
+		esilprintf (op, "len,X,=", f->k);
+		break;
+	case BPF_LD_W | BPF_ABS:
+		EMIT_LOAD (op, anal->gp + f->k, 4);
+		SET_A_DST (op);
+		esilprintf (op,
+			"len,%" PFMT64d ",>,?{,0,R0,=,0,$,BREAK,},%" PFMT64d ",[4],A,=",
+			f->k + 4, op->ptr);
+		break;
+	case BPF_LD_H | BPF_ABS:
+		EMIT_LOAD (op, anal->gp + f->k, 2);
+		SET_A_DST (op);
+		esilprintf (op,
+			"len,%" PFMT64d ",>,?{,0,R0,=,0,$,BREAK,},"
+			"%" PFMT64d ",[2],A,=",
+			f->k + 2, op->ptr);
+		break;
+	case BPF_LD_B | BPF_ABS:
+		EMIT_LOAD (op, anal->gp + f->k, 1);
+		SET_A_DST (op);
+		esilprintf (op,
+			"len,%" PFMT64d ",>,?{,0,R0,=,0,$,BREAK,},"
+			"%" PFMT64d ",[1],A,=",
+			f->k + 1, op->ptr);
+		break;
+	case BPF_LD_W | BPF_IND:
+		op->type = R_ANAL_OP_TYPE_LOAD;
+		op->ptrsize = 4;
+		SET_A_DST (op);
+		esilprintf (op,
+			"len,%" PFMT64d ",X,+,0xffffffff,&,>,?{,0,R0,=,0,$,BREAK,},"
+			"%" PFMT64d ",X,+,0xffffffff,&,[4],A,=",
+			(st32)f->k + 4, anal->gp + (st32)f->k);
+		break;
+	case BPF_LD_H | BPF_IND:
+		op->type = R_ANAL_OP_TYPE_LOAD;
+		op->ptrsize = 2;
+		SET_A_DST (op);
+		esilprintf (op,
+			"len,%" PFMT64d ",X,+,0xffffffff,&,>,?{,0,R0,=,0,$,BREAK,},"
+			"%" PFMT64d ",X,+,0xffffffff,&,[2],A,=",
+			(st32)f->k + 2, anal->gp + (st32)f->k);
+		break;
+	case BPF_LD_B | BPF_IND:
+		op->type = R_ANAL_OP_TYPE_LOAD;
+		op->ptrsize = 1;
+		SET_A_DST (op);
+		esilprintf (op,
+			"len,%" PFMT64d ",X,+,0xffffffff,&,>,?{,0,R0,=,0,$,BREAK,},"
+			"%" PFMT64d ",X,+,0xffffffff,&,[1],A,=",
+			(st32)f->k + 1, anal->gp + (st32)f->k);
+		break;
+	case BPF_LD | BPF_IMM:
+		op->type = R_ANAL_OP_TYPE_MOV;
+		op->val = f->k;
+		SET_REG_DST_IMM (op, "A", f->k);
+		esilprintf (op, "0x%08" PFMT64x ",A,=", f->k);
+		break;
+	case BPF_LDX | BPF_IMM:
+		op->type = R_ANAL_OP_TYPE_MOV;
+		op->val = f->k;
+		SET_REG_DST_IMM (op, "X", f->k);
+		esilprintf (op, "0x%08" PFMT64x ",X,=", f->k);
+		break;
+	case BPF_LDX_B | BPF_MSH:
+		op->type = R_ANAL_OP_TYPE_LOAD;
+		op->ptrsize = 1;
+		op->ptr = anal->gp + f->k;
+		SET_A_DST (op);
+		esilprintf (op, "%" PFMT64d ",[1],0xf,&,4,*,X,=", op->ptr);
+		break;
+	case BPF_LD | BPF_MEM:
+		op->type = R_ANAL_OP_TYPE_MOV;
+		if (INSIDE_M (f->k)) {
+			SET_REG_SRC_DST (op, M[f->k], "A");
+			esilprintf (op, "M[%" PFMT64d "],A,=", f->k);
+		} else {
+			op->type = R_ANAL_OP_TYPE_ILL;
+		}
+		break;
+	case BPF_LDX | BPF_MEM:
+		op->type = R_ANAL_OP_TYPE_MOV;
+		if (INSIDE_M (f->k)) {
+			SET_REG_SRC_DST (op, M[f->k], "X");
+			esilprintf (op, "M[%" PFMT64d "],X,=", f->k);
+		} else {
+			op->type = R_ANAL_OP_TYPE_ILL;
+		}
+		break;
+	case BPF_JMP_JA:
+		op->type = R_ANAL_OP_TYPE_JMP;
+		op->jump = addr + 8 + f->k * 8;
+		esilprintf (op, "%" PFMT64d ",pc,=", op->jump);
+
+		break;
+	case BPF_JMP_JGT | BPF_X:
+	case BPF_JMP_JGT | BPF_K:
+		EMIT_CJMP (op, addr, f);
+		op->cond = R_ANAL_COND_GT;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			esilprintf (op,
+				"%" PFMT64d ",A,>,?{,%" PFMT64d ",pc,=,BREAK,},%" PFMT64d ",pc,=",
+				op->val, op->jump, op->fail);
+		} else if (BPF_SRC (f->code) == BPF_X) {
+			esilprintf (op,
+				"X,A,>,?{,%" PFMT64d ",pc,=,BREAK,},%" PFMT64d ",pc,=",
+				op->jump, op->fail);
+		} else {
+			op->type = R_ANAL_OP_TYPE_ILL;
+		}
+		break;
+	case BPF_JMP_JGE | BPF_X:
+	case BPF_JMP_JGE | BPF_K:
+		EMIT_CJMP (op, addr, f);
+		op->cond = R_ANAL_COND_GE;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			esilprintf (op,
+				"%" PFMT64d ",A,>=,?{,%" PFMT64d ",pc,=,BREAK,},%" PFMT64d ",pc,=",
+				op->val, op->jump, op->fail);
+		} else {
+			esilprintf (op,
+				"X,A,>=,?{,%" PFMT64d ",pc,=,BREAK,},%" PFMT64d ",pc,=",
+				op->jump, op->fail);
+		}
+		break;
+	case BPF_JMP_JEQ | BPF_X:
+	case BPF_JMP_JEQ | BPF_K:
+		EMIT_CJMP (op, addr, f);
+		op->cond = R_ANAL_COND_EQ;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			esilprintf (op,
+				"%" PFMT64d ",A,==,$z,?{,%" PFMT64d ",pc,=,BREAK,},%" PFMT64d ",pc,=",
+				op->val, op->jump, op->fail);
+		} else {
+			esilprintf (op,
+				"X,A,==,$z,?{,%" PFMT64d ",pc,=,BREAK,},%" PFMT64d ",pc,=",
+				op->jump, op->fail);
+		}
+		break;
+	case BPF_JMP_JSET | BPF_X:
+	case BPF_JMP_JSET | BPF_K:
+		EMIT_CJMP (op, addr, f);
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			esilprintf (op,
+				"%" PFMT64d ",A,&,?{,%" PFMT64d ",pc,=,BREAK,},%" PFMT64d ",pc,=",
+				op->val, op->jump, op->fail);
+		} else {
+			esilprintf (op,
+				"X,A,&,!,?{,%" PFMT64d ",pc,=,BREAK,},%" PFMT64d ",pc,=",
+				op->val, op->jump, op->fail);
+		}
+		break;
+	case BPF_ALU_NEG:
+		op->type = R_ANAL_OP_TYPE_NOT;
+		esilprintf (op, "A,0,-,A,=");
+		SET_REG_SRC_DST (op, "A", "A");
+		break;
+	case BPF_ALU_LSH | BPF_X:
+	case BPF_ALU_LSH | BPF_K:
+		op->type = R_ANAL_OP_TYPE_SHL;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", f->k);
+			esilprintf (op, "%" PFMT64d ",A,<<=", f->k);
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "X,A,<<=");
+		}
+		break;
+	case BPF_ALU_RSH | BPF_X:
+	case BPF_ALU_RSH | BPF_K:
+		op->type = R_ANAL_OP_TYPE_SHR;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", f->k);
+			esilprintf (op, "%" PFMT64d ",A,>>=", f->k);
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "X,A,>>=");
+		}
+		break;
+	case BPF_ALU_ADD | BPF_X:
+	case BPF_ALU_ADD | BPF_K:
+		op->type = R_ANAL_OP_TYPE_ADD;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", op->val);
+			esilprintf (op, "%" PFMT64d ",A,+=", op->val);
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "X,A,+=");
+		}
+		break;
+	case BPF_ALU_SUB | BPF_X:
+	case BPF_ALU_SUB | BPF_K:
+		op->type = R_ANAL_OP_TYPE_SUB;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", op->val);
+			esilprintf (op, "%" PFMT64d ",A,-=", op->val);
+
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "X,A,-=");
+		}
+		break;
+	case BPF_ALU_MUL | BPF_X:
+	case BPF_ALU_MUL | BPF_K:
+		op->type = R_ANAL_OP_TYPE_MUL;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", f->k);
+			esilprintf (op, "%" PFMT64d ",A,*=", f->k);
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "X,A,*=");
+		}
+		break;
+	case BPF_ALU_DIV | BPF_X:
+	case BPF_ALU_DIV | BPF_K:
+		op->type = R_ANAL_OP_TYPE_DIV;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", f->k);
+			if (f->k == 0) {
+				esilprintf (op, "0,R0,=,0,$");
+			} else {
+				esilprintf (op, "%" PFMT64d ",A,/=", f->k);
+			}
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "0,X,==,$z,?{,0,R0,=,0,$,BREAK,},X,A,/=");
+		}
+		break;
+	case BPF_ALU_MOD | BPF_X:
+	case BPF_ALU_MOD | BPF_K:
+		op->type = R_ANAL_OP_TYPE_MOD;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", f->k);
+			if (f->k == 0) {
+				esilprintf (op, "0,R0,=,0,$");
+			} else {
+				esilprintf (op, "%" PFMT64d ",A,%%=", f->k);
+			}
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "0,X,==,$z,?{,0,R0,=,0,$,BREAK,},X,A,%%=");
+		}
+		break;
+	case BPF_ALU_AND | BPF_X:
+	case BPF_ALU_AND | BPF_K:
+		op->type = R_ANAL_OP_TYPE_AND;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", f->k);
+			esilprintf (op, "%" PFMT64d ",A,&=", f->k);
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "X,A,&=");
+		}
+		break;
+	case BPF_ALU_OR | BPF_X:
+	case BPF_ALU_OR | BPF_K:
+		op->type = R_ANAL_OP_TYPE_OR;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", f->k);
+			esilprintf (op, "%" PFMT64d ",A,|=", f->k);
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "X,A,|,A,=");
+		}
+		break;
+	case BPF_ALU_XOR | BPF_X:
+	case BPF_ALU_XOR | BPF_K:
+		op->type = R_ANAL_OP_TYPE_XOR;
+		if (BPF_SRC (f->code) == BPF_K) {
+			op->val = f->k;
+			SET_REG_DST_IMM (op, "A", f->k);
+			esilprintf (op, "%" PFMT64d ",A,^=", f->k);
+		} else {
+			SET_REG_SRC_DST (op, "X", "A");
+			esilprintf (op, "X,A,^=");
+		}
+		break;
+	default:
+		op->type = R_ANAL_OP_TYPE_ILL;
+		break;
+	}
+
+	return op->size;
+}
+
+static int set_reg_profile(RAnal *anal) {
+	const char *p =
+		"=PC    pc\n"
+		"gpr    A        .32 0    0\n"
+		"gpr    X        .32 4    0\n"
+		"gpr    M[0]     .32 8    0\n"
+		"gpr    M[1]     .32 12   0\n"
+		"gpr    M[2]     .32 16   0\n"
+		"gpr    M[3]     .32 20   0\n"
+		"gpr    M[4]     .32 24   0\n"
+		"gpr    M[5]     .32 28   0\n"
+		"gpr    M[6]     .32 32   0\n"
+		"gpr    M[7]     .32 36   0\n"
+		"gpr    M[8]     .32 40   0\n"
+		"gpr    M[9]     .32 44   0\n"
+		"gpr    M[10]    .32 48   0\n"
+		"gpr    M[11]    .32 52   0\n"
+		"gpr    M[12]    .32 56   0\n"
+		"gpr    M[13]    .32 60   0\n"
+		"gpr    M[14]    .32 64   0\n"
+		"gpr    M[15]    .32 68   0\n"
+		"gpr    pc       .32 72   0\n"
+		"gpr    len      .32 76   0\n"
+		"gpr    R0       .32 80   0\n"
+		"gpr    R1       .32 84   0\n"
+		"gpr    R2       .32 88   0\n"
+		"gpr    R3       .32 92   0\n"
+		"gpr    R4       .32 96   0\n"
+		"gpr    R5       .32 100  0\n";
+	return r_reg_set_profile_string (anal->reg, p);
+}
+
+static bool bpf_int_exit(RAnalEsil *esil, ut32 interrupt, void *user) {
+	int syscall;
+	ut64 r0;
+	if (!esil || (interrupt != 0x0))
+		return false;
+	r_anal_esil_reg_read (esil, "R0", &r0, NULL);
+	if (r0 == 0) {
+		esil->anal->cb_printf ("; BPF result: DROP value: %d\n", (int)r0);
+		eprintf ("BPF result: DROP value: %d\n", (int)r0);
+	} else {
+		esil->anal->cb_printf ("; BPF result: ACCEPT value: %d\n", (int)r0);
+		eprintf ("BPF result: ACCEPT value: %d\n", (int)r0);
+	}
+	return true;
+}
+
+static int esil_bpf_init(RAnalEsil *esil) {
+	if (!esil)
+		return false;
+	RAnalEsilInterrupt *intr = r_anal_esil_interrupt_new (esil, 0, &ih);
+	r_anal_esil_set_interrupt (esil, intr);
+	return true;
+}
+
+static int esil_bpf_fini(RAnalEsil *esil) {
+	return true;
+}
+
+struct r_anal_plugin_t r_anal_plugin_bpf = {
+	.name = "bpf",
+	.desc = "Berkely packet filter analysis plugin",
+	.license = "GPLv2",
+	.arch = "bpf",
+	.bits = 32,
+	.esil = true,
+	.init = NULL,
+	.fini = NULL,
+	.reset_counter = NULL,
+	.archinfo = NULL,
+	.op = &bpf_anal,
+	.bb = NULL,
+	.fcn = NULL,
+	.analyze_fns = NULL,
+	.op_from_buffer = NULL,
+	.bb_from_buffer = NULL,
+	.fn_from_buffer = NULL,
+	.analysis_algorithm = NULL,
+	.set_reg_profile = &set_reg_profile,
+	.fingerprint_bb = NULL,
+	.fingerprint_fcn = NULL,
+	.diff_bb = NULL,
+	.diff_fcn = NULL,
+	.diff_eval = NULL,
+	.pre_anal = NULL,
+	.pre_anal_fn_cb = NULL,
+	.pre_anal_op_cb = NULL,
+	.post_anal_op_cb = NULL,
+	.pre_anal_bb_cb = NULL,
+	.post_anal_bb_cb = NULL,
+	.post_anal_fn_cb = NULL,
+	.post_anal = NULL,
+	.revisit_bb_anal = NULL,
+	.cmd_ext = NULL,
+	.esil_init = &esil_bpf_init,
+	.esil_post_loop = NULL,
+	.esil_trap = NULL,
+	.esil_fini = &esil_bpf_fini
+};
+
+#ifndef CORELIB
+struct r_lib_struct_t radare_plugin = {
+	.type = R_LIB_TYPE_ANAL,
+	.data = &r_anal_plugin_bpf,
+	.version = R2_VERSION
+};
+#endif

bpf/asm_bpf.c

@@ -0,0 +1,767 @@
+/*
+ * Most of this is copied and pasted from linux source (except
+ * for the assembler part).
+ *
+ * Copyright 2015 - mrmacete <[email protected]>
+ * Licensed under the GNU General Public License, version 2.0 (GPLv2)
+ */
+
+#include <r_types.h>
+#include <r_util.h>
+#include <r_lib.h>
+#include <r_asm.h>
+#include "bpf.h"
+
+static int disassemble(RAsm *a, RAsmOp *r_op, const ut8 *buf, int len) {
+	const char *op, *fmt;
+	RBpfSockFilter *f = (RBpfSockFilter *)buf;
+	int val = f->k;
+	char vbuf[256];
+
+	switch (f->code) {
+	case BPF_RET | BPF_K:
+		op = r_bpf_op_table[BPF_RET];
+		fmt = "%#x";
+		break;
+	case BPF_RET | BPF_A:
+		op = r_bpf_op_table[BPF_RET];
+		fmt = "a";
+		break;
+	case BPF_RET | BPF_X:
+		op = r_bpf_op_table[BPF_RET];
+		fmt = "x";
+		break;
+	case BPF_MISC_TAX:
+		op = r_bpf_op_table[BPF_MISC_TAX];
+		fmt = "";
+		break;
+	case BPF_MISC_TXA:
+		op = r_bpf_op_table[BPF_MISC_TXA];
+		fmt = "";
+		break;
+	case BPF_ST:
+		op = r_bpf_op_table[BPF_ST];
+		fmt = "M[%d]";
+		break;
+	case BPF_STX:
+		op = r_bpf_op_table[BPF_STX];
+		fmt = "M[%d]";
+		break;
+	case BPF_LD_W | BPF_ABS:
+		op = r_bpf_op_table[BPF_LD_W];
+		fmt = "[%d]";
+		break;
+	case BPF_LD_H | BPF_ABS:
+		op = r_bpf_op_table[BPF_LD_H];
+		fmt = "[%d]";
+		break;
+	case BPF_LD_B | BPF_ABS:
+		op = r_bpf_op_table[BPF_LD_B];
+		fmt = "[%d]";
+		break;
+	case BPF_LD_W | BPF_LEN:
+		op = r_bpf_op_table[BPF_LD_W];
+		fmt = "len";
+		break;
+	case BPF_LD_W | BPF_IND:
+		op = r_bpf_op_table[BPF_LD_W];
+		fmt = "[x+%d]";
+		break;
+	case BPF_LD_H | BPF_IND:
+		op = r_bpf_op_table[BPF_LD_H];
+		fmt = "[x+%d]";
+		break;
+	case BPF_LD_B | BPF_IND:
+		op = r_bpf_op_table[BPF_LD_B];
+		fmt = "[x+%d]";
+		break;
+	case BPF_LD | BPF_IMM:
+		op = r_bpf_op_table[BPF_LD_W];
+		fmt = "%#x";
+		break;
+	case BPF_LDX | BPF_IMM:
+		op = r_bpf_op_table[BPF_LDX];
+		fmt = "%#x";
+		break;
+	case BPF_LDX | BPF_LEN:
+		op = r_bpf_op_table[BPF_LDX];
+		fmt = "len";
+		break;
+	case BPF_LDX | BPF_ABS:
+		op = r_bpf_op_table[BPF_LDX];
+		fmt = "[%d]";
+		break;
+	case BPF_LDX_B | BPF_MSH:
+		op = r_bpf_op_table[BPF_LDX_B];
+		fmt = "4*([%d]&0xf)";
+		break;
+	case BPF_LD | BPF_MEM:
+		op = r_bpf_op_table[BPF_LD_W];
+		fmt = "M[%d]";
+		break;
+	case BPF_LDX | BPF_MEM:
+		op = r_bpf_op_table[BPF_LDX];
+		fmt = "M[%d]";
+		break;
+	case BPF_JMP_JA:
+		op = r_bpf_op_table[BPF_JMP_JA];
+		fmt = "%d";
+		val = a->pc + 8 + f->k * 8;
+		break;
+	case BPF_JMP_JGT | BPF_X:
+		op = r_bpf_op_table[BPF_JMP_JGT];
+		fmt = "x";
+		break;
+	case BPF_JMP_JGT | BPF_K:
+		op = r_bpf_op_table[BPF_JMP_JGT];
+		fmt = "%#x";
+		break;
+	case BPF_JMP_JGE | BPF_X:
+		op = r_bpf_op_table[BPF_JMP_JGE];
+		fmt = "x";
+		break;
+	case BPF_JMP_JGE | BPF_K:
+		op = r_bpf_op_table[BPF_JMP_JGE];
+		fmt = "%#x";
+		break;
+	case BPF_JMP_JEQ | BPF_X:
+		op = r_bpf_op_table[BPF_JMP_JEQ];
+		fmt = "x";
+		break;
+	case BPF_JMP_JEQ | BPF_K:
+		op = r_bpf_op_table[BPF_JMP_JEQ];
+		fmt = "%#x";
+		break;
+	case BPF_JMP_JSET | BPF_X:
+		op = r_bpf_op_table[BPF_JMP_JSET];
+		fmt = "x";
+		break;
+	case BPF_JMP_JSET | BPF_K:
+		op = r_bpf_op_table[BPF_JMP_JSET];
+		fmt = "%#x";
+		break;
+	case BPF_ALU_NEG:
+		op = r_bpf_op_table[BPF_ALU_NEG];
+		fmt = "";
+		break;
+	case BPF_ALU_LSH | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_LSH];
+		fmt = "x";
+		break;
+	case BPF_ALU_LSH | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_LSH];
+		fmt = "%d";
+		break;
+	case BPF_ALU_RSH | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_RSH];
+		fmt = "x";
+		break;
+	case BPF_ALU_RSH | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_RSH];
+		fmt = "%d";
+		break;
+	case BPF_ALU_ADD | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_ADD];
+		fmt = "x";
+		break;
+	case BPF_ALU_ADD | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_ADD];
+		fmt = "%d";
+		break;
+	case BPF_ALU_SUB | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_SUB];
+		fmt = "x";
+		break;
+	case BPF_ALU_SUB | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_SUB];
+		fmt = "%d";
+		break;
+	case BPF_ALU_MUL | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_MUL];
+		fmt = "x";
+		break;
+	case BPF_ALU_MUL | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_MUL];
+		fmt = "%d";
+		break;
+	case BPF_ALU_DIV | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_DIV];
+		fmt = "x";
+		break;
+	case BPF_ALU_DIV | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_DIV];
+		fmt = "%d";
+		break;
+	case BPF_ALU_MOD | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_MOD];
+		fmt = "x";
+		break;
+	case BPF_ALU_MOD | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_MOD];
+		fmt = "%d";
+		break;
+	case BPF_ALU_AND | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_AND];
+		fmt = "x";
+		break;
+	case BPF_ALU_AND | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_AND];
+		fmt = "%#x";
+		break;
+	case BPF_ALU_OR | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_OR];
+		fmt = "x";
+		break;
+	case BPF_ALU_OR | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_OR];
+		fmt = "%#x";
+		break;
+	case BPF_ALU_XOR | BPF_X:
+		op = r_bpf_op_table[BPF_ALU_XOR];
+		fmt = "x";
+		break;
+	case BPF_ALU_XOR | BPF_K:
+		op = r_bpf_op_table[BPF_ALU_XOR];
+		fmt = "%#x";
+		break;
+	default:
+		op = "invalid";
+		fmt = "%#x";
+		val = f->code;
+		break;
+	}
+
+	memset (vbuf, 0, sizeof (vbuf));
+	snprintf (vbuf, sizeof (vbuf), fmt, val);
+	vbuf[sizeof (vbuf) - 1] = 0;
+
+	if ((BPF_CLASS (f->code) == BPF_JMP && BPF_OP (f->code) != BPF_JA))
+		r_strbuf_setf (&r_op->buf_asm, "%s %s, 0x%08" PFMT64x ", 0x%08" PFMT64x "", op, vbuf,
+			a->pc + 8 + f->jt * 8, a->pc + 8 + f->jf * 8);
+	else r_strbuf_setf (&r_op->buf_asm, "%s %s", op, vbuf);
+
+	return r_op->size = 8;
+}
+
+/* start of ASSEMBLER code */
+
+#define PARSER_MAX_TOKENS 4
+
+#define COPY_AND_RET(a, b)\
+	r_strbuf_setbin (&a, (const ut8 *)b, sizeof (*b) + 1);\
+	return 0;
+
+#define PARSE_FAILURE(message, arg...)\
+	{\
+		eprintf ("PARSE FAILURE: " message "\n", ##arg);\
+		return -1;\
+	}
+
+#define CMP4(tok, n, x, y, z, w)\
+	(tok[n][0] == x && tok[n][1] == y && tok[n][2] == z && tok[n][3] == w)
+
+#define CMP3(tok, n, x, y, z)\
+	(tok[n][0] == x && tok[n][1] == y && tok[n][2] == z)
+
+#define CMP2(tok, n, x, y)\
+	(tok[n][0] == x && tok[n][1] == y)
+
+#define IS_K_TOK(tok, n)\
+	(tok[n][0] == '-' || R_BETWEEN ('0', tok[n][0], '9'))
+
+#define IS_LEN(tok, n)\
+	CMP4 (tok, n, 'l', 'e', 'n', '\0')
+
+#define PARSE_K_OR_FAIL(dst, tok, n)\
+	dst = strtol (&tok[n][0], &end, 0);\
+	if (*end != '\0' && *end != ',')\
+		PARSE_FAILURE ("could not parse k");
+
+#define PARSE_LABEL_OR_FAIL(dst, tok, n)\
+	dst = strtoul (&tok[n][0], &end, 0);\
+	if (*end != '\0' && *end != ',') {\
+		return -1;\
+	}
+
+#define PARSE_OFFSET_OR_FAIL(dst, tok, n, off)\
+	dst = strtoul (&tok[n][off], &end, 10);\
+	if (*end != ']')\
+		PARSE_FAILURE ("could not parse offset value");
+
+#define PARSE_IND_ABS_OR_FAIL(f, tok, n)\
+	if (CMP3 (tok, 1, '[', 'x', '+')) {\
+		f->code = f->code | BPF_IND;\
+		PARSE_OFFSET_OR_FAIL (f->k, tok, 1, 3);\
+		return 0;\
+	} else if (tok[1][0] == '[') {\
+		f->code = f->code | BPF_ABS;\
+		PARSE_OFFSET_OR_FAIL (f->k, tok, 1, 1);\
+		return 0;\
+	}\
+	PARSE_FAILURE ("could not parse addressing mode");
+
+#define PARSE_K_OR_X_OR_FAIL(f, tok)\
+	if (IS_K_TOK (tok, 1)) {\
+		PARSE_K_OR_FAIL (f->k, tok, 1);\
+		f->code = f->code | BPF_K;\
+	} else if (tok[1][0] == 'x' && (tok[1][1] == '\0' || tok[1][1] == ',')) {\
+		f->code = f->code | BPF_X;\
+	} else {\
+		PARSE_FAILURE ("could not parse k or x: %s", tok[1]);\
+	}
+
+#define PARSE_A_OR_X_OR_FAIL(f, tok)\
+	if (tok[1][0] == 'x' && (tok[1][1] == '\0' || tok[1][1] == ',')) {\
+		f->code = f->code | BPF_X;\
+	} else if (tok[1][0] == 'a' && (tok[1][1] == '\0' || tok[1][1] == ',')) {\
+		f->code = f->code | BPF_A;\
+	} else {\
+		PARSE_FAILURE ("could not parse a or x");\
+	}
+
+#define PARSE_JUMP_TARGETS(a, f, tok, count)\
+	PARSE_K_OR_X_OR_FAIL (f, tok);\
+	if (count >= 3) {\
+		PARSE_LABEL_OR_FAIL (label, tok, 2);\
+		f->jt = (st64) (label - a->pc - 8) / 8;\
+		f->jf = (a->pc >> 3) + 1;\
+	}\
+	if (count == 4) {\
+		PARSE_LABEL_OR_FAIL (label, tok, 3);\
+		f->jf = (st64) (label - a->pc - 8) / 8;\
+	}
+
+#define SWAP_JUMP_TARGETS(f)\
+	temp = f->jt;\
+	f->jt = f->jf;\
+	f->jf = temp;
+
+#define ENFORCE_COUNT(count, n)\
+	if (count != n)\
+		PARSE_FAILURE ("invalid argument count, try to omit '#'");
+
+#define ENFORCE_COUNT_GE(count, n)\
+	if (count < n)\
+		PARSE_FAILURE ("invalid argument count, try to omit '#'");
+
+static int assemble_ld(RAsm *a, RAsmOp *op,
+	char *tok[PARSER_MAX_TOKENS], int count, RBpfSockFilter *f) {
+	char *end;
+
+	switch (tok[0][2]) {
+	case '\0':
+		if (CMP2 (tok, 1, 'm', '[')) {
+			f->code = BPF_LD | BPF_MEM;
+			PARSE_OFFSET_OR_FAIL (f->k, tok, 1, 2);
+		} else if (IS_K_TOK (tok, 1)) {
+			f->code = BPF_LD | BPF_IMM;
+			PARSE_K_OR_FAIL (f->k, tok, 1);
+		} else if (IS_LEN (tok, 1)) {
+			f->code = BPF_LD | BPF_LEN;
+		} else {
+			f->code = BPF_LD_W;
+			PARSE_IND_ABS_OR_FAIL (f, tok, 1);
+		}
+		break;
+	case 'i':
+		if (IS_K_TOK (tok, 1)) {
+			f->code = BPF_LD | BPF_IMM;
+			PARSE_K_OR_FAIL (f->k, tok, 1);
+		} else {
+			PARSE_FAILURE ("ldi without k");
+		}
+		break;
+	case 'b':
+		f->code = BPF_LD_B;
+		PARSE_IND_ABS_OR_FAIL (f, tok, 1);
+		break;
+	case 'h':
+		f->code = BPF_LD_H;
+		PARSE_IND_ABS_OR_FAIL (f, tok, 1);
+		break;
+	case 'x':
+		switch (tok[0][3]) {
+		case '\0':
+			if (CMP2 (tok, 1, 'm', '[')) {
+				f->code = BPF_LDX | BPF_MEM;
+				PARSE_OFFSET_OR_FAIL (f->k, tok, 1, 2);
+			} else if (IS_K_TOK (tok, 1)) {
+				f->code = BPF_LDX | BPF_IMM;
+				PARSE_K_OR_FAIL (f->k, tok, 1);
+			} else if (IS_LEN (tok, 1)) {
+				f->code = BPF_LDX | BPF_LEN;
+			} else {
+				f->code = BPF_LDX_W;
+				PARSE_IND_ABS_OR_FAIL (f, tok, 1);
+			}
+			break;
+		case 'i':
+			if (IS_K_TOK (tok, 1)) {
+				f->code = BPF_LDX | BPF_IMM;
+				PARSE_K_OR_FAIL (f->k, tok, 1);
+			} else {
+				PARSE_FAILURE ("ldxi without k");
+			}
+			break;
+		case 'b':
+			f->code = BPF_LDX_B | BPF_MSH;
+			if (sscanf (tok[1], "4*([%d]&0xf)", &f->k) != 1) {
+				PARSE_FAILURE ("invalid nibble addressing");
+			}
+			break;
+		}
+		break;
+	default:
+		PARSE_FAILURE ("unsupported load instruction");
+	}
+
+	return 0;
+}
+
+static int assemble_j(RAsm *a, RAsmOp *op, char *tok[PARSER_MAX_TOKENS],
+	int count, RBpfSockFilter *f) {
+	int label;
+	ut8 temp;
+	char *end;
+
+	if (CMP4 (tok, 0, 'j', 'm', 'p', '\0') ||
+		CMP3 (tok, 0, 'j', 'a', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_JMP_JA;
+		PARSE_LABEL_OR_FAIL (f->k, tok, 1);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'j', 'n', 'e', '\0') ||
+		CMP4 (tok, 0, 'j', 'n', 'e', 'q')) {
+		ENFORCE_COUNT_GE (count, 3);
+		f->code = BPF_JMP_JEQ;
+		PARSE_JUMP_TARGETS (a, f, tok, count);
+		SWAP_JUMP_TARGETS (f);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'j', 'e', 'q', '\0')) {
+		ENFORCE_COUNT_GE (count, 3);
+		f->code = BPF_JMP_JEQ;
+		PARSE_JUMP_TARGETS (a, f, tok, count);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'j', 'l', 't', '\0')) {
+		ENFORCE_COUNT_GE (count, 3);
+		f->code = BPF_JMP_JGE;
+		PARSE_JUMP_TARGETS (a, f, tok, count);
+		SWAP_JUMP_TARGETS (f);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'j', 'l', 'e', '\0')) {
+		ENFORCE_COUNT_GE (count, 3);
+		f->code = BPF_JMP_JGT;
+		PARSE_JUMP_TARGETS (a, f, tok, count);
+		SWAP_JUMP_TARGETS (f);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'j', 'g', 't', '\0')) {
+		ENFORCE_COUNT_GE (count, 3);
+		f->code = BPF_JMP_JGT;
+		PARSE_JUMP_TARGETS (a, f, tok, count);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'j', 'g', 'e', '\0')) {
+		ENFORCE_COUNT_GE (count, 3);
+		f->code = BPF_JMP_JGE;
+		PARSE_JUMP_TARGETS (a, f, tok, count);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'j', 's', 'e', 't')) {
+		ENFORCE_COUNT_GE (count, 3);
+		f->code = BPF_JMP_JSET;
+		PARSE_JUMP_TARGETS (a, f, tok, count);
+		return 0;
+	}
+
+	return -1;
+}
+
+static int assemble_alu(RAsm *a, RAsmOp *op, char *tok[PARSER_MAX_TOKENS],
+	int count, RBpfSockFilter *f) {
+	char *end;
+
+	if (CMP4 (tok, 0, 'a', 'd', 'd', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_ADD;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 's', 'u', 'b', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_SUB;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'm', 'u', 'l', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_MUL;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'd', 'i', 'v', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_DIV;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'm', 'o', 'd', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_MOD;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'n', 'e', 'g', '\0')) {
+		ENFORCE_COUNT (count, 1);
+		f->code = BPF_ALU_NEG;
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'a', 'n', 'd', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_AND;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP3 (tok, 0, 'o', 'r', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_OR;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'x', 'o', 'r', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_XOR;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'l', 's', 'h', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_LSH;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	if (CMP4 (tok, 0, 'r', 's', 'h', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		f->code = BPF_ALU_RSH;
+		PARSE_K_OR_X_OR_FAIL (f, tok);
+		return 0;
+	}
+
+	return -1;
+}
+
+static int assemble_tok(RAsm *a, RAsmOp *op,
+	char *tok[PARSER_MAX_TOKENS], int count) {
+	char *end;
+	int oplen = 0;
+	RBpfSockFilter f = { 0, 0, 0, 0 };
+	oplen = strnlen (tok[0], 5);
+
+	if (oplen < 2 || oplen > 4) {
+		PARSE_FAILURE ("mnemonic length not valid");
+	}
+
+	if (CMP4 (tok, 0, 't', 'x', 'a', '\0')) {
+		ENFORCE_COUNT (count, 1);
+		f.code = BPF_MISC_TXA;
+		COPY_AND_RET (op->buf, &f);
+	}
+
+	if (CMP4 (tok, 0, 't', 'a', 'x', '\0')) {
+		ENFORCE_COUNT (count, 1);
+		f.code = BPF_MISC_TAX;
+		COPY_AND_RET (op->buf, &f);
+	}
+
+	if (CMP4 (tok, 0, 'r', 'e', 't', '\0')) {
+		ENFORCE_COUNT (count, 2);
+		if (IS_K_TOK (tok, 1)) {
+			f.code = BPF_RET | BPF_K;
+			PARSE_K_OR_FAIL (f.k, tok, 1);
+		} else if (tok[1][0] == 'x') {
+			f.code = BPF_RET | BPF_X;
+		} else if (tok[1][0] == 'a') {
+			f.code = BPF_RET | BPF_A;
+		} else {
+			PARSE_FAILURE ("unsupported ret instruction");
+		}
+		COPY_AND_RET (op->buf, &f);
+	}
+
+	if (CMP2 (tok, 0, 'l', 'd')) {
+		ENFORCE_COUNT (count, 2);
+		if (assemble_ld (a, op, tok, count, &f) == 0) {
+			COPY_AND_RET (op->buf, &f);
+		} else {
+			return -1;
+		}
+	}
+
+	if (CMP2 (tok, 0, 's', 't')) {
+		ENFORCE_COUNT (count, 2);
+		if (tok[0][2] == '\0') {
+			f.code = BPF_ST;
+		} else if (tok[0][2] == 'x') {
+			f.code = BPF_STX;
+		}
+
+		if (CMP2 (tok, 1, 'm', '[')) {
+			PARSE_OFFSET_OR_FAIL (f.k, tok, 1, 2);
+			if (f.k > 15) {
+				PARSE_FAILURE ("mem addressing out of bounds");
+			}
+			COPY_AND_RET (op->buf, &f);
+		} else {
+			PARSE_FAILURE ("invalid store addressing");
+		}
+	}
+
+	if (tok[0][0] == 'j') {
+		if (assemble_j (a, op, tok, count, &f) == 0) {
+			COPY_AND_RET (op->buf, &f);
+		} else {
+			return -1;
+		}
+	}
+
+	if (assemble_alu (a, op, tok, count, &f) == 0) {
+		COPY_AND_RET (op->buf, &f);
+	} else {
+		return -1;
+	}
+}
+
+static void lower_op(char *c) {
+	if ((c[0] <= 'Z') && (c[0] >= 'A')) {
+		c[0] += 0x20;
+	}
+}
+#define R_TRUE 1
+static void normalize(RStrBuf *buf) {
+	int i;
+	char *buf_asm;
+	if (!buf)
+		return;
+	buf_asm = r_strbuf_get (buf);
+
+	/* this normalization step is largely sub-optimal */
+
+	i = strlen (buf_asm);
+	while (strstr (buf_asm, "  ")) {
+		r_str_replace_in (buf_asm, (ut32)i, "  ", " ", R_TRUE);
+	}
+	r_str_replace_in (buf_asm, (ut32)i, " ,", ",", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, "[ ", "[", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, " ]", "]", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, "( ", "(", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, " )", ")", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, "+ ", "+", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, " +", "+", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, "* ", "*", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, " *", "*", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, "& ", "&", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, " &", "&", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, "%", "", R_TRUE);
+	r_str_replace_in (buf_asm, (ut32)i, "#", "", R_TRUE);
+	r_str_do_until_token (lower_op, buf_asm, '\0');
+	r_strbuf_set (buf, buf_asm);
+}
+
+static int assemble(RAsm *a, RAsmOp *op, const char *buf) {
+	char *tok[PARSER_MAX_TOKENS];
+	char tmp[128];
+	int i, j, l;
+	const char *p = NULL;
+	if (!a || !op || !buf) {
+		return 0;
+	}
+
+	r_strbuf_set (&op->buf_asm, buf);
+	normalize (&op->buf_asm);
+
+	// tokenization, copied from profile.c
+	j = 0;
+	p = r_strbuf_get (&op->buf_asm);
+
+	// For every word
+	while (*p) {
+		// Skip the whitespace
+		while (*p == ' ' || *p == '\t') {
+			p++;
+		}
+		// Skip the rest of the line is a comment is encountered
+		if (*p == ';') {
+			while (*p != '\0') {
+				p++;
+			}
+		}
+		// EOL ?
+		if (*p == '\0') {
+			break;
+		}
+		// Gather a handful of chars
+		// Use isgraph instead of isprint because the latter considers ' ' printable
+		for (i = 0; isgraph ((const unsigned char)*p) && i < sizeof (tmp) - 1;) {
+			tmp[i++] = *p++;
+		}
+		tmp[i] = '\0';
+		// Limit the number of tokens
+		if (j > PARSER_MAX_TOKENS - 1) {
+			break;
+		}
+		// Save the token
+		tok[j++] = strdup (tmp);
+	}
+
+	if (j) {
+		if (assemble_tok (a, op, tok, j) < 0) {
+			return -1;
+		}
+
+		// Clean up
+		for (i = 0; i < j; i++) {
+			free (tok[i]);
+		}
+	}
+
+	return op->size = 8;
+}
+
+RAsmPlugin r_asm_plugin_bpf = {
+	.name = "bpf",
+	.desc = "Berkeley Packet Filter disassembler",
+	.license = "GPLv2",
+	.arch = "bpf",
+	.bits = 32,
+	.disassemble = &disassemble,
+	.assemble = &assemble
+};
+
+#ifndef CORELIB
+struct r_lib_struct_t radare_plugin = {
+	.type = R_LIB_TYPE_ASM,
+	.data = &r_asm_plugin_bpf,
+	.version = R2_VERSION
+};
+#endif

bpf/bin_bpf.c

@@ -0,0 +1,98 @@
+/* LGPL3 - Copyright 2015 - mrmacete */
+/* it's a blatant copy of "any" bin plugin from radare, big_endian = 1 */
+
+#include <r_types.h>
+#include <r_util.h>
+#include <r_lib.h>
+#include <r_bin.h>
+#include <r_magic.h>
+
+static char *get_filetype(RBinFile *arch) {
+	ut8 buf[4096] = { 0 };
+	char *res = NULL;
+	RMagic *ck;
+	if (!arch)
+		return NULL;
+	ck = r_magic_new (0);
+	if (ck && arch && arch->buf) {
+		const char *tmp = NULL;
+		r_magic_load (ck, R2_SDB_MAGIC);
+		r_buf_read_at (arch->buf, 0, buf, sizeof (buf));
+		tmp = r_magic_buffer (ck, buf, sizeof (buf));
+		if (tmp)
+			res = strdup (tmp);
+	}
+	r_magic_free (ck);
+	return res;
+}
+
+static RBinInfo *info(RBinFile *arch) {
+	RBinInfo *ret = R_NEW0 (RBinInfo);
+	if (!ret)
+		return NULL;
+	ret->lang = "";
+	ret->file = arch->file ? strdup (arch->file) : NULL;
+	ret->type = get_filetype (arch);
+	ret->has_pi = 0;
+	ret->has_canary = 0;
+	if (R_SYS_BITS & R_SYS_BITS_64) {
+		ret->bits = 64;
+	} else {
+		ret->bits = 32;
+	}
+	ret->big_endian = 1;
+	ret->has_va = 0;
+	ret->has_nx = 0;
+	ret->dbg_info = 0;
+	ret->dbg_info = 0;
+	ret->dbg_info = 0;
+	return ret;
+}
+
+static bool load(RBinFile *arch) {
+	return true;
+}
+
+static int destroy(RBinFile *arch) {
+	return true;
+}
+
+static ut64 baddr(RBinFile *arch) {
+	return 0LL;
+}
+
+struct r_bin_plugin_t r_bin_plugin_bpf = {
+	.name = "bpf",
+	.desc = "Berkeley Packet Filter - raw binary",
+	.license = "LGPL3",
+	.init = NULL,
+	.fini = NULL,
+	.get_sdb = NULL,
+	.load = &load,
+	.load_bytes = NULL,
+	.destroy = &destroy,
+	.baddr = &baddr,
+	.boffset = NULL,
+	.binsym = NULL,
+	.entries = NULL,
+	.sections = NULL,
+	.symbols = NULL,
+	.imports = NULL,
+	.strings = NULL,
+	.info = info,
+	.fields = NULL,
+	.libs = NULL,
+	.relocs = NULL,
+	.dbginfo = NULL,
+	.create = NULL,
+	.write = NULL,
+	.minstrlen = 0,
+};
+
+#ifndef CORELIB
+struct r_lib_struct_t radare_plugin = {
+	.type = R_LIB_TYPE_BIN,
+	.data = &r_bin_plugin_bpf,
+	.version = R2_VERSION
+};
+#endif

bpf/bpf.h

@@ -0,0 +1,82 @@
+/*
+ * Most of this is copied and pasted from linux kernel source
+ *
+ * Copyright 2015 - mrmacete <[email protected]>
+ * Licensed under the GNU General Public License, version 2.0 (GPLv2)
+ */
+
+#ifndef _BPF_H_
+#define _BPF_H_
+
+#include "bpf_common.h"
+
+/* defines ripped from linux/filter.h : */
+
+#define         BPF_A           0x10
+#define         BPF_TAX         0x00
+#define         BPF_TXA         0x80
+
+/*  defines ripped from bpf_dbg.c : */
+
+#define BPF_LDX_B	(BPF_LDX | BPF_B)
+#define BPF_LDX_W	(BPF_LDX | BPF_W)
+#define BPF_JMP_JA	(BPF_JMP | BPF_JA)
+#define BPF_JMP_JEQ	(BPF_JMP | BPF_JEQ)
+#define BPF_JMP_JGT	(BPF_JMP | BPF_JGT)
+#define BPF_JMP_JGE	(BPF_JMP | BPF_JGE)
+#define BPF_JMP_JSET	(BPF_JMP | BPF_JSET)
+#define BPF_ALU_ADD	(BPF_ALU | BPF_ADD)
+#define BPF_ALU_SUB	(BPF_ALU | BPF_SUB)
+#define BPF_ALU_MUL	(BPF_ALU | BPF_MUL)
+#define BPF_ALU_DIV	(BPF_ALU | BPF_DIV)
+#define BPF_ALU_MOD	(BPF_ALU | BPF_MOD)
+#define BPF_ALU_NEG	(BPF_ALU | BPF_NEG)
+#define BPF_ALU_AND	(BPF_ALU | BPF_AND)
+#define BPF_ALU_OR	(BPF_ALU | BPF_OR)
+#define BPF_ALU_XOR	(BPF_ALU | BPF_XOR)
+#define BPF_ALU_LSH	(BPF_ALU | BPF_LSH)
+#define BPF_ALU_RSH	(BPF_ALU | BPF_RSH)
+#define BPF_MISC_TAX	(BPF_MISC | BPF_TAX)
+#define BPF_MISC_TXA	(BPF_MISC | BPF_TXA)
+#define BPF_LD_B	(BPF_LD | BPF_B)
+#define BPF_LD_H	(BPF_LD | BPF_H)
+#define BPF_LD_W	(BPF_LD | BPF_W)
+
+static const char * const r_bpf_op_table[] = {
+	[BPF_ST]	= "st",
+	[BPF_STX]	= "stx",
+	[BPF_LD_B]	= "ldb",
+	[BPF_LD_H]	= "ldh",
+	[BPF_LD_W]	= "ld",
+	[BPF_LDX]	= "ldx",
+	[BPF_LDX_B]	= "ldxb",
+	[BPF_JMP_JA]	= "ja",
+	[BPF_JMP_JEQ]	= "jeq",
+	[BPF_JMP_JGT]	= "jgt",
+	[BPF_JMP_JGE]	= "jge",
+	[BPF_JMP_JSET]	= "jset",
+	[BPF_ALU_ADD]	= "add",
+	[BPF_ALU_SUB]	= "sub",
+	[BPF_ALU_MUL]	= "mul",
+	[BPF_ALU_DIV]	= "div",
+	[BPF_ALU_MOD]	= "mod",
+	[BPF_ALU_NEG]	= "neg",
+	[BPF_ALU_AND]	= "and",
+	[BPF_ALU_OR]	= "or",
+	[BPF_ALU_XOR]	= "xor",
+	[BPF_ALU_LSH]	= "lsh",
+	[BPF_ALU_RSH]	= "rsh",
+	[BPF_MISC_TAX]	= "tax",
+	[BPF_MISC_TXA]	= "txa",
+	[BPF_RET]	= "ret",
+};
+
+
+typedef struct r_bpf_sock_filter {	/* Filter block */
+	ut16 	code;   /* Actual filter code */
+	st8		jt;	/* Jump true */
+	st8		jf;	/* Jump false */
+	ut32	k;      /* Generic multiuse field */
+} RBpfSockFilter;
+
+#endif

bpf/bpf_common.h

@@ -0,0 +1,60 @@
+/*
+ * this file is directly copied from linux source
+ * Licensed under the GNU General Public License, version 2.0 (GPLv2)
+ */
+
+#ifndef _UAPI__LINUX_BPF_COMMON_H__
+#define _UAPI__LINUX_BPF_COMMON_H__
+
+/* Instruction classes */
+#define BPF_CLASS(code) ((code) & 0x07)
+#define		BPF_LD		0x00
+#define		BPF_LDX		0x01
+#define		BPF_ST		0x02
+#define		BPF_STX		0x03
+#define		BPF_ALU		0x04
+#define		BPF_JMP		0x05
+#define		BPF_RET		0x06
+#define		BPF_MISC        0x07
+
+/* ld/ldx fields */
+#define BPF_SIZE(code)  ((code) & 0x18)
+#define		BPF_W		0x00
+#define		BPF_H		0x08
+#define		BPF_B		0x10
+#define BPF_MODE(code)  ((code) & 0xe0)
+#define		BPF_IMM		0x00
+#define		BPF_ABS		0x20
+#define		BPF_IND		0x40
+#define		BPF_MEM		0x60
+#define		BPF_LEN		0x80
+#define		BPF_MSH		0xa0
+
+/* alu/jmp fields */
+#define BPF_OP(code)    ((code) & 0xf0)
+#define		BPF_ADD		0x00
+#define		BPF_SUB		0x10
+#define		BPF_MUL		0x20
+#define		BPF_DIV		0x30
+#define		BPF_OR		0x40
+#define		BPF_AND		0x50
+#define		BPF_LSH		0x60
+#define		BPF_RSH		0x70
+#define		BPF_NEG		0x80
+#define		BPF_MOD		0x90
+#define		BPF_XOR		0xa0
+
+#define		BPF_JA		0x00
+#define		BPF_JEQ		0x10
+#define		BPF_JGT		0x20
+#define		BPF_JGE		0x30
+#define		BPF_JSET        0x40
+#define BPF_SRC(code)   ((code) & 0x08)
+#define		BPF_K		0x00
+#define		BPF_X		0x08
+
+#ifndef BPF_MAXINSNS
+#define BPF_MAXINSNS 4096
+#endif
+
+#endif /* _UAPI__LINUX_BPF_COMMON_H__ */

checkm8/README.md

@@ -0,0 +1,11 @@
+This is the r2 plugin to read/write memory using the checkm8 exploit.
+
+1. Clone https://github.com/axi0mX/ipwndfu
+2. Copy this file into the root directory of this repository
+3. r2 -I r2io.py ipwndfu://
+4. enjoy
+
+NOTES
+
+* This is very unstable, reading on unallocated regions results in device reboot
+* Requires python3 .. so maybe better use @geohot's fork

checkm8/r2io.py

@@ -0,0 +1,65 @@
+# iOS pwndfu checkm8 io plugin for radare2
+# ========================================
+#
+#  -- pancake @ nopcode.org
+#
+# Usage:
+#   r2 -I test-py-io.py pwndfu://
+#
+# The r2lang.plugin function exposes a way to register new plugins
+# into the RCore instance. This API is only available from RLang.
+# You must call with with '#!python test.py' or 'r2 -i test.py ..'
+
+import r2lang
+from dfuexec import *
+
+FAKESIZE = 512
+
+device = None
+
+def pyio(a):
+	def _open(path, rw, perm):
+		global device
+		device = dfu.acquire_device()
+		serial_number = device.serial_number
+		dfu.release_device(device)
+		device = PwnedDFUDevice()
+		print("MyPyIO Opening %s"%(path))
+		return 1234 
+	def _check(path, many):
+		print("python-check %s"%(path))
+		return path[0:9] == "pwndfu://"
+	def _read(offset, length):
+		global device
+		res = device.read_memory(address, length)
+		print("python-read")
+		return res
+	def _seek(offset, whence):
+		print("python-seek")
+		if whence == 0: # SET
+			return offset
+		if whence == 1: # CUR
+			return offset
+		if whence == 2: # END
+			return ROM_SIZE
+		return ROM_SIZE
+	def _write(offset, data, length):
+		print("TODO: python-write")
+		return True
+	def _system(cmd):
+		print("pwndfu://%s"%(cmd))
+		return True
+	return {
+		"name": "pwndfu",
+		"license": "GPL",
+		"desc": "pwndfu IO plugin (pwndfu://3)",
+		"check": _check,
+		"open": _open,
+		"read": _read,
+		"seek": _seek,
+		"write": _write,
+		"system": _system,
+	}
+
+print("Registering Python IO plugin...")
+print(r2lang.plugin("io", pyio))

configure

@@ -1,5 +1,5 @@
 #!/bin/sh
-# This script was automatically generated by ACR v1.6.2
+# This script was automatically generated by ACR v1.7.2
 # @author: pancake <nopcode.org>
 # @url:    http://www.nopcode.org
 # @repo:   git clone https://github.com/radare/acr
@@ -64,6 +64,7 @@ if [ -e "${VPATH}/config.guess" ]; then
 fi
 CPU="`uname -m|sed -e 's, ,,g'|cut -d - -f 1`"
 OS="`uname -s|tr A-Z a-z`"
+uname -r | grep -qE "(Microsoft|WSL)" 2>/dev/null && OS="wsl"
 GNU="`uname --help 2>&1 | grep gnu`"
 [ "${GNU}" ] && OS="${OS}-gnu"
 [ "${CPU}" = ppc ] && CPU="powerpc"
@@ -104,12 +105,12 @@ done
 : ${INSTALL_PROGRAM_STRIP:=${INSTALL} -m 755 -s}
 : ${INSTALL_MAN:=${INSTALL} -m 444}
 : ${INSTALL_LIB:=${INSTALL} -m 755 -c}
- PKGNAME='radare2-extras' ; VERSION='2.9.0' ; CONTACT_MAIL="[email protected]" ; CONTACT_NAME="pancake" ; CONTACT="pancake <[email protected]>" ;
+ PKGNAME='radare2-extras' ; VERSION='4.0.0' ; CONTACT_MAIL="[email protected]" ; CONTACT_NAME="pancake" ; CONTACT="pancake <[email protected]>" ;
 }
 
 show_usage() {
 cat <<EOF2
-'configure' configures radare2-extras-2.9.0 to adapt to many kinds of systems.
+'configure' configures radare2-extras-4.0.0 to adapt to many kinds of systems.
 
 Usage: ./configure [OPTION]... [VAR=VALUE]...
 
@@ -179,7 +180,7 @@ take_environ() {
 }
 
 show_version() {
-echo "radare2-extras-2.9.0 configuration script done with acr v1.6.2.
+echo "radare2-extras-4.0.0 configuration script done with acr v1.7.2.
 The 'Free Software Foundation' message is only for autodetection.
 Originally written by pancake <nopcode.org>."
 exit 0
@@ -203,7 +204,7 @@ case $flag in
 	show_version ; ;;
 -r|--r|--report)
 echo "PKGNAME:   radare2-extras"
-echo "VERSION:   2.9.0"
+echo "VERSION:   4.0.0"
 echo "LANGS:     c"
 echo "OPTIONAL:  libewf libyara"
 echo "PKG-CONFIG:  r_core libewf unicorn yara"
@@ -308,6 +309,7 @@ echo 'Using PKGCONFIG: '${PKGCONFIG}
 printf 'checking pkg-config flags for r_core... '
 tmp=`${PKGCONFIG} --cflags r_core 2>/dev/null`
 if [ $? != 0 ]; then echo no ; HAVE_PKGCFG_R_CORE=0;
+R2_CFLAGS='';R2_LDFLAGS='';
 echo 'This package is required'
 exit 1
 else
@@ -344,6 +346,7 @@ check_library HAVE_LIB_EWF ewf 0
 printf 'checking pkg-config flags for libewf... '
 tmp=`${PKGCONFIG} --cflags libewf 2>/dev/null`
 if [ $? != 0 ]; then echo no ; HAVE_PKGCFG_LIBEWF=0;
+EWF_CFLAGS='';EWF_LDFLAGS='';
 else
 EWF_CFLAGS=$tmp;
 tmp=`${PKGCONFIG} --libs libewf 2>/dev/null`
@@ -360,6 +363,7 @@ HAVE_LIB_EWF="0"; fi
 printf 'checking pkg-config flags for unicorn... '
 tmp=`${PKGCONFIG} --cflags unicorn 2>/dev/null`
 if [ $? != 0 ]; then echo no ; HAVE_PKGCFG_UNICORN=0;
+UC_CFLAGS='';UC_LDFLAGS='';
 else
 UC_CFLAGS=$tmp;
 tmp=`${PKGCONFIG} --libs unicorn 2>/dev/null`
@@ -371,6 +375,7 @@ check_library HAVE_LIB_YARA yara 0
 printf 'checking pkg-config flags for yara... '
 tmp=`${PKGCONFIG} --cflags yara 2>/dev/null`
 if [ $? != 0 ]; then echo no ; HAVE_PKGCFG_YARA=0;
+YARA_CFLAGS='';YARA_LDFLAGS='';
 else
 YARA_CFLAGS=$tmp;
 tmp=`${PKGCONFIG} --libs yara 2>/dev/null`

configure.acr

@@ -1,5 +1,5 @@
 PKGNAME radare2-extras
-VERSION 2.9.0
+VERSION 4.0.0
 CONTACT pancake ; [email protected]
 
 REPORT PREFIX ;

docker/go/README.md

@@ -51,7 +51,7 @@ RUN cd /opt/code && \
 	tar -Jxf ${VALA_TAR}.tar.xz
 RUN cd /opt/code/${VALA_TAR}; ./configure --prefix=/usr ; make && make install
 # compile radare and bindings
-RUN cd /opt/code; git clone https://github.com/radare/radare2.git; cd radare2; ./sys/all.sh
+RUN cd /opt/code; git clone https://github.com/radareorg/radare2.git; cd radare2; ./sys/all.sh
 
 #install Go
 

docker/go/radare2_go.docker

@@ -28,7 +28,7 @@ RUN cd /opt/code && \
 	tar -Jxf ${VALA_TAR}.tar.xz
 RUN cd /opt/code/${VALA_TAR}; ./configure --prefix=/usr ; make && make install
 # compile radare and bindings
-RUN cd /opt/code; git clone https://github.com/radare/radare2.git; cd radare2; ./sys/all.sh
+RUN cd /opt/code; git clone https://github.com/radareorg/radare2.git; cd radare2; ./sys/all.sh
 
 #install Go
 

docker/java/java_README.md

@@ -39,7 +39,7 @@ RUN apt-get install -y python-pip jython
 RUN cd /opt/code; wget http://download.gnome.org/sources/vala/0.24/vala-0.24.0.tar.xz; tar -Jxf vala-0.24.0.tar.xz
 RUN cd /opt/code/vala-0.24.0; ./configure --prefix=/usr ; make && make install
 # compile radare
-RUN cd /opt/code; git clone https://github.com/radare/radare2.git; cd radare2; ./sys/all.sh
+RUN cd /opt/code; git clone https://github.com/radareorg/radare2.git; cd radare2; ./sys/all.sh
 
 # Clean up APT when done.
 RUN apt-get clean && rm -rf /var/lib/apt/lists/* /tmp/* /var/tmp/*
@@ -48,7 +48,7 @@ RUN apt-get clean && rm -rf /var/lib/apt/lists/* /tmp/* /var/tmp/*
 RUN cd /opt/code; wget http://download.gnome.org/sources/vala/0.24/vala-0.24.0.tar.xz; tar -Jxf vala-0.24.0.tar.xz
 RUN cd /opt/code/vala-0.24.0; ./configure --prefix=/usr ; make && make install
 # compile radare
-RUN cd /opt/code; git clone https://github.com/radare/radare2.git; cd radare2; ./sys/all.sh
+RUN cd /opt/code; git clone https://github.com/radareorg/radare2.git; cd radare2; ./sys/all.sh
 
 
 #install oracle jre stuffs

docker/java/radare2_java.docker

@@ -23,7 +23,7 @@ RUN apt-get install -y python-pip jython
 RUN cd /opt/code; wget http://download.gnome.org/sources/vala/0.24/vala-0.24.0.tar.xz; tar -Jxf vala-0.24.0.tar.xz
 RUN cd /opt/code/vala-0.24.0; ./configure --prefix=/usr ; make && make install
 # compile radare
-RUN cd /opt/code; git clone https://github.com/radare/radare2.git; cd radare2; ./sys/all.sh
+RUN cd /opt/code; git clone https://github.com/radareorg/radare2.git; cd radare2; ./sys/all.sh
 
 # Clean up APT when done.
 RUN apt-get clean && rm -rf /var/lib/apt/lists/* /tmp/* /var/tmp/*
@@ -32,7 +32,7 @@ RUN apt-get clean && rm -rf /var/lib/apt/lists/* /tmp/* /var/tmp/*
 RUN cd /opt/code; wget http://download.gnome.org/sources/vala/0.24/vala-0.24.0.tar.xz; tar -Jxf vala-0.24.0.tar.xz
 RUN cd /opt/code/vala-0.24.0; ./configure --prefix=/usr ; make && make install
 # compile radare
-RUN cd /opt/code; git clone https://github.com/radare/radare2.git; cd radare2; ./sys/all.sh
+RUN cd /opt/code; git clone https://github.com/radareorg/radare2.git; cd radare2; ./sys/all.sh
 
 
 #install oracle jre stuffs

examples/my-cpu/mycpu.c

@@ -30,10 +30,10 @@ static int disassemble (RAsm *a, RAsmOp *op, const ut8 *b, int l) {
 	int idx = (b[0]&0xf)*2;
 	op->size = 2;
 	if (idx>=(OPS*2)) {
-		strcpy (op->buf_asm, "invalid");
+		r_strbuf_set (&op->buf_asm, "invalid");
 		return -1;
 	}
-	strcpy (op->buf_asm, ops[idx]);
+	r_strbuf_set (&op->buf_asm, ops[idx]);
 	if (ops[idx+1]) {
 		const char *p = ops[idx+1];
 		arg[0] = 0;
@@ -50,8 +50,8 @@ static int disassemble (RAsm *a, RAsmOp *op, const ut8 *b, int l) {
 			sprintf (arg, "r%d, %d", b[1]>>4, (char)b[1]&0xf);
 		}
 		if (*arg) {
-			strcat (op->buf_asm, " ");
-			strcat (op->buf_asm, arg);
+			r_strbuf_append (&op->buf_asm, " ");
+			r_strbuf_append (&op->buf_asm, arg);
 		}
 	}
 	return op->size;
@@ -67,7 +67,7 @@ RAsmPlugin r_asm_plugin_mycpu = {
 };
 
 #ifndef CORELIB
-struct r_lib_struct_t radare_plugin = {
+RLibStruct radare_plugin = {
         .type = R_LIB_TYPE_ASM,
         .data = &r_asm_plugin_mycpu
 };

jaguar-gpu/Makefile

@@ -0,0 +1,21 @@
+NAME=jaguar-gpu
+R2_PLUGIN_PATH=$(shell r2 -hh|grep R2_LIBR_PLUGINS|awk '{print $$2}')
+CFLAGS=-g -fPIC $(shell pkg-config --cflags r_asm)
+LDFLAGS=-shared $(shell pkg-config --libs r_asm)
+OBJS=$(NAME).o
+SO_EXT=$(shell uname|grep -q Darwin && echo dylib || echo so)
+LIB=$(NAME).$(SO_EXT)
+
+all: $(LIB)
+
+clean:
+	rm -f $(LIB) $(OBJS)
+
+$(LIB): $(OBJS)
+	$(CC) $(CFLAGS) $(LDFLAGS) $(OBJS) -o $(LIB)
+
+install:
+	cp -f $(LIB) $(R2_PLUGIN_PATH)
+
+uninstall:
+	rm -f $(R2_PLUGIN_PATH)/$(LIB)

jaguar-gpu/jaguar-gpu.c

@@ -0,0 +1,222 @@
+/*
+ * Disassembler for the Jaguar GPU/DSP
+ * Copyright (C) 2018 - Sebastien Alaiwan
+ */
+
+#include <r_asm.h>
+#include <r_lib.h>
+
+static int read16_BE (const ut8** b)
+{
+	int val = ((*b)[0] << 8) | ((*b)[1] << 0);
+	(*b) += 2;
+	return val;
+}
+
+static const char* condition (int code)
+{
+	switch (code)
+	{
+	case 0:  return "mp"; /* always */
+	case 1:  return "nz";
+	case 2:  return "z";
+	case 4:  return "nc";
+	case 5:  return "nc/nz";
+	case 6:  return "nc/z";
+	case 8:  return "c";
+	case 9:  return "c/nz";
+	case 10: return "c/z";
+	case 20: return "nn";
+	case 21: return "nn/nz";
+	case 22: return "nn/z";
+	case 24: return "n";
+	case 25: return "n/nz";
+	case 26: return "n/z";
+	case 31: return "never";
+	default: return "?";
+	}
+};
+
+static int notZero (int val)
+{
+	return val == 0 ? 32 : val;
+}
+
+static int disassemble (RAsm *a, RAsmOp *op, const ut8 *b, int l) {
+	const ut8* p = b; /* read pointer */
+
+	const uint word = read16_BE (&p);
+	const uint opCode = (word >> 10) & 63;
+	const uint reg1 = (word >> 5) & 31;
+	const uint reg2 = (word >> 0) & 31;
+
+	uint pc = a->pc;
+
+	pc += 2;
+	switch (opCode)
+	{
+	case 0:  r_strbuf_setf (&op->buf_asm, "add     r%d, r%d", reg1, reg2);
+					 break;
+	case 1:  r_strbuf_setf (&op->buf_asm, "addc    r%d, r%d", reg1, reg2);
+					 break;
+	case 2:  r_strbuf_setf (&op->buf_asm, "addq    0x%x, r%d", notZero (reg1), reg2);
+					 break;
+	case 3:  r_strbuf_setf (&op->buf_asm, "addqt   0x%x, r%d", notZero (reg1), reg2);
+					 break;
+	case 4:  r_strbuf_setf (&op->buf_asm, "sub     r%d, r%d", reg1, reg2);
+					 break;
+	case 5:  r_strbuf_setf (&op->buf_asm, "subc    r%d, r%d", reg1, reg2);
+					 break;
+	case 6:  r_strbuf_setf (&op->buf_asm, "subq    0x%x, r%d", notZero (reg1), reg2);
+					 break;
+	case 7:  r_strbuf_setf (&op->buf_asm, "subqt   0x%x, r%d", notZero (reg1), reg2);
+					 break;
+	case 8:  r_strbuf_setf (&op->buf_asm, "neg     r%d", reg2);
+					 break;
+	case 9:  r_strbuf_setf (&op->buf_asm, "and     r%d, r%d", reg1, reg2);
+					 break;
+	case 10: r_strbuf_setf (&op->buf_asm, "or      r%d, r%d", reg1, reg2);
+					 break;
+	case 11: r_strbuf_setf (&op->buf_asm, "xor     r%d, r%d", reg1, reg2);
+					 break;
+	case 12: r_strbuf_setf (&op->buf_asm, "not     r%d", reg2);
+					 break;
+	case 13: r_strbuf_setf (&op->buf_asm, "btst    0x%x, r%d", reg1, reg2);
+					 break;
+	case 14: r_strbuf_setf (&op->buf_asm, "bset    0x%x, r%d", reg1, reg2);
+					 break;
+	case 15: r_strbuf_setf (&op->buf_asm, "bclr    0x%x, r%d", reg1, reg2);
+					 break;
+	case 16: r_strbuf_setf (&op->buf_asm, "mult    r%d, r%d", reg1, reg2);
+					 break;
+	case 17: r_strbuf_setf (&op->buf_asm, "imult   r%d, r%d", reg1, reg2);
+					 break;
+	case 18: r_strbuf_setf (&op->buf_asm, "imultn  r%d, r%d", reg1, reg2);
+					 break;
+	case 19: r_strbuf_setf (&op->buf_asm, "resmac  r%d", reg2);
+					 break;
+	case 20: r_strbuf_setf (&op->buf_asm, "imacn   r%d, r%d", reg1, reg2);
+					 break;
+	case 21: r_strbuf_setf (&op->buf_asm, "div     r%d, r%d", reg1, reg2);
+					 break;
+	case 22: r_strbuf_setf (&op->buf_asm, "abs     r%d", reg2);
+					 break;
+	case 23: r_strbuf_setf (&op->buf_asm, "sh      r%d, r%d", reg1, reg2);
+					 break;
+	case 24: r_strbuf_setf (&op->buf_asm, "shlq    0x%x, r%d", 32 - notZero (reg1), reg2);
+					 break;
+	case 25: r_strbuf_setf (&op->buf_asm, "shrq    0x%x, r%d", notZero (reg1), reg2);
+					 break;
+	case 26: r_strbuf_setf (&op->buf_asm, "sha     r%d, r%d", reg1, reg2);
+					 break;
+	case 27: r_strbuf_setf (&op->buf_asm, "sharq   0x%x, r%d", notZero (reg1), reg2);
+					 break;
+	case 28: r_strbuf_setf (&op->buf_asm, "ror     r%d, r%d", reg1, reg2);
+					 break;
+	case 29: r_strbuf_setf (&op->buf_asm, "rorq    0x%x, r%d", notZero (reg1), reg2);
+					 break;
+	case 30: r_strbuf_setf (&op->buf_asm, "cmp     r%d, r%d", reg1, reg2);
+					 break;
+	case 31: r_strbuf_setf (&op->buf_asm, "cmpq    0x%x, r%d", reg1, reg2);
+					 break;
+	case 32: r_strbuf_setf (&op->buf_asm, "sat8    r%d", reg2);
+					 break;
+	case 33: r_strbuf_setf (&op->buf_asm, "sat16   r%d", reg2);
+					 break;
+	case 34: r_strbuf_setf (&op->buf_asm, "move    r%d, r%d", reg1, reg2);
+					 break;
+	case 35: r_strbuf_setf (&op->buf_asm, "moveq   0x%x, r%d", reg1, reg2);
+					 break;
+	case 36: r_strbuf_setf (&op->buf_asm, "moveta  r%d, r%d", reg1, reg2);
+					 break;
+	case 37: r_strbuf_setf (&op->buf_asm, "movefa  r%d, r%d", reg1, reg2);
+					 break;
+	case 38:
+					 {
+						 uint low = read16_BE (&p);
+						 uint high = read16_BE (&p);
+						 r_strbuf_setf (&op->buf_asm, "movei   0x%x, r%d", low | (high << 16), reg2);
+						 break;
+					 }
+	case 39: r_strbuf_setf (&op->buf_asm, "loadb   [r%d], r%d", reg1, reg2);
+					 break;
+	case 40: r_strbuf_setf (&op->buf_asm, "loadw   [r%d], r%d", reg1, reg2);
+					 break;
+	case 41: r_strbuf_setf (&op->buf_asm, "load    [r%d], r%d", reg1, reg2);
+					 break;
+	case 42: r_strbuf_setf (&op->buf_asm, "loadp   [r%d], r%d", reg1, reg2);
+					 break;
+	case 43: r_strbuf_setf (&op->buf_asm, "load    [r14+0x%x], r%d", notZero (reg1)*4, reg2);
+					 break;
+	case 44: r_strbuf_setf (&op->buf_asm, "load    [r15+0x%x], r%d", notZero (reg1)*4, reg2);
+					 break;
+	case 45: r_strbuf_setf (&op->buf_asm, "storeb  r%d, [r%d]", reg2, reg1);
+					 break;
+	case 46: r_strbuf_setf (&op->buf_asm, "storew  r%d, [r%d]", reg2, reg1);
+					 break;
+	case 47: r_strbuf_setf (&op->buf_asm, "store   r%d, [r%d]", reg2, reg1);
+					 break;
+	case 48: r_strbuf_setf (&op->buf_asm, "storep  r%d, [r%d]", reg2, reg1);
+					 break;
+	case 49: r_strbuf_setf (&op->buf_asm, "store   r%d, [r14+0x%x]", reg2, notZero (reg1)*4);
+					 break;
+	case 50: r_strbuf_setf (&op->buf_asm, "store   r%d, [r15+0x%x]", reg2, notZero (reg1)*4);
+					 break;
+	case 51: r_strbuf_setf (&op->buf_asm, "move    pc, r%d", reg2);
+					 break;
+	case 52: r_strbuf_setf (&op->buf_asm, "j%s     [r%d]", condition(reg2), reg1);
+					 break;
+	case 53: r_strbuf_setf (&op->buf_asm, "j%s     0x%.8X", condition(reg2), pc + ((int8_t)(reg1 << 3) >> 2));
+					 break;
+	case 54: r_strbuf_setf (&op->buf_asm, "mmult   r%d, r%d", reg1, reg2);
+					 break;
+	case 55: r_strbuf_setf (&op->buf_asm, "mtoi    r%d, r%d", reg1, reg2);
+					 break;
+	case 56: r_strbuf_setf (&op->buf_asm, "normi   r%d, r%d", reg1, reg2);
+					 break;
+	case 57: r_strbuf_setf (&op->buf_asm, "nop");
+					 break;
+	case 58: r_strbuf_setf (&op->buf_asm, "load    [r14+r%d], r%d", reg1, reg2);
+					 break;
+	case 59: r_strbuf_setf (&op->buf_asm, "load    [r15+r%d], r%d", reg1, reg2);
+					 break;
+	case 60: r_strbuf_setf (&op->buf_asm, "store   r%d, [r14+r%d]", reg2, reg1);
+					 break;
+	case 61: r_strbuf_setf (&op->buf_asm, "store   r%d, [r15+r%d]", reg2, reg1);
+					 break;
+	case 62: r_strbuf_setf (&op->buf_asm, "sat24   r%d", reg2);
+					 break;
+	case 63:
+					 {
+						 if (reg1 == 0)
+							 r_strbuf_setf (&op->buf_asm, "pack    r%d", reg2);
+						 else if (reg1 == 1)
+							 r_strbuf_setf (&op->buf_asm, "unpack    r%d", reg2);
+						 else
+							 r_strbuf_setf (&op->buf_asm, "invalid");
+						 break;
+					 }
+	}
+
+	op->size = p - b;
+	r_strbuf_setbin (&op->buf_hex, b, op->size);
+
+	return op->size;
+}
+
+RAsmPlugin r_asm_plugin_jaguar_gpu = {
+	.name = "jaguar-gpu",
+	.arch = "jaguar-gpu",
+	.author = "Sebastien Alaiwan",
+	.bits = 32,
+	.desc = "Disassembler for the Jaguar GPU",
+	.license = "LGPL3",
+	.disassemble = &disassemble,
+};
+
+#ifndef CORELIB
+RLibStruct radare_plugin = {
+	.type = R_LIB_TYPE_ASM,
+	.data = &r_asm_plugin_jaguar_gpu
+};
+#endif

keystone/configure

@@ -1,5 +1,5 @@
 #!/bin/sh
-# This script was automatically generated by ACR v1.6.2
+# This script was automatically generated by ACR v1.7.2
 # @author: pancake <nopcode.org>
 # @url:    http://www.nopcode.org
 # @repo:   git clone https://github.com/radare/acr
@@ -62,6 +62,7 @@ if [ -e "${VPATH}/config.guess" ]; then
 fi
 CPU="`uname -m|sed -e 's, ,,g'|cut -d - -f 1`"
 OS="`uname -s|tr A-Z a-z`"
+uname -r | grep -qE "(Microsoft|WSL)" 2>/dev/null && OS="wsl"
 GNU="`uname --help 2>&1 | grep gnu`"
 [ "${GNU}" ] && OS="${OS}-gnu"
 [ "${CPU}" = ppc ] && CPU="powerpc"
@@ -176,7 +177,7 @@ take_environ() {
 }
 
 show_version() {
-echo "radare2-keystone-0.1 configuration script done with acr v1.6.2.
+echo "radare2-keystone-0.1 configuration script done with acr v1.7.2.
 The 'Free Software Foundation' message is only for autodetection.
 Originally written by pancake <nopcode.org>."
 exit 0
@@ -346,6 +347,7 @@ echo 'Using PKGCONFIG: '${PKGCONFIG}
 printf 'checking pkg-config flags for r_asm... '
 tmp=`${PKGCONFIG} --cflags r_asm 2>/dev/null`
 if [ $? != 0 ]; then echo no ; HAVE_PKGCFG_R_ASM=0;
+R2_CFLAGS='';R2_LDFLAGS='';
 echo 'This package is required'
 exit 1
 else

libr/anal/p/anal_evm.c

@@ -453,7 +453,7 @@ static int evm_load_symbol_map (RAnal *anal, const char *file) {
 
 	if (sigs_info) {
 		sigs_info->rio = r_io_new ();
-		sigs_info->riodesc = r_io_open (sigs_info->rio, file, R_IO_READ, 0644);
+		sigs_info->riodesc = r_io_open (sigs_info->rio, file, R_PERM_R, 0644);
 
 		if (!sigs_info->riodesc) {
 			printf ("Failed to open %s: %s\n", file, strerror (errno));

libr/anal/p/anal_x86_udis.c

@@ -191,7 +191,9 @@ int x86_udis86_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int len)
 	op->id = u.mnemonic;
 	oplen = op->size = ud_insn_len (&u);
 	r_strbuf_init (&op->esil);
-	if (anal->decode && (handler = udis86_esil_get_handler (u.mnemonic))) {
+
+	const bool decode = true;
+	if (decode && (handler = udis86_esil_get_handler (u.mnemonic))) {
 		info.oplen = oplen;
 		//if (anal->bits==32)
 			info.bitmask = UT32_MAX;

libr/anal/p/evm.mk

@@ -1,4 +1,5 @@
 OBJ_evm=anal_evm.o
+OBJ_evm+=../../asm/arch/evm/evm.o
 CFLAGS+=-I../../asm/arch/evm/
 
 STATIC_OBJ+=${OBJ_evm}

libr/asm/Makefile

@@ -15,6 +15,9 @@ msil:
 x86_udis udis udis86:
 	cd p ; $(MAKE) asm_x86_udis.$(LIBEXT)
 
+udis86-clean:
+	rm -rf p/asm_x86_udis.$(LIBEXT)*
+
 tab:
 	cd p ; $(MAKE) asm_x86_tab.$(LIBEXT)
 

libr/asm/arch/evm/evm.c

@@ -93,7 +93,7 @@ int evm_asm(const char *str, RStrBuf *buf, int buf_len) {
 		const EvmOpDef *opdef = &opcodes[i];
 		if (opdef->txt) {
 			if (!strcmp (opdef->txt, str)) {
-				r_strbuf_append (buf, i);
+				r_strbuf_appendf (buf, "%d", i);
 				return 1;
 			}
 		}
@@ -148,13 +148,13 @@ int evm_dis(EvmOp *op, const unsigned char *buf, int buf_len) {
 	case EVM_OP_PUSH31:
 	case EVM_OP_PUSH32:
 	{
-		int i, pushSize = buf[0] - EVM_OP_PUSH1;
-		op->imm = 0;
-		for (i = 0; i < pushSize + 1; i++) {
-			op->imm <<= 8;
-			op->imm |= buf[i + 1];
+		int pushSize = buf[0] - EVM_OP_PUSH1;
+		char hexbuf[64] = {0};
+		int res = r_hex_bin2str (buf + 1, pushSize + 1, hexbuf);
+		if (res < 1 || !*hexbuf) {
+			strcpy (hexbuf, "0");
 		}
-		settxtf (op, "push%d 0x%x", pushSize + 1, op->imm);
+		settxtf (op, "push%d 0x%s", pushSize + 1, hexbuf);
 		op->len = 2 + pushSize;
 	}
 	break;

libr/asm/arch/evm/evm.h

@@ -150,7 +150,6 @@ typedef enum {
 typedef struct EvmOp {
 	EvmOpcodes op;
 	int len;
-	uint64_t imm;
 	const char *txt;
 	char txt_buf[32];
 } EvmOp;

libr/asm/arch/include/mybfd.h

@@ -571,7 +571,29 @@ void bfd_putl16 (bfd_vma, void *);
 
 /* Byte swapping routines which take size and endiannes as arguments.  */
 
-bfd_uint64_t bfd_get_bits (const void *, int, bfd_boolean);
+//bfd_uint64_t bfd_get_bits (const void *, int, bfd_boolean);
+static inline bfd_uint64_t
+bfd_get_bits (const void *p, int bits, bfd_boolean big_p)
+{
+  const bfd_byte *addr = (const bfd_byte *) p;
+  bfd_uint64_t data;
+  int i;
+  int bytes;
+
+  if (bits % 8 != 0)
+    return 0;
+
+  data = 0;
+  bytes = bits / 8;
+  for (i = 0; i < bytes; i++)
+    {
+      int addr_index = big_p ? i : bytes - i - 1;
+
+      data = (data << 8) | addr[addr_index];
+    }
+
+  return data;
+}
 void bfd_put_bits (bfd_uint64_t, void *, int, bfd_boolean);
 
 extern bfd_boolean bfd_section_already_linked_table_init (void);

libr/asm/arch/pyc/pyc_disasm.c

@@ -159,7 +159,7 @@ int r_pyc_disasm (RAsmOp *opstruct, const ut8 *code, RList *cobjs, RList *intern
         op = code[i];
         i += 1;
         name = op_name[op];
-        strcpy (opstruct->buf_asm, name);
+        r_strbuf_set (&opstruct->buf_asm, name);
         if (name == NULL) {
             return 0;
         }
@@ -171,7 +171,7 @@ int r_pyc_disasm (RAsmOp *opstruct, const ut8 *code, RList *cobjs, RList *intern
                   extended_arg = oparg*65536;
               arg = parse_arg (op, oparg, names, consts, varnames, interned_table);
             if (arg != NULL) {
-                strcat (opstruct->buf_asm, r_str_newf ("%20s", arg));
+                r_strbuf_appendf (&opstruct->buf_asm, "%20s", arg);
             }   
         }       
         return i;
@@ -304,4 +304,4 @@ void dump_cobj (pyc_code_object *c) {
     eprintf("varnames_start\n");
     dump(c->varnames->data);
     eprintf("varnames_end\n");
-}
+}

libr/asm/arch/vc4/cgen-dis.c

@@ -20,6 +20,7 @@
 
 #include "sysdep.h"
 #include <stdio.h>
+#include <string.h>
 #include <stdlib.h>
 #include "dis-asm.h"
 #include "ansidecl.h"

libr/asm/arch/vc4/cgen-opc.c

@@ -22,6 +22,8 @@
 #include "sysdep.h"
 #include <alloca.h>
 #include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
 #include "ansidecl.h"
 #include "libiberty.h"
 #include <ctype.h>

libr/asm/arch/vc4/vc4-dis.c

@@ -28,6 +28,7 @@
 
 #include "sysdep.h"
 #include <stdio.h>
+#include <stdlib.h>
 #include <string.h>
 #include "ansidecl.h"
 #include "dis-asm.h"

libr/asm/arch/vc4/vc4-ibld.c

@@ -28,6 +28,7 @@
 #include "sysdep.h"
 #include <stdio.h>
 #include <string.h>
+#include <stdlib.h>
 #include "ansidecl.h"
 #include "dis-asm.h"
 #include "mybfd.h"

libr/asm/p/asm_armthumb.c

@@ -1,4 +1,4 @@
-/* radare - LGPL - Copyright 2010-2015 - pancake */
+/* radare - LGPL - Copyright 2010-2018 - pancake */
 
 #include <stdio.h>
 #include <stdarg.h>
@@ -11,10 +11,13 @@
 
 static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 	int *p = (int*)buf; // TODO : endian
-	op->buf_asm[0]='\0';
-	op->size = armthumb_disassemble (op->buf_asm, (ut32)a->pc, *p);
-	if (!op->size)
-		strncpy (op->buf_asm, " (data)", R_ASM_BUFSIZE);
+	char buf_asm[64] = {0};
+	op->size = armthumb_disassemble (buf_asm, (ut32)a->pc, *p);
+	if (op->size > 0) {
+		r_strbuf_set (&op->buf_asm, buf_asm);
+	} else {
+		r_strbuf_set (&op->buf_asm, " (data)");
+	}
 	return op->size;
 }
 
@@ -33,14 +36,12 @@ RAsmPlugin r_asm_plugin_armthumb = {
 	.arch = "arm",
 	.bits = 16,
 	.desc = "ARM THUMB disassembly plugin",
-	.init = NULL,
-	.fini = NULL,
 	.disassemble = &disassemble,
 //	.assemble = &assemble 
 };
 
 #ifndef CORELIB
-struct r_lib_struct_t radare_plugin = {
+RLibStruct radare_plugin = {
 	.type = R_LIB_TYPE_ASM,
 	.data = &r_asm_plugin_armthumb,
 	.version = R2_VERSION

libr/asm/p/asm_blackfin.c

@@ -11,7 +11,7 @@
 #include "blackfin/bfin-dis.c"
 
 static unsigned long Offset = 0;
-static char *buf_global = NULL;
+static RStrBuf *buf_global = NULL;
 static unsigned char bytes[4];
 
 static int bfin_buffer_read_memory (bfd_vma memaddr, bfd_byte *myaddr, ut32 length, struct disassemble_info *info) {
@@ -28,41 +28,29 @@ static void memory_error_func(int status, bfd_vma memaddr, struct disassemble_in
 }
 
 static void print_address(bfd_vma address, struct disassemble_info *info) {
-        char tmp[32];
         if (buf_global == NULL)
                 return;
-        sprintf(tmp, "0x%08"PFMT64x"", (ut64)address);
-        strcat(buf_global, tmp);
+        r_strbuf_appendf (buf_global, "0x%08"PFMT64x"", (ut64)address);
 }
 
 
 static int buf_fprintf(void *stream, const char *format, ...) {
-        int flen, glen;
         va_list ap;
-        char *tmp;
         if (buf_global == NULL)
                 return 0;
         va_start (ap, format);
-                flen = strlen (format);
-                glen = strlen (buf_global);
-                tmp = malloc (flen + glen + 2);
-                memcpy (tmp, buf_global, glen);
-                memcpy (tmp+glen, format, flen);
-                tmp[flen+glen] = 0;
-// XXX: overflow here?
-        vsprintf (buf_global, tmp, ap);
+        r_strbuf_vappendf (buf_global, format, ap);
         va_end (ap);
-        free (tmp);
         return 0;
 }
 
 static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
         struct disassemble_info disasm_obj;
-        op->buf_asm[0]='\0';
+        r_strbuf_set (&op->buf_asm, "");
 	op->size = 4;
         if (len<4)
                 return -1;
-        buf_global = op->buf_asm;
+        buf_global = &op->buf_asm;
         Offset = a->pc;
         memcpy (bytes, buf, 4); // TODO handle thumb
 
@@ -81,7 +69,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 	op->size = print_insn_bfin((bfd_vma)Offset, &disasm_obj);
 
         if (op->size == -1)
-                strncpy (op->buf_asm, " (data)", R_ASM_BUFSIZE);
+                r_strbuf_set (&op->buf_asm, " (data)");
 
         return op->size;
 }

libr/asm/p/asm_evm.c

@@ -13,11 +13,9 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 		0
 	};
 
-	const char *buf_asm = "invalid";
 	evm_dis (&eop, buf, len);
-	buf_asm = sdb_fmt ("%s", eop.txt);
 	op->size = eop.len;
-	r_asm_op_set_asm (op, buf_asm);
+	r_asm_op_set_asm (op, eop.txt);
 
 	return eop.len;
 }

libr/asm/p/asm_m68k_net.c

@@ -17,6 +17,7 @@ static int disassemble(RAsm *a, RAsmOp *aop, const ut8 *buf, int len) {
 	const unsigned char *buf2;
 	int ilen ;
 	static struct DisasmPara_68k dp;
+	char *buf_asm;
 	/* initialize DisasmPara */
 	*operands = *opcode = 0;
 	memcpy (bof, buf, R_MIN(len, sizeof(bof)));
@@ -31,9 +32,11 @@ static int disassemble(RAsm *a, RAsmOp *aop, const ut8 *buf, int len) {
 	}
 	ilen = (buf2-(const ut8*)bof);
 	if (*operands)
-		snprintf (aop->buf_asm, R_ASM_BUFSIZE, "%s %s", opcode, operands);
-	else snprintf (aop->buf_asm, R_ASM_BUFSIZE, "%s", opcode);
-	r_str_rmch (aop->buf_asm, '#');
+		buf_asm = sdb_fmt ("%s %s", opcode, operands);
+	else
+		buf_asm = sdb_fmt ("%s", opcode);
+	r_str_rmch (buf_asm, '#');
+	r_asm_op_set_asm (aop, buf_asm);
 	aop->size = ilen;
 	return aop->size;
 }

libr/asm/p/asm_msil.c

@@ -8,18 +8,18 @@
 #include <r_asm.h>
 #include "msil/demsil.c"
 
-static int arch_msil_disasm(char *str, const ut8 *buf, ut64 seek) {
+static int arch_msil_disasm(RStrBuf *buf_asm, const ut8 *buf, ut64 seek) {
 	ut32 n;
 	int o; 
 	DISASMSIL_OFFSET CodeBase = seek;
 	ILOPCODE_STRUCT ilopar[8];
 	o = DisasMSIL (buf, 16, CodeBase, ilopar, 8, &n);
-	sprintf (str,"%s", ilopar[0].Mnemonic);
+	r_strbuf_setf (buf_asm, "%s", ilopar[0].Mnemonic);
 	return o;
 }
 
 static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
-	return (op->size = arch_msil_disasm (op->buf_asm, buf, a->pc));
+	return (op->size = arch_msil_disasm (&op->buf_asm, buf, a->pc));
 }
 
 RAsmPlugin r_asm_plugin_msil = {

libr/asm/p/asm_nios.c

@@ -9,8 +9,8 @@
 
 #include "nios/gnu/nios-desc.h"
 
-static char *buf_global;
-static uint8_t bytes[2];
+static RStrBuf *buf_global = NULL;
+static ut8 bytes[2];
 
 static int nios_buffer_read_memory(bfd_vma address, bfd_byte *byte, ut32 len, disassemble_info *info) {
 	memcpy(byte, bytes, len);
@@ -22,19 +22,13 @@ static int nios_symbol_at_address(bfd_vma address, disassemble_info *info) {
 }
 
 static void nios_memory_error(int status, bfd_vma address, disassemble_info *info) {
-	return;
+	//--
 }
 
 static void nios_print_address(bfd_vma address, disassemble_info *info) {
-	char tmp[32];
-	if (!buf_global) {
-		return;
+	if (buf_global) {
+		r_strbuf_appendf (buf_global, "0x%08"PFMT64x, (ut64) address);
 	}
-
-	sprintf(tmp, "0x%08"PFMT64x"", (ut64) address);
-	strcat(buf_global, tmp);
-
-	return;
 }
 
 static int nios_fprintf(void *stream, const char *format, ...) {
@@ -42,29 +36,11 @@ static int nios_fprintf(void *stream, const char *format, ...) {
 		return 0;
 	}
 
-	int glen;
-	glen = strlen(buf_global);
-
-	int flen;
-	flen = strlen(format);
-
-	char *tmp;
-	tmp = malloc(glen + flen + 2);
-	if (!tmp) {
-		return 0;
-	}
-
-	memcpy(tmp, buf_global, glen);
-	memcpy(tmp + glen, format, flen);
-	tmp[flen + glen] = 0;
-
 	va_list args;
 	va_start(args, format);
-	vsnprintf(buf_global, glen + flen + 4, tmp, args);
+	r_strbuf_vappendf (buf_global, format, args);
 	va_end(args);
 
-	free(tmp);
-
 	return 0;
 }
 
@@ -73,7 +49,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 		return -1;
 	}
 
-	buf_global = op->buf_asm;
+	buf_global = &op->buf_asm;
 	memcpy(bytes, buf, 2);
 
 	struct disassemble_info info = {0};
@@ -89,11 +65,10 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 	info.fprintf_func = &nios_fprintf;
 	info.stream = stdout;
 
-	op->buf_asm[0] = 0;
 	op->size = print_insn_nios((bfd_vma) a->pc, &info);
 
 	if (op->size == -1) {
-		strncpy(op->buf_asm, " (data)", R_ASM_BUFSIZE);
+		r_strbuf_set(&op->buf_asm, " (data)");
 	}
 
 	return op->size;
@@ -112,7 +87,7 @@ RAsmPlugin r_asm_plugin_nios = {
 #ifndef CORELIB
 RLibStruct radare_plugin = {
 	.type = R_LIB_TYPE_ASM,
-	.data = &r_asm_plugin_nios
-	//.version = R2_VERSION
+	.data = &r_asm_plugin_nios,
+	.version = R2_VERSION
 };
 #endif

libr/asm/p/asm_ppc_disasm.c

@@ -1,4 +1,4 @@
-/* radare - GPL3 - Copyright 2009-2015 pancake, nibble */
+/* radare - GPL3 - Copyright 2009-2018 pancake, nibble */
 
 #include <stdio.h>
 #include <string.h>
@@ -18,13 +18,15 @@ static int disassemble(RAsm *a, RAsmOp *aop, const ut8 *buf, int len) {
 
 	static struct DisasmPara_PPC dp;
 	/* initialize DisasmPara */
-	memcpy(bof, buf, 4);
+	memcpy (bof, buf, 4);
 	dp.opcode = opcode;
 	dp.operands = operands;
 	dp.iaddr = &iaddr;
 	dp.instr = bof;
 	PPC_Disassemble (&dp, a->big_endian);
-	snprintf (aop->buf_asm, R_ASM_BUFSIZE, "%s %s", opcode, operands);
+	char res[64] = {0};
+	snprintf (res, sizeof (res), "%s %s", opcode, operands);
+	r_strbuf_set (&aop->buf_asm, res);
 	aop->size = 4;
 	return aop->size;
 }
@@ -34,14 +36,11 @@ RAsmPlugin r_asm_plugin_ppc_disasm = {
 	.arch = "ppc",
 	.bits = 32,
 	.desc = "Tiny PowerPC disassembly plugin",
-	.init = NULL,
-	.fini = NULL,
 	.disassemble = &disassemble,
-	.assemble = NULL
 };
 
 #ifndef CORELIB
-struct r_lib_struct_t radare_plugin = {
+RLibStruct radare_plugin = {
 	.type = R_LIB_TYPE_ASM,
 	.data = &r_asm_plugin_ppc_disasm,
 	.version = R2_VERSION

libr/asm/p/asm_psosvm.c

@@ -7,13 +7,19 @@
 #include <psosvm/vmas/vmas.h>
 
 static int disassemble(RAsm *a, struct r_asm_op_t *op, const ut8 *buf, int len) {
+	char buf_asm[64] = {0};
 	psosvmasm_init();
-	op->size = psosvm_disasm(buf, op->buf_asm);
+	op->size = psosvm_disasm(buf, buf_asm);
+	if (op->size > 0) {
+		r_asm_op_set_asm (op, buf_asm);
+	} else {
+		r_asm_op_set_asm (op, " (data)");
+	}
 	return op->size;
 }
 
 static int assemble(RAsm *a, RAsmOp *op, const char *buf) {
-	op->size = psosvm_assemble(op->buf, buf);
+	op->size = psosvm_assemble((ut8*)r_strbuf_get (&op->buf), buf);
 	return op->size;
 }
 

libr/asm/p/asm_vc4.c

@@ -13,7 +13,7 @@
 
 
 static unsigned long Offset = 0;
-static char *buf_global = NULL;
+static RStrBuf *buf_global = NULL;
 static unsigned char bytes[4];
 
 static int vc4_buffer_read_memory (bfd_vma memaddr, bfd_byte *myaddr, ut32 length, struct disassemble_info *info) {
@@ -30,39 +30,28 @@ static void memory_error_func(int status, bfd_vma memaddr, struct disassemble_in
 }
 
 static void print_address(bfd_vma address, struct disassemble_info *info) {
-	char tmp[32];
-	if (buf_global == NULL)
-		return;
-	snprintf (tmp, sizeof (tmp)-1, "0x%08" PFMT64x, (ut64)address);
-	strcat (buf_global, tmp);
+	if (buf_global) {
+		r_strbuf_appendf (buf_global, "0x%08" PFMT64x, (ut64)address);
+	}
 }
 
 static int buf_fprintf(void *stream, const char *format, ...) {
-	int flen, glen;
 	va_list ap;
-	char *tmp;
-	if (buf_global == NULL)
+	if (!buf_global) {
 		return 0;
+	}
 	va_start (ap, format);
-	flen = strlen (format);
-	glen = strlen (buf_global);
-	tmp = malloc (flen + glen + 2);
-	memcpy (tmp, buf_global, glen);
-	memcpy (tmp+glen, format, flen);
-	tmp[flen+glen] = 0;
-// XXX: overflow here?
-	vsprintf (buf_global, tmp, ap);
+	r_strbuf_vappendf (buf_global, format, ap);
 	va_end (ap);
-	free (tmp);
 	return 0;
 }
 
 static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 	struct disassemble_info disasm_obj;
-	op->buf_asm[0]='\0';
-	if (len<4)
+	if (len < 4) {
 		return -1;
-	buf_global = op->buf_asm;
+	}
+	buf_global = &op->buf_asm;
 	Offset = a->pc;
 	memcpy (bytes, buf, 4); // TODO handle thumb
 
@@ -80,8 +69,9 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 
 	op->size = print_insn_vc4 ((bfd_vma)Offset, &disasm_obj);
 
-	if (op->size == -1)
-		strncpy (op->buf_asm, " (data)", R_ASM_BUFSIZE);
+	if (op->size == -1) {
+		r_strbuf_set (&op->buf_asm, " (data)");
+	}
 
 	return op->size;
 }
@@ -97,7 +87,7 @@ RAsmPlugin r_asm_plugin_vc4 = {
 };
 
 #ifndef CORELIB
-struct r_lib_struct_t radare_plugin = {
+RLibStruct radare_plugin = {
 	.type = R_LIB_TYPE_ASM,
 	.data = &r_asm_plugin_vc4,
 	.version = R2_VERSION

libr/asm/p/asm_x86_bea.c

@@ -24,7 +24,7 @@ static int disassemble(RAsm *a, RAsmOp *aop, const ut8 *buf, int len) {
 	else disasm_obj.Options = 0;
 
 	aop->size = Disasm (&disasm_obj);
-	snprintf (aop->buf_asm, R_ASM_BUFSIZE, disasm_obj.CompleteInstr);
+	r_asm_op_set_asm (aop, disasm_obj.CompleteInstr);
 
 	return aop->size;
 }

libr/asm/p/asm_x86_tab.c

@@ -1293,7 +1293,7 @@ static int write_asm(ut8 *data, Opcode *opcode_ptr, Operand *operands) {
  */
 static int assemble(RAsm *a, RAsmOp *ao, const char *str) {
 	ut64 offset = a->pc;
-	ut8 *data = ao->buf;
+	ut8 *data =  (ut8 *)r_strbuf_get (&ao->buf);
 	size_t pos = 0, nextpos;
 	x86newTokenType ttype;
 	char mnemonic[12];

libr/asm/p/asm_x86_udis.c

@@ -1,4 +1,4 @@
-/* radare - LGPL - Copyright 2009-2014 - pancake, nibble */
+/* radare - LGPL - Copyright 2009-2018 - pancake, nibble */
 
 #include <stdio.h>
 #include <string.h>
@@ -11,7 +11,7 @@
 // TODO : split into get/set... we need a way to create binary masks from asm buffers
 // -- move this shit into r_anal.. ??
 // -- delta, size, mode.. mode is for a->pc-5, register handling and things like this
-static int modify(RAsm *a, ut8 *buf, int field, ut64 val) {
+static bool modify(RAsm *a, ut8 *buf, int field, ut64 val) {
 	ut32 val32 = (ut32)val;
 	switch (buf[0]) {
 	case 0x68: // push dword 
@@ -56,16 +56,16 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
 	ud_set_pc (&d, a->pc);
 	ud_set_mode (&d, a->bits);
 	opsize = ud_disassemble (&d);
-	strncpy (op->buf_asm, ud_insn_asm (&d), R_ASM_BUFSIZE-1);
-	op->buf_asm[R_ASM_BUFSIZE-1] = 0;
-	if (opsize<1 || strstr (op->buf_asm, "invalid"))
+	r_strbuf_set (&op->buf_asm, ud_insn_asm (&d));
+	char *buf_asm = r_strbuf_get (&op->buf_asm);
+	if (opsize<1 || strstr (buf_asm, "invalid"))
 		opsize = 0;
 	op->size = opsize;
 	if (a->syntax == R_ASM_SYNTAX_JZ) {
-		if (!strncmp (op->buf_asm, "je ", 3)) {
-			memcpy (op->buf_asm, "jz", 2);
-		} else if (!strncmp (op->buf_asm, "jne ", 4)) {
-			memcpy (op->buf_asm, "jnz", 3);
+		if (!strncmp (buf_asm, "je ", 3)) {
+			memcpy (buf_asm, "jz", 2);
+		} else if (!strncmp (buf_asm, "jne ", 4)) {
+			memcpy (buf_asm, "jnz", 3);
 		}
 	}
 	return opsize;

libr/asm/p/blackfin.mk

@@ -7,4 +7,4 @@ TARGET_BLACKFIN=asm_blackfin.${LIBEXT}
 ALL_TARGETS+=${TARGET_BLACKFIN}
 
 ${TARGET_BLACKFIN}: ${OBJ_BLACKFIN}
-	${CC} ${CFLAGS} -o asm_blackfin.${LIBEXT} ${OBJ_BLACKFIN}
+	${CC} ${CFLAGS} -o asm_blackfin.${LIBEXT} ${OBJ_BLACKFIN} ${LDFLAGS}

libr/asm/p/m68k_net.mk

@@ -7,4 +7,4 @@ TARGET_M68K=asm_m68k_net.${LIBEXT}
 ALL_TARGETS+=${TARGET_M68K}
 
 ${TARGET_M68K}: ${OBJ_M68K}
-	${CC} -shared ${CFLAGS} -o asm_m68k_net.${LIBEXT} ${OBJ_M68K}
+	${CC} -shared ${CFLAGS} -o asm_m68k_net.${LIBEXT} ${OBJ_M68K} ${LDFLAGS}

libr/asm/p/ppc_disasm.mk

@@ -6,4 +6,4 @@ TARGET_PPC_DISASM=asm_ppc_disasm.${LIBEXT}
 ALL_TARGETS+=${TARGET_PPC_DISASM}
 
 ${TARGET_PPC_DISASM}: ${OBJ_PPC_DISASM}
-	${CC} ${CFLAGS} -o asm_ppc_disasm.${LIBEXT} ${OBJ_PPC_DISASM}
+	${CC} ${CFLAGS} -o asm_ppc_disasm.${LIBEXT} ${OBJ_PPC_DISASM} ${LDFLAGS}

libr/asm/p/x86_bea.mk

@@ -11,4 +11,4 @@ CFLAGS+=-I../arch/x86/bea/include
 CFLAGS+=-DUint64=uint64_t
 
 ${TARGET_X86_BEA}: ${OBJ_X86_BEA}
-	${CC} ${CFLAGS} -o ${TARGET_X86_BEA} ${OBJ_X86_BEA}
+	${CC} ${CFLAGS} -o ${TARGET_X86_BEA} ${OBJ_X86_BEA} ${LDFLAGS}

libr/bin/format/dlang/dmangle.d

@@ -0,0 +1,14 @@
+import core.demangle;
+import std.stdio;
+import std.conv;
+import std.string;
+extern (C) const(char)* dlangDemangle(const(char)* str) {
+       return str.to!string().demangle ().toStringz();
+       //return demangle (str.to!string()).toStringz();
+}
+ /*
+void main() {
+       auto str = D_DEMANGLE("_D1a1bFiZi");
+       writeln (str);
+}
+*/

libr/bin/p/bin_atombios.c

@@ -26,10 +26,10 @@ static bool check_bytes(const ut8 *buf, ut64 length) {
 	return true;
 }
 
-static void *load_bytes(RBinFile *arch, const ut8 *buf, ut64 sz, ut64 loadaddr, Sdb *sdb){
+static bool load_bytes(RBinFile *bf, void **bin_obj, const ut8 *buf, ut64 sz, ut64 loadaddr, Sdb *sdb){
 	ut8 i;
 	if (!check_bytes(buf, sz))
-		return R_NOTNULL;
+		return false;
 
 	mastercmdoffset = r_read_at_le16(buf, header + 30) + 4;
 	masterdataoffset = r_read_at_le16(buf, header + 32) + 4;
@@ -54,7 +54,7 @@ static void *load_bytes(RBinFile *arch, const ut8 *buf, ut64 sz, ut64 loadaddr,
 			datatableoffs[i] += 4;
 		}
 	}
-	return R_NOTNULL;
+	return true;
 }
 
 static bool load(RBinFile *bf) {
@@ -64,8 +64,7 @@ static bool load(RBinFile *bf) {
         if (!bf || !bf->o) {
                 return false;
         }
-        bf->o->bin_obj = load_bytes (bf, bytes, sz, bf->o->loadaddr, bf->sdb);
-        return bf->o->bin_obj ? true: false;
+        return load_bytes (bf, &bf->o->bin_obj, bytes, sz, bf->o->loadaddr, bf->sdb);
 }
 
 static RBinInfo* info(RBinFile *arch) {

libr/bin/p/bin_pyc.c

@@ -19,9 +19,8 @@ static bool check_bytes(const ut8 *buf, ut64 length) {
 	return version.magic != -1;
 }
 
-static void *load_bytes(RBinFile *arch, const ut8 *buf, ut64 sz, ut64 loadaddr, Sdb *sdb) {
-	check_bytes (buf, sz);
-	return R_NOTNULL;
+static bool load_bytes(RBinFile *bf, void **bin_obj, const ut8 *buf, ut64 sz, ut64 loadaddr, Sdb *sdb) {
+	return check_bytes (buf, sz);
 }
 
 static RBinInfo *info(RBinFile *arch) {

libr/bin/p/bin_swf.c

@@ -13,11 +13,13 @@ static int check_bytes(const ut8 *buf, ut64 length);
 static char compression;
 static char flashVersion;
 
-static void * load_bytes(RBinFile *arch, const ut8 *buf, ut64 sz, ut64 loadaddr, Sdb *sdb){
-	check_bytes (buf, sz);
-	compression = buf[0];
-	flashVersion = buf[3];
-	return R_NOTNULL;
+static bool load_bytes(RBinFile *bf, void **bin_obj, const ut8 *buf, ut64 sz, ut64 loadaddr, Sdb *sdb){
+	if (check_bytes (buf, sz)) {
+		compression = buf[0];
+		flashVersion = buf[3];
+		return true;
+	}
+	return false;
 }
 
 static int check_bytes(const ut8 *buf, ut64 length) {

libr/debug/Makefile

@@ -1,6 +1,9 @@
 evm:
 	$(MAKE) -C p debug_evm.$(LIBEXT)
 
+unicorn:
+	$(MAKE) -C p debug_unicorn.$(LIBEXT)
+
 all:
 	$(MAKE) -C p
 

libr/debug/p/debug_unicorn.c

@@ -13,6 +13,7 @@
 #include <r_cons.h>
 #include <r_reg.h>
 #include <r_lib.h>
+#include <sdb/sdb.h>
 #include <signal.h>
 #include <sys/types.h>
 #include <sys/param.h>
@@ -189,12 +190,12 @@ static RList *r_debug_unicorn_threads(RDebug *dbg, int pid) {
 	return NULL;
 }
 
-static RList *r_debug_unicorn_tids(int pid) {
+static RList *r_debug_unicorn_tids(RDebug *dbg, int pid) {
 	message ("TODO: Threads: \n");
 	return NULL;
 }
 
-static RList *r_debug_unicorn_pids(int pid) {
+static RList *r_debug_unicorn_pids(RDebug *dbg, int pid) {
 	RList *list = r_list_new ();
 	r_list_append (list, r_debug_pid_new ("???", pid, 0, 's', 0));
 	return list;
@@ -203,16 +204,16 @@ static RList *r_debug_unicorn_pids(int pid) {
 static RList *r_debug_unicorn_map_get(RDebug *dbg) {
 	RDebugMap *m;
 	RList *list;
-	RListIter *iter;
-	RIOSection *sect;
+	SdbListIter *iter;
+	RIOMap *map;
 	int i = 0;
 	list = r_list_new ();
 	//list->free = r_debug_map_free;
-	r_list_foreach (dbg->iob.io->sections, iter, sect) {
-		m = r_debug_map_new (sect->name,
-			sect->vaddr,
-			sect->vaddr + sect->vsize,
-			sect->flags, 0);
+	ls_foreach (dbg->iob.io->maps, iter, map) {
+		m = r_debug_map_new (map->name,
+			map->itv.addr,
+			map->itv.addr + map->itv.size,
+			map->perm, 0);
 		if (m) {
 			r_list_append (list, m);
 		}
@@ -271,7 +272,7 @@ static int r_debug_unicorn_detach(int pid) {
 	return 0;
 }
 
-static int r_debug_unicorn_kill(RDebug *dbg, int pid, int tid, int sig) {
+static bool r_debug_unicorn_kill(RDebug *dbg, int pid, int tid, int sig) {
 	// TODO: implement thread support signaling here
 	message ("TODO: r_debug_unicorn_kill\n");
 	(void)r_debug_unicorn_detach(pid);
@@ -507,9 +508,9 @@ static int r_debug_unicorn_wait(RDebug *dbg, int pid) {
 }
 
 static int r_debug_unicorn_init(RDebug *dbg) {
-	RListIter *iter;
+	SdbListIter *iter;
 	int code_is_mapped;
-	RIOSection *sect;
+	RIOMap *map;
 	int bits = (dbg->bits & R_SYS_BITS_64) ? 64: 32;
 	uc_err err;
 	if (uh) {
@@ -531,7 +532,7 @@ static int r_debug_unicorn_init(RDebug *dbg) {
 		return false;
 	}
 	ut64 lastvaddr = 0LL;
-	int n_sect = r_list_length (dbg->iob.io->sections);
+	int n_sect = ls_length (dbg->iob.io->maps);
 	if (n_sect == 0) {
 		message (logo);
 		message ("[UNICORN] dpa            # reatach to initialize the unicorn\n");
@@ -539,36 +540,35 @@ static int r_debug_unicorn_init(RDebug *dbg) {
 	}
 	code_is_mapped = 0;
 
-	r_list_foreach (dbg->iob.io->sections, iter, sect) {
+	ls_foreach (dbg->iob.io->maps, iter, map) {
 		int perms = 0;
-		if (sect->flags & R_IO_READ) perms |= UC_PROT_READ;
-		if (sect->flags & R_IO_WRITE) perms |= UC_PROT_WRITE;
-		if (sect->flags & R_IO_EXEC) perms |= UC_PROT_EXEC;
-		ut64 mapbase = sect->vaddr >> 12 << 12;
-		int bufdelta = sect->vaddr - mapbase;
+		if (map->perm & R_PERM_R) perms |= UC_PROT_READ;
+		if (map->perm & R_PERM_W) perms |= UC_PROT_WRITE;
+		if (map->perm & R_PERM_X) perms |= UC_PROT_EXEC;
+		ut64 mapbase = map->itv.addr >> 12 << 12;
+		int bufdelta = map->itv.addr - mapbase;
 		ut32 vsz = 64 * 1024;
 		ut8 *buf;
-		int i;
-		if (sect->vaddr < lastvaddr)
+		if (map->itv.addr < lastvaddr)
 			continue;
-		if (!(sect->flags & 1))
+		if (!(map->perm & 1))
 			continue;
-		if (!strstr (sect->name, "text"))
+		if (!strstr (map->name, "text"))
 			continue;
 		buf = calloc (vsz+bufdelta+1024, 1);
 		if (!buf) continue;
 		message ("[UNICORN] BASE 0x%08"PFMT64x"\n", mapbase);
 		//message ("DELTA = %d SIZE = %d\n", bufdelta,
-			//R_MIN (sect->vsize, (vsz - bufdelta)));
-		dbg->iob.read_at (dbg->iob.io, sect->vaddr, buf + bufdelta,
-			R_MIN (sect->vsize, (vsz - bufdelta)));
+			//R_MIN (map->itv.size, (vsz - bufdelta)));
+		dbg->iob.read_at (dbg->iob.io, map->itv.addr, buf + bufdelta,
+			R_MIN (map->itv.size, (vsz - bufdelta)));
 		message ("[UNICORN] Segment 0x%08"PFMT64x" 0x%08"PFMT64x" Size %d\n",
-			sect->vaddr, sect->vaddr + vsz, vsz);
+			map->itv.addr, map->itv.addr + vsz, vsz);
 		err = uc_mem_map_ptr (uh, mapbase, vsz, perms, buf);
 		if (err) {
 			message("[UNICORN] muc_mem_map_ptr failed to allocated %d\n", vsz);
 		}
-		//err = uc_mem_write (uh, sect->vaddr, buf, vsz);
+		//err = uc_mem_write (uh, map->itv.addr, buf, vsz);
 		/*
 		err = uc_mem_write (uh, mapbase, buf, vsz);
 		if (err) {
@@ -577,9 +577,9 @@ static int r_debug_unicorn_init(RDebug *dbg) {
 		//eprintf ("%02x %02x\n", buf[0], buf[1]);
 		//eprintf ("WRT = %d\n", err);
 
-		//err = uc_mem_read (uh, mapbase, buf, vsz); //sect->vsize+bufdelta);
+		//err = uc_mem_read (uh, mapbase, buf, vsz); //map->itv.size+bufdelta);
 		//eprintf ("RAD = %d\n", err);
-		lastvaddr = sect->vaddr + sect->vsize;
+		lastvaddr = map->itv.addr + map->itv.size;
 		code_is_mapped = 1;
 		if (JUST_FIRST_BLOCK) break;
 //break;

libr/io/p/io_evm.c

@@ -352,7 +352,7 @@ static int init_curl(RIOEvm *rioe) {
 }
 
 static int evm_read_tx_trace(RIOEvm *rioe) {
-	char *url;
+	char *url = NULL;
 	int ret = -1;
 	size_t urlmaxlen = sizeof("http://") + sizeof(":65535") + strlen (rioe->host);
 	size_t postfields_len = strlen (tx_trace_req_pattern) + strlen (rioe->tx) + 8;
@@ -423,7 +423,7 @@ out:
 }
 
 static int evm_read_tx(RIOEvm *rioe) {
-	char *url;
+	char *url = NULL;
 	int ret = -1;
 	size_t urlmaxlen = sizeof("http://") + sizeof(":65535") + strlen (rioe->host);
 	size_t postfields_len = strlen (get_tx_pattern) + strlen (rioe->tx) + 8;
@@ -486,7 +486,7 @@ out:
 }
 
 static int evm_read_code(RIOEvm *rioe) {
-	char *url;
+	char *url = NULL;
 	int ret = -1;
 	const char *contract_addr;
 	size_t urlmaxlen = sizeof("http://") + sizeof(":65535") + strlen (rioe->host);
@@ -652,7 +652,7 @@ static RIODesc *__open(RIO *io, const char *file, int rw, int mode) {
 		goto out_free;
 	}
 
-	ret = r_io_desc_new (io, &r_io_plugin_evm, file, R_IO_RWX, mode, rioe);
+	ret = r_io_desc_new (io, &r_io_plugin_evm, file, R_PERM_RWX, mode, rioe);
 	rioevm = ret;
 	rioe_ptr = rioe;
 

md380/Makefile

@@ -0,0 +1,11 @@
+all:
+	$(MAKE) -C bin-fw
+	$(MAKE) -C io-dfu
+
+install:
+	$(MAKE) -C bin-fw install
+	$(MAKE) -C io-dfu install
+
+uninstall:
+	$(MAKE) -C bin-fw uninstall
+	$(MAKE) -C io-dfu uninstall

md380/bin-fw/bin_md380fw.c

@@ -1,7 +1,8 @@
-/* radare2 - LGPL - Copyright 2017 - pancake */
+/* radare2 - LGPL - Copyright 2017-2019 - pancake */
 
 #include <r_lib.h>
 #include <r_bin.h>
+#include <r_util.h>
 
 static bool check_bytes(const ut8 *buf, ut64 length) {
 	if (buf && length >= 32) {
@@ -13,18 +14,23 @@ static bool check_bytes(const ut8 *buf, ut64 length) {
 }
 
 static ut32 readLE32(RBuffer *buf, int off) {
-	int left = 0;
-	const ut8 *data = r_buf_get_at (buf, off, &left);
-	return left > 3? r_read_le32 (data): 0;
+	return r_buf_read_le32_at (buf, off);
 }
 
-static void * load_bytes(RBinFile *arch, const ut8 *buf, ut64 sz, ut64 loadaddr, Sdb *sdb){
-	return (void*)(size_t)check_bytes (buf, sz);
+static bool load_bytes(RBinFile *bf, void **bin_obj, const ut8 *buf, ut64 sz, ut64 loadaddr, Sdb *sdb){
+	return (bool)(void*)(size_t)check_bytes (buf, sz);
+}
+
+static void * load_buffer(RBinFile *arch, RBuffer *buf, ut64 loadaddr, Sdb *sdb){
+	ut8 data[64];
+	int data_len = r_buf_read_at (buf, 0, data, sizeof (data));
+	void *bo = NULL;
+	return (void*)(bool)(load_bytes (arch, &bo, data, data_len, loadaddr, sdb));
 }
 
 static bool load(RBinFile *arch) {
-	const ut8 *bytes = arch ? r_buf_buffer (arch->buf) : NULL;
-	ut64 sz = arch ? r_buf_size (arch->buf): 0;
+	ut64 sz;
+	const ut8 *bytes = arch ? r_buf_buffer (arch->buf, &sz) : NULL;
 	return check_bytes (bytes, sz);
 }
 
@@ -61,16 +67,17 @@ static RList* sections(RBinFile *bf) {
 	if (!(ptr = R_NEW0 (RBinSection))) {
 		return ret;
 	}
-	ut64 vaddr = (ut64)readLE32(bf->buf, 0x80);
+	ut64 vaddr = (ut64)readLE32 (bf->buf, 0x80);
 	ut64 psize = (ut64)readLE32(bf->buf, 0x84);
-	strncpy (ptr->name, "system", R_BIN_SIZEOF_STRINGS);
+	ptr->name = strdup ("system");
 	ptr->size = psize;
 	ptr->arch = strdup ("arm");
 	ptr->bits = 16;
 	ptr->vsize = psize;
 	ptr->paddr = 0x100;
 	ptr->vaddr = vaddr;
-	ptr->srwx = R_BIN_SCN_READABLE | R_BIN_SCN_EXECUTABLE | R_BIN_SCN_MAP; // r-x
+	ptr->perm = R_PERM_RX;
+	ptr->add = true;
 	r_list_append (ret, ptr);
 
 	return ret;
@@ -98,9 +105,8 @@ static RBinInfo* info(RBinFile *bf) {
 		ret->os = strdup ("tytera");
 		ret->arch = strdup ("arm");
 		ret->machine = strdup (ret->arch);
-int left;
-		const char *subSystem = (const char *)r_buf_get_at (bf->buf, 0x10, &left);
-		ret->subsystem = strdup (left>0?subSystem: "");
+		int left;
+		ret->subsystem = r_buf_get_string (bf->buf, 0x10);
 		ret->type = strdup ("Firmware");
 		ret->bits = 16;
 		ret->has_va = true;
@@ -120,6 +126,7 @@ RBinPlugin r_bin_plugin_bcl = {
 	.license = "BSD",
 	.load = &load,
 	.load_bytes = &load_bytes,
+	.load_buffer = &load_buffer,
 	.size = &size,
 	// .check = &check,
 	.check_bytes = &check_bytes,

microblaze/anal/microblaze/gnu/microblaze-dis.c

@@ -476,7 +476,7 @@ microblaze_get_target_address (long inst, bfd_boolean immfound, int immval,
     {
       *targetvalid = FALSE;
     }
-  else if (op->instr_type == branch_inst)
+  else if ((op->instr_type == branch_inst) || (op->instr_type == branch_inst_imm))
     {
       switch (op->inst_type)
 	{

microblaze/anal/microblaze/gnu/microblaze-opc.h

@@ -106,313 +106,312 @@
 
 static struct op_code_struct
 {
-  char *name;
-  short inst_type;            /* Registers and immediate values involved.  */
-  short inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
-  short delay_slots;          /* Info about delay slots needed after this instr. */
-  short immval_mask;
-  unsigned long bit_sequence; /* All the fixed bits for the op are set and 
+	char *name;
+	short inst_type;            /* Registers and immediate values involved.  */
+	short inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
+	short delay_slots;          /* Info about delay slots needed after this instr. */
+	short immval_mask;
+	unsigned long bit_sequence; /* All the fixed bits for the op are set and 
 				 all the variable bits (reg names, imm vals) 
 				 are set to 0.  */ 
-  unsigned long opcode_mask;  /* Which bits define the opcode.  */
-  enum microblaze_instr instr;
-  enum microblaze_instr_type instr_type;
-  /* More info about output format here.  */
+	unsigned long opcode_mask;  /* Which bits define the opcode.  */
+	enum microblaze_instr instr;
+	enum microblaze_instr_type instr_type;
+	/* More info about output format here.  */
 } opcodes[MAX_OPCODES] = 
 { 
-  {"add",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000000, OPCODE_MASK_H4, add, arithmetic_inst },
-  {"rsub",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H4, rsub, arithmetic_inst },
-  {"addc",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000000, OPCODE_MASK_H4, addc, arithmetic_inst },
-  {"rsubc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x0C000000, OPCODE_MASK_H4, rsubc, arithmetic_inst },
-  {"addk",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x10000000, OPCODE_MASK_H4, addk, arithmetic_inst },
-  {"rsubk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000000, OPCODE_MASK_H4, rsubk, arithmetic_inst },
-  {"cmp",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000001, OPCODE_MASK_H4, cmp, arithmetic_inst },
-  {"cmpu",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000003, OPCODE_MASK_H4, cmpu, arithmetic_inst },
-  {"addkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x18000000, OPCODE_MASK_H4, addkc, arithmetic_inst },
-  {"rsubkc",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x1C000000, OPCODE_MASK_H4, rsubkc, arithmetic_inst },
-  {"addi",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, addi, arithmetic_inst },
-  {"rsubi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, rsubi, arithmetic_inst },
-  {"addic", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, addic, arithmetic_inst },
-  {"rsubic",INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, rsubic, arithmetic_inst },
-  {"addik", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, addik, arithmetic_inst },
-  {"rsubik",INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, rsubik, arithmetic_inst },
-  {"addikc",INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, addikc, arithmetic_inst },
-  {"rsubikc",INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, rsubikc, arithmetic_inst },
-  {"mul",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000000, OPCODE_MASK_H4, mul, mult_inst },
-  {"mulh",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000001, OPCODE_MASK_H4, mulh, mult_inst },
-  {"mulhu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000003, OPCODE_MASK_H4, mulhu, mult_inst },
-  {"mulhsu",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000002, OPCODE_MASK_H4, mulhsu, mult_inst },
-  {"idiv",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x48000000, OPCODE_MASK_H4, idiv, div_inst },
-  {"idivu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x48000002, OPCODE_MASK_H4, idivu, div_inst },
-  {"bsll",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000400, OPCODE_MASK_H3, bsll, barrel_shift_inst },
-  {"bsra",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000200, OPCODE_MASK_H3, bsra, barrel_shift_inst },
-  {"bsrl",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000000, OPCODE_MASK_H3, bsrl, barrel_shift_inst },
-  {"get",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C000000, OPCODE_MASK_H32, get, anyware_inst },
-  {"put",   INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C008000, OPCODE_MASK_H32, put, anyware_inst },
-  {"nget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C004000, OPCODE_MASK_H32, nget, anyware_inst },
-  {"nput",  INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00C000, OPCODE_MASK_H32, nput, anyware_inst },
-  {"cget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C002000, OPCODE_MASK_H32, cget, anyware_inst },
-  {"cput",  INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00A000, OPCODE_MASK_H32, cput, anyware_inst },
-  {"ncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006000, OPCODE_MASK_H32, ncget, anyware_inst },
-  {"ncput", INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E000, OPCODE_MASK_H32, ncput, anyware_inst },
-  {"muli",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x60000000, OPCODE_MASK_H, muli, mult_inst },
-  {"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst },
-  {"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst },
-  {"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst },
-  {"or",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, or, logical_inst },
-  {"and",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, and, logical_inst },
-  {"xor",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, xor, logical_inst },
-  {"andn",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000000, OPCODE_MASK_H4, andn, logical_inst },
-  {"pcmpbf",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000400, OPCODE_MASK_H4, pcmpbf, logical_inst },
-  {"pcmpbc",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000400, OPCODE_MASK_H4, pcmpbc, logical_inst },
-  {"pcmpeq",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000400, OPCODE_MASK_H4, pcmpeq, logical_inst },
-  {"pcmpne",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000400, OPCODE_MASK_H4, pcmpne, logical_inst },
-  {"sra",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000001, OPCODE_MASK_H34, sra, logical_inst },
-  {"src",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000021, OPCODE_MASK_H34, src, logical_inst },
-  {"srl",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000041, OPCODE_MASK_H34, srl, logical_inst },
-  {"sext8", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000060, OPCODE_MASK_H34, sext8, logical_inst },
-  {"sext16",INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000061, OPCODE_MASK_H34, sext16, logical_inst },
-  {"wic",   INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst },
-  {"wdc",   INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst },
-  {"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst },
-  {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
-  {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
-  {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst },
-  {"mts",   INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst },
-  {"mfs",   INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
-  {"br",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
-  {"brd",   INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98100000, OPCODE_MASK_H124, brd, branch_inst },
-  {"brld",  INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98140000, OPCODE_MASK_H24, brld, branch_inst },
-  {"bra",   INST_TYPE_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98080000, OPCODE_MASK_H124, bra, branch_inst },
-  {"brad",  INST_TYPE_R2, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98180000, OPCODE_MASK_H124, brad, branch_inst },
-  {"brald", INST_TYPE_RD_R2, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x981C0000, OPCODE_MASK_H24, brald, branch_inst },
-  {"brk",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x980C0000, OPCODE_MASK_H24, microblaze_brk, branch_inst },
-  {"beq",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C000000, OPCODE_MASK_H14, beq, branch_inst },
-  {"beqd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E000000, OPCODE_MASK_H14, beqd, branch_inst },
-  {"bne",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C200000, OPCODE_MASK_H14, bne, branch_inst },
-  {"bned",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E200000, OPCODE_MASK_H14, bned, branch_inst },
-  {"blt",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C400000, OPCODE_MASK_H14, blt, branch_inst },
-  {"bltd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E400000, OPCODE_MASK_H14, bltd, branch_inst },
-  {"ble",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C600000, OPCODE_MASK_H14, ble, branch_inst },
-  {"bled",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E600000, OPCODE_MASK_H14, bled, branch_inst },
-  {"bgt",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C800000, OPCODE_MASK_H14, bgt, branch_inst },
-  {"bgtd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E800000, OPCODE_MASK_H14, bgtd, branch_inst },
-  {"bge",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9CA00000, OPCODE_MASK_H14, bge, branch_inst },
-  {"bged",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9EA00000, OPCODE_MASK_H14, bged, branch_inst },
-  {"ori",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, ori, logical_inst },
-  {"andi",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, andi, logical_inst },
-  {"xori",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, xori, logical_inst },
-  {"andni", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, andni, logical_inst },
-  {"imm",   INST_TYPE_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB0000000, OPCODE_MASK_H12, imm, immediate_inst },
-  {"rtsd",  INST_TYPE_R1_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000000, OPCODE_MASK_H1, rtsd, return_inst },
-  {"rtid",  INST_TYPE_R1_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6200000, OPCODE_MASK_H1, rtid, return_inst },
-  {"rtbd",  INST_TYPE_R1_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6400000, OPCODE_MASK_H1, rtbd, return_inst },
-  {"rted",  INST_TYPE_R1_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6800000, OPCODE_MASK_H1, rted, return_inst },
-  {"bri",   INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8000000, OPCODE_MASK_H12, bri, branch_inst },
-  {"brid",  INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8100000, OPCODE_MASK_H12, brid, branch_inst },
-  {"brlid", INST_TYPE_RD_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8140000, OPCODE_MASK_H2, brlid, branch_inst },
-  {"brai",  INST_TYPE_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8080000, OPCODE_MASK_H12, brai, branch_inst },
-  {"braid", INST_TYPE_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8180000, OPCODE_MASK_H12, braid, branch_inst },
-  {"bralid",INST_TYPE_RD_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB81C0000, OPCODE_MASK_H2, bralid, branch_inst },
-  {"brki",  INST_TYPE_RD_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB80C0000, OPCODE_MASK_H2, brki, branch_inst },
-  {"beqi",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC000000, OPCODE_MASK_H1, beqi, branch_inst },
-  {"beqid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE000000, OPCODE_MASK_H1, beqid, branch_inst },
-  {"bnei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC200000, OPCODE_MASK_H1, bnei, branch_inst },
-  {"bneid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE200000, OPCODE_MASK_H1, bneid, branch_inst },
-  {"blti",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC400000, OPCODE_MASK_H1, blti, branch_inst },
-  {"bltid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE400000, OPCODE_MASK_H1, bltid, branch_inst },
-  {"blei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC600000, OPCODE_MASK_H1, blei, branch_inst },
-  {"bleid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE600000, OPCODE_MASK_H1, bleid, branch_inst },
-  {"bgti",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC800000, OPCODE_MASK_H1, bgti, branch_inst },
-  {"bgtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE800000, OPCODE_MASK_H1, bgtid, branch_inst },
-  {"bgei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBCA00000, OPCODE_MASK_H1, bgei, branch_inst },
-  {"bgeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBEA00000, OPCODE_MASK_H1, bgeid, branch_inst },
-  {"lbu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000000, OPCODE_MASK_H4, lbu, memory_load_inst },
-  {"lbur",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000200, OPCODE_MASK_H4, lbur, memory_load_inst },
-  {"lhu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000000, OPCODE_MASK_H4, lhu, memory_load_inst },
-  {"lhur",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000200, OPCODE_MASK_H4, lhur, memory_load_inst },
-  {"lw",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000000, OPCODE_MASK_H4, lw, memory_load_inst },
-  {"lwr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000200, OPCODE_MASK_H4, lwr, memory_load_inst },
-  {"lwx",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000400, OPCODE_MASK_H4, lwx, memory_load_inst },
-  {"sb",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000000, OPCODE_MASK_H4, sb, memory_store_inst },
-  {"sbr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000200, OPCODE_MASK_H4, sbr, memory_store_inst },
-  {"sh",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000000, OPCODE_MASK_H4, sh, memory_store_inst },
-  {"shr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000200, OPCODE_MASK_H4, shr, memory_store_inst },
-  {"sw",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000000, OPCODE_MASK_H4, sw, memory_store_inst },
-  {"swr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000200, OPCODE_MASK_H4, swr, memory_store_inst },
-  {"swx",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000400, OPCODE_MASK_H4, swx, memory_store_inst },
-  {"lbui",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst },
-  {"lhui",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst },
-  {"lwi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst },
-  {"sbi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF0000000, OPCODE_MASK_H, sbi, memory_store_inst },
-  {"shi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF4000000, OPCODE_MASK_H, shi, memory_store_inst },
-  {"swi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, swi, memory_store_inst },
-  {"nop",   INST_TYPE_NONE, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H1234, invalid_inst, logical_inst }, /* translates to or r0, r0, r0.  */
-  {"la",    INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik.  */
-  {"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42.  */
-  {"not",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA800FFFF, OPCODE_MASK_H34, invalid_inst, logical_inst }, /* not translates to xori rd,ra,-1.  */
-  {"neg",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0.  */
-  {"rtb",   INST_TYPE_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000004, OPCODE_MASK_H1, invalid_inst, return_inst }, /* rtb translates to rts rd, 4.  */
-  {"sub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra.  */
-  {"lmi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst },
-  {"smi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst },
-  {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst },
-  {"msrclr",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94110000, OPCODE_MASK_H23N, msrclr, special_inst },
-  {"fadd",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, fadd, arithmetic_inst },
-  {"frsub",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000080, OPCODE_MASK_H4, frsub, arithmetic_inst },
-  {"fmul",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, fmul, arithmetic_inst },
-  {"fdiv",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, fdiv, arithmetic_inst },
-  {"fcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000210, OPCODE_MASK_H4, fcmp_lt, arithmetic_inst },
-  {"fcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000220, OPCODE_MASK_H4, fcmp_eq, arithmetic_inst },
-  {"fcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000230, OPCODE_MASK_H4, fcmp_le, arithmetic_inst },
-  {"fcmp.gt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000240, OPCODE_MASK_H4, fcmp_gt, arithmetic_inst },
-  {"fcmp.ne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000250, OPCODE_MASK_H4, fcmp_ne, arithmetic_inst },
-  {"fcmp.ge", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000260, OPCODE_MASK_H4, fcmp_ge, arithmetic_inst },
-  {"fcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000200, OPCODE_MASK_H4, fcmp_un, arithmetic_inst },
-  {"flt",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000280, OPCODE_MASK_H4, flt,   arithmetic_inst },
-  {"fint",  INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000300, OPCODE_MASK_H4, fint,  arithmetic_inst },
-  {"fsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000380, OPCODE_MASK_H4, fsqrt, arithmetic_inst },
-  {"tget",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001000, OPCODE_MASK_H32, tget,   anyware_inst },
-  {"tcget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003000, OPCODE_MASK_H32, tcget,  anyware_inst },
-  {"tnget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005000, OPCODE_MASK_H32, tnget,  anyware_inst },
-  {"tncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C007000, OPCODE_MASK_H32, tncget, anyware_inst },
-  {"tput",   INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C009000, OPCODE_MASK_H32, tput,   anyware_inst },
-  {"tcput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00B000, OPCODE_MASK_H32, tcput,  anyware_inst },
-  {"tnput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00D000, OPCODE_MASK_H32, tnput,  anyware_inst },
-  {"tncput", INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00F000, OPCODE_MASK_H32, tncput, anyware_inst },
+	{"add",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000000, OPCODE_MASK_H4, add, arithmetic_inst },
+	{"rsub",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H4, rsub, arithmetic_inst },
+	{"addc",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000000, OPCODE_MASK_H4, addc, arithmetic_inst },
+	{"rsubc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x0C000000, OPCODE_MASK_H4, rsubc, arithmetic_inst },
+	{"addk",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x10000000, OPCODE_MASK_H4, addk, arithmetic_inst },
+	{"rsubk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000000, OPCODE_MASK_H4, rsubk, arithmetic_inst },
+	{"cmp",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000001, OPCODE_MASK_H4, cmp, arithmetic_inst },
+	{"cmpu",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000003, OPCODE_MASK_H4, cmpu, arithmetic_inst },
+	{"addkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x18000000, OPCODE_MASK_H4, addkc, arithmetic_inst },
+	{"rsubkc",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x1C000000, OPCODE_MASK_H4, rsubkc, arithmetic_inst },
+	{"addi",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, addi, arithmetic_inst_imm },
+	{"rsubi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, rsubi, arithmetic_inst_imm },
+	{"addic", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, addic, arithmetic_inst_imm },
+	{"rsubic",INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, rsubic, arithmetic_inst_imm },
+	{"addik", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, addik, arithmetic_inst_imm },
+	{"rsubik",INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, rsubik, arithmetic_inst_imm },
+	{"addikc",INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, addikc, arithmetic_inst_imm },
+	{"rsubikc",INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, rsubikc, arithmetic_inst_imm },
+	{"mul",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000000, OPCODE_MASK_H4, mul, mult_inst },
+	{"mulh",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000001, OPCODE_MASK_H4, mulh, mult_inst },
+	{"mulhu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000003, OPCODE_MASK_H4, mulhu, mult_inst },
+	{"mulhsu",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000002, OPCODE_MASK_H4, mulhsu, mult_inst },
+	{"idiv",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x48000000, OPCODE_MASK_H4, idiv, div_inst },
+	{"idivu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x48000002, OPCODE_MASK_H4, idivu, div_inst },
+	{"bsll",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000400, OPCODE_MASK_H3, bsll, barrel_shift_inst },
+	{"bsra",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000200, OPCODE_MASK_H3, bsra, barrel_shift_inst },
+	{"bsrl",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000000, OPCODE_MASK_H3, bsrl, barrel_shift_inst },
+	{"get",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C000000, OPCODE_MASK_H32, get, anyware_inst },
+	{"put",   INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C008000, OPCODE_MASK_H32, put, anyware_inst },
+	{"nget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C004000, OPCODE_MASK_H32, nget, anyware_inst },
+	{"nput",  INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00C000, OPCODE_MASK_H32, nput, anyware_inst },
+	{"cget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C002000, OPCODE_MASK_H32, cget, anyware_inst },
+	{"cput",  INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00A000, OPCODE_MASK_H32, cput, anyware_inst },
+	{"ncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006000, OPCODE_MASK_H32, ncget, anyware_inst },
+	{"ncput", INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E000, OPCODE_MASK_H32, ncput, anyware_inst },
+	{"muli",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x60000000, OPCODE_MASK_H, muli, mult_inst },
+	{"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst },
+	{"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst },
+	{"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst },
+	{"or",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, or, logical_inst },
+	{"and",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, and, logical_inst },
+	{"xor",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, xor, logical_inst },
+	{"andn",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000000, OPCODE_MASK_H4, andn, logical_inst },
+	{"pcmpbf",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000400, OPCODE_MASK_H4, pcmpbf, logical_inst },
+	{"pcmpbc",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000400, OPCODE_MASK_H4, pcmpbc, logical_inst },
+	{"pcmpeq",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000400, OPCODE_MASK_H4, pcmpeq, logical_inst },
+	{"pcmpne",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000400, OPCODE_MASK_H4, pcmpne, logical_inst },
+	{"sra",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000001, OPCODE_MASK_H34, sra, logical_inst },
+	{"src",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000021, OPCODE_MASK_H34, src, logical_inst },
+	{"srl",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000041, OPCODE_MASK_H34, srl, logical_inst },
+	{"sext8", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000060, OPCODE_MASK_H34, sext8, logical_inst },
+	{"sext16",INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000061, OPCODE_MASK_H34, sext16, logical_inst },
+	{"wic",   INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst },
+	{"wdc",   INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst },
+	{"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst },
+	{"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
+	{"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
+	{"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst },
+	{"mts",   INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst },
+	{"mfs",   INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
+	{"br",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
+	{"brd",   INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98100000, OPCODE_MASK_H124, brd, branch_inst },
+	{"brld",  INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98140000, OPCODE_MASK_H24, brld, branch_inst },
+	{"bra",   INST_TYPE_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98080000, OPCODE_MASK_H124, bra, branch_inst },
+	{"brad",  INST_TYPE_R2, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98180000, OPCODE_MASK_H124, brad, branch_inst },
+	{"brald", INST_TYPE_RD_R2, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x981C0000, OPCODE_MASK_H24, brald, branch_inst },
+	{"brk",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x980C0000, OPCODE_MASK_H24, microblaze_brk, branch_inst },
+	{"beq",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C000000, OPCODE_MASK_H14, beq, branch_inst },
+	{"beqd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E000000, OPCODE_MASK_H14, beqd, branch_inst },
+	{"bne",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C200000, OPCODE_MASK_H14, bne, branch_inst },
+	{"bned",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E200000, OPCODE_MASK_H14, bned, branch_inst },
+	{"blt",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C400000, OPCODE_MASK_H14, blt, branch_inst },
+	{"bltd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E400000, OPCODE_MASK_H14, bltd, branch_inst },
+	{"ble",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C600000, OPCODE_MASK_H14, ble, branch_inst },
+	{"bled",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E600000, OPCODE_MASK_H14, bled, branch_inst },
+	{"bgt",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9C800000, OPCODE_MASK_H14, bgt, branch_inst },
+	{"bgtd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9E800000, OPCODE_MASK_H14, bgtd, branch_inst },
+	{"bge",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9CA00000, OPCODE_MASK_H14, bge, branch_inst },
+	{"bged",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9EA00000, OPCODE_MASK_H14, bged, branch_inst },
+	{"ori",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, ori, logical_inst },
+	{"andi",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, andi, logical_inst },
+	{"xori",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, xori, logical_inst },
+	{"andni", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, andni, logical_inst },
+	{"imm",   INST_TYPE_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB0000000, OPCODE_MASK_H12, imm, immediate_inst },
+	{"rtsd",  INST_TYPE_R1_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000000, OPCODE_MASK_H1, rtsd, return_inst },
+	{"rtid",  INST_TYPE_R1_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6200000, OPCODE_MASK_H1, rtid, return_inst },
+	{"rtbd",  INST_TYPE_R1_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6400000, OPCODE_MASK_H1, rtbd, return_inst },
+	{"rted",  INST_TYPE_R1_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6800000, OPCODE_MASK_H1, rted, return_inst },
+	{"bri",   INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8000000, OPCODE_MASK_H12, bri, branch_inst_imm },
+	{"brid",  INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8100000, OPCODE_MASK_H12, brid, branch_inst_imm },
+	{"brlid", INST_TYPE_RD_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8140000, OPCODE_MASK_H2, brlid, branch_inst_imm },
+	{"brai",  INST_TYPE_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8080000, OPCODE_MASK_H12, brai, branch_inst_imm },
+	{"braid", INST_TYPE_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8180000, OPCODE_MASK_H12, braid, branch_inst_imm },
+	{"bralid",INST_TYPE_RD_IMM, INST_NO_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB81C0000, OPCODE_MASK_H2, bralid, branch_inst_imm },
+	{"brki",  INST_TYPE_RD_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB80C0000, OPCODE_MASK_H2, brki, branch_inst_imm },
+	{"beqi",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC000000, OPCODE_MASK_H1, beqi, branch_inst_imm },
+	{"beqid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE000000, OPCODE_MASK_H1, beqid, branch_inst_imm },
+	{"bnei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC200000, OPCODE_MASK_H1, bnei, branch_inst_imm },
+	{"bneid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE200000, OPCODE_MASK_H1, bneid, branch_inst_imm },
+	{"blti",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC400000, OPCODE_MASK_H1, blti, branch_inst_imm },
+	{"bltid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE400000, OPCODE_MASK_H1, bltid, branch_inst_imm },
+	{"blei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC600000, OPCODE_MASK_H1, blei, branch_inst_imm },
+	{"bleid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE600000, OPCODE_MASK_H1, bleid, branch_inst_imm },
+	{"bgti",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBC800000, OPCODE_MASK_H1, bgti, branch_inst_imm },
+	{"bgtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBE800000, OPCODE_MASK_H1, bgtid, branch_inst_imm },
+	{"bgei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBCA00000, OPCODE_MASK_H1, bgei, branch_inst_imm },
+	{"bgeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBEA00000, OPCODE_MASK_H1, bgeid, branch_inst_imm },
+	{"lbu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000000, OPCODE_MASK_H4, lbu, memory_load_inst },
+	{"lbur",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000200, OPCODE_MASK_H4, lbur, memory_load_inst },
+	{"lhu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000000, OPCODE_MASK_H4, lhu, memory_load_inst },
+	{"lhur",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000200, OPCODE_MASK_H4, lhur, memory_load_inst },
+	{"lw",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000000, OPCODE_MASK_H4, lw, memory_load_inst },
+	{"lwr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000200, OPCODE_MASK_H4, lwr, memory_load_inst },
+	{"lwx",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000400, OPCODE_MASK_H4, lwx, memory_load_inst },
+	{"sb",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000000, OPCODE_MASK_H4, sb, memory_store_inst },
+	{"sbr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000200, OPCODE_MASK_H4, sbr, memory_store_inst },
+	{"sh",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000000, OPCODE_MASK_H4, sh, memory_store_inst },
+	{"shr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000200, OPCODE_MASK_H4, shr, memory_store_inst },
+	{"sw",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000000, OPCODE_MASK_H4, sw, memory_store_inst },
+	{"swr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000200, OPCODE_MASK_H4, swr, memory_store_inst },
+	{"swx",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000400, OPCODE_MASK_H4, swx, memory_store_inst },
+	{"lbui",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst },
+	{"lhui",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst },
+	{"lwi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst },
+	{"sbi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF0000000, OPCODE_MASK_H, sbi, memory_store_inst },
+	{"shi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF4000000, OPCODE_MASK_H, shi, memory_store_inst },
+	{"swi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, swi, memory_store_inst },
+	{"nop",   INST_TYPE_NONE, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H1234, invalid_inst, logical_inst }, /* translates to or r0, r0, r0.  */
+	{"la",    INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik.  */
+	{"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42.  */
+	{"not",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA800FFFF, OPCODE_MASK_H34, invalid_inst, logical_inst }, /* not translates to xori rd,ra,-1.  */
+	{"neg",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0.  */
+	{"rtb",   INST_TYPE_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000004, OPCODE_MASK_H1, invalid_inst, return_inst }, /* rtb translates to rts rd, 4.  */
+	{"sub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra.  */
+	{"lmi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst },
+	{"smi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst },
+	{"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst },
+	{"msrclr",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94110000, OPCODE_MASK_H23N, msrclr, special_inst },
+	{"fadd",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, fadd, arithmetic_inst },
+	{"frsub",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000080, OPCODE_MASK_H4, frsub, arithmetic_inst },
+	{"fmul",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, fmul, arithmetic_inst },
+	{"fdiv",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, fdiv, arithmetic_inst },
+	{"fcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000210, OPCODE_MASK_H4, fcmp_lt, arithmetic_inst },
+	{"fcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000220, OPCODE_MASK_H4, fcmp_eq, arithmetic_inst },
+	{"fcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000230, OPCODE_MASK_H4, fcmp_le, arithmetic_inst },
+	{"fcmp.gt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000240, OPCODE_MASK_H4, fcmp_gt, arithmetic_inst },
+	{"fcmp.ne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000250, OPCODE_MASK_H4, fcmp_ne, arithmetic_inst },
+	{"fcmp.ge", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000260, OPCODE_MASK_H4, fcmp_ge, arithmetic_inst },
+	{"fcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000200, OPCODE_MASK_H4, fcmp_un, arithmetic_inst },
+	{"flt",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000280, OPCODE_MASK_H4, flt,   arithmetic_inst },
+	{"fint",  INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000300, OPCODE_MASK_H4, fint,  arithmetic_inst },
+	{"fsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000380, OPCODE_MASK_H4, fsqrt, arithmetic_inst },
+	{"tget",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001000, OPCODE_MASK_H32, tget,   anyware_inst },
+	{"tcget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003000, OPCODE_MASK_H32, tcget,  anyware_inst },
+	{"tnget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005000, OPCODE_MASK_H32, tnget,  anyware_inst },
+	{"tncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C007000, OPCODE_MASK_H32, tncget, anyware_inst },
+	{"tput",   INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C009000, OPCODE_MASK_H32, tput,   anyware_inst },
+	{"tcput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00B000, OPCODE_MASK_H32, tcput,  anyware_inst },
+	{"tnput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00D000, OPCODE_MASK_H32, tnput,  anyware_inst },
+	{"tncput", INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00F000, OPCODE_MASK_H32, tncput, anyware_inst },
+
+	{"eget",   INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C000400, OPCODE_MASK_H32, eget,   anyware_inst },
+	{"ecget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C002400, OPCODE_MASK_H32, ecget,  anyware_inst },
+	{"neget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C004400, OPCODE_MASK_H32, neget,  anyware_inst },
+	{"necget", INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006400, OPCODE_MASK_H32, necget, anyware_inst },
+	{"eput",   INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C008400, OPCODE_MASK_H32, eput,   anyware_inst },
+	{"ecput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00A400, OPCODE_MASK_H32, ecput,  anyware_inst },
+	{"neput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00C400, OPCODE_MASK_H32, neput,  anyware_inst },
+	{"necput", INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E400, OPCODE_MASK_H32, necput, anyware_inst },
+
+	{"teget",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001400, OPCODE_MASK_H32, teget,   anyware_inst },
+	{"tecget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003400, OPCODE_MASK_H32, tecget,  anyware_inst },
+	{"tneget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005400, OPCODE_MASK_H32, tneget,  anyware_inst },
+	{"tnecget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C007400, OPCODE_MASK_H32, tnecget, anyware_inst },
+	{"teput",   INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C009400, OPCODE_MASK_H32, teput,   anyware_inst },
+	{"tecput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00B400, OPCODE_MASK_H32, tecput,  anyware_inst },
+	{"tneput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00D400, OPCODE_MASK_H32, tneput,  anyware_inst },
+	{"tnecput", INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00F400, OPCODE_MASK_H32, tnecput, anyware_inst },
  
-  {"eget",   INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C000400, OPCODE_MASK_H32, eget,   anyware_inst },
-  {"ecget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C002400, OPCODE_MASK_H32, ecget,  anyware_inst },
-  {"neget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C004400, OPCODE_MASK_H32, neget,  anyware_inst },
-  {"necget", INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006400, OPCODE_MASK_H32, necget, anyware_inst },
-  {"eput",   INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C008400, OPCODE_MASK_H32, eput,   anyware_inst },
-  {"ecput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00A400, OPCODE_MASK_H32, ecput,  anyware_inst },
-  {"neput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00C400, OPCODE_MASK_H32, neput,  anyware_inst },
-  {"necput", INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E400, OPCODE_MASK_H32, necput, anyware_inst },
+	{"aget",   INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C000800, OPCODE_MASK_H32, aget,   anyware_inst },
+	{"caget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C002800, OPCODE_MASK_H32, caget,  anyware_inst },
+	{"naget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C004800, OPCODE_MASK_H32, naget,  anyware_inst },
+	{"ncaget", INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006800, OPCODE_MASK_H32, ncaget, anyware_inst },
+	{"aput",   INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C008800, OPCODE_MASK_H32, aput,   anyware_inst },
+	{"caput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00A800, OPCODE_MASK_H32, caput,  anyware_inst },
+	{"naput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00C800, OPCODE_MASK_H32, naput,  anyware_inst },
+	{"ncaput", INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E800, OPCODE_MASK_H32, ncaput, anyware_inst },
  
-  {"teget",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001400, OPCODE_MASK_H32, teget,   anyware_inst },
-  {"tecget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003400, OPCODE_MASK_H32, tecget,  anyware_inst },
-  {"tneget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005400, OPCODE_MASK_H32, tneget,  anyware_inst },
-  {"tnecget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C007400, OPCODE_MASK_H32, tnecget, anyware_inst },
-  {"teput",   INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C009400, OPCODE_MASK_H32, teput,   anyware_inst },
-  {"tecput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00B400, OPCODE_MASK_H32, tecput,  anyware_inst },
-  {"tneput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00D400, OPCODE_MASK_H32, tneput,  anyware_inst },
-  {"tnecput", INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00F400, OPCODE_MASK_H32, tnecput, anyware_inst },
+	{"taget",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001800, OPCODE_MASK_H32, taget,   anyware_inst },
+	{"tcaget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003800, OPCODE_MASK_H32, tcaget,  anyware_inst },
+	{"tnaget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005800, OPCODE_MASK_H32, tnaget,  anyware_inst },
+	{"tncaget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C007800, OPCODE_MASK_H32, tncaget, anyware_inst },
+	{"taput",   INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C009800, OPCODE_MASK_H32, taput,   anyware_inst },
+	{"tcaput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00B800, OPCODE_MASK_H32, tcaput,  anyware_inst },
+	{"tnaput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00D800, OPCODE_MASK_H32, tnaput,  anyware_inst },
+	{"tncaput", INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00F800, OPCODE_MASK_H32, tncaput, anyware_inst },
  
-  {"aget",   INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C000800, OPCODE_MASK_H32, aget,   anyware_inst },
-  {"caget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C002800, OPCODE_MASK_H32, caget,  anyware_inst },
-  {"naget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C004800, OPCODE_MASK_H32, naget,  anyware_inst },
-  {"ncaget", INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006800, OPCODE_MASK_H32, ncaget, anyware_inst },
-  {"aput",   INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C008800, OPCODE_MASK_H32, aput,   anyware_inst },
-  {"caput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00A800, OPCODE_MASK_H32, caput,  anyware_inst },
-  {"naput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00C800, OPCODE_MASK_H32, naput,  anyware_inst },
-  {"ncaput", INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E800, OPCODE_MASK_H32, ncaput, anyware_inst },
+	{"eaget",   INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C000C00, OPCODE_MASK_H32, eget,   anyware_inst },
+	{"ecaget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C002C00, OPCODE_MASK_H32, ecget,  anyware_inst },
+	{"neaget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C004C00, OPCODE_MASK_H32, neget,  anyware_inst },
+	{"necaget", INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006C00, OPCODE_MASK_H32, necget, anyware_inst },
+	{"eaput",   INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C008C00, OPCODE_MASK_H32, eput,   anyware_inst },
+	{"ecaput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00AC00, OPCODE_MASK_H32, ecput,  anyware_inst },
+	{"neaput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00CC00, OPCODE_MASK_H32, neput,  anyware_inst },
+	{"necaput", INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00EC00, OPCODE_MASK_H32, necput, anyware_inst },
  
-  {"taget",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001800, OPCODE_MASK_H32, taget,   anyware_inst },
-  {"tcaget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003800, OPCODE_MASK_H32, tcaget,  anyware_inst },
-  {"tnaget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005800, OPCODE_MASK_H32, tnaget,  anyware_inst },
-  {"tncaget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C007800, OPCODE_MASK_H32, tncaget, anyware_inst },
-  {"taput",   INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C009800, OPCODE_MASK_H32, taput,   anyware_inst },
-  {"tcaput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00B800, OPCODE_MASK_H32, tcaput,  anyware_inst },
-  {"tnaput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00D800, OPCODE_MASK_H32, tnaput,  anyware_inst },
-  {"tncaput", INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00F800, OPCODE_MASK_H32, tncaput, anyware_inst },
+	{"teaget",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001C00, OPCODE_MASK_H32, teaget,   anyware_inst },
+	{"tecaget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003C00, OPCODE_MASK_H32, tecaget,  anyware_inst },
+	{"tneaget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005C00, OPCODE_MASK_H32, tneaget,  anyware_inst },
+	{"tnecaget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C007C00, OPCODE_MASK_H32, tnecaget, anyware_inst },
+	{"teaput",   INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C009C00, OPCODE_MASK_H32, teaput,   anyware_inst },
+	{"tecaput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00BC00, OPCODE_MASK_H32, tecaput,  anyware_inst },
+	{"tneaput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00DC00, OPCODE_MASK_H32, tneaput,  anyware_inst },
+	{"tnecaput", INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00FC00, OPCODE_MASK_H32, tnecaput, anyware_inst },
  
-  {"eaget",   INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C000C00, OPCODE_MASK_H32, eget,   anyware_inst },
-  {"ecaget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C002C00, OPCODE_MASK_H32, ecget,  anyware_inst },
-  {"neaget",  INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C004C00, OPCODE_MASK_H32, neget,  anyware_inst },
-  {"necaget", INST_TYPE_RD_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006C00, OPCODE_MASK_H32, necget, anyware_inst },
-  {"eaput",   INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C008C00, OPCODE_MASK_H32, eput,   anyware_inst },
-  {"ecaput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00AC00, OPCODE_MASK_H32, ecput,  anyware_inst },
-  {"neaput",  INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00CC00, OPCODE_MASK_H32, neput,  anyware_inst },
-  {"necaput", INST_TYPE_R1_RFSL,  INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00EC00, OPCODE_MASK_H32, necput, anyware_inst },
+	{"getd",    INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000000, OPCODE_MASK_H34C, getd,    anyware_inst },
+	{"tgetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000080, OPCODE_MASK_H34C, tgetd,   anyware_inst },
+	{"cgetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000100, OPCODE_MASK_H34C, cgetd,   anyware_inst },
+	{"tcgetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000180, OPCODE_MASK_H34C, tcgetd,  anyware_inst },
+	{"ngetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000200, OPCODE_MASK_H34C, ngetd,   anyware_inst },
+	{"tngetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000280, OPCODE_MASK_H34C, tngetd,  anyware_inst },
+	{"ncgetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000300, OPCODE_MASK_H34C, ncgetd,  anyware_inst },
+	{"tncgetd", INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000380, OPCODE_MASK_H34C, tncgetd, anyware_inst },
+	{"putd",    INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000400, OPCODE_MASK_H34C, putd,    anyware_inst },
+	{"tputd",   INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000480, OPCODE_MASK_H34C, tputd,   anyware_inst },
+	{"cputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000500, OPCODE_MASK_H34C, cputd,   anyware_inst },
+	{"tcputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000580, OPCODE_MASK_H34C, tcputd,  anyware_inst },
+	{"nputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000600, OPCODE_MASK_H34C, nputd,   anyware_inst },
+	{"tnputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000680, OPCODE_MASK_H34C, tnputd,  anyware_inst },
+	{"ncputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000700, OPCODE_MASK_H34C, ncputd,  anyware_inst },
+	{"tncputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000780, OPCODE_MASK_H34C, tncputd, anyware_inst },
  
-  {"teaget",   INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001C00, OPCODE_MASK_H32, teaget,   anyware_inst },
-  {"tecaget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003C00, OPCODE_MASK_H32, tecaget,  anyware_inst },
-  {"tneaget",  INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005C00, OPCODE_MASK_H32, tneaget,  anyware_inst },
-  {"tnecaget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C007C00, OPCODE_MASK_H32, tnecaget, anyware_inst },
-  {"teaput",   INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C009C00, OPCODE_MASK_H32, teaput,   anyware_inst },
-  {"tecaput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00BC00, OPCODE_MASK_H32, tecaput,  anyware_inst },
-  {"tneaput",  INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00DC00, OPCODE_MASK_H32, tneaput,  anyware_inst },
-  {"tnecaput", INST_TYPE_RFSL,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00FC00, OPCODE_MASK_H32, tnecaput, anyware_inst },
+	{"egetd",    INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000020, OPCODE_MASK_H34C, egetd,    anyware_inst },
+	{"tegetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0000A0, OPCODE_MASK_H34C, tegetd,   anyware_inst },
+	{"ecgetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000120, OPCODE_MASK_H34C, ecgetd,   anyware_inst },
+	{"tecgetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0001A0, OPCODE_MASK_H34C, tecgetd,  anyware_inst },
+	{"negetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000220, OPCODE_MASK_H34C, negetd,   anyware_inst },
+	{"tnegetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0002A0, OPCODE_MASK_H34C, tnegetd,  anyware_inst },
+	{"necgetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000320, OPCODE_MASK_H34C, necgetd,  anyware_inst },
+	{"tnecgetd", INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0003A0, OPCODE_MASK_H34C, tnecgetd, anyware_inst },
+	{"eputd",    INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000420, OPCODE_MASK_H34C, eputd,    anyware_inst },
+	{"teputd",   INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0004A0, OPCODE_MASK_H34C, teputd,   anyware_inst },
+	{"ecputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000520, OPCODE_MASK_H34C, ecputd,   anyware_inst },
+	{"tecputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0005A0, OPCODE_MASK_H34C, tecputd,  anyware_inst },
+	{"neputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000620, OPCODE_MASK_H34C, neputd,   anyware_inst },
+	{"tneputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0006A0, OPCODE_MASK_H34C, tneputd,  anyware_inst },
+	{"necputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000720, OPCODE_MASK_H34C, necputd,  anyware_inst },
+	{"tnecputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0007A0, OPCODE_MASK_H34C, tnecputd, anyware_inst },
  
-  {"getd",    INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000000, OPCODE_MASK_H34C, getd,    anyware_inst },
-  {"tgetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000080, OPCODE_MASK_H34C, tgetd,   anyware_inst },
-  {"cgetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000100, OPCODE_MASK_H34C, cgetd,   anyware_inst },
-  {"tcgetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000180, OPCODE_MASK_H34C, tcgetd,  anyware_inst },
-  {"ngetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000200, OPCODE_MASK_H34C, ngetd,   anyware_inst },
-  {"tngetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000280, OPCODE_MASK_H34C, tngetd,  anyware_inst },
-  {"ncgetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000300, OPCODE_MASK_H34C, ncgetd,  anyware_inst },
-  {"tncgetd", INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000380, OPCODE_MASK_H34C, tncgetd, anyware_inst },
-  {"putd",    INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000400, OPCODE_MASK_H34C, putd,    anyware_inst },
-  {"tputd",   INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000480, OPCODE_MASK_H34C, tputd,   anyware_inst },
-  {"cputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000500, OPCODE_MASK_H34C, cputd,   anyware_inst },
-  {"tcputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000580, OPCODE_MASK_H34C, tcputd,  anyware_inst },
-  {"nputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000600, OPCODE_MASK_H34C, nputd,   anyware_inst },
-  {"tnputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000680, OPCODE_MASK_H34C, tnputd,  anyware_inst },
-  {"ncputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000700, OPCODE_MASK_H34C, ncputd,  anyware_inst },
-  {"tncputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000780, OPCODE_MASK_H34C, tncputd, anyware_inst },
+	{"agetd",    INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000040, OPCODE_MASK_H34C, agetd,    anyware_inst },
+	{"tagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0000C0, OPCODE_MASK_H34C, tagetd,   anyware_inst },
+	{"cagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000140, OPCODE_MASK_H34C, cagetd,   anyware_inst },
+	{"tcagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0001C0, OPCODE_MASK_H34C, tcagetd,  anyware_inst },
+	{"nagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000240, OPCODE_MASK_H34C, nagetd,   anyware_inst },
+	{"tnagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0002C0, OPCODE_MASK_H34C, tnagetd,  anyware_inst },
+	{"ncagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000340, OPCODE_MASK_H34C, ncagetd,  anyware_inst },
+	{"tncagetd", INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0003C0, OPCODE_MASK_H34C, tncagetd, anyware_inst },
+	{"aputd",    INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000440, OPCODE_MASK_H34C, aputd,    anyware_inst },
+	{"taputd",   INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0004C0, OPCODE_MASK_H34C, taputd,   anyware_inst },
+	{"caputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000540, OPCODE_MASK_H34C, caputd,   anyware_inst },
+	{"tcaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0005C0, OPCODE_MASK_H34C, tcaputd,  anyware_inst },
+	{"naputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000640, OPCODE_MASK_H34C, naputd,   anyware_inst },
+	{"tnaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0006C0, OPCODE_MASK_H34C, tnaputd,  anyware_inst },
+	{"ncaputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000740, OPCODE_MASK_H34C, ncaputd,  anyware_inst },
+	{"tncaputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0007C0, OPCODE_MASK_H34C, tncaputd, anyware_inst },
  
-  {"egetd",    INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000020, OPCODE_MASK_H34C, egetd,    anyware_inst },
-  {"tegetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0000A0, OPCODE_MASK_H34C, tegetd,   anyware_inst },
-  {"ecgetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000120, OPCODE_MASK_H34C, ecgetd,   anyware_inst },
-  {"tecgetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0001A0, OPCODE_MASK_H34C, tecgetd,  anyware_inst },
-  {"negetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000220, OPCODE_MASK_H34C, negetd,   anyware_inst },
-  {"tnegetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0002A0, OPCODE_MASK_H34C, tnegetd,  anyware_inst },
-  {"necgetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000320, OPCODE_MASK_H34C, necgetd,  anyware_inst },
-  {"tnecgetd", INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0003A0, OPCODE_MASK_H34C, tnecgetd, anyware_inst },
-  {"eputd",    INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000420, OPCODE_MASK_H34C, eputd,    anyware_inst },
-  {"teputd",   INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0004A0, OPCODE_MASK_H34C, teputd,   anyware_inst },
-  {"ecputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000520, OPCODE_MASK_H34C, ecputd,   anyware_inst },
-  {"tecputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0005A0, OPCODE_MASK_H34C, tecputd,  anyware_inst },
-  {"neputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000620, OPCODE_MASK_H34C, neputd,   anyware_inst },
-  {"tneputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0006A0, OPCODE_MASK_H34C, tneputd,  anyware_inst },
-  {"necputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000720, OPCODE_MASK_H34C, necputd,  anyware_inst },
-  {"tnecputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0007A0, OPCODE_MASK_H34C, tnecputd, anyware_inst },
- 
-  {"agetd",    INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000040, OPCODE_MASK_H34C, agetd,    anyware_inst },
-  {"tagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0000C0, OPCODE_MASK_H34C, tagetd,   anyware_inst },
-  {"cagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000140, OPCODE_MASK_H34C, cagetd,   anyware_inst },
-  {"tcagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0001C0, OPCODE_MASK_H34C, tcagetd,  anyware_inst },
-  {"nagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000240, OPCODE_MASK_H34C, nagetd,   anyware_inst },
-  {"tnagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0002C0, OPCODE_MASK_H34C, tnagetd,  anyware_inst },
-  {"ncagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000340, OPCODE_MASK_H34C, ncagetd,  anyware_inst },
-  {"tncagetd", INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0003C0, OPCODE_MASK_H34C, tncagetd, anyware_inst },
-  {"aputd",    INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000440, OPCODE_MASK_H34C, aputd,    anyware_inst },
-  {"taputd",   INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0004C0, OPCODE_MASK_H34C, taputd,   anyware_inst },
-  {"caputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000540, OPCODE_MASK_H34C, caputd,   anyware_inst },
-  {"tcaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0005C0, OPCODE_MASK_H34C, tcaputd,  anyware_inst },
-  {"naputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000640, OPCODE_MASK_H34C, naputd,   anyware_inst },
-  {"tnaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0006C0, OPCODE_MASK_H34C, tnaputd,  anyware_inst },
-  {"ncaputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000740, OPCODE_MASK_H34C, ncaputd,  anyware_inst },
-  {"tncaputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0007C0, OPCODE_MASK_H34C, tncaputd, anyware_inst },
- 
-  {"eagetd",    INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000060, OPCODE_MASK_H34C, eagetd,    anyware_inst },
-  {"teagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0000E0, OPCODE_MASK_H34C, teagetd,   anyware_inst },
-  {"ecagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000160, OPCODE_MASK_H34C, ecagetd,   anyware_inst },
-  {"tecagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0001E0, OPCODE_MASK_H34C, tecagetd,  anyware_inst },
-  {"neagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000260, OPCODE_MASK_H34C, neagetd,   anyware_inst },
-  {"tneagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0002E0, OPCODE_MASK_H34C, tneagetd,  anyware_inst },
-  {"necagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000360, OPCODE_MASK_H34C, necagetd,  anyware_inst },
-  {"tnecagetd", INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0003E0, OPCODE_MASK_H34C, tnecagetd, anyware_inst },
-  {"eaputd",    INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000460, OPCODE_MASK_H34C, eaputd,    anyware_inst },
-  {"teaputd",   INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0004E0, OPCODE_MASK_H34C, teaputd,   anyware_inst },
-  {"ecaputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000560, OPCODE_MASK_H34C, ecaputd,   anyware_inst },
-  {"tecaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0005E0, OPCODE_MASK_H34C, tecaputd,  anyware_inst },
-  {"neaputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000660, OPCODE_MASK_H34C, neaputd,   anyware_inst },
-  {"tneaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0006E0, OPCODE_MASK_H34C, tneaputd,  anyware_inst },
-  {"necaputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000760, OPCODE_MASK_H34C, necaputd,  anyware_inst },
-  {"tnecaputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0007E0, OPCODE_MASK_H34C, tnecaputd, anyware_inst },
-  {"clz",       INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34,  clz,       special_inst },
-  {"mbar",      INST_TYPE_IMM5,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN,   mbar,      special_inst },
-  {"sleep",     INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 16.  */
-  {"swapb",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4,   swapb,     arithmetic_inst },
-  {"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
-  {NULL, 0, 0, 0, 0, 0, 0, 0, 0},
+	{"eagetd",    INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000060, OPCODE_MASK_H34C, eagetd,    anyware_inst },
+	{"teagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0000E0, OPCODE_MASK_H34C, teagetd,   anyware_inst },
+	{"ecagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000160, OPCODE_MASK_H34C, ecagetd,   anyware_inst },
+	{"tecagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0001E0, OPCODE_MASK_H34C, tecagetd,  anyware_inst },
+	{"neagetd",   INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000260, OPCODE_MASK_H34C, neagetd,   anyware_inst },
+	{"tneagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0002E0, OPCODE_MASK_H34C, tneagetd,  anyware_inst },
+	{"necagetd",  INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000360, OPCODE_MASK_H34C, necagetd,  anyware_inst },
+	{"tnecagetd", INST_TYPE_RD_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0003E0, OPCODE_MASK_H34C, tnecagetd, anyware_inst },
+	{"eaputd",    INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000460, OPCODE_MASK_H34C, eaputd,    anyware_inst },
+	{"teaputd",   INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0004E0, OPCODE_MASK_H34C, teaputd,   anyware_inst },
+	{"ecaputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000560, OPCODE_MASK_H34C, ecaputd,   anyware_inst },
+	{"tecaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0005E0, OPCODE_MASK_H34C, tecaputd,  anyware_inst },
+	{"neaputd",   INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000660, OPCODE_MASK_H34C, neaputd,   anyware_inst },
+	{"tneaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0006E0, OPCODE_MASK_H34C, tneaputd,  anyware_inst },
+	{"necaputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000760, OPCODE_MASK_H34C, necaputd,  anyware_inst },
+	{"tnecaputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0007E0, OPCODE_MASK_H34C, tnecaputd, anyware_inst },
+	{"clz",       INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34,  clz,       special_inst },
+	{"mbar",      INST_TYPE_IMM5,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN,   mbar,      special_inst },
+	{"sleep",     INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 16.  */
+	{"swapb",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4,   swapb,     arithmetic_inst },
+	{"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
+	{NULL, 0, 0, 0, 0, 0, 0, 0, 0},
 };
 
 /* Prefix for register names.  */
 char register_prefix[] = "r";
-char special_register_prefix[] = "spr";
 char fsl_register_prefix[] = "rfsl";
 char pvr_register_prefix[] = "rpvr";
 

microblaze/anal/microblaze/gnu/microblaze-opcm.h

@@ -25,45 +25,45 @@
 
 enum microblaze_instr
 {
-  add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu,
-  addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, 
-  mulh, mulhu, mulhsu,swapb,swaph,
-  idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput,
-  ncget, ncput, muli, bslli, bsrai, bsrli, mului, or, and, xor,
-  andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, 
-  wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar,
-  br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned,
-  blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
-  imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
-  brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
-  bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, 
-  shr, sw, swr, swx, lbui, lhui, lwi,
-  sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, 
-  fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, 
-  fint, fsqrt, 
-  tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
-  eget, ecget, neget, necget, eput, ecput, neput, necput,
-  teget, tecget, tneget, tnecget, teput, tecput, tneput, tnecput,
-  aget, caget, naget, ncaget, aput, caput, naput, ncaput,
-  taget, tcaget, tnaget, tncaget, taput, tcaput, tnaput, tncaput,
-  eaget, ecaget, neaget, necaget, eaput, ecaput, neaput, necaput,
-  teaget, tecaget, tneaget, tnecaget, teaput, tecaput, tneaput, tnecaput,
-  getd, tgetd, cgetd, tcgetd, ngetd, tngetd, ncgetd, tncgetd,
-  putd, tputd, cputd, tcputd, nputd, tnputd, ncputd, tncputd,
-  egetd, tegetd, ecgetd, tecgetd, negetd, tnegetd, necgetd, tnecgetd,
-  eputd, teputd, ecputd, tecputd, neputd, tneputd, necputd, tnecputd,
-  agetd, tagetd, cagetd, tcagetd, nagetd, tnagetd, ncagetd, tncagetd,
-  aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd,
-  eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd,
-  eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd,
-  invalid_inst
+	add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu,
+ 	addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, 
+ 	mulh, mulhu, mulhsu,swapb,swaph,
+ 	idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput,
+ 	ncget, ncput, muli, bslli, bsrai, bsrli, mului, or, and, xor,
+ 	andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, 
+ 	wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar,
+ 	br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned,
+ 	blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
+ 	imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
+ 	brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
+ 	bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, 
+ 	shr, sw, swr, swx, lbui, lhui, lwi,
+ 	sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, 
+ 	fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, 
+ 	fint, fsqrt, 
+ 	tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
+ 	eget, ecget, neget, necget, eput, ecput, neput, necput,
+ 	teget, tecget, tneget, tnecget, teput, tecput, tneput, tnecput,
+ 	aget, caget, naget, ncaget, aput, caput, naput, ncaput,
+ 	taget, tcaget, tnaget, tncaget, taput, tcaput, tnaput, tncaput,
+ 	eaget, ecaget, neaget, necaget, eaput, ecaput, neaput, necaput,
+ 	teaget, tecaget, tneaget, tnecaget, teaput, tecaput, tneaput, tnecaput,
+ 	getd, tgetd, cgetd, tcgetd, ngetd, tngetd, ncgetd, tncgetd,
+ 	putd, tputd, cputd, tcputd, nputd, tnputd, ncputd, tncputd,
+ 	egetd, tegetd, ecgetd, tecgetd, negetd, tnegetd, necgetd, tnecgetd,
+	eputd, teputd, ecputd, tecputd, neputd, tneputd, necputd, tnecputd,
+	agetd, tagetd, cagetd, tcagetd, nagetd, tnagetd, ncagetd, tncagetd,
+ 	aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd,
+	eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd,
+	eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd,
+	invalid_inst
 };
 
 enum microblaze_instr_type
 {
-  arithmetic_inst, logical_inst, mult_inst, div_inst, branch_inst,
-  return_inst, immediate_inst, special_inst, memory_load_inst,
-  memory_store_inst, barrel_shift_inst, anyware_inst
+	arithmetic_inst, arithmetic_inst_imm, logical_inst, mult_inst, div_inst, branch_inst,
+	branch_inst_imm, return_inst, immediate_inst, special_inst, memory_load_inst,
+	memory_store_inst, barrel_shift_inst, anyware_inst
 };
 
 #define INST_WORD_SIZE 4

microblaze/asm/asm_microblaze_gnu.c

@@ -12,7 +12,7 @@
 #include "dis-asm.h"
 
 static unsigned long Offset = 0;
-static char *buf_global = NULL;
+static RStrBuf *buf_global = NULL;
 static unsigned char bytes[4];
 
 static int microblaze_buffer_read_memory (bfd_vma memaddr, bfd_byte *myaddr, unsigned int length, struct disassemble_info *info) {
@@ -28,28 +28,18 @@ static void memory_error_func(int status, bfd_vma memaddr, struct disassemble_in
 }
 
 static void print_address(bfd_vma address, struct disassemble_info *info) {
-	char tmp[32];
 	if (buf_global == NULL)
 		return;
-	sprintf (tmp, "0x%08"PFMT64x, (ut64)address);
-	strcat (buf_global, tmp);
+	r_strbuf_appendf (buf_global, "0x%08"PFMT64x, (ut64)address);
 }
 
 static int buf_fprintf(void *stream, const char *format, ...) {
 	va_list ap;
-	char *tmp;
 	if (buf_global == NULL || format == NULL)
 		return false;
 	va_start (ap, format);
- 	tmp = malloc (strlen (format)+strlen (buf_global)+2);
-	if (tmp == NULL) {
-		va_end (ap);
-		return false;
-	}
-	sprintf (tmp, "%s%s", buf_global, format);
-	vsprintf (buf_global, tmp, ap);
+	r_strbuf_vappendf (buf_global, format, ap);
 	va_end (ap);
-	free (tmp);
 	return true;
 }
 
@@ -58,7 +48,7 @@ static int disassemble(struct r_asm_t *a, struct r_asm_op_t *op, const ut8 *buf,
 	static struct disassemble_info disasm_obj;
 	if (len<4) return -1;
 
-	buf_global = op->buf_asm;
+	buf_global = &op->buf_asm;
 	Offset = a->pc;
 	if (Offset % 4) return -1;
 
@@ -75,12 +65,12 @@ static int disassemble(struct r_asm_t *a, struct r_asm_op_t *op, const ut8 *buf,
 	disasm_obj.buffer_vma = Offset;
 	disasm_obj.buffer_length = 4;
 	//disasm_obj.endian = a->big_endian ? BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE;
-    // only support little endian for now
+	// only support little endian for now
 	disasm_obj.endian = !a->big_endian;
 	disasm_obj.fprintf_func = &buf_fprintf;
 	disasm_obj.stream = stdout;
 
-	op->buf_asm[0] = '\0';
+	r_strbuf_set (&op->buf_asm, "");
 	op->size = print_insn_microblaze ((bfd_vma)Offset, &disasm_obj);
 	if (op->size == -1)
 		op->size = 4;
@@ -97,7 +87,7 @@ RAsmPlugin r_asm_plugin_microblaze_gnu = {
 };
 
 #ifndef CORELIB
-struct r_lib_struct_t radare_plugin = {
+RLibStruct radare_plugin = {
 	.type = R_LIB_TYPE_ASM,
 	.data = &r_asm_plugin_microblaze_gnu,
 	.version = R2_VERSION

microblaze/asm/microblaze/gnu/microblaze-dis.c

@@ -27,6 +27,7 @@
 #include "dis-asm.h"
 #include <stdlib.h>
 #include <string.h>
+#include <r_asm.h>
 #include "microblaze-opc.h"
 #include "microblaze-dis.h"
 
@@ -96,8 +97,8 @@ get_field_imm15 (long instr)
 static char *
 get_field_special (long instr, struct op_code_struct * op)
 {
-  char tmpstr[25];
-  char spr[6];
+	char *tmpstr;
+	char spr[6];
 
   switch ((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask))
     {
@@ -150,18 +151,18 @@ get_field_special (long instr, struct op_code_struct * op)
       if (((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask) & 0xE000)
           == REG_PVR_MASK)
         {
-	  sprintf (tmpstr, "%spvr%d", register_prefix,
+	  tmpstr = r_str_newf ("%spvr%d", register_prefix,
 		   (unsigned short)(((instr & IMM_MASK) >> IMM_LOW)
                                     ^ op->immval_mask) ^ REG_PVR_MASK);
-	  return (strdup (tmpstr));
+	  return (tmpstr);
         }
       else
         strcpy (spr, "pc");
       break;
     }
 
-   sprintf (tmpstr, "%s%s", register_prefix, spr);
-   return (strdup (tmpstr));
+	tmpstr = r_str_newf ("%s", spr);
+   	return (tmpstr);
 }
 
 static unsigned long

options.mk.acr

@@ -7,6 +7,7 @@ LIBDIR=@LIBDIR@
 INSTALL_LIB=@INSTALL_LIB@
 USEROSTYPE=@USEROSTYPE@
 
+HAVE_LIB_YARA=@HAVE_LIB_YARA@
 HAVE_PKGCFG_UNICORN=@HAVE_PKGCFG_UNICORN@
 UC_CFLAGS=@UC_CFLAGS@
 UC_LDFLAGS=@UC_LDFLAGS@

r2elisa/index.js

@@ -0,0 +1,230 @@
+const r2pipe = require('r2pipe-promise');
+const prompt = require('prompt-sync')();
+
+let r2 = null;
+
+function re(x) {
+  return x[(Math.random()*x.length)|0];
+}
+
+function pdargs(w, ocmd) {
+  const byt = w.before('bytes');
+  const ins = w.before('instructions') || w.before('ops');
+  const at = w.after('at');
+  let res = '';
+  let cmd = ocmd;
+  if (w.have('function')) {
+    cmd = 'pdf';
+  } else if (byt) {
+    cmd = ins? 'pD': 'px';
+    res = ' ' + byt;
+  } else {
+    if (!cmd) cmd = 'pd';
+    if (ins) {
+      res = ' ' + ins;
+    }
+  }
+  if (at) {
+    res += '@ ' + at;
+  }
+  return cmd + res;
+}
+
+async function run(input) {
+  const w = new Api(input);
+  const askPlease = w.have('please');
+  if (w.first('please')) {
+    w.shift();
+  }
+  const search = w.first('find') || w.first('search');
+  if (search) {
+    return 'I am not able to find anything yet';
+  }
+  const print = w.first('list') || w.first('view') || w.first('show') || w.first('print');
+  if (print) {
+    const extra = pdargs(w);
+    const type = w.second() || '';
+    switch (type) {
+    case '':
+      return 'What are you looking for?';
+    case 'imports':
+      return r2.cmd('ii');
+    case 'flag':
+      return r2.cmd('f~' + w.after(type));
+    case 'regs':
+    case 'registers':
+      return r2.cmd('dr=');
+    case 'functions':
+      return r2.cmd('afl');
+    case 'function':
+      if (w.have('code')) return r2.cmd(extra);
+      return r2.cmd('afi');
+    case 'symbols':
+      return r2.cmd('is');
+    case 'hex':
+      return r2.cmd(pdargs(w, 'px'));
+    }
+    return r2.cmd(extra);
+  }
+  if (w.first('code')) {
+    return r2.cmd('pd 10');
+  }
+  if (w.first('analyze')) {
+    const target = w.after('analyze');
+    const everything = w.have('everything');
+    if (everything) {
+      return await r2.cmd('aaa');
+    }
+    if (w.have('symbols')) {
+      return await r2.cmd('aas');
+    }
+    if (w.contains('emula')) {
+      return await r2.cmd('aae');
+    }
+    return r2.cmd('af');
+  }
+  if (w.first('decompile')) {
+    return r2.cmd(pdargs(w, 'pdd'));
+  }
+  if (w.first('count')) {
+    const target = w.after('count');
+    switch (target) {
+    case 'functions':
+      return await r2.cmd('aflc');
+    case 'symbols':
+      return await r2.cmd('is~?');
+    case 'imports':
+      return await r2.cmd('ii~?');
+    default:
+      return 'Expect: symbols|imports|functions';
+    }
+  }
+  if (w.have('help')) {
+    if (askPlease) {
+      return re(['No pleasing in here']);
+    }
+    return re(['You cannot escape', 'Try to follow the conversation']);
+  }
+  if (w.have('what')) {
+    return 'Try list, show, version, count, list, analyze, print';
+  }
+  if (w.first('show') && w.second('version')) {
+    return (await r2.cmd('?V')).trim();
+  }
+  if (w.first('version')) {
+    return (await r2.cmd('?V')).trim();
+  }
+  if (w.contains('thanks')) {
+    return re(['You are welcome', 'No problem']);
+  }
+  if (w.first('hi') || w.first('hello')) {
+    return re(['How are you?', 'Hello back!', 'Welcome r2home!']);
+  }
+  if (w.first('hack')) {
+    return re(['HACK THE PLANET!']);
+  }
+  if (w.first('lol')) {
+    return re(['This was not funny.', 'Hahahh, indeed', 'L O L']);
+  }
+  if (w.isQuestion()) {
+    return re(['Why are you asking?','I dont know the answer', 'Explain it to me again']);
+  }
+  if (w.first('ok') || w.first('yes') || w.first('no') || w.first('maybe')) {
+    return re(['Ssssht. Dont answer now, wait until the end.', 'I dont care', 'Are you sure?', 'Dont insist on that']);
+  }
+  // console.error(words);
+  return re(['Sorry?', 'Uhm.. Are you sure?','What do you mean?']);
+}
+
+async function parse(input) {
+  switch (input) {
+  case 'Bye!':
+  case 'bye!':
+  case 'bye':
+  case 'quit':
+  case 'q':
+    process.exit(0);
+  case '':
+    return '';
+  }
+  return run(input);
+}
+
+async function main() {
+  r2 = await r2pipe.open('/bin/ls'); 
+  await r2.cmd('b 32');
+  console.log(await r2.cmd('?E Welcome lazy human'));
+  while (true) {
+    try {
+      const input = prompt('> ');
+      let res = await parse(input);
+      res = res.trim();
+      if (res.indexOf('\n') === -1) {
+        res = await r2.cmd("?E " + res);
+      }
+      if (res) {
+        console.log(res);
+      }
+    } catch (e) {
+      console.error(e);
+    }
+  }
+  return '';
+}
+
+main().then(console.log).catch(console.error);
+
+///
+class Api {
+  constructor(input) {
+    this.source = input.trim();
+    this.input = this.source.toLowerCase().replace(/,/g, ' ');
+    this.ws = this.input.split(' ');
+  }
+  contains(w) {
+    return this.input.indexOf(w) !== -1;
+  }
+  first(w) {
+    if (this.ws.length > 0) {
+      return w? this.ws[0] === w: ws[0];
+    }
+    return undefined;
+  }
+  second(w) {
+    if (this.ws.length > 1) {
+      return w? (this.ws[1] === w): this.ws[1];
+    }
+    return undefined;
+  }
+  have(x) {
+    return this.ws.indexOf(x) !== -1;
+  }
+  after(x) {
+    const b = this.ws.indexOf(x);
+    if (b >= 0) {
+      return this.ws[b + 1];
+    }
+    return undefined;
+  }
+  before(x) {
+    const b = this.ws.indexOf(x);
+    if (b > 0) {
+      return this.ws[b - 1];
+    }
+    return undefined;
+  }
+  shift() {
+    const ws = this.ws.slice(1);
+    this.ws = ws;
+  }
+  isQuestion() {
+    return this.input.endsWith('?');
+  }
+  isExclamation() {
+    return this.input.endsWith('!');
+  }
+  bytes() {
+    return +this.before('bytes');
+  }
+}
+

r2elisa/package.json

@@ -0,0 +1,16 @@
+{
+  "name": "radare2-shell",
+  "version": "1.0.0",
+  "description": "",
+  "main": "index.js",
+  "dependencies": {
+    "prompt-sync": "^4.1.6",
+    "r2pipe-promise": "^1.4.1"
+  },
+  "devDependencies": {},
+  "scripts": {
+    "test": "echo \"Error: no test specified\" && exit 1"
+  },
+  "author": "",
+  "license": "ISC"
+}

r2elisa/rmoji.txt

@@ -0,0 +1,55 @@
+ .--.    .--------------------.
+ |O O   <  Welcome lazy human |
+ | ||/   `--------------------'
+ `--'
+
+ .--.    .--------------------.
+ |^ ^   <  Welcome lazy human |
+ | \|/   `--------------------'
+ `--'
+
+ .--.
+ |u u
+/. -.\
+ `--'
+
+ .--.
+ |O O 
+/  o \
+ `--'
+
+ .--.
+ | oo
+ |\_/
+ `--'
+
+ .---.
+ |r<<|
+ |___|
+ `---'
+
+ .---. _:---:_ <_<__  
+ |o o|  |. .|   |@ @|
+ | _ |  | L |   |=  |
+  \_/    \_/    |__/
+
+
+ o8o8      ; woman
+.º|++      ; walk #0
+' ( )
+  (__)
+
+ o8o8      woman
+.º|++      ; walk #1
+' ( )
+ (__)
+
+ o8o8      woman
+.º|++      ; walk #2
+'( )
+ (__)
+
+ o8o8      woman
+º|++      ; walk #3
+' ( )
+ (__)

r2elisa/test.txt

@@ -0,0 +1,10 @@
+
+add line after 'res.sources =' around line 302 in lib/format/html.js
+
+        console.error("THIS IS A HOOK");
+
+comment line res.today around line 310 in html.js
+
+change "Hello" with "World" around line 300 in html.js
+
+trace function r_core_cmd0 in core.c

r2emuhash/bin/r2emuha.sh

@@ -0,0 +1,100 @@
+#!/bin/sh
+# This script is suposed to be executed from r2
+
+SDB=~/prg/radare2/shlr/sdb/src/sdb 
+#r="r2 -1"
+#r="rax2"
+r="r2cmd"
+
+walkbbs() {
+	at=$1
+	bbs=`$r afbq @ $at`
+	for bb in $bbs ; do
+		bbsz=`$r '?v $Fs @'$bb`
+		echo "$bb  $bbsz"
+	done
+}
+
+match() {
+	export SDB=$SDB
+	A="$1"
+	if [ -z "$A" ]; then
+		A=ls.sdb
+	fi
+	for B in db/*.sdb ; do
+		if [ "$A" = "$B" ]; then
+			continue
+		fi
+		AKEYS=`$SDB $A |cut -d = -f1`
+		BKEYS=`$SDB $B |cut -d = -f1`
+		for a in ${AKEYS} ; do
+			for b in ${BKEYS} ; do
+				if [ "$a" = "$b" ]; then
+					N=`$SDB $A $a`
+					M=`$SDB $B $a`
+					echo "CC $A $N is similar to $B $M"
+					break
+				fi
+			done
+		done
+	done
+}
+
+
+if [ -z "$R2PIPE_IN" ]; then
+	if [ -z "$1" ]; then
+		echo "Usage: r2emuha.sh [make|find] [file]"
+		echo " $ r2emuha.sh make /bin/ls"
+		echo " $ r2emuha.sh make /bin/sleep"
+		echo " $ r2emuha.sh find ls.sdb"
+	else
+		case "$1" in
+		"make")
+			r2 -qAA -i $0 "$2"
+			;;
+		"find")
+			match "$2"
+			;;
+		*)
+			echo "Unknown command. Use: make or find."
+			exit 1
+			;;
+		esac
+	fi
+	exit 0
+fi
+
+emuhash() {
+	at=$1
+	name=`$r fd@$at`
+	$r 'drw 0' > /dev/null # reset register values to 0
+	$r aeim > /dev/null # initialize vm and set SP, BP, PC
+	$r 'dr??' > .r0
+	$r "aef $at 2>/dev/null" > /dev/null
+	$r 'dr??' > .r1
+	diff -ru .r0 .r1 | grep -v PC | grep -e '^- ' -e '^+ ' > .d
+	#cat .d
+	crc32=`rahash2 -qqa crc32 .d`
+	if [ "$crc32" = 00000000 ]; then
+		printf "$at $crc32 $name   (ignored)\r"
+	else  
+		echo "$at $crc32 $name"
+		echo "$crc32=$name" >> ${SDBTXT}
+	fi
+	rm -f .r0 .r1 .d
+}
+
+FILE=$(`$r i~^file` | grep bin | cut -d : -f 1)
+NAME=db/`basename "$FILE"`
+echo "FILE=$FILE"
+echo "NAME=$NAME"
+SDBBDS=${NAME}.sdb
+SDBTXT=${SDBBDS}.txt
+
+:> ${SDBTXT}
+fcns=`$r aflq`
+for a in $fcns ; do
+	emuhash $a
+done
+
+$SDB ${SDBBDS} = < ${SDBTXT}

r2ida/.travis.yml

@@ -0,0 +1,5 @@
+language: python
+python:
+  - "2.7"
+  - "3.4"
+

r2ida/README.md

@@ -0,0 +1,25 @@
+# radare2ida
+
+This repository contains a collection of documents, scripts
+and utilities that will allow you to use IDA and R2, converting
+projects metadata from one tool to the other and providing
+tools to integrate them in a more useful way.
+
+In progress:
+
+* Documentation about how to use the tool
+* Export IDB from IDA into a radare2 script
+* Import radare2 project metadata into IDA database
+* Launch r2 from IDA
+* Use IDA as an IO backend for R2
+* Expose R2 functionalities into IDA
+  * Assembler/Disassembler
+  * Base converter
+  * ROP gadget search
+  * ...
+
+## ida2r2
+
+**Note:** This requires the [python-idb](https://github.com/williballenthin/python-idb) installed
+and available for python imports. It is recommended to use the latest version of
+ `python-idb` by cloning the repository and installing it using `python setup.py install`.

r2ida/doc/migration-from-ida.md

@@ -0,0 +1,4 @@
+Migration from IDA to Radare2
+=============================
+
+https://radare.gitbooks.io/radare2book/content/debugger/migration.html

r2ida/ida2r2/ida2r2.py

@@ -0,0 +1,494 @@
+#!/usr/bin/env python
+
+""" Convert IDB and IDC from IDA into a radare2 script
+
+$ ida2r2.py -h
+
+usage: ida2r2.py [-h] (-idb IDB_FILE | -idc IDC_FILE) -o OUT_FILE [-nc | -nf | -nn]
+
+Export IDB or IDC from IDA into a radare2 initialization script
+
+optional arguments:
+  -h, --help            show this help message and exit
+  -idb IDB_FILE, --IDBFile IDB_FILE
+                        Path to the IDB file
+  -idc IDC_FILE, --IDCFile IDC_FILE
+                        Path to the IDC file
+  -o OUT_FILE, --OutputFile OUT_FILE
+                        Export to a specified file path
+  -nc, --no-comments    Don't convert comments
+  -nf, --no-functions   Don't convert functions
+  -nn, --no-names       Don't convert names
+
+"""
+
+__author__ = "Itay Cohen (@megabeets_), Maxime Morin (@maijin), Sergi Alvarez (@pancake)"
+
+
+import argparse
+import idb
+import sys
+import re
+import base64
+
+
+# CONSTANTS
+FLAG_PREFIX="ida."
+
+def get_args():
+    ''' Handle arguments using argparse
+    '''
+
+    arg_parser = argparse.ArgumentParser(
+        description="Export IDB or IDC from IDA into a radare2 initialization script")
+
+    arg_group_files = arg_parser.add_mutually_exclusive_group(required=True)
+
+    arg_group_files.add_argument("-idb", "--IDBFile",
+                            action="store",
+                            dest="idb_file",
+                            help="Path to the IDB file")
+
+    arg_group_files.add_argument("-idc", "--IDCFile",
+                            action="store",
+                            dest="idc_file",
+                            help="Path to the IDC file")
+
+    arg_parser.add_argument("-o", "--OutputFile",
+                            action="store",
+                            dest="out_file",
+                            required=True,
+                            help="Export to a specified file path")
+
+    arg_parser.add_argument("-nc", "--no-comments",
+                           dest="is_comments",
+                           action="store_false",
+                           help="Don't convert comments")
+
+    arg_parser.add_argument("-nf", "--no-functions",
+                           dest="is_functions",
+                           action="store_false",
+                           help="Don't convert functions")
+
+    arg_parser.add_argument("-nn", "--no-names",
+                           dest="is_names",
+                           action="store_false",
+                           help="Don't convert names")
+
+    arg_parser.set_defaults(is_comments=True, is_functions=True, is_names=True)
+
+    args = arg_parser.parse_args()
+    return args
+
+
+
+def write_header():
+	        outfile.write("""########################################################
+#
+# This file was generated by the ida2r2.py script.
+# Source: https://github.com/radare/radare2ida
+#
+########################################################
+""")
+
+###
+# IDB Parsing
+#
+
+def idb2r2_comments(api, textseg):
+    ''' Convert comments from a specific text segments in the IDB
+    '''
+
+    for ea in range(textseg, api.idc.SegEnd(textseg)):
+        try:
+            flags = api.ida_bytes.get_cmt(ea, True)
+            if flags != "":
+                outfile.write("CCu base64:{b64} @ {addr}\n".format(
+					b64=base64.b64encode(flags.encode(encoding='UTF-8')).decode("utf-8"),
+					addr=str(ea)
+				))
+        except Exception as e:
+            try:
+                flags = api.ida_bytes.get_cmt(ea, False)
+                outfile.write("CCu base64:{b64} @ {addr}\n".format(
+					b64=base64.b64encode(flags.encode(encoding='UTF-8')).decode("utf-8"),
+					addr=str(ea)
+				))
+            except:
+                pass
+
+
+def idb2r2_functions(api):
+    ''' Convert all functions from the IDB
+    '''
+    outfile.write("\n# IDB Functions\n")
+
+    for ea in api.idautils.Functions():
+        outfile.write("f {prefix}{name} @ {addr}\n".format(
+			prefix=FLAG_PREFIX,
+			name=api.idc.GetFunctionName(ea).replace("@", "_"),
+			addr=str(ea)
+		))
+	# Write the command responsible to analyze these functions
+    outfile.write("aF @@ {prefix}*\n".format(prefix=FLAG_PREFIX))
+
+def idb2r2_names(api):
+    ''' Convert all names from the IDB
+    '''
+    outfile.write("\n# IDB Names\n")
+
+    for ea, name in api.idautils.Names():
+        outfile.write("f {prefix}{name} @ {addr}\n".format(
+			prefix=FLAG_PREFIX,
+			name=name.replace("@", "_"),
+			addr=str(ea)
+		))
+
+def idb_parse(args):
+    global outfile
+    with idb.from_file(args.idb_file) as db:
+        api = idb.IDAPython(db)
+        # Compatability check for those who install python-idb from pip
+        try:
+            baddr = hex(api.ida_nalt.get_imagebase())
+        except:
+            baddr = "[base address]"
+        outfile = open(args.out_file, 'w')
+        write_header()
+
+        print("[+] Starting conversion from '%s' to '%s'" %
+                (args.idb_file, args.out_file))
+
+        if args.is_functions:
+            idb2r2_functions(api)
+
+        if args.is_names:
+            idb2r2_names(api)
+
+        if args.is_comments:
+            segs = idb.analysis.Segments(db).segments
+            outfile.write("\n# IDB Comments\n")
+            for segment in segs.values():
+                idb2r2_comments(api, segment.startEA)
+
+    print("[+] Conversion done.\n")
+    print("[!] Execute: r2 -i %s -B %s [program]\n" %
+            (args.out_file, baddr))
+
+#
+# End of IDB Parsing
+###
+
+
+# -------------------------------------------------------------------
+
+
+###
+# IDC Parsing
+#
+
+class Func(object):
+# FIXME: parse ftype into params and values
+	def __init__(self, name="unknown", params=[], values=[], address=0, size=0, ftype=""):
+		self.name = name
+		self.params = params
+		self.values = values
+		self.address = address
+		self.size = size
+		self.ftype = ftype
+
+class Llabel(object):
+	def __init__(self, name="unknown", address=0):
+		self.name = name
+		self.address = address
+
+class Comm(object):
+	def __init__(self, text="", address=0):
+		self.text = text
+		self.address = address
+
+class Enum(object):
+	def __init__(self, name="unknown", members=[]):
+		self.name = name
+		self.members = members
+
+class Struct(object):
+	def __init__(self, name="unknown", members=[]):
+		self.name = name
+		self.members = members
+
+class Union(object):
+	def __init__(self, name="unknown", members=[]):
+		self.name = name
+		self.members = members
+
+class Type(object):
+	def __init__(self, name="unknown"):
+		self.name = name
+		self.members = members
+
+# ----------------------------------------------------------------------
+
+functions = []
+llabels = []
+comments = []
+structs = []
+enums = []
+types = []
+
+def idc_functions_parse(idc):
+
+	# MakeFunction (0XF3C99,0XF3CA8);
+	mkfun_re = re.compile("""
+		(?m)								# Multiline
+		^[ \t]*MakeFunction[ \t]*\(
+		(?P<fstart>0[xX][\dA-Fa-f]{1,8})	# Function start
+		[ \t]*\,[ \t]*
+		(?P<fend>0[xX][\dA-Fa-f]{1,8})		# Function end
+		[ \t]*\);[ \t]*$
+		""", re.VERBOSE)
+	mkfun_group_name = dict([(v,k) for k,v in mkfun_re.groupindex.items()])
+	mkfun = mkfun_re.finditer(idc)
+	for match in mkfun :
+		fun = Func()
+		for group_index,group in enumerate(match.groups()) :
+			if group :
+				if mkfun_group_name[group_index+1] == "fstart" :
+					fun.address = int(group, 16)
+				if mkfun_group_name[group_index+1] == "fend" :
+					fun.size = int(group, 16) - fun.address
+
+		functions.append(fun)
+
+	# SetFunctionFlags (0XF3C99, 0x400);
+	mkfunflags_re = re.compile("""
+		(?m)								# Multiline
+		^[ \t]*SetFunctionFlags[ \t*]\(
+		(?P<fstart>0[xX][\dA-Fa-f]{1,8})	# Function start
+		[ \t]*\,[ \t]*
+		(?P<flags>0[xX][\dA-Fa-f]{1,8})		# Flags
+		[ \t]*\);[ \t]*$
+	""", re.VERBOSE)
+	mkfunflags_group_name = dict([(v,k) for k,v in mkfunflags_re.groupindex.items()])
+	mkfunflags = mkfunflags_re.finditer(idc)
+	for match in mkfunflags :
+		for group_index,group in enumerate(match.groups()) :
+			if group :
+				if mkfunflags_group_name[group_index+1] == "fstart" :
+					addr = int(group, 16)
+				if mkfunflags_group_name[group_index+1] == "flags" :
+					for fun in functions :
+						if fun.address == addr :
+							pass # TODO: parse flags
+
+
+	# MakeFrame (0XF3C99, 0, 0, 0);
+	# MakeName (0XF3C99, "SIO_port_setup_S");
+	mkname_re = re.compile("""
+		(?m)								# Multiline
+		^[ \t]*MakeName[ \t]*\(
+		(?P<fstart>0[xX][\dA-Fa-f]{1,8})	# Function start
+		[ \t]*\,[ \t]*
+		"(?P<fname>.*)"						# Function name
+		[ \t]*\);[ \t]*$
+	""", re.VERBOSE)
+	mkname_group_name = dict([(v,k) for k,v in mkname_re.groupindex.items()])
+	mkname = mkname_re.finditer(idc)
+	for match in mkname :
+		for group_index,group in enumerate(match.groups()) :
+			if group :
+				if mkname_group_name[group_index+1] == "fstart" :
+					addr = int(group, 16)
+				if mkname_group_name[group_index+1] == "fname" :
+					for fun in functions :
+						if fun.address == addr :
+							fun.name = group
+
+	# SetType (0XFFF72, "__int32 __cdecl PCI_ByteWrite_SL(__int32 address, __int32 value)");
+	mkftype_re = re.compile("""
+		(?m)								# Multiline
+		^[ \t]*SetType[ \t]*\(
+		(?P<fstart>0[xX][\dA-Fa-f]{1,8})	# Function start
+		[ \t]*\,[ \t]*
+		"(?P<ftype>.*)"						# Function type
+		[ \t]*\);[ \t]*$
+	""", re.VERBOSE)
+	mkftype_group_name = dict([(v,k) for k,v in mkftype_re.groupindex.items()])
+	mkftype = mkftype_re.finditer(idc)
+	for match in mkftype :
+		for group_index,group in enumerate(match.groups()) :
+			if group :
+				if mkftype_group_name[group_index+1] == "fstart" :
+					addr = int(group, 16)
+				if mkftype_group_name[group_index+1] == "ftype" :
+					for fun in functions :
+						if fun.address == addr :
+							fun.ftype = group
+
+	# MakeNameEx (0xF3CA0, "return", SN_LOCAL);
+	mklocal_re = re.compile("""
+		(?m)								# Multiline
+		^[ \t]*MakeNameEx[ \t]*\(
+		(?P<laddr>0[xX][\dA-Fa-f]{1,8})		# Local label address
+		[ \t]*\,[ \t]*
+		"(?P<lname>.*)"						# Local label name
+		[ \t]*\,[ \t]*SN_LOCAL
+		[ \t]*\);[ \t]*$
+	""", re.VERBOSE)
+	mklocal_group_name = dict([(v,k) for k,v in mklocal_re.groupindex.items()])
+	mklocal = mklocal_re.finditer(idc)
+	for match in mklocal :
+		lab = Llabel()
+		for group_index,group in enumerate(match.groups()) :
+			if group :
+				if mklocal_group_name[group_index+1] == "laddr" :
+					lab.address = int(group, 16)
+				if mklocal_group_name[group_index+1] == "lname" :
+					lab.name = group
+		llabels.append(lab)
+
+# ----------------------------------------------------------------------
+
+def idc_enums_parse(idc):
+	pass
+
+# ----------------------------------------------------------------------
+
+def idc_structs_parse(idc):
+	# id = AddStrucEx (-1, "struct_MTRR", 0);
+	mkstruct_re = re.compile("""
+		(?m)								# Multiline
+		^[ \t]*id[ \t]*=[ \t]*AddStrucEx[ \t]*\(
+		[ \t]*-1[ \t]*,[ \t]*
+		"(?P<sname>.*)"						# Structure name
+		[ \t]*\,[ \t]*0
+		[ \t]*\);[ \t]*$
+	""", re.VERBOSE)
+	mkstruct_group_name = dict([(v,k) for k,v in mkstruct_re.groupindex.items()])
+	mkstruct = mkstruct_re.finditer(idc)
+	for match in mkstruct :
+		s = Struct()
+		for group_index,group in enumerate(match.groups()) :
+			if group :
+				if mkstruct_group_name[group_index+1] == "sname" :
+					s.name = group
+		structs.append(s)
+
+	# Case 1: not nested structures
+	# =============================
+	# id = GetStrucIdByName ("struct_header");
+	# mid = AddStructMember(id,"BCPNV", 0, 0x5000c500, 0, 7);
+	# mid = AddStructMember(id,"_", 0X7, 0x00500, -1, 1);
+	# mid = AddStructMember(id, "BCPNV_size",0X8, 0x004500, -1, 1);
+	mkstruct_re = re.compile("""
+		(?m)								# Multiline
+		^[ \t]*id[ \t]*=[ \t]*GetStrucIdByName[ \t]*\(
+		[ \t]*-1[ \t]*,[ \t]*
+		"(?P<sname>.*)"						# Structure name
+		[ \t]*\,[ \t]*0
+		[ \t]*\);[ \t]*$
+	""", re.VERBOSE)
+
+# ----------------------------------------------------------------------
+
+def idc_comments_parse(idc):
+	# MakeComm (0XFED3D, "PCI class 0x600 - Host/PCI bridge");
+	mkcomm_re = re.compile("""
+		(?m)								# Multiline
+		^[ \t]*MakeComm[ \t]*\(
+		(?P<caddr>0[xX][\dA-Fa-f]{1,8})		# Comment address
+		[ \t]*\,[ \t]*
+		"(?P<ctext>.*)"						# Comment
+		[ \t]*\);[ \t]*$
+	""", re.VERBOSE)
+	mkcomm_group_name = dict([(v,k) for k,v in mkcomm_re.groupindex.items()])
+	mkcomm = mkcomm_re.finditer(idc)
+	for match in mkcomm :
+		for group_index,group in enumerate(match.groups()) :
+			if group :
+				if mkcomm_group_name[group_index+1] == "caddr" :
+					address = int(group, 16)
+				if mkcomm_group_name[group_index+1] == "ctext" :
+					com_multi = group.split('\\n')
+					for a in com_multi :
+						com = Comm()
+						com.address = address
+						com.text = a
+						comments.append(com)
+
+# ----------------------------------------------------------------------
+
+#	print("af+ 0x%08lx %d %s" % (func.address, func.size, func.name))
+
+def idc_generate_r2(out_file):
+	global outfile
+	outfile = open(out_file, 'w')
+	write_header()	
+	for f in functions :
+		if f.name != "unknown" :
+			outfile.write("af+ {addr} {size} {name}\n".format(
+				addr=hex(f.address),
+				size=f.size,
+				name=f.name))
+			outfile.write("\"CCa {addr} {type}\"\n".format(
+				addr=hex(f.address),
+				type=f.ftype))
+
+	for l in llabels :
+		if l.name != "unknown" :
+			for f in functions :
+				if (l.address > f.address) and (l.address < (f.address + f.size)) :
+					outfile.write("f. {name} @ {addr}\n".format(
+						name=l.name, 
+						addr=hex(l.address)))
+
+	for c in comments :
+		if c.text != "" :
+			outfile.write("\"CCa {addr} {text}\"\n".format(
+				addr=c.address,
+				text=c.text))
+    
+	outfile.seek(0,2)
+	if outfile.tell() == 0:
+		print("[-] Found nothing to convert :-(")
+		exit()
+
+
+# ----------------------------------------------------------------------
+
+def idc_parse(args):
+	print("[+] Starting convertion from '%s' to '%s'" %
+		(args.idc_file, args.out_file))
+	idc_file = open(args.idc_file, "r")
+	idc = idc_file.read()
+	idc_enums_parse(idc)
+	idc_structs_parse(idc)
+	if args.is_functions:
+		idc_functions_parse(idc)
+	if args.is_comments:
+		idc_comments_parse(idc)
+	idc_generate_r2(args.out_file)
+	print("[+] Convertion done.\n")
+	print("[!] Execute: r2 -i %s [program]\n" %
+		(args.out_file))
+
+#
+# End of IDC Parsing
+###
+
+# ----------------------------------------------------------------------
+
+def main():
+    ''' Gets arguments from the user. Perform convertion of the chosen data from the IDB into a radare2 initialization script
+    '''
+    args = get_args()
+
+    if args.idb_file:
+        idb_parse(args)
+    elif args.idc_file:
+        idc_parse(args)
+
+
+
+if __name__ == "__main__":
+    main()

r2ida/ida2r2/idc2rdb.idc

@@ -0,0 +1,91 @@
+/*
+ * ida2rdb.idc
+ * ===========
+ *
+ * Exports an ida database in a format to be handled by radare
+ *
+ * author: pancake <@youterm.com>
+ *
+ * TODO:
+ * * Add stack frame related information (stack size, and so) as comments
+ *
+ */
+
+#include <idc.idc>
+
+static dumpMeNot(fd, ea) {
+	auto func, comment, sz, i, ref;
+
+	// Loop from start to end in the current segment
+	//SegStart(ea);
+	for (func=ea; func != BADADDR && func < SegEnd(ea); func=NextFunction(func)) {
+		// If the current address is function process it
+//		if (GetFunctionFlags(func) != -1) {
+			sz = FindFuncEnd(func) - func;
+			fprintf(fd, "afr %s 0x%08lx\n", GetFunctionName(func), func);
+
+			comment = GetFunctionCmt(func, 0);
+			if (comment != "")
+				fprintf(fd, "CC %s@0x%08x\n", comment, func);
+
+			fprintf(fd, "CC framesize=%d@0x%08x\n", func, GetFrameSize(func));
+
+			// Find all code references to func
+			for (ref=RfirstB(func); ref != BADADDR; ref=RnextB(func, ref)) {
+				//fprintf(fd, "; xref from %08lX (%s)\n", ref, GetFunctionName(ref));
+				fprintf(fd, "Cx 0x%08lx 0x%08lx\n", func, ref);
+			}
+//		}
+	}
+
+	func=ea;
+	while (func != BADADDR && func < SegEnd(ea)) {
+		comment = CommentEx(func, 0);
+		if (comment != "")
+			fprintf(fd, "CC %s@0x%08x\n", comment, func);
+		comment = GetConstCmt(func, 0);
+		if (comment != "")
+			fprintf(fd, "CC %s@0x%08x\n", comment, func);
+		comment = GetEnumCmt(func, 0);
+		if (comment != "")
+			fprintf(fd, "CC %s@0x%08x\n", comment, func);
+		comment = RptCmt(func);
+		if (comment != "")
+			fprintf(fd, "CC %s@0x%08x\n", comment, func);
+		func = func + ItemSize(func);
+	}
+}
+
+static main() {
+	auto fd;
+	auto file;
+	auto i, func, ref,sz;
+	auto ord,ea;
+	auto comment;
+	auto entry;
+
+	file = GetInputFile()+".txt";
+	fd = fopen(file, "w");
+	if (!fd) {
+		Message("Cannot open '"+file+"'\n");
+		Exit(1);
+	}
+
+	entry="";
+	// Walk entrypoints
+	for ( i=0; ; i++ ) {
+		ord = GetEntryOrdinal(i);
+		if ( ord == 0 ) break;
+		ea = GetEntryPoint(ord);
+		fprintf(fd, "entry=0x%08lx %s\n", ea, Name(ea));
+		entry = ea;
+	}
+
+	// XXX last entrypoint taken as ok??
+	dumpMeNot(fd, entry);
+
+	// eof
+	fclose(fd);
+
+	Message(file+"file generated.\n");
+}

r2ida/ida2r2/idc2rdb.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/perl
+# author: pancake <youterm.com>
+#      MakeName        (0X804C1AF,     "the_forker");
+#      MakeRptCmt      (0X804C1B6,     "comentari chachi\n");
+
+open FD, "<".$ARGV[0] or die "Cannot open file\n";
+print "fs symbols\n";
+while(<FD>) {
+	$str=$_;
+	if ($str=~/MakeName[^X]*.([^,]*)[^"]*.([^"]*)/) {
+		print "f sym.$2 @ 0x$1\n";
+	}
+	elsif ($str=~/MakeRptCmt[^X]*.([^,]*)[^"]*.([^"]*)/) {
+		$cmt = $2;
+		$off = $1;
+		$cmt=~s/\\n//g;
+		print "CC $cmt @ 0x$off\n";
+	}
+}

r2jadx/Makefile

@@ -0,0 +1,19 @@
+R2PM_BINDIR=$(shell r2pm -H R2PM_BINDIR)
+
+all: node_modules
+
+node_modules:
+	mkdir -p node_modules
+	npm i
+
+install:
+	ln -fs "$(shell pwd)"/r2jadx.js "$(R2PM_BINDIR)"/r2jadx
+
+uninstall:
+	rm -f "$(R2PM_BINDIR)"/r2jadx
+
+test:
+	r2 -A -i ./r2jadx.js /tmp/classes.dex
+
+indent:
+	node_modules/.bin/semistandard --fix *.js

r2jadx/README.md

@@ -0,0 +1,85 @@
+r2jadx
+======
+
+Jadx is decompiles Class and Dex files into Java source code.
+The r2jadx project aims to integrate this decompiler into r2.
+
+This project is still WIP, I focus on DEX support for now, so
+feel free to report issues or submit improvements/fixes to
+get more information from the jadx json files into r2!
+
+Features:
+
+* Show plaintext jadx decompilation results from r2
+* Cache decompilation results in disk for fast interactions
+* Associate address-to-line (and fileline-to-address)
+* Experimental integration into `pdc`
+* Supports low level and high level decompilations
+
+Low level have some benefits compared to High Level decompilation
+
+* Output comparable to `r2dec`
+* Works even on obfuscated code
+* Better match with assembly code (looks nice with decompiler graphs)
+
+Author
+------
+
+--pancake @ 2019
+
+Requirements
+------------
+
+In order to use r2jadx you need some recent versions of both:
+
+* r2 >= 3.6
+* jadx >= 1.0.0
+* nodejs >= 10
+
+Installation
+------------
+
+The easiest way to install r2, jadx and r2jadx is via r2pm:
+
+* r2pm -i jadx r2jadx
+
+Once the tool and script are installed you may want to make
+it available via `pdc` inside r2 to get it working in Cutter
+or Panels:
+
+```> e cmd.pdc=!*r2jadx```
+
+Some explanations on this line:
+
+* `cmd.pdc` eval var makes the `pdc` command execute a different program
+* `!*` prefix is an alias for the `#!pipe`
+* `r2jadx` is the r2jadx.js script installed in `PATH`
+* `r2` tweaks the `PATH` envvar to make `r2pm` scripts available into r2
+* Running `pdc?` will do `!*r2jadx -h`, `pdc*` -> `!*r2jadx -r2` ...
+
+Usage
+-----
+
+The first time you run r2jadx it will create a `.d` directory in the same
+place where the loaded `classes.dex` live.
+
+This directory contains two subdirectories with the `json` and `java` outputs
+of the JADX decompilation results.
+
+Those are the command line arguments accepted by r2jadx:
+
+* -r -> import ALL the low level decompilation results into r2 as comments
+* -r2 -> import ALL the high level decompilation results into r2 as comments
+
+To get the function decompilation results:
+
+* -ll -> low level decompilation of the current function
+* -hl -> high level decompilation of the current function (default if no arg)
+
+In addition we can have a full dump of the decompilation
+
+* -ahl -> all functions high-level decompiled results
+* -all -> all functions low-level decompiled results
+* -cat -> `cat` the decompiled java file associated with the current function
+
+--pancake

r2jadx/jadx.js

@@ -0,0 +1,252 @@
+#!/usr/bin/env node
+
+const execSync = require('child_process').execSync;
+const shellEscape = require('shell-escape');
+const path = require('path');
+const fs = require('fs');
+
+function toPaddedHexString (num, len) {
+  const str = parseInt(num).toString(16);
+  return '0x' + ('0'.repeat(len - str.length) + str);
+}
+
+function walkSync (dir, arr) {
+  if (arguments.length === 1) {
+    arr = [];
+  }
+  if (!fs.lstatSync(dir).isDirectory()) {
+    return dir;
+  }
+  const files = fs.readdirSync(dir).map(f => walkSync(path.join(dir, f), arr));
+  arr.push(...files);
+  return arr;
+}
+
+const walk = async (dir, filelist = []) => {
+  const files = fs.readdirSync(dir);
+
+  for (var file of files) {
+    const filepath = path.join(dir, file);
+    const stat = await fs.stat(filepath);
+
+    if (stat.isDirectory()) {
+      filelist = await walk(filepath, filelist);
+    } else {
+      filelist.push(file);
+    }
+  }
+
+  return filelist;
+};
+
+function processMethod (data, mode, offset, method) {
+  function comment (addr, line) {
+    if (mode === 'c' || mode === 'cat') {
+      // console.error(data.name);
+      // console.log(data.source);
+if (!data.source) {
+return '';
+}
+      let lastOffset = parseInt(method.offset);
+      if (mode === 'cat' || (mode === 'c' && addr === lastOffset)) {
+        const source = data.source.replace('.json', '.java');
+        const fileData = fs.readFileSync(source);
+        return fileData.toString('utf8');
+      }
+      return '';
+    }
+
+    if (mode === 'f') {
+      let lastOffset = parseInt(method.offset);
+      if (addr === lastOffset) {
+        return toPaddedHexString(addr, 8) + '  ' + line + '\n';
+      }
+      return '';
+    }
+    const b64line = Buffer.from(line).toString('base64');
+    if (b64line.length > 2048) {
+      return 'CCu toolong @ ' + addr + '\n';
+    }
+    return 'CCu base64:' + b64line + ' @ ' + addr + '\n';
+  }
+  let lastOffset = parseInt(method.offset);
+  if (mode === 'all' || mode === 'ahl') {
+    // decompile selected method with offset + text format
+    let res = '\n' + toPaddedHexString(method.offset, 8) + '  ' + method.name + ':\n';
+    for (let line of method.lines) {
+      res += toPaddedHexString(line.offset || lastOffset, 8) + '  ' + line.code + '\n';
+      if (line.offset) {
+        lastOffset = line.offset;
+      }
+    }
+    return res;
+  }
+  if (mode === 'r') {
+    offset = 0;
+    mode = 'r2';
+  }
+
+  if (mode === 'll' || mode === 'hl') {
+    // decompile given method for r2
+    let res = '';
+    if (offset === lastOffset) {
+      return processMethod(data, 'r2', offset, method);
+    }
+    for (let line of method.lines) {
+      if (parseInt(line.offset) === offset - 16) {
+        res += processMethod(data, 'r2', offset, method);
+      }
+    }
+    return res;
+  }
+
+  // mode === 'r2'
+  let res = comment(parseInt(method.offset) + 16, method.name);
+  for (let line of method.lines) {
+    // TODO: use CL console.error('CL ' + line.offset + ' base64:' + line.code);
+    const addr = parseInt(line.offset || lastOffset);
+    res += comment(addr, line.code.trim());
+    // 'CCu base64:' + Buffer.from(line.code).toString('base64') + ' @ ' + parseInt(line.offset || lastOffset) + '\n';
+    if (line.offset) {
+      lastOffset = line.offset;
+    }
+  }
+  return res;
+}
+
+function processClass (data, mode, offset) {
+  offset = parseInt(offset);
+  let res = '';
+  if (data.methods) {
+    for (let method of data.methods) {
+      switch (mode) {
+        case 'a':
+        case 'c':
+        case 'f':
+        case 'cat':
+        case 'r':
+        case 'r2':
+        case 'all':
+        case 'ahl':
+        case 'll':
+        case 'hl':
+          res += processMethod(data, mode, offset, method);
+          break;
+        default:
+          res += 'Invalid mode ' + mode + '\n';
+          break;
+      }
+    }
+  }
+  return res;
+}
+
+function dex2path (target) {
+  return target + '.d';
+}
+
+async function crawl (target, mode, arg) {
+  // console.log('crawling', arguments);
+  switch (mode) {
+    case 'f':
+      return crawlFiles(path.join(target, 'hl'), mode, arg);
+    case 'c':
+      return crawlFiles(path.join(target, 'hl'), 'c', arg);
+    case 'a':
+      return crawlFiles(path.join(target, 'hl'), 'cat', arg);
+    case 'r':
+      return crawlFiles(path.join(target, 'll'), mode, arg);
+    case 'r2':
+      return crawlFiles(path.join(target, 'hl'), mode, arg);
+    case 'll':
+      return crawlFiles(path.join(target, 'll'), mode, arg);
+    case 'hl':
+      return crawlFiles(path.join(target, 'hl'), mode, arg);
+    case 'ahl':
+      return crawlFiles(path.join(target, 'hl'), mode, arg);
+    case 'all':
+      return crawlFiles(path.join(target, 'll'), mode, arg);
+    case 'cat':
+      return crawlFiles(path.join(target, 'cat'), mode, arg);
+    case '?':
+    case 'h':
+    case 'help':
+    default:
+      return 'Usage: !*r2jadx ([filename])[ll,hl,all,ahl,cat,help]';
+  }
+}
+
+async function crawlFiles (target, mode, arg) {
+  const ext = 'json'; // (mode === 'cat' || mode === 'c') ? 'java' : 'json';
+
+  // console.error('FINDUS', target);
+  const files = walkSync(target).filter(_ => (_.endsWith && _.endsWith(ext)));
+  let res = '';
+  for (let fileName of files) {
+    try {
+      if (mode === 'cat') {
+        const fileData = fs.readFileSync(fileName.replace('.json', '.java'));
+        res += fileData;
+      } else {
+        const fileData = fs.readFileSync(fileName);
+        const data = JSON.parse(fileData);
+        res += processClass(data, mode, arg);
+        if (data['inner-classes']) {
+          for (let klass of data['inner-classes']) {
+            klass.source = fileName;
+            res += processClass(klass, mode, arg);
+          }
+        }
+      }
+    } catch (e) {
+      console.error('' + fileName + ': ' + e);
+    }
+  }
+  return res;
+}
+
+async function decompile (target, mode, arg) {
+  const outdir = dex2path(target);
+  if (!fs.existsSync(outdir)) {
+    if (!check()) {
+      console.error('Invalid version of jadx. We need >= 1.x');
+      process.exit(1);
+    }
+    const options = { }; // stderr: 'inherit' };
+
+    try {
+      console.error('jadx: Performing the low level decompilation...');
+      const cmd = [ 'r2pm', '-r', 'jadx', '--output-format', 'json', '-f', '-d', path.join(outdir, 'll'), target ];
+      execSync(shellEscape(cmd, options));
+    } catch (e) {
+    }
+
+    try {
+      console.error('jadx: Performing the high level decompilation...');
+      const cmd = [ 'r2pm', '-r', 'jadx', '--show-bad-code', '--output-format', 'java', '-d', path.join(outdir, 'hl'), target ];
+      execSync(shellEscape(cmd, options));
+    } catch (e) {
+    }
+
+    try {
+      console.error('jadx: Constructing the high level jsons...');
+      const cmd = [ 'r2pm', '-r', 'jadx', '--show-bad-code', '--output-format', 'json', '-d', path.join(outdir, 'hl'), target ];
+      execSync(shellEscape(cmd, options));
+    } catch (e) {
+    }
+  }
+  return crawl(outdir, mode, arg);
+}
+
+function check () {
+  const cmd = [ 'r2pm', '-r', 'jadx', '--version' ];
+  const res = execSync(shellEscape(cmd, {})).toString('utf8');
+  return res.startsWith('1');
+}
+
+module.exports = {
+  crawl: crawl,
+  dex2path: dex2path,
+  decompile: decompile,
+  check: check
+};

r2jadx/package.json

@@ -0,0 +1,17 @@
+{
+  "name": "r2jadx",
+  "version": "1.0.0",
+  "description": "",
+  "main": "r2jadx.js",
+  "dependencies": {
+    "glob": "^7.1.4",
+    "r2pipe": "^2.7.2",
+    "r2pipe-promise": "^1.5.1",
+    "shell-escape": "*"
+  },
+  "devDependencies": {
+    "semistandard": "*"
+  },
+  "author": "pancake <[email protected]>",
+  "license": "MIT"
+}

r2jadx/r2jadx.js

@@ -0,0 +1,84 @@
+#!/usr/bin/env node
+
+const jadx = require('./jadx');
+const r2pipe = require('r2pipe');
+
+async function main (argv) {
+  const r2arg = (argv.length > 2 && argv[2][0] !== '-') ? argv[2] : undefined;
+  let r2 = r2pipe.openSync(r2arg);
+  try {
+    r2.cmd('af');
+    const info = r2.cmdj('ij');
+    const fileName = info.core.file;
+    const fcn = r2.cmdj('afij');
+    if (!fileName.endsWith('.dex')) {
+      throw new Error('Sorry, this is not a DEX file');
+    }
+    const fcnOffset = (fcn && fcn.length > 0) ? fcn[0].offset : 0;
+    let mode = 'all';
+    if (argv.length > 2) {
+      argv = argv.slice(1);
+    }
+    if (argv[1] && argv[1][0] === '-') {
+      mode = argv[1].substring(1);
+    }
+    if (fileName) {
+      try {
+        const res = await jadx.decompile(fileName, mode, fcnOffset);
+        if (mode.startsWith('r')) {
+          for (let line of res.split('\n')) {
+            if (line.trim().length > 0) {
+              r2.cmd(line);
+            }
+          }
+        } else {
+          console.log(res);
+        }
+        return res;
+      } catch (e) {
+        throw e;
+      }
+    } else {
+      throw new Error('Cannot find function');
+    }
+  } catch (e) {
+    console.error('Oops', e, e.output ? e.output.toString() : '');
+    throw e;
+  } finally {
+    r2.quit();
+  }
+}
+
+if (process.argv.length < 3) {
+  if (!r2pipe.isAvailable()) {
+    console.error('Usage: r2jadx [file] # or run it from inside r2');
+    process.exit(1);
+  }
+}
+
+switch (process.argv[2]) {
+  case '-h':
+    console.error('Usage: !*r2jadx [-mode]');
+    console.error('Setup: e cmd.pdc=!*r2jadx');
+    console.error('Modes: -r2 = r2 output');
+    console.error(' -a   = show decompilation of all the classes');
+    console.error(' -c   = decompile current class');
+    console.error(' -f   = decompile current function');
+    console.error(' -r   = load all decompilation output as comments (ll)');
+    console.error(' -r2  = load all decompilation output as comments (hl)');
+    console.error(' -ahl = all high level decompilation');
+    console.error(' -all = all low level decompilation');
+    console.error(' -hl = high level decompilation');
+    console.error(' -ll = low level decompilation');
+    process.exit(0);
+}
+
+main(process.argv)
+  .then((res) => {
+    console.log(res);
+    process.exit(0);
+  })
+  .catch((err) => {
+    console.error(err);
+    process.exit(0);
+  });

r2k/linux/README.md

@@ -1,9 +1,9 @@
 # r2k
 kernel module for radare2
 
-This module is going to be part of radare2 (https://github.com/radare/radare2).
+This module is going to be part of radare2 (https://github.com/radareorg/radare2).
 
-It will work together with an userland program (https://github.com/radare/radare2/blob/master/libr/io/p/io_r2k.c)
+It will work together with an userland program (https://github.com/radareorg/radare2/blob/master/libr/io/p/io_r2k.c)
 
 This module allows to:
 

r2k/linux/r2k.h

@@ -164,12 +164,12 @@ r2k_copy_from_user(void *dst, const void __user *src, unsigned size, bool wp)
 static inline int
 r2k_copy_to_user(__user void *dst, const void *src, unsigned size)
 {
-	uint8_t *p = vmalloc(size);
+	uint8_t *p = vmalloc (size);
 	// intermediate copy to avoid kernel protection mechanisms to get triggered
 	if (p) {
 		memcpy (p, src, size);
 		copy_to_user (dst, p, size);
-		vfree(p);
+		vfree (p);
 	}
 	return 0;
 }

r2snowman/README.md

@@ -1,14 +1,14 @@
 r2snowman
 =========
+```
 	  ____
 	 / o o\
 	(     ==-
 	(    . )
      >--->    <--<
         (    . )
-- - ----(    . )---\|---
-         
-
+- - ----(    . )---\|---      
+```
 This is an ugly but working integration of the snowman decompiler for r2
 
 

r2snowman/r2snow

@@ -1,18 +1,36 @@
 #!/bin/sh
 TARGET="$1"
 
-if [ -z "$1" ]; then
+case "$TARGET" in
+-h)
+	echo "Usage. r2snow -a,-f,-r"
+	;;
+-a)
+	ARG=$TARGET
+	TARGET=""
+	;;
+-f)
+	ARG=$TARGET
+	TARGET=""
+	;;
+-r)
+	ARG=$TARGET
+	TARGET=""
+	;;
+esac
+
+if [ -z "$TARGET" ]; then
 	TARGET="${R2_FILE}"
 fi
 if [ -z "$TARGET" ]; then
 	echo "Usage: r2 -i '.!r2snow'" > /dev/stderr
 	exit 1
 fi
-if [ -f "$1" ]; then
-	echo "Cannot find $1" > /dev/stderr
+if [ ! -f "$TARGET" ]; then
+	echo "Cannot find $TARGET" > /dev/stderr
 	exit 1
 fi
 
 nocode --print-cxx=r2snow-source.c --print-ranges=r2snow-addrof.txt "$TARGET"
-r2snow.pl
+r2snow.pl $ARG
 exit 0

r2snowman/r2snow.pl

@@ -2,6 +2,9 @@
 # generate r2 script out of a snowman decompilation
 # author : pancake // nopcode.org // 2016
 
+use MIME::Base64;
+
+
 sub rf {
   my ($file) = shift;
   open FH, $file or die "cannot open $file";
@@ -18,17 +21,21 @@ sub wf {
 }
 
 use constant {
-  R2SNOW_SOURCE => "r2snow-source.c"
+  R2SNOW_SOURCE => "r2snow-source.c",
+  R2SNOW_ADDROF => "r2snow-addrof.txt"
 };
 
+
 my $source = join("", rf(R2SNOW_SOURCE));
-my @addrof = rf("r2snow-addrof.txt");
+my @addrof = rf(R2SNOW_ADDROF);
 
 my $ts = $source;
 $ts =~s/reinterpret_cast//g;
 $ts =~s/static_cast//g;
 wf(R2SNOW_SOURCE . ".txt", $ts);
 
+local @nts = split /\n/g,$ts;
+
 local @nls = ();
 sub initNewlines() {
   my $offset = 0;
@@ -40,6 +47,42 @@ sub initNewlines() {
   }
 }
 
+sub functionAt($) {
+  my ($ln) = @_;
+  my $line = 1;
+  my $findeof = 0;
+  my $text = "";
+  foreach my $nt (@nts) {
+    if ($nt=~/^ /) {
+      $text .= $nt . "\n";
+    } else {
+      if ($findeof) {
+        return $text . $nt . "\n";
+      } else {
+        $text = $nt . "\n";
+      }
+    }
+    if ($line >= $ln) {
+      $findeof = 1;
+    }
+    $line++;
+  }
+  return "";
+}
+
+sub addrFor($) {
+  my ($offset) = @_;
+  my $line = 0;
+  foreach my $a (@addrof) {
+    my ($addr, $off) = split(" ", $a);
+    if ($addr >= $offset) {
+      return $line;
+    }
+    $line++;
+  }
+  return 0;
+}
+
 sub lineFor($) {
   my ($offset) = @_;
   my $line = 0;
@@ -53,10 +96,36 @@ sub lineFor($) {
 }
 
 initNewlines();
-
-foreach my $a (@addrof) {
-  my ($addr, $offset) = split(" ", $a);
-  my $file = R2SNOW_SOURCE . ".txt";
-  my $line = lineFor($offset);
-  print "CL $file:$line $addr\n";
+my $arg = $ARGV[0];
+if ($arg eq '-h') {
+  print('Usage: !r2snow [-a,-f,-r]');
+  print(' -a : show all the program decompiled');
+  print(' -f : decompile current function');
+  print(' -r : import decompiler output as comments');
+} elsif ($arg eq '-a') {
+  print($ts);
+} elsif ($arg eq '-f') {
+  my $off = $ENV{"R2_OFFSET"};
+  print(functionAt(addrFor(scalar $off)));
+} else {
+  local $oaddr = '';
+  local $oline = 0;
+  foreach my $a (@addrof) {
+    my ($addr, $offset) = split(" ", $a);
+    my $file = R2SNOW_SOURCE . ".txt";
+    my $line = lineFor($offset);
+    my $text = @nts[$line - 1];
+    my $txt64 = encode_base64($text);
+    $txt64 =~ s/\n//g;
+    unless ($oaddr eq $addr or $oline == $line) {
+      print "CCu base64:$txt64 @ $addr\n";
+      ##print "CC $line @ $addr\n"; #u base64:$txt64 @ $addr\n";
+    }
+    $oaddr = $addr;
+    $oline = $line;
+    #print "CL $file:$line $addr\n";
+  }
 }
+
+unlink(R2SNOW_SOURCE);
+unlink(R2SNOW_SOURCE.".txt");

r2wars/README.md

@@ -63,7 +63,7 @@ Q&A
 
 Where can I find some sample programs to take as a template?
 ---
-https://github.com/radare/radare2-extras/tree/master/r2wars/t
+https://github.com/radareorg/radare2-extras/tree/master/r2wars/t
 
 How to make awesome warrior that wins r2wars if I'm a n00b?
 ---
@@ -79,7 +79,7 @@ ARM and MIPS have memory alignment restrictions, so you dont want to run code or
 
 This is pending to be implemented, but will be done before r2con. See those bugs for more details
 
-https://github.com/radare/radare2/labels/r2wars
+https://github.com/radareorg/radare2/labels/r2wars
 
 How is this code executed?
 ---

ramoji2/package.json

@@ -9,7 +9,7 @@
   },
   "license": "LGPL-3.0",
   "bugs": {
-    "url": "https://github.com/radare/radare2-extras/issues"
+    "url": "https://github.com/radareorg/radare2-extras/issues"
   },
   "homepage": "http://www.radare.org",
   "dependencies": {

ssdeep/ssdeep-plugin/configure

@@ -1,5 +1,5 @@
 #!/bin/sh
-# This script was automatically generated by ACR v1.6.2
+# This script was automatically generated by ACR v1.7.2
 # @author: pancake <nopcode.org>
 # @url:    http://www.nopcode.org
 # @repo:   git clone https://github.com/radare/acr
@@ -62,6 +62,7 @@ if [ -e "${VPATH}/config.guess" ]; then
 fi
 CPU="`uname -m|sed -e 's, ,,g'|cut -d - -f 1`"
 OS="`uname -s|tr A-Z a-z`"
+uname -r | grep -qE "(Microsoft|WSL)" 2>/dev/null && OS="wsl"
 GNU="`uname --help 2>&1 | grep gnu`"
 [ "${GNU}" ] && OS="${OS}-gnu"
 [ "${CPU}" = ppc ] && CPU="powerpc"
@@ -170,7 +171,7 @@ take_environ() {
 }
 
 show_version() {
-echo "radare2-extras-ssdeep-1.0 configuration script done with acr v1.6.2.
+echo "radare2-extras-ssdeep-1.0 configuration script done with acr v1.7.2.
 The 'Free Software Foundation' message is only for autodetection.
 Originally written by pancake <nopcode.org>."
 exit 0
@@ -320,6 +321,7 @@ echo 'Using PKGCONFIG: '${PKGCONFIG}
 printf 'checking pkg-config flags for ssdeep... '
 tmp=`${PKGCONFIG} --cflags ssdeep 2>/dev/null`
 if [ $? != 0 ]; then echo no ; HAVE_PKGCFG_SSDEEP=0;
+SD_CFLAGS='';SD_LDFLAGS='';
 echo 'This package is required'
 exit 1
 else
@@ -332,6 +334,7 @@ SD_LDFLAGS=$tmp; fi; fi
 printf 'checking pkg-config flags for r_core... '
 tmp=`${PKGCONFIG} --cflags r_core 2>/dev/null`
 if [ $? != 0 ]; then echo no ; HAVE_PKGCFG_R_CORE=0;
+R2_CFLAGS='';R2_LDFLAGS='';
 echo 'This package is required'
 exit 1
 else

types/include/bitcoin.h

@@ -0,0 +1,34 @@
+/*
+
+https://bitcoin.org/en/developer-reference#block-headers
+
+02000000 ........................... Block version: 2
+
+b6ff0b1b1680a2862a30ca44d346d9e8
+910d334beb48ca0c0000000000000000 ... Hash of previous block's header
+9d10aa52ee949386ca9385695f04ede2
+70dda20810decd12bc9b048aaab31471 ... Merkle root
+
+24d95a54 ........................... Unix time: 1415239972
+30c31b18 ........................... Target: 0x1bc330 * 256**(0x18-3)
+fe9f0864 ........................... Nonce
+
+--------- versions
+
+Version 1 was introduced in the genesis block (January 2009).
+
+Version 2 was introduced in Bitcoin Core 0.7.0 (September 2012) as a soft fork. As described in BIP34, valid version 2 blocks require a block height parameter in the coinbase. Also described in BIP34 are rules for rejecting certain blocks; based on those rules, Bitcoin Core 0.7.0 and later versions began to reject version 2 blocks without the block height in coinbase at block height 224,412 (March 2013) and began to reject new version 1 blocks three weeks later at block height 227,930.
+
+Version 3 blocks were introduced in Bitcoin Core 0.10.0 (February 2015) as a soft fork. When the fork reach full enforcement (July 2015), it required strict DER encoding of all ECDSA signatures in new blocks as described in BIP66. Transactions that do not use strict DER encoding had previously been non-standard since Bitcoin Core 0.8.0 (February 2012).
+
+Version 4 blocks specified in BIP65 and introduced in Bitcoin Core 0.11.2 (November 2015) as a soft fork became active in December 2015. These blocks now support the new OP_CHECKLOCKTIMEVERIFY opcode described in that BIP.
+
+*/
+typedef struct bitcoin_block {
+	int32_t version;
+	char previous[32]; // sha256(sha256()) of the previous block
+	char merkleroot[32]; // sha256(sha256())
+	uint32_t time;
+	uint32_t nbits;
+	uint32_t nonce;
+} bitcoin_block_t;

types/include/ne.h

@@ -0,0 +1,51 @@
+// http://www.fileformat.info/format/exe/corion-ne.htm
+// http://bytepointer.com/resources/win16_ne_exe_format_win3.0.htm
+
+// at offset 0x200
+struct ne_header {
+	uint16_t magic; // "NE"
+	uint8_t version_major;
+	uint8_t version_minor;
+
+	uint16_t entry_table_offset;
+	uint16_t entry_table_length;
+	uint32_t crc;
+
+	uint8_t program_flags;
+
+	uint8_t application_flags;
+
+	uint8_t auto_data_segment_index;
+	uint16_t initial_local_heap_size;
+	uint16_t initial_stack_size;
+	uint32_t entrypoint; // CS:IP
+
+	uint16_t segment_count;
+	uint16_t module_reference_count;
+	uint16_t size_of_nonresident_names_table_in_bytes;
+	uint16_t offset_of_segment_table;
+	uint16_t offset_of_resource_table;
+	uint16_t offset_of_resident_names_table;
+	uint16_t offset_of_module_reference_table;
+	uint16_t offset_of_imported_names_table;
+
+	uint32_t nonresident_offset; // names table
+	uint16_t moveable_entrypoints_count_in_entry_table;
+	uint16_t file_alignment_size_shift_count;
+	uint16_t number_of_resource_table_entries;
+	uint8_t target_operating_system;
+/*
+		0 - unknown
+		1 - OS/2
+		2 - Windows
+		3 - European MS-DOS 4.x
+		4 - Windows 386
+		5 - BOSS (Borland Operating System Services)
+*/
+	uint8_t other_os2_exe_flags;
+	uint16_t offset_to_return_thunks_of_gangload_area;
+	uint16_t offset_to_segment_reference_thunks_or_gangload_length;
+
+	uint16_t minimum_code_swap_area;
+	uint16_t expected_windows_version;
+};

unicorn/Makefile

@@ -1,5 +1,5 @@
 all:
-	$(MAKE) -C ../libr/debug
+	$(MAKE) -C ../libr/debug unicorn
 # HAVE_PKGCFG_UNICORN=1
 
 clean:

unicorn/README.md

@@ -44,10 +44,10 @@ or
 Usage
 -----
 
-To use the unicorn debugger plugin you have to select it with the `dh` command:
+To use the unicorn debugger plugin you have to select it with the `dL` command:
 
 	$ r2 /bin/ls
-	> dh unicorn
+	> dL unicorn
 	[UNICORN] Using arch x86 bits 64
 	[UNICORN] BASE 0x100000000
 	[UNICORN] Segment 0x100000d78 0x100010d78 Size 65536