shadps4-emu/ext-cryptopp
1
0
Fork 0
mirror of https://github.com/shadps4-emu/ext-cryptopp.git synced 2024-12-13 21:38:46 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
6,345 Commits 1 Branch 0 Tags 29 MiB
6f3fd26ab8
Commit Graph

147 Commits

Author SHA1 Message Date
Jeffrey Walton
0c8ed2a7ba
Update documentation 2020-04-05 02:48:28 -04:00
Jeffrey Walton
e6629d2acc
Whitespace check-in 2020-04-05 02:40:21 -04:00
Jeffrey Walton
14954f0f9c
Add VecLoadAligned overload for word32 2020-04-05 02:18:36 -04:00
Jeffrey Walton
e9f40e909c
Update PPC64 comments and asserts 2020-04-04 20:56:17 -04:00
Jeffrey Walton
c5c0cf68e4 Use vec_xl and vec_xst for Clang PPC64 loads and stores 2020-04-04 16:45:55 -04:00
Jeffrey Walton
0c2b909c35 Whitespace check-in 2020-04-04 16:38:03 -04:00
Jeffrey Walton
d4d94d48c1 Fix Clang PPC64 load and store issues 2020-04-04 16:35:14 -04:00
Jeffrey Walton
c145266d78 Workaround some Clang PPC64 load and store issues 2020-04-04 16:18:22 -04:00
Jeffrey Walton
fab6bb2277
Update documentation 2020-04-04 04:18:58 -04:00
Jeffrey Walton
dceb33b175
Update documentation 2020-04-04 04:02:45 -04:00
Jeffrey Walton
9d238c2de8
Update documentation 2020-04-04 04:01:01 -04:00
Jeffrey Walton
6956ee74f4
Update comments 2020-04-04 03:46:32 -04:00
Jeffrey Walton
4d8f0637a6
Fix PPC64 vec_xl for 64-bit types 2020-04-04 03:45:27 -04:00
Jeffrey Walton
3821a9fc0a
Fix PPC64 compile under GCC 2020-04-04 03:32:37 -04:00
Jeffrey Walton
d46685cd64
Fix PPC64 compile under Clang 2020-04-04 03:22:05 -04:00
Jeffrey Walton
b9346fef09
Cleanup casts and comments in ppc_simd.h 2020-04-04 02:56:44 -04:00
Jeffrey Walton
3427ca90b8
Update documentation 2019-11-16 00:46:36 -05:00
Jeffrey Walton
b50abd7554
Remove unneeded undef's 2019-11-16 00:36:50 -05:00
Jeffrey Walton
043a294dd1
Use const int off=0 in VecLoadBE 2019-11-16 00:34:59 -05:00
Jeffrey Walton
eacd39c4a2
Remove CONST_V32_CAST and NCONST_V32_CAST 
We need to use byte*, not word32*
 2019-11-16 00:28:37 -05:00
Jeffrey Walton
9e824c4369
Use byte pointer for CONST_V32_CAST and NCONST_V32_CAST 
The underlying byte arrays may not be aligned for a word
 2019-11-16 00:08:56 -05:00
Jeffrey Walton
74e0c668fc
Update documentation 2019-10-29 09:21:49 -04:00
Jeffrey Walton
90ebe6a362
Add documentation headings 2019-10-29 08:43:24 -04:00
Jeffrey Walton
183fba44bf
Rename VecPolyMultiplyLE to VecIntelMultiply (PR #908) 
The LE multiplies are compatible with Intel's _mm_clmulepi64_si128
 2019-10-26 22:57:58 -04:00
Jeffrey Walton
fa39314b7a
Add XLC 12 loads and stores for AIX (PR #907) 
Add XLC 12 loads and stores for AIX
 2019-10-26 22:11:49 -04:00
Jeffrey Walton
1bfb8760bb
Update documentation 2019-10-26 06:26:06 -04:00
Jeffrey Walton
f29bdbb61e
Update documentation 2019-10-25 10:15:16 -04:00
Jeffrey Walton
bff3ed5e27
Improve PPC64 feature tests for XLC on AIX 2019-10-25 09:35:27 -04:00
Jeffrey Walton
1e5beb32d4
Remove unneeded PPC code 
Update comments
 2019-10-25 06:28:47 -04:00
Jeffrey Walton
44cecf22cb
Rework CPU_ProbePower7 (PR #905) 
* Rework CPU_ProbePower7
* Remove XLC VSX workaround
* Update documentation
 2019-10-24 23:30:05 -04:00
Jeffrey Walton
c363e43968
More Clang and XLC workarounds (PR #904) 
I think this is the final set. Clang 3.8 is OK on Ubuntu Xenial. XLC 11.0 is OK on Power 7.

Clang 3.4 crashes on gcc110.fsffrance.org, but it looks like another compiler bug. I'm not spending time trying to work around it. Clang sucks days of your life at times...
 2019-10-24 16:48:40 -04:00
Jeffrey Walton
670ceb19a2
Some more workarounds for Clang and XLC on PowerPC (PR #903) 2019-10-24 15:36:39 -04:00
Jeffrey Walton
20d3db813b
Update Power7 tests for Clang 
Clang 3.4 and 3.8 are resiting the builtins
 2019-10-24 05:18:12 -04:00
Jeffrey Walton
6b6a84e39a
Guard VecRotateLeft and VecRotateRight with Power8 2019-10-24 02:02:38 -04:00
Jeffrey Walton
4d61cd7310
Try to replace vec_rl for Clang 3.8 
The PowerPC builds are failing at Travis. Travis provides a Power7 machine with Clang 3.8.
 2019-10-23 19:55:13 -04:00
Jeffrey Walton
06cee3cdf4
Fix AIX and Linux compiles for PowerPC (PR #902) 2019-10-23 18:15:47 -04:00
Jeffrey Walton
249eb807bf
Add another Clang workaround on PowerPC 2019-10-23 10:51:39 -04:00
Jeffrey Walton
e912c621e4
Add another Clang workaround on PowerPC 2019-10-23 10:35:55 -04:00
Jeffrey Walton
40f139074b
Port ppc_simd.h to Clang 3.8 (PR #900) 2019-10-23 08:36:52 -04:00
Jeffrey Walton
5f57476178
Revert to Commit 0281083 (PR #899) 
Travis CI is failing on arm64 testing. Commit 0281083 is the last known good, so we are reverting to it.

The failures are unusual given things did not materially change on our side of the equation. We think something changed with Travis.

Also see https://travis-ci.community/t/segfaults-in-arm64-environment/5617.
 2019-10-22 09:21:38 -04:00
Jeffrey Walton
3a8d45b5e3
Fix PPC64 compile with Clang 3.8 on Little Endian machines 
Lets see what this breaks. Clang is a bane in the PowerPC world. Its stupid preprocessor define tricks create more work than it is worth.
 2019-10-21 20:09:09 -04:00
Jeffrey Walton
39418a8512
Use PowerPC unaligned loads and stores with Power8 (GH #825, PR #826) 
Use PowerPC unaligned loads and stores with Power8. Formerly we were using Power7 as the floor because the IBM POWER Architecture manuals said unaligned loads and stores were available. However, some compilers generate bad code for unaligned loads and stores using `-march=power7`, so bump to a known good.
 2019-04-27 20:35:01 -04:00
Jeffrey Walton
bbad4397c4
Use VectMergeLow and VecMergeHigh 2019-01-21 03:04:07 -05:00
Jeffrey Walton
92808945c1
Fix TestAltivecOps on AIX 2019-01-20 19:34:09 -05:00
Jeffrey Walton
efddef694d
Update documentation 2019-01-20 04:50:22 -05:00
Jeffrey Walton
f510b3498c
Update documentation 2019-01-20 03:52:05 -05:00
Jeffrey Walton
f95638ef0c
Update documentation 2019-01-20 03:24:18 -05:00
Jeffrey Walton
8fd5bb31cf
Add VecPolyMultiply for Intel-equivalent F2N multiplies 2019-01-20 01:47:34 -05:00
Jeffrey Walton
cefcaeaa68
Update documentation 2019-01-19 16:32:13 -05:00
Jeffrey Walton
275b86a8d5
Update documentation 2019-01-19 16:21:07 -05:00
Jeffrey Walton
c39d7fdef5
Add VecMergeHi and VecMergeLo PowerPC wrappers 2019-01-19 15:20:47 -05:00
Jeffrey Walton
df9fa62205
Use carryless multiplies for NIST b233 and k233 curves (GH #783, PR #784) 
Use carryless multiplies for NIST b233 and k233 curves.
 2019-01-16 00:02:04 -05:00
Jeffrey Walton
cfbe382e0c
Update documentation 2018-11-24 06:04:18 -05:00
Jeffrey Walton
a00fd95032
Update documentation 2018-11-24 05:01:43 -05:00
Jeffrey Walton
b6a73cadfb
Update documentation 2018-11-24 04:57:45 -05:00
Jeffrey Walton
9a987b4867
Fix compile error with GCC on POWER7 2018-11-24 04:43:14 -05:00
Jeffrey Walton
93a9bfbac2
Update documentation 2018-11-24 03:47:16 -05:00
Jeffrey Walton
758e31d5a0
Add 64-bit element rotates for POWER7 2018-11-24 03:27:12 -05:00
Jeffrey Walton
cf3dfa2745
Drop uint64x2_p to POWER7 
According to the OpenPOWER specs, unsigned long long vectors first appeared in ISA 2.06, which is POWER7. However some support functions, like vec_add, did not arrive until ISA 2.07, which is POWER8.
 2018-11-24 02:53:59 -05:00
Jeffrey Walton
a4dc4e2237
Update documentation 2018-11-24 02:23:25 -05:00
Jeffrey Walton
ad58f0cbdc
Update comments for PowerPC 2018-11-24 02:14:28 -05:00
Jeffrey Walton
51fea1a15e
Add VecLoadAligned for PowerPC 2018-11-24 01:27:44 -05:00
Jeffrey Walton
064650d31e
Avoid IsAlignedOn in VecLoad_ALTIVEC and VecStore_ALTIVEC 2018-11-23 23:58:30 -05:00
Jeffrey Walton
a48e387ead
Add missing offset to VecStoreBE 2018-11-23 15:53:58 -05:00
Jeffrey Walton
39aaec7c59
Use vec_revb when POWER9 is available 2018-11-23 12:16:45 -05:00
Jeffrey Walton
2fe5177d07
Update documentation 2018-11-22 16:54:28 -05:00
Jeffrey Walton
17b7ebeb39
Update documentation 2018-11-22 16:37:41 -05:00
Jeffrey Walton
568d9376a2 Update documentation 
Signed-off-by: Jeffrey Walton <noloader@gmail.com>
 2018-11-22 13:54:03 -05:00
Jeffrey Walton
5492101fc0
Fix XLC 13.1 debug builds on Linux 2018-11-21 17:37:19 -05:00
Jeffrey Walton
081d9110ee
Call VecStore_ALTIVEC by name 
The old form could suffer recursion if teplate deduction fails
 2018-11-19 20:59:15 -05:00
Jeffrey Walton
e6370f3ea1
Fix typo in VecStore 2018-11-19 20:31:06 -05:00
Jeffrey Walton
66b3ba5d66
Update comments 2018-11-19 20:02:51 -05:00
Jeffrey Walton
0df98b049a
Improve support for early XLC compilers on POWER7 (GH #742) 2018-11-19 18:28:50 -05:00
Jeffrey Walton
531ab7e8c5
Update comments 2018-11-19 15:23:29 -05:00
Jeffrey Walton
3681d2fa1f
Update documentation 2018-11-19 13:50:53 -05:00
Jeffrey Walton
201375749b
Update documentation 2018-11-19 13:30:56 -05:00
Jeffrey Walton
2f26de7aab
Add 64-bit element loads and stores 2018-11-19 04:49:51 -05:00
Jeffrey Walton
3129ad4d70
Fix LLVM Clang compile on PowerPC 2018-11-19 02:28:29 -05:00
Jeffrey Walton
5ef276411c
Update documentation 2018-11-15 17:52:06 -05:00
Jeffrey Walton
4c5695c51b
Update documentation 2018-11-15 17:40:06 -05:00
Jeffrey Walton
f53405b995
Update documentation 2018-11-15 17:21:38 -05:00
Jeffrey Walton
cf52307abd
Update documentation 2018-11-15 16:59:11 -05:00
Jeffrey Walton
364017c097
Update documentation 2018-11-15 16:45:56 -05:00
Jeffrey Walton
dd111a6174
Update documentation 2018-11-15 16:23:21 -05:00
Jeffrey Walton
512fa101e8
Update documentation 2018-11-15 15:27:42 -05:00
Jeffrey Walton
f6e04e5f33
Rename PPC vector functions from VectorFunc to VecFunc 2018-11-15 15:17:49 -05:00
Jeffrey Walton
8e5cd3637e
Update documentation 2018-11-15 12:15:21 -05:00
Jeffrey Walton
98699dde05
Update documentation 2018-11-15 04:39:54 -05:00
Jeffrey Walton
e784c04eb0
Update documentation 2018-11-15 03:43:47 -05:00
Jeffrey Walton
f69b7537f5
Update documentation 2018-11-15 03:27:23 -05:00
Jeffrey Walton
390fed72c5
Add word32 VectorStore overloads 2018-11-15 03:11:36 -05:00
Jeffrey Walton
10f85d6596
Make Altivec vector wraps friendly to downgrades 
The way the existing ppc_simd.h is written makes it hard to to switch between the old Altivec loads and stores and the new POWER7 loads and stores. This checkin rewrites the wrappers to use _ALTIVEC_, _ARCH_PWR7 and _ARCH_PWR8. The wrappers in this file now honor -maltivec, -mcpu-power7 and -mcpu=power8. It allows users to compile a source file, like chacha_simd.cpp, with a lower ISA and things just work for them.
 2018-11-15 02:11:00 -05:00
Jeffrey Walton
3c7bdf1a26
Add Octet suffix for vec_sld 
We need to make room for packed shifts and rotates
 2018-11-14 23:32:26 -05:00
Jeffrey Walton
505c58acc1
Add Octet suffix for vec_sld 
We need to make room for packed shifts and rotates
 2018-11-14 23:12:39 -05:00
Jeffrey Walton
fa8e692d84
Switch to compiler macros for PPC header 2018-11-14 22:59:17 -05:00
Jeffrey Walton
96d3fa208e
Fix compile when using XLC with LLVM front-end without -qxlcompatmacros 2018-11-14 20:16:38 -05:00
Jeffrey Walton
896225069d
Rename files with dashes to underscores (GH #736) 
Also see https://groups.google.com/forum/#!topic/cryptopp-users/HBz-6gZZFOA on the mailing list
 2018-11-10 08:00:14 -05:00