Commit Graph

671 Commits

Author SHA1 Message Date
Unknown W. Brackets
a05ae2a0a6 Correct divide by zero HI/LO values a bit.
Interpreter is now correct, but it's probably not all that important to
get right in jit.
2016-05-14 19:23:50 -07:00
Unknown W. Brackets
e37777648e jit-ir: Restore emuhacks before saving state.
Let's just ask jit to do this, not its block cache directly.
2016-05-14 08:59:44 -07:00
Henrik Rydgard
6e44e97ffa Refactor prep: Split JitInterface into MIPSFrontendInterface and JitInterface 2016-05-09 19:41:39 +02:00
Henrik Rydgard
f8659b8e1e Move the IR interpreter out into its own file. Rename it in the UI. First CMake and Android fixes. 2016-05-08 22:06:13 +02:00
Henrik Rydgard
49a6a2f6cf Minor refactor - let's not access a global when we don't need to 2016-05-06 21:22:36 +02:00
Henrik Rydgard
ffe4c266ef Add CodeBlockCommon base class to remove further arch-specificity in JitBlockCache
Remove unused ArmThunk.
2016-05-01 11:40:00 +02:00
Henrik Rydgard
8b450c8034 Merge NativeJit.cpp/h with JitCommon.cpp/h 2016-05-01 11:39:59 +02:00
Henrik Rydgard
5aadce59a2 Move architecture-specific code out of JitBlockCache 2016-05-01 11:39:58 +02:00
Henrik Rydgard
a5be0976bd Remove preprocessor hacks to choose JIT implementation.
Opens up for having multiple JIT implementations available at runtime,
which could be use for experimenting with new JIT compiler types or for
unit testing one JIT on another architecture.

Very few of the newly virtual calls are on any sort of critical path so
hopefully there will not be a performance loss.
2016-05-01 11:39:53 +02:00
Unknown W. Brackets
2461a849f9 Correct some warnings reported by clang. 2016-03-20 23:13:28 -07:00
Unknown W. Brackets
eebe3e7bce armjit: Fix block exit safety writes.
This ensures we don't link to invalid blocks, fixes BKPTs on relinking,
and fixes BKPTs when relinking a prelinked block.

Should help #8524.
2016-01-30 20:44:57 -08:00
Unknown W. Brackets
0fc774927f jit: Minor cleanups. 2016-01-10 12:28:29 -08:00
Unknown W. Brackets
3ec7404d2d Jit: Always link RA, even if branch not taken.
The ops don't write RA conditionally.
2015-12-27 20:47:15 -08:00
Henrik Rydgard
a6294f3e2d Now the three backends actually do the same thing with rounding. Fixes a bug in the x86 backend, too. 2015-10-10 13:11:38 +02:00
Henrik Rydgard
30555f31ca ARM64 typo fix. Add a couple of worrying comments... 2015-10-10 11:56:59 +02:00
Henrik Rydgard
d628b9b57b Minor fixes, mostly comments 2015-10-10 10:03:34 +02:00
Henrik Rydgard
b2b5f3424f Fix for 32-bit ARM 2015-10-08 23:11:57 +02:00
Henrik Rydgard
c41baab747 Pregenerate code to handle rounding mode switches. This time, for all three cores. 2015-10-08 19:58:37 +02:00
Henrik Rydgard
b7725c4f40 Remove empty header files 2015-10-08 18:54:33 +02:00
Henrik Rydgard
bfed830f91 Remove the ability to disable rounding mode support. It's time. 2015-10-08 14:54:42 +02:00
Henrik Rydgard
6dd86cd843 Get rid of the ForceFlushToZero hidden config option 2015-10-08 14:54:41 +02:00
Unknown W. Brackets
9262ddfc13 Avoid any possible shifts by 32. 2015-07-19 13:25:50 -07:00
Henrik Rydgard
dc2f6a30fb ARM64: Fix joining of lwl/lwr and swl/swr. "implement" the cache instruction. 2015-07-11 16:25:22 +02:00
Henrik Rydgard
f50828a66a ARM32 JIT: Implement vs2i, vus2i, vc2i (but not vuc2i) 2015-07-11 00:37:57 +02:00
Henrik Rydgard
cd1665e8f6 ARM32 jit: Implement vi2s, vi2c (but not the unsigned variants yet). uses the new shifts from the last commit 2015-07-09 00:27:12 +02:00
Unknown W. Brackets
db3dffb44d arm64: Oops, fix flushing zero from an armreg. 2015-07-05 11:57:18 -07:00
Unknown W. Brackets
003668fe66 armjit: Fix discarding imms. 2015-07-04 07:30:32 -07:00
Unknown W. Brackets
e6a7ba3fae arm64: Bring imms along for the STP ride. 2015-07-03 16:51:33 -07:00
Henrik Rydgård
82c66bc463 Merge pull request #7840 from unknownbrackets/arm64-micro
Flush using STP where possible in ARM64
2015-07-03 23:20:43 +02:00
Unknown W. Brackets
8fdceba7ca Add timing for all the basics.
This way we can see overall stats for a frame.
2015-07-03 12:05:08 -07:00
Unknown W. Brackets
2331df8c70 arm64: Try to be more consistent in ZERO handling.
Let's keep it IMM where possible, even though we've added checks for
MIPS_REG_ZERO.
2015-07-03 10:21:24 -07:00
Unknown W. Brackets
66adc4e695 jit: Normalize CONDITIONAL_DISABLE formatting. 2015-07-02 20:31:37 -07:00
Unknown W. Brackets
fed687fb59 arm64: Meld LO and HI together for multiplies. 2015-07-02 20:31:37 -07:00
Unknown W. Brackets
213ad4bcc9 arm64: Cleanup branch code a tiny bit.
Want to make it clear that we can't kill W0 at this point (delay slots.)
2015-06-28 09:28:54 -07:00
Unknown W. Brackets
0a5b1c030b arm64: Implement ext and ins. 2015-06-28 08:45:17 -07:00
Henrik Rydgård
70fa830ba5 Split out the ReplaceJalTo test logic.
This makes it so the IR, in the future, can work correctly for
replacements.
2015-04-12 13:35:10 -07:00
Henrik Rydgård
d014d420db Unify JitOptions across the backends.
This is required to make ExtractIR not a member of the various backends.
2015-04-12 11:41:26 -07:00
Henrik Rydgård
7bf67509d1 ARM: Cleanup a TODO in NEON VFPU. 2015-04-12 11:21:53 -07:00
Henrik Rydgård
81dec36da8 Use an accessor to read the compilerPC.
In the IR it will be read from the block.
2015-04-11 01:14:37 -07:00
Henrik Rydgård
a897723e6a Separate out jit reading nearby instructions.
This makes it easier to use an IR for these things, or remove them.
2015-04-11 00:53:24 -07:00
Unknown W. Brackets
b0d291032d armjit Avoid cfc1/mfc1 to $0. 2015-04-07 18:30:36 -07:00
Unknown W. Brackets
7ce5841f30 jit: Avoid mfhi/mflo to $0. 2015-04-07 18:25:28 -07:00
Unknown W. Brackets
788b9d78f8 jit: Avoid a super unlikely write to zero. 2015-04-07 18:20:37 -07:00
Henrik Rydgård
fbaffdceab Remove some outdated comments, minor stuff 2015-04-06 18:13:36 +02:00
Henrik Rydgard
acf08eefa8 ARM64: Fix FCVTL, use it in v2hf 2015-04-06 18:13:33 +02:00
Henrik Rydgard
2780eef595 ARM64: Another couple of VFPU ops 2015-04-06 18:13:31 +02:00
Henrik Rydgard
1b1ab73b0f ARM64: Enable some more VFPU instructions, some code cleanup 2015-04-06 18:13:29 +02:00
Henrik Rydgard
500ca94ab8 ARM64: Port over tons of VFPU code from ARM, leave most of it disabled. 2015-04-06 18:13:28 +02:00
Henrik Rydgard
25ec85551f ARM64: Implement FP compares, misc 2015-04-06 18:13:22 +02:00
Henrik Rydgard
a12e448fb4 ARM64: Stub vertex decoder jit, implementing just enough for the cube.elf cube. 2015-04-06 18:13:18 +02:00
Henrik Rydgard
acd9502b44 ARM64: stp/ldp disasm improvements 2015-04-06 18:13:17 +02:00
Henrik Rydgard
0922db6062 ARM64: Some FP work. 2015-04-06 18:13:11 +02:00
Henrik Rydgard
58b059ca14 Some casting cleanup, misc 2015-04-06 18:13:06 +02:00
Unknown W. Brackets
98d7afae89 Switch to #pragma once in a few places.
Doesn't really affect git history much to change these.
2015-03-02 22:34:51 -08:00
Unknown W. Brackets
179e996b0b jit: Discard unused regs before a syscall.
This is a pretty minor optimization, though.
2015-03-01 11:08:59 -08:00
Unknown W. Brackets
19b92a3e68 Typo. 2015-01-19 09:41:35 -08:00
Unknown W. Brackets
cdddd4b59c Fix an undefined bit shift.
Shouldn't have mattered anyway, but maybe this can crash some ARM chip or
something...
2015-01-19 08:40:10 -08:00
Unknown W. Brackets
dcf54ec8a0 armjit: Burn less hard without a quad mapping. 2015-01-17 18:48:50 -08:00
Unknown W. Brackets
c0a04cbf7e armjit: Fix first temp vreg offset.
Wonder what havoc this could've caused....
2015-01-17 18:21:04 -08:00
Unknown W. Brackets
ab978b1eb1 armjit: Fix vfad/vavg sign for -0.000.
But, NEON is still broken pretty bad, not sure why.
2015-01-03 11:14:52 -08:00
Unknown W. Brackets
a62a4a42b3 armjit: handle any known zero in mtc1. 2014-12-28 20:05:29 -08:00
Unknown W. Brackets
cb50075cf9 armjit: Correct NEON/non-VFPU reg allocation order.
This fixes vh2f, which unbreaks games like Dissidia 012 and others.
2014-12-22 21:27:27 -08:00
Unknown W. Brackets
afdbf5610b jit: Use nicknames for a few more static regs. 2014-12-17 01:11:33 -08:00
Henrik Rydgard
b2951f0def Transplant Dolphin's ARM64 emitter over. Not hooked up to anything (yet...) 2014-12-15 22:09:26 +01:00
Unknown W. Brackets
9a41dec0ff Fix some type comparison warnings. 2014-12-14 17:35:20 -08:00
Unknown W. Brackets
cb7e7643db Blackberry buildfix. 2014-12-13 19:38:04 -08:00
Henrik Rydgard
32a452d671 Blackberry buildfix, added a commen this time.. 2014-12-13 22:14:53 +01:00
Henrik Rydgard
5de011fe95 Again, sigh.. 2014-12-13 21:53:28 +01:00
Henrik Rydgard
db5478135b Typo fix 2014-12-13 21:26:13 +01:00
Henrik Rydgard
05a8e2e35d Some work towards being able to build two JITs together
This will be useful for testing/debugging, but not there yet.
2014-12-13 21:13:54 +01:00
Henrik Rydgard
8ad1ea4c84 Split JitCommon.h so that you can include it without getting the "NativeJit" definition 2014-12-13 21:13:28 +01:00
Henrik Rydgard
75a9420b21 Reduce the number of places we include JitCommon.h. Update native. 2014-12-12 23:49:08 +01:00
Unknown W. Brackets
afc779a824 jit: Add IN_RT to lwl/lwr and re-enable clobbering. 2014-12-08 21:17:01 -08:00
Unknown W. Brackets
bfe5f9276e jit: Re-disable clobbered thing.
No idea what's wrong...
2014-12-08 02:06:25 -08:00
Unknown W. Brackets
7734a4c912 jit: Re-enable clobbering with movz/movn support.
Oops, these should be the only ones that take rd "in".
2014-12-08 01:29:41 -08:00
Unknown W. Brackets
119c1ef83e jit: Disable clobber detection for now.
Should still spill better.  Something is wrong with flags detection, a
clobber to rd is incorrectly discarding outside a delay slot.  Don't have
time now to look into it further.
2014-12-08 01:24:17 -08:00
Unknown W. Brackets
f817d49dfb jit: Discard clobbered registers on spill.
If we're spilling anyway, discard rather than saving.
2014-12-07 23:08:21 -08:00
Unknown W. Brackets
eeff110c0f jit: Improve and unify GPR spill logic.
Now the same logic on x86 and ARM, and handles HI/LO/etc. better.
2014-12-07 21:10:28 -08:00
Unknown W. Brackets
487e175cf9 Fix a sign comparison warning.
This isn't really negative anyway.
2014-12-07 21:08:03 -08:00
Unknown W. Brackets
9dd6bb56bb jit: Make available js_ and jo_ in regcaches. 2014-12-07 21:07:23 -08:00
Henrik Rydgard
50bb3e1e05 Minor fixes 2014-12-08 00:18:13 +01:00
Henrik Rydgard
51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard
4457dca4c9 Rename the ARM Jit class to ArmJit 2014-12-07 14:25:22 +01:00
Henrik Rydgard
7740caeade Buildfix the arm emitter test in the unittest.
Also do some preparation for being able to have two JITs compiled at the same time
which may be useful in testing parts of the ARM jit on Windows.
2014-12-07 14:12:13 +01:00
Henrik Rydgard
e2f61459d3 ARM Jit: Implement vfad/vavg 2014-12-07 13:02:16 +01:00
Henrik Rydgard
80ce45f9fb ARM Jit: Join adjacent vrot ops on ARM too 2014-12-07 12:07:54 +01:00
Henrik Rydgard
c2503b1406 ARM jit: Prepare for joining vrot ops 2014-12-07 11:58:19 +01:00
Henrik Rydgard
4d8db38798 Some more 2014-12-07 00:30:45 +01:00
Henrik Rydgard
ceed0a92c3 Undo some accidental reverts 2014-12-07 00:25:15 +01:00
Henrik Rydgard
ff4746cd17 Merge the rest of the old NEON branch. 2014-12-06 13:14:03 +01:00
Henrik Rydgard
d98bde8e50 Merge the RegCache changes from the old neon-vfpu branch 2014-12-06 12:26:58 +01:00
Henrik Rydgard
e3a81f4346 x86 Jit: Basic implementation of vbfy1/2 (mostly to just cross another one off the list..) 2014-12-04 00:18:58 +01:00
Henrik Rydgard
ac772f25ff x86 JIT: Join adjacent vrot calls together to avoid redundant sin/cos calls. Add a prototype, fix minor issues. 2014-11-30 11:04:13 +01:00
Unknown W. Brackets
f6f943de63 jit: MAP_NOINIT should always mean MAP_DIRTY. 2014-11-29 00:14:08 -08:00
Henrik Rydgard
53b5d331b4 Assorted minor optimizations 2014-11-17 21:21:44 +01:00
Henrik Rydgard
e43c7af32c ARM Jit: Implement quaternion multiplication 2014-11-16 19:12:00 +01:00
Unknown W. Brackets
5bb9d32eaa jit: Fix partial invalidation of larger blocks.
Fixes #7031.
2014-10-27 19:04:19 -07:00
Unknown W. Brackets
1064f580e4 armjit: Add proxy blocks for continuing. 2014-10-12 17:20:26 -07:00
Unknown W. Brackets
01f9521dc5 jit: Invalidate blocks even if they end unevenly.
This allows blocks to start and end where ever they need, which should be
good for replacements and for continuing.
2014-10-12 17:13:04 -07:00
Unknown W. Brackets
0f32103615 x86jit: Consistently use mips_. 2014-10-12 15:16:09 -07:00
Unknown W. Brackets
2f598e8f38 jit: Statically jump for fixed branches.
This handles both loops (first step is known) and static branches (some
code uses them instead of jumps, and we disassemble that to "b".)

Not likely to be a big improvement, but might help if the branch predictor
was wrong.

This is as opposed to continuing, which would build a larger jit block.
2014-10-12 12:51:47 -07:00
Unknown W. Brackets
9228ac72da jit: Reorganize imm branch logic a bit. 2014-10-12 12:51:46 -07:00
Unknown W. Brackets
928e2adfc9 jit: Avoid applying/restoring the rounding mode.
If the game never sets it, we can skip around syscalls, interpreter,
replacements, etc.
2014-10-12 12:51:45 -07:00
Unknown W. Brackets
8d0dca71fe jit: Rename the rounding mode funcs to clarify.
They apply/restore the value, set/clear is confusing.
2014-10-12 11:35:20 -07:00
Henrik Rydgard
f84ebf6bff sprintf->snprintf, fix some too short buffers 2014-09-14 00:14:11 +02:00
Unknown W. Brackets
52b6f1095e armjit: Fix rounding mode, allow non flush-to-zero.
Default: force flush to zero (for RunFast mode.)  But now it's an ini
option so we can more easily compare armjit differences.
2014-09-11 07:58:51 -07:00
Unknown W. Brackets
4459b8f483 jit: Actually jit vmtfc/vmfvc.
Sicne we have them and they are easy.
2014-09-01 23:13:39 -07:00
Unknown W. Brackets
5f6f6827b5 jit: Update rounding mode immediately on ctc1. 2014-08-30 23:48:27 -07:00
Unknown W. Brackets
8daff0a25e armjit: Fix some downcount issues with rounding.
When setting the rounding mode we need to be super careful about not
destroying flags or R0 if they are needed.
2014-08-30 16:43:13 -07:00
Unknown W. Brackets
820a8e8f2b armjit: Don't reset downcount on fpu instructions.
It's maintained always, oops.
2014-08-30 16:30:13 -07:00
Henrik Rydgård
b7da82eebb Merge pull request #6762 from unknownbrackets/fpu-rounding
Handle fpu rounding mode at least in jits
2014-08-23 10:43:22 +02:00
Unknown W. Brackets
e9b5e6f277 armjit: Maintain rounding mode throughout jit. 2014-08-22 19:57:50 -07:00
Unknown W. Brackets
1fcbb7bbd4 armjit: Respect the rounding mode for mul/etc. 2014-08-22 00:32:01 -07:00
Sacha
97e93f48fd Clean up LitPool code and re-enable flushing in AsmJit 2014-08-20 18:29:37 +10:00
Unknown W. Brackets
245a2a3be0 Don't zero out downcount in replacements.
It doesn't write out js.downcountAmount in any of these cases, so zeroing
it is wrong.
2014-08-03 13:22:30 -07:00
Unknown W. Brackets
d060a06fa6 Disable a bunch of function replacements.
These are just for speed, let's turn them off.  Using a flag because:
 * I think there's still some issue with savestates, not sure.
 * We might swap this flag to a separate option.
2014-08-03 13:15:41 -07:00
Sacha
6ce3765b12 Sailfish: More compatibility with SailFish OS. It also needs stddef where Maemo does.
Set packaging by default for iOS with b.sh.
2014-07-24 23:20:09 +10:00
Sacha
6957808b97 ArmJit: Optimisation when comparing float against 0.0f 2014-07-17 05:12:43 +10:00
Henrik Rydgård
bfffe33438 Merge pull request #6469 from unknownbrackets/logging
Enforce semicolons at the end of log lines
2014-06-30 11:44:02 +02:00
Unknown W. Brackets
433f4eb00a Use the ARM rounding mode flag for conversions.
It's at least much simpler.  Not sure if faster.  Handles NAN correctly.
2014-06-29 20:36:00 -07:00
Unknown W. Brackets
f339f7d539 armjit: Handle NAN correctly in float conversion. 2014-06-29 20:05:59 -07:00
Unknown W. Brackets
c168db5943 armjit: Fix really bad typo in cvt.w.s. 2014-06-29 19:43:17 -07:00
Unknown W. Brackets
0078faef8b Fix some log semicolons that might affect logic.
But, these should all be right.
2014-06-29 19:09:38 -07:00
Unknown W. Brackets
5db79dcf11 Fix some missing semicolons on log statements. 2014-06-29 19:09:37 -07:00
Unknown W. Brackets
252100aee5 Remove outdated comment (real cause found/fixed.) 2014-06-28 16:06:10 -07:00
Unknown W. Brackets
f008bebab4 armjit: Fix floor/ceil/cvt.w.s rounding.
Unfortunately, correctly rounding is probably slower.
2014-06-28 00:38:57 -07:00
Unknown W. Brackets
f544a87b2f jit: Initialize startDefaultPrefix when switching. 2014-06-28 00:38:56 -07:00
Unknown W. Brackets
bc3d789c8a x86jit: Cache the vfpu compare flags in a reg.
Again, to match armjit.
2014-06-28 00:38:55 -07:00
Unknown W. Brackets
acad2e1763 x86jit: Cache fpcond in a register.
Mostly to match armjit.
2014-06-28 00:38:55 -07:00
Unknown W. Brackets
24d8a34a0b Properly respect resolveReplacements.
And use the same opcode reading func in armjit as x86jit.
Fixes Star Ocean on Android.
2014-06-23 08:20:38 -07:00
Unknown W. Brackets
d7e2c2c1d2 armjit: Oops, correctly handle plus/minus vmin/max. 2014-06-21 07:45:47 -07:00
Unknown W. Brackets
62daf6d7c8 armjit: Fix vmin/vmax to follow the PSP's rules.
Also the interpreter.  Fixes #6107.
2014-06-20 23:55:33 -07:00
Unknown W. Brackets
e87e1606c5 Fix func replacements and delay slots on arm.
Fixes #6303.
2014-06-19 08:02:49 -07:00
Unknown W. Brackets
9efbc2694b Add an invalidate all method to the jit. 2014-06-19 01:13:06 -07:00
Henrik Rydgard
0879d76503 VFPU: Ensure that sin(4*x) returns 0.0 (and cos 1) for all x. Fixes #2921 2014-06-15 11:03:00 +02:00
Sacha
55221b5c7c Sin/cos fix for hardfp builds. 2014-06-12 23:10:22 +10:00
Henrik Rydgård
fd19b8d271 Merge pull request #6197 from unknownbrackets/replace-funcs
Function replacement hooks and some GLES compat replacements
2014-05-31 20:30:30 +02:00
Unknown W. Brackets
5ccc227462 armjit: Minor const optimization in Comp_VV2Op. 2014-05-31 11:12:36 -07:00
Unknown W. Brackets
df289e46a9 armjit: Use sat0/1 method from prefixes in vsat. 2014-05-31 11:12:35 -07:00
Unknown W. Brackets
d09be5a4bc Update PC before going into a replacement func.
This way we can report the PC properly on errors, and the replacement func
can even look at PC.
2014-05-31 10:03:01 -07:00
Unknown W. Brackets
f489694515 Add the option to hook, rather than replace, funcs.
This can be useful for debugging or developing translations/game hacks,
and also gives us options when dealing with GLES incompatibilities.
2014-05-31 10:03:00 -07:00
Unknown W. Brackets
69b0b622be armjit: Fix D-prefix sat clamp NAN handling.
They should leave NAN alone.
2014-05-16 01:04:57 -07:00
Unknown W. Brackets
bc32f0e0b2 armjit: Correct disabled vslt NaN handling.
Can possibly enable?
2014-05-16 01:04:57 -07:00
The Dax
086d97516d Fix a couple ARM VFPU flags.
Unknown's explanation:
LO means Lower (unsigned), but for floats, it means "Less than".
LT means Lower (signed), but for floats it means "Less than OR unordered".
ARM docs at http://infocenter.arm.com/help/topic/com.arm.doc.dui0068b/Chdhcfbc.html explain the following:
LE means Signed less than or equal, and for floats it means "Less than or equal, or unordered".
LS means Unsigned lower or same, but for floats, it means "Less than or equal"
2014-05-04 22:37:41 -04:00
Unknown W. Brackets
3001866d18 Skip flushing FPU/VFPU regs if none were allocated.
They're not used as often, so this usually saves time.  About 1% during
tests.
2014-03-30 00:42:25 -07:00
Unknown W. Brackets
a4327702f1 Reduce some includes under GPU/. 2014-03-29 16:51:38 -07:00
Henrik Rydgård
717c1cd34e Merge pull request #5748 from unknownbrackets/armjit-minor
armjit: Allow R1 in regalloc, use LR as temp
2014-03-29 04:09:58 -04:00
Unknown W. Brackets
600842d9a2 armjit: Use prefixes on vscl's T arg.
Makes it pass one more thing in the prefixes test, but not sure exactly
how it operates.  Better to have it the same as x86 and int anyway.
2014-03-29 01:00:29 -07:00
Unknown W. Brackets
5a89c17cf0 armjit: Allow R1 in regalloc, use LR as temp.
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
2014-03-28 18:38:38 -07:00
Unknown W. Brackets
58c5179d8e Push and pop the callee saved NEON registers. 2014-03-25 22:34:42 -07:00