Henrik Rydgård
7c3b37c561
More RIP elimination
2017-07-07 11:33:05 +02:00
Henrik Rydgård
7c1ae5b3e6
Move tempValues into MIPSState
2017-07-07 11:33:05 +02:00
Henrik Rydgård
f08c278fd5
Move another couple of temps into MIPSState
2017-07-07 11:33:05 +02:00
Henrik Rydgård
2e9a9f2d7c
Move mscxr_temp to MIPSState
2017-07-07 11:33:05 +02:00
Henrik Rydgård
78538ff61e
Some code cleanup. More work towards removing RIP addressing
2017-07-07 11:33:04 +02:00
Henrik Rydgård
80b82ecd81
Buildfix attempt
2017-07-07 11:33:02 +02:00
Henrik Rydgård
730e9ced6c
X86/X64: We have the context register loaded, let's use it more.
2017-07-05 13:12:42 +02:00
Henrik Rydgård
c4db0a2311
x64: Use context register to access saved_flags
2017-07-05 12:45:56 +02:00
Henrik Rydgard
b9b3a022fb
Switch another enum to enum class
2017-03-02 12:36:54 +01:00
Henrik Rydgard
219548b8e2
Prefix prep
2016-05-11 00:16:07 +02:00
Henrik Rydgard
558bb197c7
More VFPU
2016-05-09 23:47:56 +02:00
Henrik Rydgard
d399c4a470
Initial commit for IRJit
2016-05-07 13:58:29 +02:00
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fed687fb59
arm64: Meld LO and HI together for multiplies.
2015-07-02 20:31:37 -07:00
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909e4b9bd8
Switch lo and hi so that low comes first.
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This way we can treat it as a single 64-bit value.
2015-06-28 10:42:19 -07:00
Henrik Rydgard
23492d8d90
Jak and Daxter relies on implementation details of memcpy (scary!), fix our replacement. Fixes #7502
2015-02-19 11:16:16 +01:00
Henrik Rydgard
75a9420b21
Reduce the number of places we include JitCommon.h. Update native.
2014-12-12 23:49:08 +01:00
Henrik Rydgård
3b1476c8ec
MIPSTables: Annotate fp and hi/lo in/out more accurately than just "other"
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Some typo fixes
2014-10-12 19:46:50 +02:00
Henrik Rydgård
91966824bb
minor cleanup: No point in having special functions for ReadFCR/WriteFCR, they're smaller than many other ops..
2014-10-11 15:57:36 +02:00
Henrik Rydgård
c9a21ab44d
Add T2 and T3 to our register enum for clarity
2014-10-05 14:20:30 +02:00
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f544a87b2f
jit: Initialize startDefaultPrefix when switching.
2014-06-28 00:38:56 -07:00
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8851fc1685
Remove savedIdRegister/MIPS_CALL_ID.
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We've never trusted it anyway, simpler without dealing with this stuff.
2014-06-22 11:29:47 -07:00
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a70b5abfb9
Allow jit to be enabled/disabled at runtime.
2014-05-27 00:02:51 -07:00
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05ab192c9c
Reduce includes in Core/HLE/.
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Especially templates.
2014-03-15 11:22:19 -07:00
Henrik Rydgard
c80510fb3b
MemMap should not be included in MIPS.h.
2014-03-15 10:45:39 +01:00
Henrik Rydgård
2b05a60d9d
Clear out the jit pointer on shutdown. Some cleanup.
2014-01-28 11:32:54 +01:00
Henrik Rydgård
00c32ddadb
Mostly get rid of including "Globals.h"
2013-12-30 10:17:11 +01:00
Henrik Rydgård
ce378b231f
Delete CPU.cpp/h , cleanup
2013-12-30 00:11:29 +01:00
Henrik Rydgard
55500d4bb6
Reorder VFPU registers in memory so that we can flush and reload them in bulk more often.
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Doesn't actually do that yet, that's for the NEON branch.
2013-11-28 13:27:51 +01:00
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26f5922174
Return the correct value for fcr0/fir.
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This is what the PSP actually returns, it's read only.
2013-11-14 23:39:08 -08:00
Henrik Rydgård
ef8631c57f
Cache VFPU_CTRL_CC in a register
2013-11-12 17:58:29 +01:00
Henrik Rydgard
df3765a320
Arm jit: optimize ES, NS conditions in vcmp. Bugfix TR.
2013-11-12 14:43:12 +01:00
Henrik Rydgård
17074f5a7f
Cache fpcond in a register to avoid store/load between compare and branch
2013-11-12 10:33:38 +01:00
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cb3bb73148
armjit: Improve GPR typesafety.
2013-11-09 08:24:15 -08:00
Henrik Rydgard
5a95e267fb
Add an optimization to discard registers at the end of functions when possible.
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Works in some games but crashes many so hiding it for now. Do not add UI.
2013-11-08 12:43:48 +01:00
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da0c9a86e5
Invalidate stubs/var imports when writing them.
2013-09-01 00:32:43 -07:00
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97aa1a631e
Improve typesafety in the x86 regalloc.
2013-08-24 19:41:10 -07:00
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109ad17ac6
Use a typesafe struct for opcodes.
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Also, correctly read delayslots using Read_Instruction on ARM.
2013-08-24 15:36:24 -07:00
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846178a588
Optimize thread switching a bit.
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~2.5% improvement in Zettai Hero Project (while multithreading.)
2013-08-15 01:26:16 -07:00
Henrik Rydgard
c86dc7279e
JIT: Implement VCMP in both JITs. Only the x86 one is tested and enabled.
2013-07-31 22:29:16 +02:00
Henrik Rydgard
51596b636a
Fix numerous ARM JIT bugs. Activate vmtvc and vscl, and vadd/vmul/vdiv/vsub for real this time.
2013-07-31 10:34:58 +02:00
Henrik Rydgard
d8294f025f
More VFPU stuff (nothing new activated)
2013-07-30 01:09:11 +02:00
Henrik Rydgard
afcb5add51
Minor code cleanup/reindent around ARM jit
2013-07-27 22:14:01 +02:00
Henrik Rydgard
e809e39681
Mips interpreter: Use unions instead of ugly casts. Strict-aliasing builds now work, but needs more testing so I don't enable it yet. Also some aliasing fixes for TransformPipeline.
2013-06-11 21:44:37 +02:00
Henrik Rydgard
5877929fe5
Add Mersenne Twister random number generator.
2013-05-20 00:57:45 +02:00
Henrik Rydgard
d22e258943
Don't need separate variables for writemask. Some optimizations.
2013-02-15 22:56:38 +01:00
Xele02
69b837f18b
Add debug dialogs (DisAsm, Memory, VFPU).
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New features : Breakpoint display, thread status, display list status
Update translation and start french translation
2013-02-10 17:33:34 +01:00
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2a6457b6ab
Cut down on h files including PointerWrap.
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This makes changes to it a bit faster to build.
2013-02-04 08:26:59 -08:00
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74cce1439b
Allow downcount to be negative.
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This fixes threads/alarm/alarm and ctrl/sampling2/sampling2, which were
broken in 674911dd
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The downcount can go negative for a few reasons, and was signed before.
2013-01-17 01:14:49 -08:00
Henrik Rydgard
674911ddba
Move downcount into MIPSState for efficiency, enable block linking.
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On ARM JIT we can now reach it through the cpu context reg.
2013-01-12 00:44:18 +01:00
Henrik Rydgard
dafc9f62df
Regcache fixes, etc. thing still don't work when I turn on addiu :(
2013-01-09 11:20:48 +01:00