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26,361 Commits 72 Branches 122 Tags 682 MiB
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2123 Commits

Author SHA1 Message Date
kotcrab
b7a64750ed Fix vcrs disassembly 2019-10-30 22:35:13 +01:00
M4xw
15a9a0ac8f Switch: Cleanup some includes. 
Disable dlopen and tty checks too.
 2019-09-28 09:22:38 -07:00
Henrik Rydgård
31de5a5082 Improve an assert message that AkiraJkr saw. Fix a silly bug in the last commit. 2019-08-23 18:42:10 +02:00
Unknown W. Brackets
66687c2c82 Core: Fix a format type error. 2019-08-17 13:31:16 -07:00
Henrik Rydgård
f9ede96344 Address feedback 2019-08-06 16:39:28 +02:00
Henrik Rydgård
8642134419 VFPU-Int: Add a few fast-paths to ReadMatrix/WriteMatrix. Should gain back part of the speed lost in #12217 
(which fixed #5399).
 2019-08-06 16:29:58 +02:00
Henrik Rydgård
f65a71d6d8 Compat: Option to use accurate dotprod for VMMUL. 
Eliminates Tekken 6 leg shaking.
 2019-08-05 11:44:52 -07:00
Unknown W. Brackets
c1c869df27 interp: Implement software inverse square root. 2019-08-04 21:24:13 -07:00
Unknown W. Brackets
6028b79895 interp: Oops, fix vdot bug with subnormals. 2019-08-04 21:23:19 -07:00
Unknown W. Brackets
13278dc1f4 interp: Implement software sqrt to match PSP. 
This matches the PSP's square root better.

Disabled by default using a compile-time flag.
 2019-08-04 21:23:04 -07:00
Unknown W. Brackets
ed4f0896db interp: Use vfpu_dot for vdet as well. 
Improves test accuracy here too.  Also keep neg sign on NAN for vdiv.

Disabled by default via compile-time flag.
 2019-08-04 21:21:21 -07:00
Unknown W. Brackets
d2f7594dc5 interp: Use software dot in vcrsp/vqmul. 
Disabled by default using a compile-time flag.
 2019-08-04 21:19:23 -07:00
Unknown W. Brackets
7b84be1479 interp: Fix adding infinity in software dot. 2019-08-04 21:17:34 -07:00
Unknown W. Brackets
c61a24cef0 interp: Handle rounding in software dot. 2019-08-04 21:17:27 -07:00
Unknown W. Brackets
d5e572b82e interp: Correct INF * 0 during dot. 2019-08-04 21:17:21 -07:00
Unknown W. Brackets
2ba35c6391 interp: Use an integer multiply for dots. 2019-08-04 21:17:09 -07:00
Unknown W. Brackets
08a894abde interp: Handle NaN better in vfpu_dot. 2019-08-04 21:17:00 -07:00
Unknown W. Brackets
39017ea200 interp: Use vfpu_dot for vavg, vfad, vhdp. 
Disabled by default.
 2019-08-04 21:16:51 -07:00
Unknown W. Brackets
4bff980d34 interp: Use software dot for better accuracy. 
This gets some vdot/similar tests to give more accurate results compared
to hardware.  Also added flushing of zero and NaNs.

Currently disabled, only enabled with a compile-time flag.
 2019-08-04 21:14:23 -07:00
Unknown W. Brackets
510daa664f
interp: Correct vsbn instruction. 
Accidentally broken in f2be0cb.  Rarely used.
 2019-07-07 22:58:54 -07:00
Unknown W. Brackets
732d344328 Common: Fix some unused ident and case warnings. 2019-06-22 13:22:12 -07:00
Henrik Rydgård
a0dc85a9d7 Fix a bunch of inconsequential uninitialized variables 2019-06-18 00:18:40 +02:00
Henrik Rydgård
379113680c Fix static analysis warning about access outside array (d[ins] = s[ins * 4] * t[0]) 2019-06-18 00:17:43 +02:00
Unknown W. Brackets
3cb1c33fd9 interp: Fix dumb mistake in vtfm. 
Had done final testing on this with a 2x2 matrix because it was simpler...

Fixes #12109.
 2019-06-16 18:29:29 -07:00
Henrik Rydgård
30831f3ea1 Implement and test clz32, use it in the MIPS interpreter cores. 
This will be useful for our vfpu-dot implementations later.
 2019-06-14 18:39:15 +02:00
Henrik Rydgård
f49999efca Revert "ARM64 vmmul experiment: Disable if S and T matrices overlap." 
This reverts commit c4d26dcb10.
 2019-06-06 09:34:23 +02:00
Henrik Rydgård
649b7a5671 ARM64 vmmov experiment: Reduce precision by using FMUL+FADD instead of FMADD. May help #12082 and thus also #11179 and #9843. 2019-06-05 00:02:32 +02:00
Henrik Rydgård
c4d26dcb10 ARM64 vmmul experiment: Disable if S and T matrices overlap. 
If this fixes anything in #12082, we have a regalloc bug I guess...
 2019-06-04 22:24:19 +02:00
Henrik Rydgård
7853c90abb JIT: Split VFPU_MTX disable options. To help with #9843 2019-06-03 23:28:15 +02:00
Unknown W. Brackets
c773359095 arm64jit: Tweak matrix vfpu overlap detect, etc. 
Tried making changes to them to guess at issues for #9843, but didn't find
any.  Still, I think these changes are worthwhile, if small.
 2019-06-02 22:10:20 -07:00
Unknown W. Brackets
b4137b2403 armjit: Fix avoidLoad handling for fpu regs. 2019-06-02 22:03:26 -07:00
Unknown W. Brackets
1358a80aa6 arm64jit: Fix avoidLoad handling for fpu regs. 2019-06-02 22:03:06 -07:00
Unknown W. Brackets
816abce8fc Windows: Fix some warnings. 
Also one in armjit.
 2019-06-02 09:30:38 -07:00
Henrik Rydgård
f4e489ee50 Fix minor oversight 2019-06-02 17:49:21 +02:00
Henrik Rydgård
55b4b4b9e3 Style fix 2019-06-02 16:22:19 +02:00
Henrik Rydgård
6fd40332fd JitDisable: Add option to disable regalloc across instructions (flush after every instruction) 2019-06-02 16:06:10 +02:00
Henrik Rydgård
2f26297062 Clean up some more ifdefs 2019-05-10 23:25:57 +02:00
driver1998
5072584781 Fix neon headers for MSVC ARM64 
MSVC uses arm64_neon.h for ARM64, arm_neon.h is ARM32 only.
 2019-05-04 22:45:15 +08:00
M4xw
b9352354c9 Masked PSP Memory support for the AArch64 Dynarec 2019-04-15 12:07:57 +02:00
Unknown W. Brackets
ec7cffa847 interp: Handle vtfm/vhtfm prefixes properly. 2019-04-02 18:46:39 -07:00
Unknown W. Brackets
442d6450bb interp: Correct prefixes on vfad and vavg. 
Including write mask, which didn't work before.
 2019-04-02 18:46:39 -07:00
Unknown W. Brackets
5414c12a15 interp: Cleanup prefix/size in vcrsp/vqmul. 2019-04-02 07:12:34 -07:00
Unknown W. Brackets
58573cd4b4 interp: Handle invalid swizzle for vmin/vmax. 2019-04-02 07:08:33 -07:00
Unknown W. Brackets
e8c060bb5f interp: Correct vwbn and vlgb size behavior. 2019-04-02 07:08:20 -07:00
Unknown W. Brackets
89dbfd7d5b interp: Better prefixes for vdiv/similar ops. 
Turns out it does work, just uses the wrong slot like S/T after all.
These other ops must go through the a similar process.
 2019-04-02 07:07:53 -07:00
Henrik Rydgård
24cfad87d1
Merge pull request #11955 from unknownbrackets/vfpu-chunk6 
Correct prefixes for several swizzled ops, use zero for invalid
 2019-04-01 17:13:34 +02:00
Henrik Rydgård
b346142df8
Merge pull request #11954 from unknownbrackets/vfpu-chunk5 
Fix prefix and size handling for vsbx, vsocp, and integer conv ops
 2019-04-01 17:12:03 +02:00
Unknown W. Brackets
6f87987e7b interp: Correct prefixes on vdot/vhdp. 2019-03-31 17:12:21 -07:00
Unknown W. Brackets
b24f84d1a2 interp: Handle prefixes on matrix init ops. 2019-03-31 17:11:24 -07:00
Unknown W. Brackets
59905de719 interp: Correct vsgn out of swizzle bounds. 2019-03-31 17:10:51 -07:00