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2123 Commits

Author SHA1 Message Date
Henrik Rydgård
1a97f62dc9 Fix running the CPU test from the UI. 2018-01-04 18:10:41 +01:00
Henrik Rydgård
468b830bec Show IR disassembly in JIT Compare screen 2018-01-04 12:23:23 +01:00
Henrik Rydgård
604b3c3e97 IR Interpreter: Add missing break; to switch case IROp::FSign. 2018-01-04 11:08:56 +01:00
Unknown W. Brackets
bc541bd020 irjit: Encode downcount directly as a constant. 
Simpler this way, now.
 2018-01-03 23:32:31 -08:00
Unknown W. Brackets
cffb2d61a7 irjit: Embed constant inside IRInst. 
This simplifies a bunch of code and improves compile performance by about
30%, at the cost of a bit more memory.
 2018-01-03 23:24:04 -08:00
Unknown W. Brackets
64b57a0329 irjit: Fix swr typo. 
Shifting the wrong direction - oops.
 2018-01-03 08:14:25 -08:00
Henrik Rydgård
3ac2350ad6 IR Interpreter: Add a comment, minor cleanup, minor SSE stuff. 2018-01-03 16:31:55 +01:00
Unknown W. Brackets
30b2d05bac Module: Correct detection of executable sections. 2018-01-02 21:53:13 -08:00
Unknown W. Brackets
b11858d9a0 irjit: Properly account for delay slots in size. 
Otherwise we think blocks are 4 bytes too short, which can affect
invalidation.
 2018-01-01 22:54:40 -08:00
Unknown W. Brackets
3abcc4d6d8 irjit: Implement lwl/lwr/swl/swr. 
This is very similar to the arm64jit implementation.
 2018-01-01 08:38:13 -08:00
Unknown W. Brackets
b37ba9e599 irjit: Add options for compile/optimize steps. 
This way the backend can set flags for the type of IR it wants.  It's
seems too complex to combine certain things like lwl/lwr in a pass.
 2018-01-01 08:38:12 -08:00
Unknown W. Brackets
671be24105 irjit: Add extra temps to make lwl/swl/etc. easier. 2018-01-01 08:38:11 -08:00
Unknown W. Brackets
905d2c2da6 irjit: Cleanup some invalid op handling. 
And log blocks the same way as other backends.
 2018-01-01 08:38:11 -08:00
Unknown W. Brackets
d8d174fa2b arm64jit: Avoid spilling an extra reg for lwl/lwr. 
It's only needed for swl and swr.
 2018-01-01 08:38:10 -08:00
Unknown W. Brackets
8ffb0101fe jit: Report blocks with uneaten VFPU prefixes. 
There may be options to avoid, like continuing these blocks, especially if
they're likely or something.
 2018-01-01 08:38:10 -08:00
Unknown W. Brackets
3af78883c7 irjit: Speed up icache block invalidation. 
Turns out, in games using a ton of small memcpys, this was causing perf
issues.
 2017-12-31 10:37:09 -08:00
Unknown W. Brackets
9ff812b313 arm64jit: Negate in ADDI2R/SUBI2R as well. 
Should've done this at the same time as CMN.  It's not as common, mostly
catches addu calls, but it's good to have these generic for other uses.
 2017-12-30 11:11:04 -08:00
Unknown W. Brackets
ae63628360 arm64jit: Statically allocate ra as well. 
This doesn't seem to have a significant impact on performance, but it
improves bloat by about 5%.
 2017-12-30 11:11:03 -08:00
Unknown W. Brackets
89cbf36611 arm64jit: Free up W23 for static alloc. 
We shouldn't always reserve W23 for this uncommon case.
 2017-12-30 07:51:27 -08:00
Unknown W. Brackets
e7ac672522 arm64jit: Cleanup method names, temp discard. 
This way MapDirtyIn won't accidentally discard temps.
 2017-12-30 07:51:27 -08:00
Unknown W. Brackets
0fc8274ec4 arm64jit: Enable safe memory for lwl/lwr. 2017-12-29 17:30:18 -08:00
Unknown W. Brackets
c00044c5d8 arm64jit: Avoid arithmetic movs. 
ORR is the preferred encoding and may be faster on some chips.
 2017-12-29 17:30:18 -08:00
Unknown W. Brackets
98ed6fab3f arm64jit: Fix spilling for more than one temp reg. 
Otherwise we hang trying to spill the same reg over and over.
 2017-12-29 17:30:17 -08:00
Unknown W. Brackets
ee236743f0 arm64jit: Use TBZ/TBNZ for vfpu branch as well. 2017-12-29 17:30:16 -08:00
Unknown W. Brackets
3b4917a308 arm64jit: Use TBZ/TBNZ for fp branches. 2017-12-29 17:30:15 -08:00
Unknown W. Brackets
c71285c970 arm64jit: Use CBZ/CBNZ for zero compare branches. 
These are pretty common, so it reduces bloat decently.  Seems about the
same speed, though.
 2017-12-29 17:30:15 -08:00
Unknown W. Brackets
7f8a871e30 arm64jit: Handle more imm compare cases. 2017-12-29 17:30:14 -08:00
Unknown W. Brackets
56d64f5c67 arm64jit: Avoid temporary on variable shift. 
I think we should trust that it works per the spec.
 2017-12-29 17:30:12 -08:00
Unknown W. Brackets
1ecce2a2e1 arm64jit: Reuse code in I2R funcs. 2017-12-29 17:30:07 -08:00
Unknown W. Brackets
2498ce5e3e arm64jit: Oops, properly init temp locked flag. 
Fixes #10469.
 2017-12-29 14:36:18 -08:00
Henrik Rydgård
cb3b1876dd
Merge pull request #10467 from unknownbrackets/arm64-jit 
More arm64 optimizations and cleanup
 2017-12-29 09:00:47 +01:00
Unknown W. Brackets
5177db0f91 arm64jit: Remove unnecessary address masking. 
We use views like on x86_64, so this isn't needed.
 2017-12-28 23:58:30 -08:00
Unknown W. Brackets
28da05fa7a HLE: Replace starocean framebuf clear func. 
This reduces the performance impact significantly, by skipping the memset
uploads for each line.

Fixes #10466.
 2017-12-28 23:40:18 -08:00
Unknown W. Brackets
27116dcb86 arm64jit: Avoid flushing when mapping as pointer. 2017-12-28 16:04:34 -08:00
Unknown W. Brackets
1b1e2c773b arm64jit: Jit lwl/lwr with proper temp regs. 
It's possible rt might overlap with w9/w10, so we really need to allocate
these properly.  This locks and spills as necessary.
 2017-12-28 15:54:03 -08:00
Unknown W. Brackets
970326c9e5 arm64jit: Fix and enable imm lwl/lwr. 2017-12-28 14:49:55 -08:00
Unknown W. Brackets
1b792c32e1 arm64jit: Attempt to reuse imms on sw/etc. 
Mostly, this handles the zero case, but it may help in other cases too.
 2017-12-28 12:32:12 -08:00
Unknown W. Brackets
48fe0168f1 x86jit: Fix safemem on WX exclusive. 2017-12-28 11:21:45 -08:00
Unknown W. Brackets
8c3b0aa89c jit: Skip unlinking blocks on clear. 
Speeds up clear especially when on a WX exclusive platform.
 2017-12-28 11:12:06 -08:00
Unknown W. Brackets
08e85d0cd4 arm64jit: Autodetect pointerify support. 
Also, re-enable static alloc without pointerify, it works now.
 2017-12-28 10:48:55 -08:00
Unknown W. Brackets
2e1d85a55b arm64jit: Allow reg ptr offsets when unaligned. 
Since now they support being dirty.
 2017-12-28 10:45:50 -08:00
Unknown W. Brackets
c4c28282cf arm64jit: Allow ARMREG_AS_PTR to be dirty. 
Since we can just add/sub, then it should be valid (as long as we only
offset it when dirty.)
 2017-12-28 10:40:31 -08:00
Unknown W. Brackets
6fd17fb026 arm64jit: Use reg sum for LDR/STR. 
Skips an add, and should be less ops anyway.
 2017-12-28 10:19:55 -08:00
Unknown W. Brackets
092f98d313 arm64jit: Fix an integer truncation warning. 2017-12-27 19:39:04 -08:00
Unknown W. Brackets
257a4fdd12 arm64jit: Reprotect fixed code after icache flush. 2017-12-27 19:33:04 -08:00
Unknown W. Brackets
7c2fc90def arm64jit: Avoid MOVK elsewhere without pointerify. 2017-12-27 17:57:19 -08:00
Unknown W. Brackets
d82efc4b0b arm64jit: Allow static alloc without pointerify. 2017-12-27 17:50:15 -08:00
Unknown W. Brackets
9573a791b4 arm64jit: Skip storing spilled but not dirty. 
Unless IMM, we don't need to store non-dirty mapped regs.
 2017-12-27 17:15:18 -08:00
Unknown W. Brackets
3fae092ecb arm64jit: Only adjust pointers if pointerified. 2017-12-27 17:02:29 -08:00
Unknown W. Brackets
cccf448ae0 arm64jit: Allow disabling pointerification. 
For platforms where we can't get base aligned.
 2017-12-27 17:02:19 -08:00
Unknown W. Brackets
8c2edd432b irjit: Allow continuing from mips break. 
Some games currently generate break instructions, and can be played
otherwise.  Should be fixed, but let's not hard crash.
 2017-12-25 10:21:22 -08:00
Henrik Rydgård
c55847a79e Fix typo causing #10408 2017-12-14 00:23:07 +01:00
Henrik Rydgård
0207739d76 Can't call functions through known-nil pointers, even if they don't touch local data - LLVM's optimizer might have done something stupid. 2017-11-30 01:07:03 +01:00
Henrik Rydgård
bb9181b949 Fix the prefix problems on ARM 32-bit as well. 2017-11-24 17:05:10 +01:00
Henrik Rydgård
87942dd741 ARM64 JIT: Fix additional VFPU prefix problems 2017-11-24 14:05:19 +01:00
Henrik Rydgård
2cceba41bc Fix JIT bug in ARM64. Fixes #10183 2017-11-24 13:57:27 +01:00
Henrik Rydgård
bd8067a631 Reduce a ERROR_LOG_REPORT to a warning (vfpu branches in delay slots) 2017-11-11 19:39:44 +01:00
Henrik Rydgård
8fe171253d Disable lwl/lwr on ARM64 JIT again. Seems b9b2656e93 broke things, see #10020 2017-11-08 12:11:55 +01:00
twinaphex
4855b2d6f1 mingw patches 2017-08-31 22:15:05 +02:00
Henrik Rydgård
22e65ba80d Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11 2017-08-31 01:14:51 +02:00
Henrik Rydgård
884aef6603 SafeMem: Remove the "far" optimization that saves 3 bytes sometimes but is really dangerous and not worth the complexity. 2017-08-30 09:58:30 +02:00
Henrik Rydgård
8d0498303a Fix a PIC compliance bug in the VFPU. Comment other cases properly (for easy searching). 2017-08-29 11:45:12 +02:00
Henrik Rydgård
641c5f36f9 Merge pull request #9915 from unknownbrackets/marvel-copy 
Add hooks for Marvel video copy func
 2017-08-19 21:30:43 +02:00
Unknown W. Brackets
1cf5e30bd6 Add hooks for Marvel video copy func. 
Not tested - but should make videos visible in Marvel Ultimate Alliance 1.

See #9852.
 2017-08-19 11:47:42 -07:00
Henrik Rydgård
b9b2656e93 More vulkan microoptimizations. Add more profiler scopes. 2017-08-18 13:48:11 +02:00
Henrik Rydgård
ed776d8c0b ARM: Delete obsolete comments and check 2017-08-18 13:48:11 +02:00
Unknown W. Brackets
3dacd323c8 x64: Avoid clobbering jr dest in cases. 2017-07-08 16:40:06 -07:00
Unknown W. Brackets
79a6690a30 x64: Fix coreState rip checks. 2017-07-08 16:39:26 -07:00
Henrik Rydgård
8d86463b1a More RIP fixes 2017-07-07 15:46:14 +02:00
Henrik Rydgård
837118d230 More RIP elimination 2017-07-07 15:07:56 +02:00
Henrik Rydgård
86396ba39b Turning off the "close memory finder" lets us find more RIP addressing... 2017-07-07 15:07:53 +02:00
Henrik Rydgard
8872057a2d x86-64: Linux ABI fix 2017-07-07 14:22:35 +02:00
Henrik Rydgård
dad5ca45f2 Delete some unnecessary loads. These loads are done properly inside trigCallHelper. 2017-07-07 14:15:10 +02:00
Henrik Rydgård
d312086a61 32-bit fixes 2017-07-07 13:57:37 +02:00
Henrik Rydgård
e5a7d0df95 Buildfix for platforms with standards-compliant offsetof (no dynamic indexing allowed)k 2017-07-07 12:59:23 +02:00
Henrik Rydgård
087c118003 Workaround 2017-07-07 12:48:17 +02:00
Henrik Rydgård
ecbeee5225 RegCacheFPU 2017-07-07 11:33:07 +02:00
Henrik Rydgård
758cbd748e Replace vminmax_sreg with mips->temp 2017-07-07 11:33:07 +02:00
Henrik Rydgård
270001e651 vminmax_sreg only needs a single element 2017-07-07 11:33:07 +02:00
Henrik Rydgård
567937fa4d x64: Enable non-RIP addressing for FPU registers 2017-07-07 11:33:07 +02:00
Henrik Rydgård
077fafba64 Get rid of sincostemp global. Solution not tested on linux yet. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
cfa7c61651 More RIP removal. Also add some comments to make it easy to just search for "M(&" to find remaining offenders. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
0645677fea Access FPU temps through CTXREG 2017-07-07 11:33:06 +02:00
Henrik Rydgård
752254d404 Surprise! More. Making many commits for easier bisects. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
0743334946 Guess what? More RIP elimination (but keep the fast path too) 2017-07-07 11:33:05 +02:00
Henrik Rydgård
7c3b37c561 More RIP elimination 2017-07-07 11:33:05 +02:00
Henrik Rydgård
7c1ae5b3e6 Move tempValues into MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
f08c278fd5 Move another couple of temps into MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
102be8654f Remove RIP access from some matrix ops, SafeMem 2017-07-07 11:33:05 +02:00
Henrik Rydgård
2e9a9f2d7c Move mscxr_temp to MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
d82f90f1b2 More RIP removal 2017-07-07 11:33:05 +02:00
Henrik Rydgård
78538ff61e Some code cleanup. More work towards removing RIP addressing 2017-07-07 11:33:04 +02:00
Henrik Rydgård
80b82ecd81 Buildfix attempt 2017-07-07 11:33:02 +02:00
Henrik Rydgård
f44f7472e5 Remove more RIP addressing 2017-07-05 13:27:38 +02:00
Henrik Rydgård
99d23fb021 X64/X86: Even more use of the context register 2017-07-05 13:21:35 +02:00
Henrik Rydgård
730e9ced6c X86/X64: We have the context register loaded, let's use it more. 2017-07-05 13:12:42 +02:00
Henrik Rydgård
c4db0a2311 x64: Use context register to access saved_flags 2017-07-05 12:45:56 +02:00
Unknown W. Brackets
33b073c545 Jit: Fix syscall outside delay slot. 
Doesn't happen in real games, but useful in debug code.
 2017-06-04 10:39:01 -07:00
LunaMoo
5e0f8141d2 Corrections, some %i->%d around other code as well. 2017-05-30 13:52:29 +02:00
Henrik Rydgård
0ec1e5e3b2 Don't erase and rewrite the dispatcher when the cache is cleared. Fixes #9708 2017-05-26 15:48:03 +02:00
Unknown W. Brackets
6b3944d329 UnitTest: Correct vertex and jit tests. 
We now convert texcoords to floats.
 2017-05-06 18:45:04 -07:00
Unknown W. Brackets
b483444fab IR: Cleanup some invalid ops. 2017-04-20 21:11:40 -07:00
Henrik Rydgård
a769724fd0 Fix old bug breaking "non-fast" memory on ARM64. May help #9477, also see #9488 2017-03-23 16:53:16 +01:00
Henrik Rydgård
656645fb93 Improve a sad comment 2017-03-23 10:02:29 +01:00
Henrik Rydgård
5ce7e5e109 UWP ARM: Shrink the JIT hack 2017-03-23 10:02:29 +01:00
Henrik Rydgård
29ad3180a0 Add hack to make the JIT stable(r) on UWP ARM. Can't make it right without FlushInstructionCache which is not available. Sigh... 2017-03-23 10:02:29 +01:00
Henrik Rydgard
ff2b6b3fca Assorted cleanup, UWP memory map fixes. PSPFlower runs in both 32-bit and 64-bit. 2017-03-23 10:02:28 +01:00
Henrik Rydgård
f8343e9efc Add Gradle build. This time, we don't remove the old build system and we don't switch Travis. 2017-03-15 19:42:17 +01:00
Henrik Rydgard
f5c3b15746 Buildfix on Windows 2017-03-15 19:33:33 +01:00
Henrik Rydgard
b4740a2bca Fix bug where dispatcher would not check core state directly after Advance. Fixes #9398 properly (it was previously hidden somehow with extra backbuffer binds). 2017-03-14 12:32:20 +01:00
Henrik Rydgard
b0bd7e3c6f Minor changes for compatibility with VS2017 2017-03-12 17:33:00 +01:00
Henrik Rydgård
62dcb9c70c Log if Comp_SysCall encounters bad syscall instructions 2017-03-10 00:13:06 +01:00
Henrik Rydgård
e74749f2b2 A function renamed, some logging improvements 2017-03-10 00:11:00 +01:00
Henrik Rydgård
ed16096365 Don't crash if not enough memory to save a state. Very annoying. 
Minor tweaks.
 2017-03-07 15:32:34 +01:00
Henrik Rydgard
d64f367e1d Assorted warning fixes 2017-03-05 10:52:45 +01:00
Henrik Rydgard
d68953c18c Buildfixes 2017-03-02 13:29:51 +01:00
Henrik Rydgard
b9b3a022fb Switch another enum to enum class 2017-03-02 12:36:54 +01:00
Henrik Rydgard
26a2d42731 Big mutex overhaul - remove our custom ones, make them non-recursive where possible 2017-02-28 11:40:29 +01:00
Henrik Rydgard
c1f9f96621 Minor code formatting in x86 Jit 2017-02-04 14:34:39 +01:00
Henrik Rydgård
c4bac2d379 ABI: Switch to paired load/stores of floats too 2017-01-27 14:56:38 +01:00
Henrik Rydgård
e1bae9aa67 Follow the ARM64 ABI better (update the frame pointer). 2017-01-27 14:19:03 +01:00
Henrik Rydgård
635b2ada43 Remove a function that didn't make a lot of sense. 2017-01-26 09:50:16 +01:00
Henrik Rydgård
6e49341b91 Workaround a shutdown crash by adding a sanity check .. which actually catches stuff. A bit worrying. 2017-01-26 08:43:26 +01:00
Henrik Rydgard
5d5f10d956 Attempts to counter crashes seen in the Google Play developer console 2016-12-01 22:07:03 +01:00
Henrik Rydgard
e1e335885c A better alternative to #8564 2016-12-01 18:23:58 +01:00
Henrik Rydgard
5df685fa07 Fix another couple of arch define things 2016-11-03 22:25:55 +01:00
Florent Castelli
8c3552de74 cmake: Detect features at compile time 
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
 2016-10-19 12:31:19 +02:00
Florent Castelli
70593d1004 android: Change preprocessor define to standard __ANDROID__ 
ANDROID is only standard to the old Makefile buildsystem, not the platform.
 2016-10-12 11:14:09 +02:00
Florent Castelli
4145b60a0e symbian: Remove! 2016-10-11 18:49:08 +02:00
Florent Castelli
373db56a16 blackberry: Remove! 2016-10-11 17:40:32 +02:00
Henrik Rydgard
f6ebedba78 Fix some build errors. 2016-10-10 22:01:20 -07:00
Unknown W. Brackets
3fe1a08cf5 Use unordered lookups for better speed. 
These reduce the time spent on save states.
 2016-09-24 14:23:17 -07:00
Henrik Rydgard
3ee2b27cdd Update ext/armips 2016-09-18 23:11:41 +02:00
Henrik Rydgard
03279e1212 Port over the Exynos cacheline size fix from Dolphin. Thanks to lewurm of the mono project for the discovery and original fix. 
See https://github.com/dolphin-emu/dolphin/pull/4204 and https://github.com/mono/mono/pull/3549
 2016-09-10 09:25:06 +02:00
Henrik Rydgård
22b6988424 Fix issue with iOS JIT block linking, see #8122 2016-08-29 17:32:46 +02:00
Henrik Rydgard
4e5f1e2797 Fix block linking with W^X mode 2016-08-28 18:54:14 +02:00
Henrik Rydgard
b264657d56 Implement W^X-compatible path. Works on Windows and Android, hopefully iOS (untested). 
Disabled block linking in this mode, can re-enable with some more work later.

To enable W^X on other platforms than iOS, simply change PlatformIsWXExclusive.
 2016-08-28 14:52:08 +02:00
Henrik Rydgard
323eb72b7c Write-protect the dispatcher on all platforms. 2016-08-28 13:35:27 +02:00
Unknown W. Brackets
0e43f1cdff Hook another VRAM modifying function. 
Seems to be a copy.
 2016-08-06 16:30:47 -07:00
Henrik Rydgård
ea6b72d4c9 Merge pull request #8888 from unknownbrackets/warnings 
Warning fixes
 2016-08-06 10:59:06 +02:00
Unknown W. Brackets
fd546ff21d Fix some type comparison warnings. 2016-08-05 10:47:45 -07:00
Unknown W. Brackets
e55198f7e7 Correct some initialization order warnings. 
Also, another missing init with IRBlocks.
 2016-08-05 10:46:11 -07:00
Unknown W. Brackets
9972e5b10a Debugger: Allow logging on CPU breakpoints. 2016-08-04 12:39:29 -07:00
Henrik Rydgard
eb72a746b9 Fix one possible (reproducible!) startup crash in IRJit. May help #8848 2016-07-25 00:21:01 +02:00
Henrik Rydgård
c6d4966067 Make really sure we're not using the IRBlock copy constructor other than on Symbian. 
Turns out it ended up being used on Mac, and our asserts just debugprint and don't actually assert...
 2016-07-09 09:32:41 +02:00
Henrik Rydgard
e0845b876f Fix some bugs in the IRJit. Hopefully helps #8848 2016-07-08 00:05:44 +02:00
Henrik Rydgård
1091fd2dc0 Merge pull request #8840 from unknownbrackets/ir-vfpu 
Minor IR cleanup in the VFPU
 2016-07-04 10:02:52 +02:00
Unknown W. Brackets
1de4943632 jit-ir: Avoid crash in stack walk. 
This can happen if something is data, I suppose, and not a valid block.
 2016-07-02 20:51:06 -07:00
Unknown W. Brackets
4578c3cb54 jit-ir: Implement memory breakpoints. 
These generally work, but likely delay slots will make downcount slightly
off, and won't resume when you hit run again without manually stepping
through them.
 2016-07-02 16:38:30 -07:00
Unknown W. Brackets
7cd666c351 jit-ir: Decrease downcount after delayslot. 
Except for likely delay slots.  This makes breakpoints work more
correctly when they trigger within a delay slot.
 2016-07-02 16:35:56 -07:00
Unknown W. Brackets
1df08518ae jit-ir: Implement basic icache clear. 2016-07-01 17:27:24 -07:00
Unknown W. Brackets
6fb34d0bee jit-ir: Add initial breakpoint support. 
No memory breakpoints yet, and cache isn't cleared yet so these don't work
exactly the way you might expect...
 2016-07-01 17:15:57 -07:00
Unknown W. Brackets
8fab3dc91b jit-ir: Allow 3x3 and 2x2 vmmov in IR. 
While this will generate a lot of FMovs, it should still be better than
bailing to interp.
 2016-07-01 14:08:32 -07:00
Unknown W. Brackets
65394f1dba jit-ir: Fix vbfy with overlap. 2016-07-01 14:08:31 -07:00
Unknown W. Brackets
4761c0aa3f jit-ir: Allow SIMD on vabs/vneg. 2016-07-01 14:08:31 -07:00
Unknown W. Brackets
f4a06cd79a Remove an impossible assert condition. 2016-05-31 11:56:23 -07:00
Unknown W. Brackets
6ee770bd80 Add some missing overrides to declarations. 2016-05-31 11:55:45 -07:00
Unknown W. Brackets
25136eb019 Remove an unused function. 2016-05-31 11:40:39 -07:00
Unknown W. Brackets
419b960403 x86jit: Fix params in Replace_fabsf. 2016-05-31 10:40:14 -07:00
Unknown W. Brackets
a450a79f52 jit-ir: Optimize loads to transfers if possible. 
These (especially float <-> gpr) happen in all games, but gpr->gpr is
especially common in some minis.  Good to reduce bloat.
 2016-05-29 18:34:41 -07:00
Unknown W. Brackets
5b7bd8155d Special case specific sin/cos result values. 
Fixes #7737, thanks go to gid15 from Jpcsp for finding and daniel229 for
reporting.
 2016-05-29 08:51:38 -07:00
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4113fd940c Add ugly invalidation workaround for SGS7s. 
Otherwise they just crash, and crash often.  Special thanks to Jaaan for
numerous trials to try to find the best way to solve the crashes.
 2016-05-23 21:35:28 -07:00
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e65e794f28 x86jit: Fix vmmul of matrix with itself. 
Was not SIMDing correctly.  Probably rare in practice.
 2016-05-21 23:02:29 -07:00
Henrik Rydgård
bb7dd908ba Merge pull request #8760 from unknownbrackets/warnings 
Warning fixes + more ccache
 2016-05-21 18:35:29 +02:00
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b09c2b1f75 Add some missing override definitions. 2016-05-21 09:29:03 -07:00
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f0cc975865 Hook some funcs in Me and My Katamari. 
One is a very hardcoded screenshot download / vfpu convert to 565, and the
other is some very weird check to make sure render is clear or has
happened or something.

The screenshot func detects downloads for the "Royal Album".  The render
check detects downloads for post-rename (no idea why it checks here.)

Fixes #7695.
 2016-05-20 22:30:25 -07:00
Henrik Rydgård
306f7423e7 Merge pull request #8755 from unknownbrackets/cpu-div 
Handle divide by zero more accurately in jit
 2016-05-19 09:30:25 +02:00
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2d3df5c621 armjit: Handle divide by zero more accurately. 
Turns out, some games may depend on this behavior.
 2016-05-19 00:07:41 -07:00
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5105e1947f x86jit: Set HI/LO properly on divide by zero. 2016-05-19 00:06:53 -07:00
Henrik Rydgard
3cae60b320 Revert potentially dangerous optimization that may have caused #8754, though not sure how. 2016-05-18 21:22:08 +02:00
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ee31f09b67 Buildfix. 2016-05-18 07:12:21 -07:00
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5534fba72c jit-ir: Add load/store reorder and merge passes. 
Can do more in merge, potentially.  Maybe it's not useful...
 2016-05-17 21:24:13 -07:00
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a9cdf7651e jit-ir: Mark prefixes unknown in mtv. 2016-05-17 21:22:57 -07:00
Unknown W. Brackets
b1c7f3dd3f jit-ir: Correct vx2i with partial overlap. 2016-05-17 21:22:23 -07:00
Henrik Rydgard
fff898b526 Log the block when "uneaten prefix" happens 2016-05-16 00:05:03 +02:00
Henrik Rydgard
dc772e6f3a Add missing cases to simplify pass 2016-05-15 23:39:42 +02:00
Henrik Rydgard
f544364c4a Fix bug in vus2i (thanks unknown), recognize vectors in IR disasm 2016-05-15 23:35:33 +02:00
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e960158490 jit-ir: Add notes and report about vrot prefixes. 2016-05-15 14:08:59 -07:00
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ab1461faca Add prefix handling to vfpu color conv per tests. 2016-05-15 13:16:03 -07:00
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3f0fc2d851 jit-ir: Fix FSat0_1 behavior on -0.0f. 2016-05-15 13:10:49 -07:00
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fa61deae3d Remove unused value. 2016-05-15 12:43:35 -07:00
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6bf1390603 Fix timing drift on CoreTiming::ForceCheck(). 
Since -1 -(-1) = 0, we'll never think we moved forward this way.
 2016-05-15 12:43:34 -07:00
Henrik Rydgard
d6c2b6e9ae Most of vi2x 2016-05-15 11:46:01 +02:00
Henrik Rydgard
905af75925 vx2i, vbfy, vsgn 2016-05-15 10:57:43 +02:00
Henrik Rydgard
7046f960e5 IR: Add vrot 2016-05-15 10:36:18 +02:00
Henrik Rydgård
168573e711 Merge pull request #8740 from unknownbrackets/ir-vfpu 
More VFPU comments, implement vmscl
 2016-05-15 10:08:22 +02:00
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e140d36818 ir-jit: Oops, fix matrix scale + tranpose. 2016-05-15 00:59:17 -07:00
Henrik Rydgård
205419a72e Merge pull request #8741 from unknownbrackets/ir-alu 
IR the remaining ALU ops, correct div by zero
 2016-05-15 09:43:41 +02:00
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c606f64f71 jit-ir: Add div/divu instructions. 2016-05-14 19:23:52 -07:00
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6413b44434 jit-ir: Enable IR for madd(u)/msub(u). 2016-05-14 19:23:51 -07:00
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a05ae2a0a6 Correct divide by zero HI/LO values a bit. 
Interpreter is now correct, but it's probably not all that important to
get right in jit.
 2016-05-14 19:23:50 -07:00
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4ac773e8b4 jit-ir: Implement bit reverse instruction. 2016-05-14 18:21:42 -07:00
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8a3dce3b8b jit-ir: Comment most of the vfpu ops. 2016-05-14 17:35:04 -07:00
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e1dbcd724e jit-ir: Oops, correct vtfm for transposed case. 
The ones that are aligned are here in this case.  Fixes crash in Crisis
Core.
 2016-05-14 16:20:39 -07:00
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01d63a1a9d jit-ir: Implement vmscl. 2016-05-14 16:20:21 -07:00
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2e097b8996 Oops, typos. 2016-05-14 14:28:05 -07:00
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d5d77b41f9 jit-ir: Properly flip vtfm simd cases. 
Disable the broken one and add clearer comments.
 2016-05-14 14:23:18 -07:00
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7c9f368d63 jit-ir: Add some descriptions of mnemonics. 
Sometimes I forget what vhdp etc. meant, let's make the VFPU code a bit
more accessible.
 2016-05-14 14:21:53 -07:00
Henrik Rydgård
8f430e9631 Merge pull request #8736 from unknownbrackets/ir-clear 
Clear emuhacks on IR block destroy and save state
 2016-05-14 18:51:39 +02:00
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1f28d802a3 FreeBSD buildfix. 
We need Common to have the right _M_SSE define.  Also, let's not define
SSE4 until we need it, since we might need ifs.
 2016-05-14 09:06:56 -07:00