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Author SHA1 Message Date
billow
f7175332ba add cadd 2023-04-14 00:34:36 +08:00
billow
688ee6a07c add cache inst 2023-04-14 00:34:35 +08:00
billow
69e051687a add AND 2023-04-14 00:34:34 +08:00
billow
b5b456b4f4 add more ADD 2023-04-14 00:34:33 +08:00
billow
96aec6be49 Add more multiclass 2023-04-14 00:34:32 +08:00
billow
ed94f7fcfc add more ADD 2023-04-14 00:34:31 +08:00
billow
175691f2cf add ABS 2023-04-14 00:34:30 +08:00
billow
e6513b26ad add TriCore tablegen files 2023-04-14 00:34:30 +08:00
billow
8b4d0008c3 fix arch_configs[CS_ARCH_TRICORE] 2023-04-14 00:34:29 +08:00
billow
d1021f4a6b Fix build and test 2023-04-14 00:34:28 +08:00
billow
6162515dfe Fix rebase error 2023-04-14 00:34:27 +08:00
Sidney Pontes Filho
89e5129c57 Update document with newly available TriCore instructions 2023-04-14 00:34:26 +08:00
Sidney Pontes Filho
81b1df7f91 Transfer modifications of TriDis/llvm-tricore on Feb, 04 2017 2023-04-14 00:34:25 +08:00
Sidney Pontes Filho
0e2ba4bd2e Add document with available TriCore instructions. 2023-04-14 00:34:24 +08:00
Sidney Pontes Filho
707c57b921 Fix TriCore register mapping 2023-04-14 00:34:23 +08:00
Sidney Pontes Filho
8ea8d69cc5 Fix TriCore Mapping 2023-04-14 00:34:23 +08:00
Sidney Pontes Filho
72cdfdab80 Adjustments in TriCore and add more instructions into tests/test_tricore.c 2023-04-14 00:34:22 +08:00
Sidney Pontes Filho
651aa5a1f1 Fix memory access printing and clean unused functions 2023-04-14 00:34:21 +08:00
Sidney Pontes Filho
4aace70036 Transfer modifications of TriDis/llvm-tricore on Oct 05, 2016 2023-04-14 00:34:20 +08:00
Sidney Pontes Filho
4bc36ec68b Transfer modifications of TriDis/llvm-tricore on Sep 20, 2016 2023-04-14 00:34:19 +08:00
Sidney Pontes Filho
f855c92b46 Adjust printing of Registers and upgrade TriCore test 2023-04-14 00:34:18 +08:00
Sidney Pontes Filho
3c63df7f45 Fix printing MemSrc 2023-04-14 00:34:17 +08:00
Sidney Pontes Filho
edbd73409c Remove all compiler warnings 2023-04-14 00:34:17 +08:00
Sidney Pontes Filho
dd4011297b Fix all compiler errors 2023-04-14 00:34:16 +08:00
Sidney Pontes Filho
4ec3dd12a8 Fix all errors in TriCoreInstPrinter 2023-04-14 00:34:15 +08:00
Sidney Pontes Filho
30f344a1c3 Fix all errors in TriCoreDisassembler 2023-04-14 00:34:14 +08:00
Sidney Pontes Filho
62dba6e681 Fix error of undeclared instructions and registers 2023-04-14 00:34:13 +08:00
Sidney Pontes Filho
bca9ef7420 Add group name maps 2023-04-14 00:34:12 +08:00
Sidney Pontes Filho
5e276956f8 Fix TriCore GenAsmWriter and InstPrinter 2023-04-14 00:34:11 +08:00
Sidney Pontes Filho
104ad28a7e Improve TriCore InstPrinter and Mapping 2023-04-14 00:34:10 +08:00
Sidney Pontes Filho
5d1cd026d8 Map instruction and fix part of InstPrinter 2023-04-14 00:34:10 +08:00
Sidney Pontes Filho
82c874c209 Fix Disassembler and TableGen Files of TriCore 2023-04-14 00:34:09 +08:00
Sidney Pontes Filho
f5687523e3 Modify Makefiles for TriCore architecture 2023-04-14 00:34:08 +08:00
Sidney Pontes Filho
67f3c46f1b Add TriCore Architecture 2023-04-14 00:34:07 +08:00
billow
9ad8f8ee65 fix [cstest] Makefile 2023-04-11 06:53:35 +08:00
Wu ChenXu
49012211f8 Merge pull request #1986 from kabeor/next 
update CI ubuntu version
 2023-04-06 18:30:36 +08:00
kabeor
96f3ae6bb2 update CI ubuntu version 2023-04-06 18:21:48 +08:00
Wu ChenXu
b3c9068bcb Merge pull request #1960 from Rot127/sh-build-warnings 
[SH] Fix build warnings
 2023-04-06 18:01:54 +08:00
Rot127
f7fe2fc9cc Move "add_compile_options" behind project() command. 2023-04-06 03:58:09 -05:00
Rot127
c3cc9ae533 Remove unused variable 2023-04-06 03:57:28 -05:00
Wu ChenXu
05c2e95e4f Merge pull request #1974 from thomasdangl/next 2023-03-19 17:35:46 +08:00
Wu ChenXu
5fcb8c0fde Merge pull request #1976 from stevielavern/fix_arm64_accesses_braa 2023-03-19 14:16:46 +08:00
Thomas Dangl
c08f80ce7a AArch64: fixes register access flags for moves 2023-03-14 15:50:11 +01:00
stevielavern
f1a36b6894 Fix for missing register usages on ARM64 authenticated branches (issue #1975) 2023-03-14 11:36:05 +01:00
hasherezade
9b6f83dcdd In x86: Fixed backward compatibility with C90 (#1969) 
* In x86: fixed backward compatibility with C90

* Refact: define variables as empty, do calculations only after the check passed

* Removed extra spaces
 2023-03-10 08:37:47 +08:00
Wu ChenXu
88eaebedd2 Merge pull request #1968 from covanam/next 
correct register accesses for ARM's sxtb/uxtb and similar instructions
 2023-03-08 23:36:41 +08:00
Wu ChenXu
18a6ac654c Merge branch 'next' into sh-build-warnings 2023-03-08 23:23:31 +08:00
Nam Cao
43ddc91283 correct register accesses for ARM's sxtb/uxtb and similar instructions 2023-03-07 18:59:06 +01:00
Wu ChenXu
ce2560b143 Merge pull request #1965 from kabeor/next 2023-03-07 13:55:56 +08:00
kabeor
eed417a810 fix python binding 2023-03-07 13:17:45 +08:00