- Add support for TRICORE architecture modes 110, 120, 130, 131, 160, 161, and 162 in test_corpus.py
- Change the TriCore mode from `CS_MODE_TRICORE` to `CS_MODE_TRICORE_162` in `Tricore/*.s.cs`
- Add support for new Tricore architectures
- Clean up redundant instructions definitions
- Modify architecture options for the TRICORE mode
- Update disallowed modes for Tricore architecture
- Add new instruction `MOVZ_A`, remove instruction `NOT`, and add several new multiply and multiply-subtract instructions
- Move `multiclass mISR_1` and `multiclass mISYS_0` to separate file and fix typo in `rfe` instruction in `mISYS_0`
- Add support for new CPU feature `TriCore_FEATURE_HasV162` and update relevant inc files.
- Refactor architecture specific code for TriCore
- Update TriCore instruction information in [arch/TriCore/TriCoreInstrInfo.td]
- Improve performance and readability of relevant functions
- Refactor and optimize instruction encoding for TriCore architecture
- Improve performance and reduce code size by simplifying opcodes and encoding logic
- Update instruction definitions in TriCoreInstrInfo.td file
- Omit some large but non-essential changes in diff summary for readability
- Add 3 new TriCore instructions
- Remove TriCore instruction "TriCore_INS_INIT"
- Alphabetized and rearranged various TriCore instructions
- Commented out code remains in the diff but is not part of the program.
- Add support for V110 and V120 in various LD instructions
- Define new multiclass for code reuse
- Restructure LD_A_v120 in favor of LD_A with Requires constraint
- Add new defs for LT_U with suffixes for V110 support
- Fix bug in `printDisp8Imm` function in `TriCoreInstPrinter.c`
- Add new `CALL_sb` instruction to `TriCoreInstrInfo.td`
- Reorder instruction definitions and operands in `TriCoreInstrInfo.td`
