* Wrong type of arguments to formatting function root/shlr/mpc/mpc.c
* Overflow in uncontrolled allocation size ./libr/socket/run.c
* Multiplication result converted to larger type ./libr/core/cmd_print.c
* Multiplication result converted to larger type ./libr/bin/p/bin_dyldcache.c
* Multiplication result converted to larger type ./libr/core/linux_heap_glibc.c
* Multiplication result converted to larger type ./libr/core/visual.c
* Comparison of narrow type with wide type in loop condition ./libr/core/p/core_java.c
* Fix various warning -Wall ./libr/core/p/core_java.c
* Multiplication result converted to larger type ./libr/bin/format/mach0/mach0.c
* Multiplication result converted to larger type ./libr/util/print.c
* Multiplication result converted to larger type ./libr/asm/asm.c
* Fix small warning python
* Fix type error and declaration inside loop
* Reset mpc
* replace size_t
* Fix space missing, type and format
* handle 8051 ANAL_OP DISASM
The 8051 assembler has been R_APId, #included in the local scope, and
called to fill op->mnemonic, which stops a bunch of warnings from
appearing whenever a bunch of disassembly appears on the screen.
The disassembler is called because of comments in r_anal.h: op->mnemonic
should contain the entire disassembly, not just the mnemonic.
Here's hoping the mnemonics and arguments will get split eventually.
* typdef some RAnal enums
In trying to make my analysis push out more info, it's difficult to
understand what all these ints mean, while ACTUALLY they should be
filled with enum values. By using the enum names, that's made clear
immediately.
r2's style is typedef over `enum name`, so that's what I did.
the typedef-instead-of-int I added here isn't consistently propagated,
and has caused warnings about unhandled cases-in-switch, at least some
of which should just get a default: case added, but I'd rather leave it
to the domain experts, or my future self when I become that domain
expert.
* refactor 8051 optype switch into table
it's pretty much static data with very meagre duplication, putting it in
a switch-case is unwieldy.
* add cycle info to 8051 opcode analysis
* add more basic 8051 anal info
op->cond, eob, nopcode, family, id
they seem mostly useless, but it's not much work to add, so...
* use ANAL_OP_MASK_VAL
* fixup! handle 8051 ANAL_OP DISASM
* fixup! use ANAL_OP_MASK_VAL
* Revert "use ANAL_OP_MASK_VAL"
:)
Clearly I was using MASK_VAL incorrectly, the only hint to its use was:
> // It fills RAnalop->dst/src info
so even though it's named "VAL", it might not actually need
to fill RAnalop->val...
Nor ptr, and definitely not jump and fail, which means we don't have use
for it yet! Not until I actually implement ->dst/src
8051 natively uses an '@' prefix for indirect access, which is
a bit awkward is r2, so it should also support the bracket syntax:
xrl a, @r0
xrl a, [r0]
Additionally, I refactored the argument tokenization so that it's all done
up-front, making everything easier to work with, saving about 800 LOC.
Written from scratch, so it's entirely dependent on rasm2 to do the heavy
lifting, and perhaps lacking in features?
8051 syntax didn't make things easy; ampersand and pound signs caused
integration problems, requiring the rasm and regressiontest code to be patched.
- Support for aap (function preludes with pacibsp)
- Handle LDURSW properly
- Define op->type for PAC instructions (not just family)
- Add more asm descriptions for pac instructions
In line 694 a buffer of size (sizeof(char*)*32) is allocated. Later on,
this buffer is realloced to 64. This decreases the size of the allocated
buffer instead of increase. This may lead to memory corruption.
Notes:
* SH opcodes array, file libr/asm/arch/sh/gnu/sh-dis.c from GNU binutils, defines "bf.s" and "bf/s", same with "bt.s" and "bt/s".
* Both pairs are identical, e.g. bt.s and bt/s mean the same thing.
* As *.s variants come first in the table, radare and binutils-objdump print bf.s and bt.s names.
* Still true for latest binutils (v2.32 2019-02-02).
* Renesas chip hardware manuals and IDA Pro only use bf/s and bt/s.
* Reimplement r_buf_fread/fwrite
* Add slice buffer and introduce readonly field
* Do nothing if size is 0
* Prevents an overflow when 8 is subtracted from size.
* Fix ragg2 when patching outside currently existing buffer
* Implement r_mem_mmap_resize for systems where mremap is not defined
* r_buf_buffer can be called with no size arg as well
* Use size_t instead of ut64
* SP was declared as 'sp' in the register profile which doesn't exist. Stack pointer is a7.
* Most C compilers for m68k (e.g. LatticeC) use a6 as stack frame pointer via LINK and UNLK instructions, declare a6 as BP
- Fill op->jump and op->fail for all branch and jump instructions
- Handle short and word variants of BSR (BSR.S and BSR.W)
- DBxx instructions treated as conditional branches
- Handle PC relative variant of JMP & JSR
- Bugfix for the decoding of long instructions (code in asm_m68k_cs.c assumed a maximum of 8 bytes, but maximum is 10 bytes)
* Fix memory leak in strbuf.
`sb->ptr` was set to NULL without freeing the underlying data.
* Use `R_NEW` instead of `R_NEW0`, as the memory is
initialized immediately afterwards.
* Call `r_*_op_init` in `r_asm_disassemble`/`r_anal_op`.
