Commit Graph

32844 Commits

Author SHA1 Message Date
Daniel Dunbar
4943610506 Minor formatting tweaks.
llvm-svn: 84235
2009-10-16 01:58:15 +00:00
Daniel Dunbar
0df659c00b MC: Switch assembler API to using MCExpr instead of MCValue.
llvm-svn: 84234
2009-10-16 01:58:03 +00:00
Daniel Dunbar
022b59a0b5 MC: Remove unneeded context argument to MCExpr::Evaluate*.
llvm-svn: 84233
2009-10-16 01:57:52 +00:00
Daniel Dunbar
af3162e523 MC: Tweak variable assignment diagnostics, and make reassignment of non-absolute
variables and symbols invalid.

llvm-svn: 84232
2009-10-16 01:57:39 +00:00
Daniel Dunbar
a4df6e46a4 MC: When parsing a variable reference, substitute absolute variables immediately
since they are allowed to be redefined.

llvm-svn: 84230
2009-10-16 01:34:54 +00:00
Daniel Dunbar
6b7edc035b MC: Move assembler variable values from MCContext to MCSymbol.
llvm-svn: 84229
2009-10-16 01:33:57 +00:00
Daniel Dunbar
c5165c4258 MC: Switch MCContext value table to storing MCExprs.
llvm-svn: 84228
2009-10-16 01:33:11 +00:00
Evan Cheng
54b34ff68d When checking aliases between phi sources and V2, we know the sources are not themselves phi nodes. However, V2 may be. Call aliasCheck with V2 first to potentially eliminate a std::swap call.
llvm-svn: 84226
2009-10-16 00:33:09 +00:00
Bob Wilson
60ffc7b6b9 Revert svn r80498 and replace it with a different solution. The only problem
I can see with the original code was that I forgot that this runs after
type legalization and hence the result type will always be i32. (Custom
legalization of EXTRACT_VECTOR_ELT is only enabled for vector types with
8- and 16-bit elements.)

Regarding the FIXME comment: any information about sign and zero-extension
should be captured by separate extension operations.  The DAG combiner should
handle those to produce either VGETLANEu or VGETLANEs, and that seems to be
working now.  If there are cases that we're missing, let me know.

llvm-svn: 84218
2009-10-15 23:12:05 +00:00
Anton Korobeynikov
7d6c12de5b Dllexport stuff cleanup:
1. Emit external function type information for all COFF targets since it's
a feature of object format
2. Emit linker directives only for cygming (since this is ld-specific stuff)

llvm-svn: 84214
2009-10-15 22:36:18 +00:00
Sandeep Patel
c0762ba283 Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng.
llvm-svn: 84212
2009-10-15 22:25:32 +00:00
Bob Wilson
aa08dec009 Fix encoding bits for N3VLInt3_QHS multiclass with 8-bit elements.
Patch by Johnny Chen.

llvm-svn: 84206
2009-10-15 21:57:47 +00:00
Kevin Enderby
f2a8226515 Fix ARM memory operand parsing of post indexing with just a base register, that
is just "[Rn]" and no tailing comma with an offset, etc.

llvm-svn: 84205
2009-10-15 21:42:45 +00:00
Bob Wilson
cea08d0d4a Fix a potential performance problem in placing ARM constant pools.
In the case where there are no good places to put constants and we fall back
upon inserting unconditional branches to make new blocks, allow all constant
pool references in range of those blocks to put constants there, even if that
means resetting the "high water marks" for those references.  This will still
terminate because you can't keep splitting blocks forever, and in the bad
cases where we have to split blocks, it is important to avoid splitting more
than necessary.

llvm-svn: 84202
2009-10-15 20:49:47 +00:00
Kevin Enderby
48a0aac679 More bits of the ARM target assembler for llvm-mc, code added to parse labels
as expressions, code for parsing a few arm specific directives (still needs
the MCStreamer calls for these).  Some clean up of the operand parsing code
and adding some comments.

llvm-svn: 84201
2009-10-15 20:48:48 +00:00
Evan Cheng
0a57c7d459 Remove X86Subtarget::IsLinux. It's no longer being used.
llvm-svn: 84200
2009-10-15 20:23:21 +00:00
Victor Hernandez
603a11de4e Fix bug where array malloc with unexpected computation of the size argument resulted in MallocHelper
identifying the malloc as a non-array malloc.  This broke GlobalOpt's optimization of stores of mallocs 
to global variables.

The fix is to classify malloc's into 3 categories:
1. non-array mallocs
2. array mallocs whose array size can be determined
3. mallocs that cannot be determined to be of type 1 or 2 and cannot be optimized

getMallocArraySize() returns NULL for category 3, and all users of this function must avoid their 
malloc optimization if this function returns NULL.

Eventually, currently unexpected codegen for computing the malloc's size argument will be supported in
isArrayMalloc() and getMallocArraySize(), extending malloc optimizations to those examples.

llvm-svn: 84199
2009-10-15 20:14:52 +00:00
Benjamin Kramer
44c164e005 Add files Sanjiv forgot.
llvm-svn: 84196
2009-10-15 19:46:34 +00:00
Sanjiv Gupta
d279da3360 Re-apply 84180 with the fixed test case.
llvm-svn: 84195
2009-10-15 19:26:25 +00:00
Jakob Stoklund Olesen
311774b780 Move Blackfin intrinsics into the Target/Blackfin directory.
llvm-svn: 84194
2009-10-15 18:50:52 +00:00
Jakob Stoklund Olesen
2ba26ceb11 Report errors correctly for unselected target intrinsics.
llvm-svn: 84193
2009-10-15 18:50:03 +00:00
Jakob Stoklund Olesen
2fe044dcb7 Clean up TargetIntrinsicInfo API. Add pure virtual methods.
llvm-svn: 84192
2009-10-15 18:49:26 +00:00
Nick Lewycky
7ec7f1ce0f Add missing break statements! Thanks to Duncan Sands for pointing this out!
llvm-svn: 84191
2009-10-15 18:48:58 +00:00
Daniel Dunbar
609b7287b8 Revert "Complete Rewrite of AsmPrinter, TargetObjectFile based on new
PIC16Section class", it breaks globals.ll.

llvm-svn: 84184
2009-10-15 15:02:14 +00:00
Sanjiv Gupta
feff117097 Complete Rewrite of AsmPrinter, TargetObjectFile based on new PIC16Section class
derived from MCSection.

llvm-svn: 84180
2009-10-15 10:10:43 +00:00
Sanjiv Gupta
cd427f0fbc Few changes to comply with new DebugInfo Metadata representation.
llvm-svn: 84179
2009-10-15 09:48:25 +00:00
Nick Lewycky
4ba7b77812 Teach basicaa about memcpy/memmove/memset. The length argument can be used to
improve alias results if constant, and the source pointer can't be modified.

llvm-svn: 84175
2009-10-15 07:11:24 +00:00
Nick Lewycky
14a06f7051 Teach BasicAA to use the size parameter of the memory use marker intrinsics.
llvm-svn: 84174
2009-10-15 06:12:11 +00:00
Bob Wilson
53689872bd Be smarter about reusing constant pool entries.
llvm-svn: 84173
2009-10-15 05:52:29 +00:00
Bob Wilson
bfaed16c37 Fix another problem with ARM constant pools. Radar 7303551.
When ARMConstantIslandPass cannot find any good locations (i.e., "water") to
place constants, it falls back to inserting unconditional branches to make a
place to put them.  My recent change exposed a problem in this area.  We may
sometimes append to the same block more than one unconditional branch.  The
symptoms of this are that the generated assembly has a branch to an undefined
label and running llc with -debug will cause a seg fault.

This happens more easily since my change to prevent CPEs from moving from
lower to higher addresses as the algorithm iterates, but it could have
happened before.  The end of the block may be in range for various constant
pool references, but the insertion point for new CPEs is not right at the end
of the block -- it is at the end of the CPEs that have already been placed
at the end of the block.  The insertion point could be out of range.  When
that happens, the fallback code will always append another unconditional
branch if the end of the block is in range.

The fix is to only append an unconditional branch if the block does not
already end with one.  I also removed a check to see if the constant pool load
instruction is at the end of the block, since that is redundant with
checking if the end of the block is in-range.

There is more to be done here, but I think this fixes the immediate problem.

llvm-svn: 84172
2009-10-15 05:10:36 +00:00
Chris Lattner
389f4efae7 only try to fold constantexpr operands when the worklist is first populated,
don't bother every time going around the main worklist.  This speeds up a 
release-asserts opt -std-compile-opts on 403.gcc by about 4% (1.5s).  It
seems to speed up the most expensive instances of instcombine by ~10%.

llvm-svn: 84171
2009-10-15 04:59:28 +00:00
Chris Lattner
ddfa3af584 don't bother calling ConstantFoldInstruction unless there is a use of the
instruction (which disqualifies stores, unreachable, etc) and at least the
first operand is a constant.  This filters out a lot of obvious cases that
can't be folded.  Also, switch the IRBuilder to a TargetFolder, which tries
harder.

llvm-svn: 84170
2009-10-15 04:13:44 +00:00
Nick Lewycky
a12f6e8f78 Take advantage of TargetData when available; we know that the atomic intrinsics
only dereference the element they point to directly with no pointer arithmetic.

llvm-svn: 84159
2009-10-15 00:36:35 +00:00
Dan Gohman
27c126770a Make CodePlacementOpt align loops, rather than loop headers. The
header is just the entry block to the loop, and it needn't be at
the top of the loop in the code layout.

Remove the code that suppressed loop alignment for outer loops,
so that outer loops are aligned.

llvm-svn: 84158
2009-10-15 00:36:22 +00:00
Evan Cheng
f46b194f84 When LiveVariables is adding implicit-def to model "partial dead", add the earlyclobber marker if the superreg def has it.
llvm-svn: 84153
2009-10-14 23:39:27 +00:00
Evan Cheng
f57950d75b Print earlyclobber for implicit-defs as well.
llvm-svn: 84152
2009-10-14 23:37:31 +00:00
Bob Wilson
db95c227fa Fix instruction encoding bits for NEON VPADAL.
Patch by Johnny Chen.

llvm-svn: 84146
2009-10-14 21:43:17 +00:00
Bob Wilson
1554029c7c Remove unused variables to fix build warning.
llvm-svn: 84144
2009-10-14 21:40:45 +00:00
Jim Grosbach
8da653b238 Make loop not recalc getNumOperands() each time around
llvm-svn: 84138
2009-10-14 21:22:39 +00:00
Devang Patel
22761afada Add support to record DbgScope as inlined scope.
llvm-svn: 84134
2009-10-14 21:08:09 +00:00
Jim Grosbach
9233bebc36 quiet compiler warning
llvm-svn: 84133
2009-10-14 21:07:11 +00:00
Jim Grosbach
d86f233722 Inst{11-8} for vshl should be 0b0101, not 0b1111.
Refs: A7-17 & A8-750.

Patch by Johnny Chen.

llvm-svn: 84131
2009-10-14 20:31:01 +00:00
Bob Wilson
c9b704f66c Set instruction encoding bits 4 and 7 for ARM register-register and
register-shifted-register instructions.  Patch by Johnny Chen.

llvm-svn: 84124
2009-10-14 19:00:24 +00:00
Bob Wilson
320891060f Refactor code to select NEON VST intrinsics.
llvm-svn: 84122
2009-10-14 18:32:29 +00:00
Devang Patel
89ef6dcb54 Use isVoidTy()
llvm-svn: 84118
2009-10-14 17:29:00 +00:00
Bob Wilson
2b19bbea06 Refactor code to select NEON VLD intrinsics.
llvm-svn: 84117
2009-10-14 17:28:52 +00:00
Devang Patel
95b6efe972 Add copyMD to copy metadata from one instruction to another instruction.
llvm-svn: 84113
2009-10-14 17:02:49 +00:00
Bob Wilson
5dbe1c0143 More refactoring. NEON vst lane intrinsics can share almost all the code for
vld lane intrinsics.

llvm-svn: 84110
2009-10-14 16:46:45 +00:00
Bob Wilson
7623a1ce5c Refactor code for selecting NEON load lane intrinsics.
llvm-svn: 84109
2009-10-14 16:19:03 +00:00
Duncan Sands
4fcf6123dd I don't see any point in having both eh.selector.i32 and eh.selector.i64,
so get rid of eh.selector.i64 and rename eh.selector.i32 to eh.selector.
Likewise for eh.typeid.for.  This aligns us with gcc, which always uses a
32 bit value for the selector on all platforms.  My understanding is that
the register allocator used to assert if the selector intrinsic size didn't
match the pointer size, and this was the reason for introducing the two
variants.  However my testing shows that this is no longer the case (I
fixed some bugs in selector lowering yesterday, and some more today in the
fastisel path; these might have caused the original problems).

llvm-svn: 84106
2009-10-14 16:11:37 +00:00