RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-12-26 05:27:43 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
52,879 Commits 4 Branches 5 Tags 634 MiB
4943610506
Commit Graph

32844 Commits

Author SHA1 Message Date
Chris Lattner
41b5fd5218 remove LoopVR pass. According to Nick: 
"LoopVR's logic was copied into ScalarEvolution::getUnsignedRange and 
::getSignedRange. Please delete LoopVR."

llvm-svn: 83531
 2009-10-08 06:42:44 +00:00
Bob Wilson
276bdabb9a Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors. 
llvm-svn: 83526
 2009-10-08 05:18:18 +00:00
Jim Grosbach
9f57f9bee6 Cleanup up unused R3LiveIn tracking. 
llvm-svn: 83522
 2009-10-08 01:50:26 +00:00
Jim Grosbach
a3e1149941 Re-enable register scavenging in Thumb1 by default. 
llvm-svn: 83521
 2009-10-08 01:46:59 +00:00
Jim Grosbach
a8e8c8a28f bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that. 
llvm-svn: 83519
 2009-10-08 01:09:45 +00:00
Bob Wilson
8aa1d328b5 Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors. 
llvm-svn: 83518
 2009-10-08 00:28:28 +00:00
Bob Wilson
958e4ae815 Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors. 
llvm-svn: 83513
 2009-10-08 00:21:01 +00:00
Jeffrey Yasskin
e36facef86 In instcombine's debug output, avoid printing ADD for instructions that are 
already on the worklist, and print Visited when an instruction is about to be
visited.  Net, on one input, this reduced the output size by at least 9x.

llvm-svn: 83510
 2009-10-08 00:12:24 +00:00
Bob Wilson
729cd181a2 Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors. 
llvm-svn: 83508
 2009-10-07 23:54:04 +00:00
Bob Wilson
3cbf156518 Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors. 
llvm-svn: 83506
 2009-10-07 23:39:57 +00:00
Bob Wilson
0ffa9679a5 Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors. 
llvm-svn: 83502
 2009-10-07 22:57:01 +00:00
Jim Grosbach
cb905d28a8 reverting thumb1 scavenging default due to test failure while I figure out what's up. 
llvm-svn: 83501
 2009-10-07 22:49:41 +00:00
Chris Lattner
41e4cd7ef4 second half of lazy liveness removal. 
llvm-svn: 83500
 2009-10-07 22:49:30 +00:00
Dale Johannesen
ba62bb565d Fix handling of x86 'R' constraint. 
llvm-svn: 83499
 2009-10-07 22:47:20 +00:00
Jim Grosbach
cc952b2ff8 Enable thumb1 register scavenging by default. 
llvm-svn: 83496
 2009-10-07 22:26:31 +00:00
Jim Grosbach
a9d83ba92c Enable thumb1 register scavenging by default. 
llvm-svn: 83494
 2009-10-07 22:26:14 +00:00
Devang Patel
a7456a1335 Extract subprogram and compile unit information from the debug info attached to an instruction. 
llvm-svn: 83491
 2009-10-07 22:04:08 +00:00
Bob Wilson
e7173601a3 Add some instruction encoding bits for NEON load/store instructions. 
llvm-svn: 83490
 2009-10-07 21:53:04 +00:00
Eric Christopher
a42e55349d 80-column and whitespace fixes. 
llvm-svn: 83489
 2009-10-07 21:14:25 +00:00
Kevin Enderby
ef201aaa04 Fixed MCSectionMachO::ParseSectionSpecifier to allow an attribute of "none" so 
that a symbol stub section with no attributes can be parsed as in:
.section __TEXT,__picsymbolstub4,symbol_stubs,none,16

llvm-svn: 83488
 2009-10-07 20:57:20 +00:00
Bob Wilson
cee91108da Add codegen support for NEON vst4 intrinsics with 128-bit vectors. 
llvm-svn: 83486
 2009-10-07 20:49:18 +00:00
Bob Wilson
af14187764 Add codegen support for NEON vst3 intrinsics with 128-bit vectors. 
llvm-svn: 83484
 2009-10-07 20:30:08 +00:00
Jim Grosbach
0609c91ec4 grammar 
llvm-svn: 83483
 2009-10-07 19:08:36 +00:00
Bob Wilson
62a3e55cea Add codegen support for NEON vst2 intrinsics with 128-bit vectors. 
llvm-svn: 83482
 2009-10-07 18:47:39 +00:00
Jim Grosbach
5db951c6a2 add initializers for clarity. Add missing assignment of PrevLastUseOp. 
llvm-svn: 83481
 2009-10-07 18:44:24 +00:00
Owen Anderson
132727997c Remove LazyLiveness from the tree. It doesn't work right now, and I'm not going to have the time 
to finish it any time soon.  If someone's interested it, they can resurrect it from SVN history.

llvm-svn: 83480
 2009-10-07 18:40:17 +00:00
Bob Wilson
9bb47b3e5d Add codegen support for NEON vld4 intrinsics with 128-bit vectors. 
llvm-svn: 83479
 2009-10-07 18:09:32 +00:00
Kevin Enderby
c0d0a1ec58 Add another bit of the ARM target assembler to llvm-mc to parse registers 
with writeback, things like "sp!", etc.  Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.

llvm-svn: 83477
 2009-10-07 18:01:35 +00:00
Dan Gohman
0447afe915 Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, and 
teach it how to recognize invariant physical registers.

llvm-svn: 83476
 2009-10-07 17:47:20 +00:00
Dan Gohman
b95136e649 Replace TargetInstrInfo::isInvariantLoad and its target-specific 
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475
 2009-10-07 17:38:06 +00:00
Dan Gohman
aa09eaa3e8 Add a few simple MachineVerifier checks for MachineMemOperands. 
llvm-svn: 83474
 2009-10-07 17:36:00 +00:00
Bob Wilson
b38401ccef Add codegen support for NEON vld3 intrinsics with 128-bit vectors. 
llvm-svn: 83471
 2009-10-07 17:24:55 +00:00
Bob Wilson
a77f6a7814 Rearrange code for selecting vld2 intrinsics. No functionality change. 
This is just to be more consistent with the forthcoming code for vld3/4.

llvm-svn: 83470
 2009-10-07 17:23:09 +00:00
Jim Grosbach
61c5ce1bde Add register-reuse to frame-index register scavenging. When a target uses 
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.

llvm-svn: 83467
 2009-10-07 17:12:56 +00:00
Devang Patel
c411175393 Do not assume that the module is set. 
llvm-svn: 83462
 2009-10-07 16:37:55 +00:00
Torok Edwin
6a66b4edd1 Add PR to this FIXME, looks like I didn't commit this change after all. 
llvm-svn: 83457
 2009-10-07 09:22:55 +00:00
Duncan Sands
27cb155f76 Make getPointerTo return a const PointerType* rather than 
an unqualified PointerType* because it seems more correct.

llvm-svn: 83454
 2009-10-07 07:35:19 +00:00
Eric Christopher
e6bebc66a7 Add FreeInst to the "is a call" check for Insts that are calls, but 
not intrinsics.

llvm-svn: 83441
 2009-10-07 00:54:08 +00:00
Dan Gohman
564b5f75ac Fix this comment. The loop header is the loop entry point. 
llvm-svn: 83437
 2009-10-07 00:33:10 +00:00
Anton Korobeynikov
aba66ae89b Add PseudoSourceValues for constpool stuff on ELF (Darwin should use something similar) 
and register spills.

llvm-svn: 83435
 2009-10-07 00:06:35 +00:00
Eric Christopher
8720c9ca69 While we still have a MallocInst treat it as a call like any other 
for inlining.

When MallocInst goes away this code will be subsumed as part of
calls and work just fine...

llvm-svn: 83434
 2009-10-07 00:02:18 +00:00
Kevin Enderby
2c772c1ae9 Added bits of the ARM target assembler to llvm-mc to parse some load instruction 
operands.  Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts.  This is a work in progress.

llvm-svn: 83424
 2009-10-06 22:26:42 +00:00
Bob Wilson
8cd1ea81c4 Add codegen support for NEON vld2 operations on quad registers. 
llvm-svn: 83422
 2009-10-06 22:01:59 +00:00
Bob Wilson
8c108dc476 Use copyRegToReg hook to copy registers. 
llvm-svn: 83421
 2009-10-06 22:01:15 +00:00
Jeffrey Yasskin
c4f2348fe7 r83391 was completely broken since Twines keep references to their inputs, and 
some of the inputs were temporaries.  Here's a real fix for the miscompilation.
Thanks to sabre for pointing out the problem.

llvm-svn: 83417
 2009-10-06 21:45:26 +00:00
Bob Wilson
21056e1c2e Fix a comment typo. 
Patch by Johnny Chen.

llvm-svn: 83407
 2009-10-06 20:18:46 +00:00
Nicolas Geoffray
bde5513d27 Bugfix for the CommaSeparated option. The original code was adding the whole 
string at the end of the list, instead of the last comma-separated string.

llvm-svn: 83405
 2009-10-06 19:55:53 +00:00
Ted Kremenek
4b5e7b5661 Update CMake file. 
llvm-svn: 83404
 2009-10-06 19:45:38 +00:00
Devang Patel
1639c0e45a Add support to handle debug info attached to an instruction. 
This is not yet enabled.

llvm-svn: 83400
 2009-10-06 18:37:31 +00:00
Dan Gohman
a803c712dd Instead of printing unnecessary basic block labels as labels in 
verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.

Also, factor out the relevant code out of all the targets and into
target-independent code.

llvm-svn: 83392
 2009-10-06 17:38:38 +00:00
Jeffrey Yasskin
572ef68cf5 Fix PR5112, a miscompilation on gcc-4.0.3. Patch by Collin Winter! 
llvm-svn: 83391
 2009-10-06 17:25:50 +00:00
Chris Lattner
e87add4b88 remove predicate simplifier, it never got the last bugs beaten 
out of it, and jump threading, condprop and gvn are now getting
most of the benefit.  This was approved by Nicholas and Nicolas.

llvm-svn: 83390
 2009-10-06 16:59:46 +00:00
Richard Osborne
90a7ea5c13 Remove xs1b predicate since it is no longer needed to differentiate betweem 
xs1a and xs1b.

llvm-svn: 83383
 2009-10-06 16:17:57 +00:00
Richard Osborne
b692ade672 Remove xs1a subtarget. xs1a is a preproduction device used in 
early development boards which is no longer supported in the
XMOS toolchain.

llvm-svn: 83381
 2009-10-06 16:01:09 +00:00
Richard Osborne
ebd697eca6 Default to the xs1b subtarget 
llvm-svn: 83380
 2009-10-06 15:41:52 +00:00
Duncan Sands
2400ad7236 Introduce and use convenience methods for getting pointer types 
where the element is of a basic builtin type.  For example, to get
an i8* use getInt8PtrTy.

llvm-svn: 83379
 2009-10-06 15:40:36 +00:00
Jim Grosbach
d8a4aaa624 grammar 
llvm-svn: 83378
 2009-10-06 15:03:44 +00:00
Devang Patel
bad114ca60 Fix cut-n-pasto. 
llvm-svn: 83367
 2009-10-06 03:15:38 +00:00
Devang Patel
2fb4294e97 Update processDebugLoc() to handle requests to process debug info, before and after emitting instructions. 
llvm-svn: 83364
 2009-10-06 03:04:58 +00:00
Devang Patel
a8f35ac640 Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction. 
llvm-svn: 83363
 2009-10-06 02:19:11 +00:00
Devang Patel
3200e99109 Remove dead code. 
llvm-svn: 83362
 2009-10-06 02:01:32 +00:00
Devang Patel
0141a90812 Add utility routine to set begin and end labels for DbgScopes. 
This will be used by processDebugLoc().

llvm-svn: 83361
 2009-10-06 01:50:42 +00:00
Devang Patel
2001f5878b Remove unintentional function decl. 
llvm-svn: 83356
 2009-10-06 01:31:35 +00:00
Devang Patel
ac511d1acf Add utility routine to collect variable debug info. This is not yet used. 
llvm-svn: 83355
 2009-10-06 01:26:37 +00:00
Jeffrey Yasskin
4b011e6a51 Fix http://llvm.org/PR5116 by rolling back r60822. This passes `make unittests 
check-lit` on both x86-64 Linux and x86-32 Darwin.

llvm-svn: 83353
 2009-10-06 00:35:55 +00:00
Devang Patel
6a7f2ee022 Set default location for the function if it is not already set. 
This code is not  yet enabled.

llvm-svn: 83349
 2009-10-06 00:09:08 +00:00
Devang Patel
3b3d8a9d09 Existence of a compile unit for input source file is a good indicator to check debug info's presence in a module. 
llvm-svn: 83348
 2009-10-06 00:03:14 +00:00
Devang Patel
f129b0d44f If subprogram die is not available then construct new one. 
This can happen if debug info is processed lazily.

llvm-svn: 83347
 2009-10-05 23:59:00 +00:00
Devang Patel
dff583ac49 Adjust context for the global variables that are not at file scope, e.g. 
void foo() { static int bar = 42; }
Here, foo's DIE is parent of bar's DIE.

llvm-svn: 83344
 2009-10-05 23:40:42 +00:00
Devang Patel
4e9591a170 Set address while constructing DIE. 
llvm-svn: 83343
 2009-10-05 23:22:08 +00:00
Evan Phoenix
1b803795c7 Extend ConstantFolding to understand signed overflow variants 
llvm-svn: 83338
 2009-10-05 22:53:52 +00:00
Jim Grosbach
d6da133b85 In Thumb1, the register scavenger is not always able to use an emergency 
spill slot. When frame references are via the frame pointer, they will be
negative, but Thumb1 load/store instructions only allow positive immediate
offsets. Instead, Thumb1 will spill to R12.

llvm-svn: 83336
 2009-10-05 22:30:23 +00:00
Torok Edwin
1a53fd9356 Don't treat malloc calls with non-matching prototype as malloc. 
Fixes second part of PR5130, miscompilation in FreeBSD kernel, where malloc takes 3 params,
and *does* initialize memory.

llvm-svn: 83324
 2009-10-05 21:15:43 +00:00
Edward O'Callaghan
8b7189e234 No newline at end of files. 
llvm-svn: 83318
 2009-10-05 18:43:19 +00:00
Devang Patel
28b7c6155c Gracefully handle various scopes while recording source line info. 
llvm-svn: 83317
 2009-10-05 18:03:19 +00:00
Dan Gohman
176e47a413 Remove an unnnecessary LLVMContext argument in 
ConstantFoldLoadThroughGEPConstantExpr.

llvm-svn: 83311
 2009-10-05 16:36:26 +00:00
Dan Gohman
a926123a24 Use Use::operator= instead of Use::set, for consistency. 
llvm-svn: 83310
 2009-10-05 16:31:55 +00:00
Dan Gohman
cc0c3fe456 Remove explicit enum integer values. They don't appear to be needed, and 
they make it less convenient to add new entries.

llvm-svn: 83308
 2009-10-05 15:52:08 +00:00
Dan Gohman
b38864fb37 Add RIP to GR64_NOREX. This fixed a MachineVerifier error when RIP 
is used in an operand which requires GR64_NOREX.

llvm-svn: 83307
 2009-10-05 15:42:08 +00:00
Chris Lattner
a3cf123e86 strength reduce a ton of type equality tests to check the typeid (Through 
the new predicates I added) instead of going through a context and doing a
pointer comparison.  Besides being cheaper, this allows a smart compiler
to turn the if sequence into a switch.

llvm-svn: 83297
 2009-10-05 05:54:46 +00:00
Chris Lattner
7d19c8841c teach the optimizer how to constant fold uadd/usub intrinsics. 
llvm-svn: 83295
 2009-10-05 05:26:04 +00:00
Chris Lattner
8b72a24a35 simplify this code a bunch. 
llvm-svn: 83294
 2009-10-05 05:06:24 +00:00
Chris Lattner
24a77e2ade code simplifications. 
llvm-svn: 83292
 2009-10-05 05:00:35 +00:00
Chris Lattner
513b66b237 instcombine shouldn't delete all null checks for mallocs. 
This fixes PR5130.

llvm-svn: 83290
 2009-10-05 02:47:47 +00:00
Chris Lattner
2c0a4fb325 stop MachineFunctionPass from claiming that it preserves LoopDependence info, 
which causes dependence info to be linked into lli.

llvm-svn: 83289
 2009-10-05 02:35:05 +00:00
Chris Lattner
1aa661ce46 remove llvm-db: it is completely broken and if anyone wants to do a debugger, 
they should not base it on llvm-db (which not following almost any "best practices").

llvm-svn: 83288
 2009-10-05 02:29:51 +00:00
Owen Anderson
412df08b59 Do away with the strange use of BitVectors in SSI, and just use normal sets. This makes the code much more C++/LLVM-ish. 
llvm-svn: 83286
 2009-10-04 18:49:55 +00:00
Jakob Stoklund Olesen
61a76937ee Whitespace and formatting. 
llvm-svn: 83285
 2009-10-04 18:18:39 +00:00
Owen Anderson
cadab85644 Fix a typo in the comment. 
llvm-svn: 83283
 2009-10-04 17:52:13 +00:00
Owen Anderson
18cecec6a0 SSI needs to require DT and DF transitively, since it uses them outside of its runOnFunction. 
Similarly, it can be marked setPreservesAll, since it does no work in its runOnFunction.

llvm-svn: 83282
 2009-10-04 17:47:39 +00:00
Evan Cheng
eae1bb9779 Allow -inline-threshold override default threshold even if compiling to optimize for size. 
llvm-svn: 83274
 2009-10-04 06:13:54 +00:00
Nick Lewycky
5bf0eb2dd5 Requires element types in a constant initializer to match the element types of 
of the constant. This reverts r6544 and r7428.

llvm-svn: 83270
 2009-10-03 19:30:43 +00:00
Bob Wilson
64ce6ef65a Add a comment to describe letters used in multiclass name suffixes. 
llvm-svn: 83257
 2009-10-03 04:44:16 +00:00
Bob Wilson
be258e083a Fix encoding problem for VMLS instruction. 
Thanks to Johnny Chen for pointing this out!

llvm-svn: 83256
 2009-10-03 04:41:21 +00:00
Lang Hames
40530eacdb Oops. Renamed remaining MachineInstrIndex references. 
llvm-svn: 83255
 2009-10-03 04:31:31 +00:00
Lang Hames
f6903a7043 Renamed MachineInstrIndex to LiveIndex. 
llvm-svn: 83254
 2009-10-03 04:21:37 +00:00
Benjamin Kramer
8cebbc5761 MingW build fixes 
- MingW needs -lpsapi (in ${LIBS}) linked after -lLLVMSystem.
  Noticed by Ronald Pijnacker!

- Some parts of the System library must be build with exceptions on windows.
  Based on a patch by Jay Foad!

llvm-svn: 83251
 2009-10-02 19:36:31 +00:00
Benjamin Kramer
aa33886dd7 Fix a use-after-free in post-ra-scheduling. 
MI->addOperand invalidates references to it's operands, avoid touching
the operand after a new one was added.

llvm-svn: 83249
 2009-10-02 15:59:52 +00:00
Evan Cheng
8cf9f56cca getFunctionAlignment should return log2 alignment. 
llvm-svn: 83242
 2009-10-02 06:57:25 +00:00
Evan Cheng
5b9107c1b9 Forgot about ARM::tPUSH. It also has a new writeback operand. 
llvm-svn: 83237
 2009-10-02 05:03:07 +00:00
Evan Cheng
d6e64a4cfd Move load / store multiple before post-alloc scheduling. 
llvm-svn: 83236
 2009-10-02 04:57:15 +00:00
David Goodwin
cb4a66977c All callee-saved registers are live-out of a return block. 
llvm-svn: 83223
 2009-10-01 23:28:47 +00:00
David Goodwin
a4b73e486e Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default. 
llvm-svn: 83218
 2009-10-01 22:19:57 +00:00
Mike Stump
532ed49e39 Expand api out in the usual inserter way, though, I do have a 
question, can we get rid of the BasicBlock versions of all inserters
and use Head == 0 to indicate the old case when GetInsertBlock == 0?

llvm-svn: 83216
 2009-10-01 22:08:58 +00:00
David Goodwin
d0edce4c0d Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. 
llvm-svn: 83215
 2009-10-01 21:46:35 +00:00
Evan Cheng
272a738580 ARM::tPOP and tPOP_RET each has an extra writeback operand now. 
llvm-svn: 83214
 2009-10-01 20:54:53 +00:00
Devang Patel
7aa19711f8 Add support to extract lexical scope information from DebugLoc attached with an machine instruction. 
This is not yet enabled.

llvm-svn: 83210
 2009-10-01 20:31:14 +00:00
David Goodwin
0a7770b3e0 Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup. 
llvm-svn: 83208
 2009-10-01 19:45:32 +00:00
Devang Patel
7b4ba71afa Record first and last instruction of a scope in DbgScope. 
llvm-svn: 83207
 2009-10-01 18:25:23 +00:00
Evan Cheng
68d79a17a0 Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change 
operands of instructions with these properties while breaking anti-dep.

llvm-svn: 83198
 2009-10-01 08:26:23 +00:00
Evan Cheng
241092d89f Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple, 
ld / st pairs, etc.

llvm-svn: 83197
 2009-10-01 08:22:27 +00:00
Douglas Gregor
b4e6fce681 Remove GVNPRE.cpp from the CMake makefile 
llvm-svn: 83194
 2009-10-01 05:30:05 +00:00
Chris Lattner
857ed445a8 remove the GVNPRE pass. It has been subsumed by the GVN pass. 
Ok'd by Owen.

llvm-svn: 83193
 2009-10-01 02:18:36 +00:00
Evan Cheng
dc5ac208bf Update ARM JIT emitter to account for ld/st multiple changes. 
llvm-svn: 83192
 2009-10-01 01:39:21 +00:00
Evan Cheng
4dd7d7156e Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions. 
llvm-svn: 83191
 2009-10-01 01:33:39 +00:00
Devang Patel
4f1147e386 Add another MDNode into DebugLocTuple. This will be used to keep track of inlined functions. 
llvm-svn: 83190
 2009-10-01 01:15:28 +00:00
Devang Patel
d24ba7a101 If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables. 
llvm-svn: 83189
 2009-10-01 01:03:26 +00:00
Devang Patel
e097bf49d0 Use MachineInstr as an processDebugLoc() argument. 
This will allow processDebugLoc() to handle scopes for DWARF debug info. 

llvm-svn: 83183
 2009-09-30 23:12:50 +00:00
Devang Patel
044648c2d7 Use MDNode * directly as an RecordSourceLine() argument. 
llvm-svn: 83182
 2009-09-30 22:51:28 +00:00
Devang Patel
ef84ca6011 Remove dead code. 
llvm-svn: 83181
 2009-09-30 22:43:52 +00:00
Devang Patel
cb516787d0 Add isFOO() helpers. Fix getDirectory() and getFilename() for DIScope. 
llvm-svn: 83180
 2009-09-30 22:34:41 +00:00
Bob Wilson
d6896006b1 Use OutStreamer.SwitchSection instead of writing out textual section directives. 
Add a new TargetLoweringObjectFileMachO::getConstTextCoalSection method to
get access to that section.

llvm-svn: 83178
 2009-09-30 22:25:37 +00:00
Bob Wilson
1cf44c8225 Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use this 
to emit target-specific things at the beginning of the asm output.  This
fixes a problem for PPC, where the text sections are not being kept together
as expected.  The base class doInitialization code calls DW->BeginModule()
which emits a bunch of DWARF section directives.  The PPC doInitialization
code then emits all the TEXT section directives, with the intention that they
will be kept together. But as I understand it, the Darwin assembler treats
the default TEXT section as a special case and moves it to the beginning of
the file, which means that all those DWARF sections are in the middle of
the text.  With this change, the EmitStartOfAsmFile hook is called before
the DWARF section directives are emitted, so that all the PPC text section
directives come out right at the beginning of the file.

llvm-svn: 83176
 2009-09-30 22:06:26 +00:00
Bob Wilson
59eb323058 Fix a comment typo. 
llvm-svn: 83174
 2009-09-30 21:44:42 +00:00
Devang Patel
43ce9e3e75 Check for null MDNode element while printing comment. 
llvm-svn: 83172
 2009-09-30 21:26:51 +00:00
Bob Wilson
44b5a5a58c Fix a comment. 
llvm-svn: 83171
 2009-09-30 21:26:13 +00:00
Bob Wilson
233aa46c87 The AsmPrinter base class contains a DwarfWriter member, so there's no need 
for derived AsmPrinters to add another one.  In some cases, fixing this
removes the need to override the doInitialization method.

llvm-svn: 83170
 2009-09-30 21:24:45 +00:00
Jeffrey Yasskin
2d4f3f6704 Assert that ConstantArrays are created with correctly-typed elements. 
llvm-svn: 83168
 2009-09-30 21:08:08 +00:00
Dan Gohman
2ecc146f0c Fix this code so that it doesn't try to iterate through a std::vector 
while calling changeImmediateDominator, which removes elements from the
vector. This fixes PR5097.

llvm-svn: 83166
 2009-09-30 20:54:16 +00:00
Reid Kleckner
4c0732ea64 Silence comparison always false warning in -Asserts mode. 
llvm-svn: 83164
 2009-09-30 20:43:07 +00:00
Jim Grosbach
b4fdc9252d Add additional assert() to verify no extraneous use of a scavenged register. 
llvm-svn: 83163
 2009-09-30 20:35:36 +00:00
Devang Patel
24270e88cc Print tag name for MDNodes that are used to encode debug info. 
llvm-svn: 83160
 2009-09-30 20:16:54 +00:00
Reid Kleckner
ffe2b97d7a Fix integer overflow in instruction scheduling. This can happen if we have 
basic blocks that are so long that their size overflows a short.

Also assert that overflow does not happen in the future, as requested by Evan.

This fixes PR4401.

llvm-svn: 83159
 2009-09-30 20:15:38 +00:00
Jim Grosbach
2c211c7bfe Clarify comment phrasing. 
llvm-svn: 83148
 2009-09-30 15:23:38 +00:00
Evan Cheng
86bd5c3ae1 Add a option which would move ld/st multiple pass before post-alloc scheduling. 
llvm-svn: 83145
 2009-09-30 08:53:01 +00:00
Evan Cheng
bb0561f2dd Add a target hook to add pre- post-regalloc scheduling passes. 
llvm-svn: 83144
 2009-09-30 08:49:50 +00:00
Nick Lewycky
a44b8327fb Fix compile error as debug interface changed. 
By the way, this code is buggy. You can't keep a map<MDNode *, something>
because the MDNode may be destroyed and reused for something else.

llvm-svn: 83141
 2009-09-30 04:50:26 +00:00
Jim Grosbach
d885068ad4 replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister() 
per customary usage

llvm-svn: 83137
 2009-09-30 01:47:59 +00:00
Jim Grosbach
9655673c95 When checking whether we need to reserve a register for the scavenger, 
the size of the saved frame pointer needs to be taken into account.

llvm-svn: 83136
 2009-09-30 01:43:29 +00:00
Jim Grosbach
2d057f09e8 Add "isBarrier = 1" to return instructions. 
Patch by Sylvere Teissier.

llvm-svn: 83135
 2009-09-30 01:35:11 +00:00
Jim Grosbach
5cc33f7dac fix compiler warning 
llvm-svn: 83132
 2009-09-30 00:37:40 +00:00
Bob Wilson
48f9855607 For Darwin, emit all the text section directives together before the dwarf 
section directives.  This causes the assembler to put the text sections at
the beginning of the object file, which helps work around a limitation of the
Darwin ARM relocations.  Radar 7255355.

llvm-svn: 83127
 2009-09-30 00:23:42 +00:00
Devang Patel
0136a7ebec Simplify. 
llvm-svn: 83123
 2009-09-30 00:14:40 +00:00
David Goodwin
a282690f82 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. 
llvm-svn: 83122
 2009-09-30 00:10:16 +00:00
Mike Stump
a3bce35a07 Add a way for a frontend to generate more complex dwarf location 
information.  This allows arbitrary code involving DW_OP_plus_uconst
and DW_OP_deref.  The scheme allows for easy extention to include,
any, or all of the DW_OP_ opcodes.  I thought about just exposing all
of them, but, wasn't sure if people wanted the dwarf opcodes exposed
in the api.  Is that a layering violation?

With this scheme, the entire existing block scheme used by llvm-gcc
can be switched over to the new scheme.  I think that would be
cleaner, as then the compiler specific bits are not present in llvm
proper.  Before the old code can be yanked however, similar code in
clang would have to be removed.

Next up, more testing.

llvm-svn: 83120
 2009-09-30 00:08:22 +00:00
Jim Grosbach
278d0d5b3d minor cleanup and add clarifying comment 
llvm-svn: 83117
 2009-09-29 23:17:20 +00:00
Devang Patel
c1e370a29c Lookup handler name only when assertions are enabled. 
llvm-svn: 83114
 2009-09-29 22:05:52 +00:00
Devang Patel
39b5b72d74 Add removeMD(). 
llvm-svn: 83107
 2009-09-29 20:42:25 +00:00
Devang Patel
292bcd8ca1 Only one custom meadata of each kind can be attached with an instruction. 
llvm-svn: 83105
 2009-09-29 20:30:57 +00:00
Jim Grosbach
f759d3c1c5 Additional check for regno==0 
llvm-svn: 83103
 2009-09-29 20:11:10 +00:00
Devang Patel
351585921d Use assertion instead of early exit to catch malformed custom metadata store. 
llvm-svn: 83102
 2009-09-29 20:01:19 +00:00
Devang Patel
5dcd8e1d86 Remove unnecessary cast. 
llvm-svn: 83100
 2009-09-29 19:56:13 +00:00
Devang Patel
e5be8e79df Remove std::string uses from DebugInfo interface. 
llvm-svn: 83083
 2009-09-29 18:40:58 +00:00
Jim Grosbach
0e6ac9047c Simplify the tracking of virtual frame index registers. Ranges cannot overlap, 
so a simple "current register" will suffice. Also add some additional
sanity-checking assertions to make sure things are as we expect.

llvm-svn: 83081
 2009-09-29 18:23:15 +00:00
Jim Grosbach
6f6bc51d3b Moving register scavenging to a post pass results in virtual registers in 
the instruction we're scavenging for. The scavenger needs to know to avoid
them when analyzing register usage.

llvm-svn: 83077
 2009-09-29 17:24:37 +00:00
Evan Cheng
d2bf81c7af Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat. 
llvm-svn: 83058
 2009-09-29 07:07:30 +00:00
Devang Patel
629ad89954 Parse custom metadata attached with an instruction. 
llvm-svn: 83033
 2009-09-29 00:01:14 +00:00
Jim Grosbach
9cb82ce219 Adjust processFunctionBeforeCalleeSavedScan() to correctly reserve a stack 
slot for the register scavenger when compiling Thumb1 functions.

llvm-svn: 83023
 2009-09-28 22:08:06 +00:00
Dan Gohman
74e63461d2 Add C API calls for building FNeg operations. Patch by KS Sreeram! 
llvm-svn: 83021
 2009-09-28 21:51:41 +00:00
Devang Patel
1070b7a713 s/class Metadata/class MetadataContext/g 
llvm-svn: 83019
 2009-09-28 21:41:20 +00:00
Devang Patel
d836a7d651 Do not use global typedef for MDKindID. 
llvm-svn: 83016
 2009-09-28 21:14:55 +00:00
Dan Gohman
c3081dd9eb When extending the operands of an addrec, iterate through all 
the operands, rather than trying to partition them into a start
and a step. This handles non-affine add recurrences correctly.

llvm-svn: 83011
 2009-09-28 21:01:47 +00:00
Devang Patel
9e2af6ed0b Do not hardcode metadata names. 
llvm-svn: 83010
 2009-09-28 20:56:00 +00:00
Evan Cheng
c15ba1de94 Fix Thumb2 IT block pass bug. t2MOVi32imm may not be the start of a IT block. 
llvm-svn: 83008
 2009-09-28 20:47:15 +00:00
Jakob Stoklund Olesen
5be0f6cfb4 Use KILL instead of IMPLICIT_DEF in LowerSubregs pass. 
llvm-svn: 83007
 2009-09-28 20:32:46 +00:00
Jakob Stoklund Olesen
31fcbdefbb Introduce the TargetInstrInfo::KILL machine instruction and get rid of the 
unused DECLARE instruction.

KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.

llvm-svn: 83006
 2009-09-28 20:32:26 +00:00
Dan Gohman
bfa2d75c49 Create a README.txt for lib/Analysis, and add an entry. 
llvm-svn: 83001
 2009-09-28 18:38:53 +00:00
Devang Patel
5a52b71500 Remove dead code. 
llvm-svn: 82999
 2009-09-28 18:31:56 +00:00
Dan Gohman
ffa11ade11 Use VerifySchedule instead of doing the work manually. 
llvm-svn: 82995
 2009-09-28 16:09:41 +00:00
Dan Gohman
7a5cb984e6 Fix this debug output to handle the case where the loop has been deleted. 
llvm-svn: 82994
 2009-09-28 15:40:01 +00:00
Dan Gohman
aade5fefdb Include the name of the loop header in debug messages. 
llvm-svn: 82993
 2009-09-28 15:07:18 +00:00
Dan Gohman
9776ad2192 Remove a redundant #ifndef and add an assertion string. 
llvm-svn: 82991
 2009-09-28 14:38:19 +00:00
Dan Gohman
f31dae3931 Convert LoopSimplify and LoopExtractor from FunctionPass to LoopPass. 
llvm-svn: 82990
 2009-09-28 14:37:51 +00:00
Bob Wilson
bbcf30c05c Pass the optimization level when constructing the ARM instruction selector. 
Otherwise, it is always set to "default", which prevents debug info from
even being generated during isel.  Radar 7250345.

llvm-svn: 82988
 2009-09-28 14:30:20 +00:00
Evan Cheng
54a1a87862 Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo 
instruction. This makes it re-materializable.

Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.

llvm-svn: 82982
 2009-09-28 09:14:39 +00:00
Anton Korobeynikov
2e54b03741 Fix thinko in my recent movt commit: it's not safe to remat movt, since it has input reg argument. 
Disable rematting of it for now.

llvm-svn: 82975
 2009-09-28 07:26:46 +00:00
Chris Lattner
d77fb17b28 The select instruction is not neccesarily in the same block as the 
phi nodes.  Make sure to phi translate from the right block. 

This fixes a llvm-building-llvm failure on GVN-PRE.cpp

llvm-svn: 82970
 2009-09-28 06:49:44 +00:00
Evan Cheng
ddc8678b00 Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of 
physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.

llvm-svn: 82968
 2009-09-28 05:28:43 +00:00
Dan Gohman
584645dfe8 Remove temporary debugging hack. 
llvm-svn: 82953
 2009-09-28 00:44:15 +00:00
Dan Gohman
bd50ec69e4 Move the dominator verification code out of special code embedded within 
the PassManager code into a regular verifyAnalysis method.

Also, reorganize loop verification. Make the LoopPass infrastructure
call verifyLoop as needed instead of having LoopInfo::verifyAnalysis
check every loop in the function after each looop pass. Add a new
command-line argument, -verify-loop-info, to enable the expensive
full checking.

llvm-svn: 82952
 2009-09-28 00:27:48 +00:00
Dan Gohman
195c5bdf41 Move this assert to check the condition as soon as it is known. 
llvm-svn: 82951
 2009-09-28 00:10:28 +00:00
Dan Gohman
09f5f7f190 Extend the StartPassTimer and StopPassTimer functions so that the 
code that stops the timer doesn't have to search to find the timer
object before it stops the timer. This avoids a lock acquisition
and a few other things done with the timer running.

llvm-svn: 82949
 2009-09-28 00:07:05 +00:00
Anton Korobeynikov
189ce11684 Use movt/movw pair to materialize 32 bit constants on ARMv6T2+. 
This should be better than single load from constpool.

llvm-svn: 82948
 2009-09-27 23:52:58 +00:00
Dan Gohman
000a17774e Fix an old copy+pasto. 
llvm-svn: 82947
 2009-09-27 23:52:07 +00:00
Dan Gohman
db89691ec4 Extract the code for inserting a loop into the loop queue into 
a separate function.

llvm-svn: 82946
 2009-09-27 23:49:43 +00:00
Dan Gohman
0ea6efde4e When a loop is deleted, immediately release all of the active 
LoopPasses for that loop. This avoids trouble with the PassManager
trying to call verifyAnalysis on them, and frees up some memory
sooner rather than later.

llvm-svn: 82945
 2009-09-27 23:43:07 +00:00
Dan Gohman
fdd9a2ee96 Extract the code for releasing a pass into a separate function, and 
tidy it up a little.

llvm-svn: 82944
 2009-09-27 23:38:27 +00:00
Nick Lewycky
04cea17209 Remove the "metadata*" type and simplify the code it complicated. This was only 
used to support GlobalVariables storing MDNodes, back when they were derived
from Constant before the introduction of NamedMDNode, but never removed.

llvm-svn: 82943
 2009-09-27 23:27:42 +00:00
Dan Gohman
cd2dd6b7e6 LBRX no longer has an explicit SrcValueSDNode operand, so the type 
operand is now at index 2, rather than 3. This fixes the
"Invalid child # of SDNode!" failures on PowerPC.

llvm-svn: 82942
 2009-09-27 23:17:47 +00:00
Chris Lattner
2a85cfd972 simplify some code. 
llvm-svn: 82936
 2009-09-27 21:46:50 +00:00
Chris Lattner
75a5d76294 The bitcast case is not needed here: instcombine turns icmp(bitcast(x), null) -> icmp(x, null) already. 
llvm-svn: 82935
 2009-09-27 21:42:46 +00:00
Chris Lattner
e024fd6b47 calls are already unmovable, malloc doesn't need a special case. 
llvm-svn: 82933
 2009-09-27 21:36:19 +00:00
Chris Lattner
8a77e8b353 calls to external functions are already marked overdefined, special casing 
malloc isn't needed.

llvm-svn: 82932
 2009-09-27 21:35:11 +00:00
Chris Lattner
bb29bb4e16 calls are already handled, malloc doesn't need a special case. 
llvm-svn: 82931
 2009-09-27 21:33:46 +00:00
Nick Lewycky
81504d2150 Round out the API for the new optimization flags. 
llvm-svn: 82930
 2009-09-27 21:33:04 +00:00
Chris Lattner
24af6de20a calls are rejected above, no need to special case malloc here. 
llvm-svn: 82929
 2009-09-27 21:31:39 +00:00
Chris Lattner
0cfb82cf8c remove special handling of bitcast(malloc), it will be handled 
when the loop inspects the bitcast operand.

llvm-svn: 82928
 2009-09-27 21:29:28 +00:00
Chris Lattner
3f320467b5 unlike the malloc instruction, "malloc" calls do not claim to be readonly, just nounwind. 
llvm-svn: 82927
 2009-09-27 21:23:38 +00:00
Chris Lattner
7a9e470ddc allow pushing icmps through phis with multiple uses and across critical edges. 
These are important to push up to encourage jump threading.  This shrinks 176.gcc a bit.

llvm-svn: 82923
 2009-09-27 20:46:36 +00:00
Chris Lattner
f7db1f1a3a Enhance the previous fix for PR4895 to allow more values than just 
simple constants for the true/false value of the select.  We now
do phi translation etc.  This really fixes PR4895 :)

llvm-svn: 82917
 2009-09-27 20:18:49 +00:00
Chris Lattner
0af7f0ceaf implement PR4895, by making FoldOpIntoPhi handle select conditions 
that are phi nodes.  Also tighten up FoldOpIntoPhi to treat constantexpr
operands to phis just like other variables, avoiding moving constantexpr
computations around.

Patch by Daniel Dunbar.

llvm-svn: 82913
 2009-09-27 19:57:57 +00:00
Tilmann Scheller
a23802520a Use explicit structs instead of std::pair to map callee saved regs to spill slots. 
llvm-svn: 82909
 2009-09-27 17:58:47 +00:00
Dan Gohman
2d607af763 Delete a bogus comment. 
llvm-svn: 82908
 2009-09-27 17:50:44 +00:00
Dan Gohman
8b4c141d97 Fix SCEVExpander's canonical addrec expansion code to work on loops that 
aren't in canonical loop-simplify form, since it doesn't itself depend
on LoopSimplify. This means handling loops without preheaders and loops
with multiple backedges.

llvm-svn: 82905
 2009-09-27 17:46:40 +00:00
Dan Gohman
641ab5a61e Grab an LLVM Context from an instruction that exists rather than one 
that is deleted in some situations. This fixes a use-after-free.

llvm-svn: 82903
 2009-09-27 16:10:30 +00:00
Dan Gohman
fa43cefae4 Tell ScalarEvolution to forget everything it knows about a loop before 
rotating the loop, since loop rotation is a very significant change.

llvm-svn: 82901
 2009-09-27 15:37:03 +00:00
Dan Gohman
eb9dbb2bd2 Micro-optimize DerivedType::dropAllTypeUses. 
llvm-svn: 82900
 2009-09-27 15:32:21 +00:00
Dan Gohman
16398e3bc0 Instead of testing whether an instruction dominates the loop preheader, 
test whether it properly dominates the loop header. This is equivalent
when the loop has a preheader, and has the advantage of working when
the loop doesn't have a preheader. Since IVUsers doesn't Require
LoopSimplify, the loop isn't guaranteed to have a preheader.

llvm-svn: 82899
 2009-09-27 15:30:00 +00:00
Dan Gohman
b84f5a3421 Add a properlyDominates member function to ScalarEvolution. 
llvm-svn: 82898
 2009-09-27 15:26:03 +00:00
Dan Gohman
9cc0852f45 Remove a redundant #include. 
llvm-svn: 82897
 2009-09-27 15:21:52 +00:00
Torok Edwin
dd5b0b7cda Avoid using mutex locks if not in multithreaded mode by using a SmartScopedMutex 
in RegisterStatistic.

llvm-svn: 82896
 2009-09-27 11:08:03 +00:00
Evan Cheng
ffe6da0734 Enable pre-regalloc load / store multiple pass for Thumb2. 
llvm-svn: 82893
 2009-09-27 09:46:04 +00:00
Nick Lewycky
676778014b Remove dead code from this function and optimize. Update its corresponding 
LangRef entry too.

llvm-svn: 82890
 2009-09-27 07:55:32 +00:00
Nick Lewycky
d21c325f09 Instruction::clone does not need to take an LLVMContext&. Remove that and 
update all the callers.

llvm-svn: 82889
 2009-09-27 07:38:41 +00:00
Chris Lattner
b47463f436 remove support for "NoSub" from regex. It seems like a minor optimization 
and makes the API more annoying.  Add a Regex::getNumMatches() method.

llvm-svn: 82877
 2009-09-26 21:27:04 +00:00
Dan Gohman
0a396aa546 Fix SimplifyLibCalls to transfer attributes from callees rather than 
calls, since direct calls don't always reflect the attributes of their
callees.

llvm-svn: 82867
 2009-09-26 18:10:13 +00:00
Dan Gohman
60964df13d Fix a case where ScalarEvolution was expanding pointer arithmetic 
to inttoptr/ptrtoint unnecessarily.

llvm-svn: 82864
 2009-09-26 16:11:57 +00:00
Duncan Sands
ec5d64fdd5 For the NSWSub support in the builder to actually be useable, 
there need to be corresponding changes to the constant folders,
done in this patch.

llvm-svn: 82862
 2009-09-26 15:35:35 +00:00
Dan Gohman
6899a1cd58 Convert comparisons like (x == infinity) to (x >= infinity) on targets 
where FCMP_OEQ is not legal and FCMP_OGE is, such as x86. 

llvm-svn: 82861
 2009-09-26 15:24:17 +00:00
Evan Cheng
48479d0c8f Really remove this option. 
llvm-svn: 82838
 2009-09-26 02:49:49 +00:00
Evan Cheng
1088c37212 Remove a couple of unused command line options. 
llvm-svn: 82837
 2009-09-26 02:45:45 +00:00
Evan Cheng
c4e3168b65 Add comment. 
llvm-svn: 82836
 2009-09-26 02:43:36 +00:00
Dan Gohman
7f73a0c1e4 Don't hoist or sink instructions with physreg uses if the physreg is 
allocatable. Even if it doesn't appear to have any defs, it may latter
on after register allocation.

llvm-svn: 82834
 2009-09-26 02:34:00 +00:00
Dan Gohman
487152872b Unbreak MachineLICM for instructions that reference RIP on x86-64 too. 
llvm-svn: 82825
 2009-09-25 23:58:45 +00:00
Dan Gohman
d585364b0b Rename ConstantFP's getInf to getInfinity. 
llvm-svn: 82823
 2009-09-25 23:40:21 +00:00
Dan Gohman
ba2b2eb3fe Move MachineMemOperand::getAlignment out of line, to avoid needing 
MathExtras.h in MachineMemOperand.h.

llvm-svn: 82822
 2009-09-25 23:33:20 +00:00
Daniel Dunbar
99d02b7818 Remove unused variable. 
llvm-svn: 82821
 2009-09-25 23:26:56 +00:00
Dan Gohman
d564cd42d9 Transform pow(x, 0.5) to (x == -inf ? inf : fabs(sqrt(x))), which is 
typically faster then doing a general pow.

llvm-svn: 82819
 2009-09-25 23:10:17 +00:00
Dan Gohman
01b2c857ed Add a ConstantFP::getInf utility function for creating infinity ConstantFPs. 
llvm-svn: 82818
 2009-09-25 23:00:48 +00:00
Dan Gohman
7c98ffa2b6 Fix MachineSink to be able to sink instructions that use physical registers 
which have no defs anywhere in the function. In particular, this fixes sinking
of instructions that reference RIP on x86-64, which is currently being modeled
as a register.

llvm-svn: 82815
 2009-09-25 22:53:29 +00:00
Anton Korobeynikov
35078c311e Regenerate 
llvm-svn: 82814
 2009-09-25 22:53:17 +00:00
Dan Gohman
090f23c54c Simplify a few more uses of reg_iterator. 
llvm-svn: 82812
 2009-09-25 22:26:13 +00:00
Dan Gohman
7b662b75a7 Simplify this code by using use_iterator instead of reg_iterator 
and skipping the defs.

llvm-svn: 82811
 2009-09-25 22:24:52 +00:00
Evan Cheng
c0edc5ee28 Code clean up and prepare for Thumb2 support. No functionality changes. 
llvm-svn: 82805
 2009-09-25 21:44:53 +00:00
Evan Cheng
ac17fbc5fe Flip -disable-post-RA-scheduler to -post-RA-scheduler. 
llvm-svn: 82803
 2009-09-25 21:38:11 +00:00
Dale Johannesen
53c365d807 Handle sqrt in CannotBeNegativeZero. absf and absl 
appear to be misspellings, removed in favor of fabs*.

llvm-svn: 82796
 2009-09-25 20:54:50 +00:00
Dan Gohman
0ac693a89e Improve MachineMemOperand handling. 
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.

llvm-svn: 82794
 2009-09-25 20:36:54 +00:00
Dan Gohman
0c4e55a2f8 Rename getTargetNode to getMachineNode, for consistency with the 
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.

llvm-svn: 82790
 2009-09-25 18:54:59 +00:00
David Goodwin
89f5854ddd Finish scheduling itineraries for NEON. 
llvm-svn: 82788
 2009-09-25 18:38:29 +00:00
Victor Hernandez
f772c0b8b2 Revert 82694 "Auto-upgrade malloc instructions to malloc calls." because it causes regressions in the nightly tests. 
llvm-svn: 82784
 2009-09-25 18:11:52 +00:00
Dale Johannesen
b4b27526eb Make sure sin, cos, sqrt calls are marked readonly 
before producing FSIN, FCOS, FSQRT.  If they aren't
so marked we have to assume they might set errno.

llvm-svn: 82781
 2009-09-25 18:00:35 +00:00
Dale Johannesen
c137aa03ce Generate FSQRT from calls to the sqrt function, which 
allows appropriate backends to generate a sqrt instruction.

On x86, this isn't done at -O0 because we go through
FastISel instead.  This is a behavior change from before
this series of sqrt patches started.  I think this is OK
considering that compile speed is most important at -O0, but
could be convinced otherwise.

llvm-svn: 82778
 2009-09-25 17:23:22 +00:00
Bob Wilson
c5784025af Add some comments to clarify things that I discovered this week. 
llvm-svn: 82773
 2009-09-25 16:34:46 +00:00
Bob Wilson
94e29af5ac pr4926: ARM requires the stack pointer to be aligned, even for leaf functions. 
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned.  For the older ARM APCS ABI, the stack
alignment is just always 4 bytes.  For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.

After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo.  This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4.  (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.

llvm-svn: 82767
 2009-09-25 14:41:49 +00:00
Nate Begeman
09ef66c0ec Fix combiner-aa issue with bases which are different, but can alias. 
Previously, it treated GV+28 GV+0 as different bases, and assumed they could
not alias.

llvm-svn: 82753
 2009-09-25 06:05:26 +00:00
Dan Gohman
b5922580d6 Don't try to use pre-indexed addressing with sthbrx/stwbrx 
instructions. This fixes a PowerPC bug exposed by some unrelated
changes I'm working on.

llvm-svn: 82743
 2009-09-25 00:57:30 +00:00
Dan Gohman
5c7946a550 Add a version of dumpr() that has a SelectionDAG* argument. 
llvm-svn: 82742
 2009-09-25 00:34:34 +00:00
Jim Grosbach
3d527ff081 Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving 
interest for this, as it currently reserves a register rather than using
the scavenger for matierializing constants as needed.

Instead of scavenging registers on the fly while eliminating frame indices,
new virtual registers are created, and then a scavenged collectively in a
post-pass over the function. This isolates the bits that need to interact
with the scavenger, and sets the stage for more intelligent use, and reuse,
of scavenged registers.

For the time being, this is disabled by default. Once the bugs are worked out,
the current scavenging calls in replaceFrameIndices() will be removed and
the post-pass scavenging will be the default. Until then,
-enable-frame-index-scavenging enables the new code. Currently, only the
Thumb1 back end is set up to use it.

llvm-svn: 82734
 2009-09-24 23:52:18 +00:00
Mike Stump
d7a3b26009 Delete space after function name, before (, reflow a comment and 
delete a few blank lines.

llvm-svn: 82729
 2009-09-24 23:21:26 +00:00
Mike Stump
26e902d371 Fix spacing. 
llvm-svn: 82727
 2009-09-24 23:11:08 +00:00