51252 Commits

Author SHA1 Message Date
Chad Rosier
acd199b5a4 Add support for emitting both signed- and zero-extend loads. Fix
SimplifyAddress to handle either a 12-bit unsigned offset or the ARM +/-imm8
offsets (addressing mode 3).  This enables a load followed by an integer 
extend to be folded into a single load.

For example:
ldrb r1, [r0]       ldrb r1, [r0]
uxtb r2, r1     =>
mov  r3, r2         mov  r3, r1

llvm-svn: 144488
2011-11-13 02:23:59 +00:00
NAKAMURA Takumi
fca0bc8d54 Prune more RALinScan. RALinScan was also here!
llvm-svn: 144487
2011-11-13 01:33:10 +00:00
Jakob Stoklund Olesen
989b255462 More dead code elimination in VirtRegMap.
This thing is looking a lot like a virtual register map now.

llvm-svn: 144486
2011-11-13 01:23:34 +00:00
Jakob Stoklund Olesen
eb77ff7f7d Stop tracking spill slot uses in VirtRegMap.
Nobody cared, StackSlotColoring scans the instructions to find used stack
slots.

llvm-svn: 144485
2011-11-13 01:23:30 +00:00
Jakob Stoklund Olesen
edaed81556 Remove dead code and data from VirtRegMap.
Most of this stuff was supporting the old deferred spill code insertion
mechanism.  Modern spillers just edit machine code in place.

llvm-svn: 144484
2011-11-13 01:02:04 +00:00
Jakob Stoklund Olesen
27c2431c70 Stop tracking unused registers in VirtRegMap.
The information was only used by the register allocator in
StackSlotColoring.

llvm-svn: 144482
2011-11-13 00:39:45 +00:00
Jakob Stoklund Olesen
3eaaa93104 Remove the -color-ss-with-regs option.
It was off by default.

The new register allocators don't have the problems that made it
necessary to reallocate registers during stack slot coloring.

llvm-svn: 144481
2011-11-13 00:31:23 +00:00
Jakob Stoklund Olesen
c7672e78ef Delete VirtRegRewriter.
And there was much rejoicing.

llvm-svn: 144480
2011-11-13 00:16:01 +00:00
Jakob Stoklund Olesen
b54c411fc1 Switch PBQP to VRM's trivial rewriter.
The very complicated VirtRegRewriter is going away.

llvm-svn: 144479
2011-11-13 00:02:24 +00:00
Jakob Stoklund Olesen
5a265aeb70 Delete the old spilling framework from LiveIntervalAnalysis.
This is dead code, all register allocators use InlineSpiller.

llvm-svn: 144478
2011-11-12 23:57:05 +00:00
Jakob Stoklund Olesen
d0ddec5771 Delete the 'standard' spiller with used the old spilling framework.
The current register allocators all use the inline spiller.

llvm-svn: 144477
2011-11-12 23:29:02 +00:00
Jakob Stoklund Olesen
92abfb4cd7 Switch PBQP to the modern InlineSpiller framework.
It is worth noting that the old spiller would split live ranges around
basic blocks. The new spiller doesn't do that.

PBQP should do its own live range splitting with
SplitEditor::splitSingleBlock() if desired.  See
RAGreedy::tryBlockSplit().

llvm-svn: 144476
2011-11-12 23:17:52 +00:00
Jakob Stoklund Olesen
78902f9088 Delete the linear scan register allocator.
RegAllocGreedy has been the default for six months now.

Deleting RegAllocLinearScan makes it possible to also delete
VirtRegRewriter and clean up the spiller code.

llvm-svn: 144475
2011-11-12 22:39:45 +00:00
Craig Topper
0458cdf64a Add more AVX2 shift lowering support. Move AVX2 variable shift to use patterns instead of custom lowering code.
llvm-svn: 144457
2011-11-12 09:58:49 +00:00
Nick Lewycky
772024a00d Don't try to loop on iterators that are potentially invalidated inside the loop. Fixes PR11361!
llvm-svn: 144454
2011-11-12 03:09:12 +00:00
Akira Hatanaka
58e0babe25 Fix typo.
llvm-svn: 144453
2011-11-12 02:38:12 +00:00
Akira Hatanaka
53f5f9bc9f Implement Mips64's handling of byval arguments in LowerCall.
llvm-svn: 144452
2011-11-12 02:34:50 +00:00
Sean Callanan
7c35e9d15b Fixed the MCJIT so that it can emit not only instance
methods but also class methods for Objective-C.

Clang emits Objective-C method names with '\1' at the
beginning, and the JIT has pre-existing logic to try
prepending a '\1' when searching a module for an
instance method (that is, a method whose name begins
with '-').  I simply extended it to do the same thing
when it encountered a class method (a method whose
name begins with '+').

llvm-svn: 144451
2011-11-12 02:31:32 +00:00
Akira Hatanaka
26219cc439 Implement Mips64's handling of byval arguments in LowerFormalArguments.
llvm-svn: 144449
2011-11-12 02:29:58 +00:00
Akira Hatanaka
892b99b327 64-bit arbitrary immediate pattern.
llvm-svn: 144448
2011-11-12 02:25:00 +00:00
Akira Hatanaka
a0188ffa09 Function for handling byval arguments.
llvm-svn: 144447
2011-11-12 02:20:46 +00:00
Daniel Dunbar
73d41b0f03 build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies.
- The hope is that we have a tool/test to verify these are accurate (and tight) soon.

llvm-svn: 144444
2011-11-12 02:10:57 +00:00
Eli Friedman
a83fbaff5f Make sure scalarrepl picks the correct alloca when it rewrites a bitcast. Fixes PR11353.
llvm-svn: 144442
2011-11-12 02:07:50 +00:00
Rafael Espindola
5f6b14719f The dwarf standard says that the only differences between a out-of-line
instance and a concrete inlined instance are the use of DW_TAG_subprogram
instead of DW_TAG_inlined_subroutine and the who owns the tree.

We were also omitting DW_AT_inline from the abstract roots. To fix this,
make sure we mark abstract instance roots with DW_AT_inline even when
we have only out-of-line instances referring to them with DW_AT_abstract_origin.

FileCheck is not a very good tool for tests like this, maybe we should add
a -verify mode to llvm-dwarfdump.

llvm-svn: 144441
2011-11-12 01:57:54 +00:00
Jim Grosbach
7e41554aa7 ARM refactor simple immediate asm operand render methods.
These immediate operands all use the same simple logic for rendering to
MCInst, so have them share the method for doing so.

llvm-svn: 144439
2011-11-12 00:58:43 +00:00
Eli Friedman
8563e57e38 Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
llvm-svn: 144438
2011-11-12 00:35:34 +00:00
Jim Grosbach
312b583950 Re-apply 144430, this time with the associated isel and disassmbler bits.
Original commit msg: 'ARM assembly parsing for VST1 two-register encoding.'

llvm-svn: 144437
2011-11-12 00:31:53 +00:00
Eli Friedman
e1ea21fd5d Some cleanup and bulletproofing for node replacement in LegalizeDAG. To maintain LegalizeDAG invariants, whenever we a node is replaced, we must attempt to delete it, and if it still
has uses after it is replaced (which can happen in rare cases due to CSE), we must revisit it.

llvm-svn: 144432
2011-11-11 23:58:27 +00:00
Jim Grosbach
7fccd540c9 Oops. Missed the isel half of this. revert while I sort that out.
llvm-svn: 144431
2011-11-11 23:51:31 +00:00
Jim Grosbach
13af5276a1 ARM assembly parsing for VST1 two-register encoding.
llvm-svn: 144430
2011-11-11 23:45:47 +00:00
Jim Grosbach
13b7ab7527 ARM optional size suffix for VLDR/VSTR syntax.
llvm-svn: 144427
2011-11-11 23:34:43 +00:00
Chad Rosier
a2a0fbeded Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.
llvm-svn: 144426
2011-11-11 23:31:03 +00:00
Daniel Dunbar
67b8edce31 CMake: Fix CMake build for new Mips tblgen file.
llvm-svn: 144423
2011-11-11 23:12:56 +00:00
Jim Grosbach
bc077320e1 ARM vldm and vstm VFP instructions can take a data type suffix.
It's ignored by the assembler when present, but is legal syntax. Other
instructions have something similar, but for some mnemonics it's
only sometimes not significant, so this quick check in the parser will
need refactored into something more robust soon-ish. This gets some
basics working in the meantime.

Partial for rdar://10435264

llvm-svn: 144422
2011-11-11 23:08:10 +00:00
Daniel Dunbar
d6784c1269 LLVMBuild: Alphabetize required_libraries lists.
llvm-svn: 144416
2011-11-11 22:59:23 +00:00
Daniel Dunbar
a626481a77 Target/LLVMBuild: Order components alphabetically.
llvm-svn: 144415
2011-11-11 22:59:16 +00:00
Bruno Cardoso Lopes
bc4e9ca90e Mips MC object code emission improvements:
"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter

llvm-svn: 144414
2011-11-11 22:58:42 +00:00
Jim Grosbach
01a7117803 Nuke no longer accurate comment.
llvm-svn: 144411
2011-11-11 22:30:06 +00:00
Andrew Trick
6ff75a5d8d Preserve MachineMemOperands in ARMLoadStoreOptimizer.
Fixes PR8113.

llvm-svn: 144409
2011-11-11 22:18:09 +00:00
Jim Grosbach
1d581ecb00 ARM allow Q registers in vldm/vstm register lists.
rdar://9672822

llvm-svn: 144407
2011-11-11 21:27:40 +00:00
Nicolas Geoffray
98ef58406c Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint.
llvm-svn: 144399
2011-11-11 18:32:52 +00:00
Bob Wilson
c6ab8ce742 Remove FIXME comment that should have been removed with r144351.
llvm-svn: 144392
2011-11-11 17:34:14 +00:00
Dan Bailey
ad6c209a79 allow non-device function calls in PTX when natively handling device-side printf
llvm-svn: 144388
2011-11-11 14:45:12 +00:00
Dan Bailey
6c29989135 add rules in tabgen for PTX COPY_ADDRESS of frameindex
llvm-svn: 144387
2011-11-11 14:45:06 +00:00
Benjamin Kramer
a52be4ff03 Clients are responsible for initializing the targets, remove it from the disassembler API.
This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the 
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness 
should be unaffected.

llvm-svn: 144385
2011-11-11 13:20:40 +00:00
Benjamin Kramer
e5295a772e Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.
llvm-svn: 144384
2011-11-11 12:39:41 +00:00
Benjamin Kramer
e2cdc6f3e7 Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler.
llvm-svn: 144383
2011-11-11 12:39:35 +00:00
Craig Topper
50df7c3842 Add lowering for AVX2 shift instructions.
llvm-svn: 144380
2011-11-11 07:39:23 +00:00
Chad Rosier
98f48b009e Rename variables to avoid confusion. No functionallity change intended.
llvm-svn: 144377
2011-11-11 06:27:41 +00:00
Chad Rosier
feb72bfc08 Add support for using immediates with select instructions.
rdar://10412592

llvm-svn: 144376
2011-11-11 06:20:39 +00:00