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Author SHA1 Message Date
Zachary Turner
0e6ef97ce0 Parse PDB Name Hash Table 
PDB has a lot of similar data structures.  We already have code
for parsing a Name Map, but PDB seems to have a different but
very similar structure that is a hash table.  This is the
beginning of code needed in order to parse the name hash table,
but it is not yet complete.  It parses the basic metadata of
the hash table, the bucket array, and the names buffer, but
doesn't use any of these fields yet as the data structure
requires a non-trivial amount of work to understand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268268 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 18:09:14 +00:00
Tom Stellard
c6d991c3a5 AMDGPU: Move R600 specific code out of AMDGPUISelLowering.cpp 
Reviewers: arsenm

Subscribers: jvesely, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268267 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 18:05:17 +00:00
Mehdi Amini
a4a5ff8bb3 ReversePostOrderFunctionAttrs is not modifying the call graph, let's preserve it. 
When running cc1 with -flto=thin, it is followed by GlobalOpt, which
requires the callgraph. This saves rebuilding one.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268266 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 18:03:33 +00:00
Tom Stellard
83f4a25d58 AMDGPU/SI: Fix bug in SIInstrInfo::insertWaitStates() uncovered by r268260 
We can't use MI->getDebugLoc() when MI is an iterator that could be
MBB.end().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268265 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 18:02:24 +00:00
Tom Stellard
8478bd5765 AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses 
Summary:
Add support for detecting hazards in SMEM soft clauses, so that we only
break the clauses when necessary, either by adding s_nop or re-ordering
other alu instructions.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268260 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 17:39:06 +00:00
Nicolai Haehnle
10ea516563 AMDGPU: llvm.SI.fs.constant is a source of divergence 
Summary:
This intrinsic is used to get flat-shaded fragment shader inputs. Those are
uniform across a primitive, but a fragment shader wave may process pixels from
multiple primitives (as indicated by the prim_mask), and so that's where
divergence can arise.

Reviewers: arsenm, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19747

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268259 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 17:37:01 +00:00
NAKAMURA Takumi
1be8ec9b75 ScheduleDAGInstrs.cpp: Don't peel the iterator when it points the end. This will fix the crash in r268143. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268257 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 17:29:55 +00:00
Derek Schuff
1e477250a6 [WebAssembly] Rename memory_size intrinsic to current_memory 
This follows the recent renaming in the wasm spec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268255 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 17:25:22 +00:00
Hans Wennborg
0c15a0b738 [SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for empty block including lifetime intrinsics 
Make it possible that TryToSimplifyUncondBranchFromEmptyBlock merges empty
basic block including lifetime intrinsics as well as phi nodes and
unconditional branch into its successor or predecessor(s).

If successor of empty block has single predecessor, all contents including
lifetime intrinsics are sinked into the successor. Otherwise, they are
hoisted into its predecessor(s) and then merged into the predecessor(s).

Patch by Josh Yoon <josh.yoon@samsung.com>!

Differential Revision: http://reviews.llvm.org/D19257

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268254 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 17:22:54 +00:00
Mehdi Amini
282acf461e Move createReversePostOrderFunctionAttrsPass right after the inliner is done 
This is where it was originally, until LoopVersioningLICM was
inserted before in r259986, I don't believe it was on purpose.

Differential Revision: http://reviews.llvm.org/D19809

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268252 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 16:53:16 +00:00
Adam Nemet
b75d37fd5a [LLE] Fix typo from r263058 
This was meant to check unit stride for both the load and the store.

Thanks to Roman Shirokiy for noticing this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268251 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 16:52:00 +00:00
Pete Cooper
549d73f230 Add llvm-pdbdump to the tool substitutions list in lit. NFC. 
This adds llvm-pdbdump to the list of tools which get printed with
the full path in verbose mode.  This makes it easier to take the
whole run line from verbose output and run it again without prepending
with the builds bin directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268250 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 16:51:26 +00:00
Simon Pilgrim
8bb8e81ce4 Fixed signed/unsigned comparison warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268249 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 16:45:02 +00:00
Chad Rosier
83094c44c4 Remove extra whitespace. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268248 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 16:45:00 +00:00
Tom Stellard
b8a2cc5119 AMDGPU/SI: Use hazard recognizer to detect DPP hazards 
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18603

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268247 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 16:23:09 +00:00
Sanjay Patel
a1adc36474 remove blank lines 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268246 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 15:49:09 +00:00
Sanjay Patel
e3b561ea48 [InstCombine] regenerate checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268245 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 15:32:10 +00:00
Sanjay Patel
5d85cb4598 [InstCombine] regenerate checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268244 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 15:25:49 +00:00
Sanjay Patel
1893130a0c [InstCombine] regenerate checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268242 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 15:21:41 +00:00
Sanjay Patel
b792c80820 [InstCombine] regenerate checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268241 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 15:18:13 +00:00
Sanjay Patel
dd8491a614 [InstCombine] regenerate checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268239 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 15:06:55 +00:00
Simon Pilgrim
d0941fb7bb [X86][SSE] Dropped X86ISD::FGETSIGNx86 and use MOVMSK instead for FGETSIGN lowering 
movmsk.ll tests are unchanged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268237 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 14:58:22 +00:00
Chad Rosier
664ed9cc5f Cleanup comments. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268236 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 14:56:21 +00:00
Chad Rosier
9eaf9eb99e Cleanup comments. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268235 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 14:50:30 +00:00
Aaron Ballman
f1f452f373 Silence unused variable warnings; NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268234 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 14:48:03 +00:00
Chad Rosier
b08a82c043 Cleanup comments. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268233 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 14:32:17 +00:00
Sanjay Patel
2bce87c412 [InstCombine] regenerate checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268232 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 14:21:55 +00:00
David L Kreitzer
9135c2ad84 Enable the X86 call frame optimization for the 64-bit targets that allow it. 
Fixes PR27241.

Differential Revision: http://reviews.llvm.org/D19688


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268227 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 13:45:25 +00:00
Rafael Espindola
4c7d166c37 Expose a getFullName for thin archive members. 
It will be used in lld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268226 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 13:45:06 +00:00
Jonas Paulsson
b9893d1e1f [SystemZ] Temporarily disable codegen test int-add-12.ll. 
This checks for AGSI transformation, which is temporarily disabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268219 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 10:42:47 +00:00
Jonas Paulsson
17dde0d00e [SystemZ] Fix in restoreCalleeSavedRegisters() 
Only add operands for GRs to the LMG.

Reviewed by Ulrich Weigand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268216 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 09:37:44 +00:00
Jonas Paulsson
65ed8ca52f [SystemZ] Mark CC defs as dead whenever possible. 
Marking implicit CC defs as dead everywhere except when CC is actually
defined and used explicitly, is important since the post-ra scheduler
will otherwise insert edges between instructions unnecessarily.

Also temporarily disable LA(Y)-> AGSI optimization in
foldMemoryOperandImpl(), since this inroduces a def of the CC reg,
which is illegal unless it is known to be dead.

Reviewed by Ulrich Weigand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268215 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 09:37:40 +00:00
Craig Topper
a926dab069 [X86] Fix a bug in LOCK arithmetic operation pattern matching where the wrong immediate predicate check was being used for 64-bit instructions with 8-bit immediates. 
This didn't cause a bug because the order of the patterns ensured that the 64-bit instructions with 32-bit immediates were selected first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268212 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 05:44:21 +00:00
Eric Christopher
b82d79cb21 Fix grammar and correct comment - the debug information wasn't incorrect, rather suboptimal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268211 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 05:30:26 +00:00
Davide Italiano
55a67d6b5a [llvm-readobj] Dump hash as part of -version-info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268210 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 02:30:18 +00:00
Craig Topper
b5bf834f5d [CodeGen] Add OPC_MoveChild0-OPC_MoveChild7 opcodes to isel matching tables to optimize table size. Shaves about 12K off the X86 matcher table. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268209 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-02 01:53:30 +00:00
Davide Italiano
f974ccff67 [GlobalDCE] Modernize. Use FileCheck instead of grep. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268207 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 22:51:14 +00:00
Simon Pilgrim
ef96d1f545 [InstCombine][SSE] Added support to VPERMD/VPERMPS to shuffle combine to accept UNDEF elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268206 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 20:43:02 +00:00
Simon Pilgrim
ae8a509ec4 Dropped FIXME comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268205 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 20:33:25 +00:00
Simon Pilgrim
c244765b2c [InstCombine][SSE] Added support to VPERMILVAR to shuffle combine to accept UNDEF elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268204 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 20:22:42 +00:00
Simon Pilgrim
6f6c7b0654 [InstCombine][AVX] Fixed PERMILVAR identity tests and added additional decode tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268203 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 20:06:47 +00:00
Simon Pilgrim
a1c0cfe5e4 [InstCombine][SSE] Added support to PSHUFB to shuffle combine to accept UNDEF elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268202 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 19:26:21 +00:00
Simon Pilgrim
8d33576d14 [InstCombine][SSE] Regenerate MOVSX/MOVZX tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268201 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 18:28:45 +00:00
Craig Topper
fc16410133 [AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there fix the execution domain for VPACKSSDW/VPACKUSDW. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268200 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 17:38:32 +00:00
Simon Pilgrim
95730ae9bd [InstCombine][AVX2] Combine VPERMD/VPERMPS intrinsics with constant masks to shufflevector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268199 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 16:41:22 +00:00
Simon Pilgrim
4dfb7cfee7 Fixed MSVC 'not all control paths return a value' warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268198 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 15:52:31 +00:00
Simon Pilgrim
84b8ada543 Document the LLVM_ENABLE_EXPENSIVE_CHECKS cmake option introduced in r268050 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268197 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 15:27:47 +00:00
Igor Breger
b829003e67 getelementptr instruction, support index vector of EVT. 
Differential Revision: http://reviews.llvm.org/D19775

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268195 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 13:29:12 +00:00
Igor Breger
dcb96be9b4 Change AVX512 braodcastsd/ss patterns interaction with spilling . New implementation take a scalar register and generate a vector without COPY_TO_REGCLASS (turn it into a VR128 register ) .The issue is that during register allocation we may spill a scalar value using 128-bit loads and stores, wasting cache bandwidth. 
Differential Revision: http://reviews.llvm.org/D19579

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268190 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 08:40:00 +00:00
Craig Topper
807ccbc3c1 [AVX512] Prefer AVX512 VPACK instructions over AVX/AVX2 instructions when VLX and BWI are supported. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268189 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-05-01 06:52:19 +00:00