186903 Commits

Author SHA1 Message Date
Simon Pilgrim
2ae2f59248 GVNHoist - silence static analyzer dyn_cast<> null dereference warning in hasEHOrLoadsOnPath call. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375429 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:15:49 +00:00
Simon Pilgrim
c4c5944aa9 GuardWidening - silence static analyzer null dereference warning with assertion. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375428 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:15:37 +00:00
Simon Pilgrim
b0db20ce62 CrossDSOCFI - silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375427 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:15:25 +00:00
Simon Pilgrim
72157fef87 IndVarSimplify - silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375426 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:15:05 +00:00
Sander de Smalen
4548d296c1 [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)
Commit message from D66935:

This patch fixes a bug exposed by D65653 where a subsequent invocation
of `determineCalleeSaves` ends up with a different size for the callee
save area, leading to different frame-offsets in debug information.

In the invocation by PEI, `determineCalleeSaves` tries to determine
whether it needs to spill an extra callee-saved register to get an
emergency spill slot. To do this, it calls 'estimateStackSize' and
manually adds the size of the callee-saves to this. PEI then allocates
the spill objects for the callee saves and the remaining frame layout
is calculated accordingly.

A second invocation in LiveDebugValues causes estimateStackSize to return
the size of the stack frame including the callee-saves. Given that the
size of the callee-saves is added to this, these callee-saves are counted
twice, which leads `determineCalleeSaves` to believe the stack has
become big enough to require spilling an extra callee-save as emergency
spillslot. It then updates CalleeSavedStackSize with a larger value.

Since CalleeSavedStackSize is used in the calculation of the frame
offset in getFrameIndexReference, this leads to incorrect offsets for
variables/locals when this information is recalculated after PEI.

This patch fixes the lldb unit tests in `functionalities/thread/concurrent_events/*`

Changes after D66935:

Ensures AArch64FunctionInfo::getCalleeSavedStackSize does not return
the uninitialized CalleeSavedStackSize when running `llc` on a specific
pass where the MIR code has already been expected to have gone through PEI.

Instead, getCalleeSavedStackSize (when passed the MachineFrameInfo) will try
to recalculate the CalleeSavedStackSize from the CalleeSavedInfo. In debug
mode, the compiler will assert the recalculated size equals the cached
size as calculated through a call to determineCalleeSaves.

This fixes two tests:
  test/DebugInfo/AArch64/asan-stack-vars.mir
  test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
that otherwise fail when compiled using msan.

Reviewed By: omjavaid, efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375425 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:12:56 +00:00
Xiangling Liao
c994a35a0d [NFC] Cleanup with variable name IsPPC64 & IsDarwin
Clean up PPCAsmPrinter with IsPPC64 and IsDarwin.

Differential Revision: https://reviews.llvm.org/D69259

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375420 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 15:36:13 +00:00
Guillaume Chatelet
ff6e4d503c [Alignment][NFC] Finish transition for Loads
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, asbirlea, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69253

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375419 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 15:10:26 +00:00
Jay Foad
a3253c0261 Pre-commit test cases for D64713.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375418 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 15:01:59 +00:00
David Green
4bdbcfddaf [Types] Define a getWithNewBitWidth for Types and make use of it
This is designed to change the bitwidth of a type without altering the number
of vector lanes. Also useful in D68651. Otherwise an NFC.

Differential Revision: https://reviews.llvm.org/D69139


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375417 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 14:51:49 +00:00
Guillaume Chatelet
9694ebf5f7 [Alignment][NFC] Instructions::getLoadStoreAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375416 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 14:49:28 +00:00
David Green
8c479efe73 [ARM] Extra qdadd patterns
This adds some new qdadd patterns to go along with the other recently added
qadd's.

Differential Revision: https://reviews.llvm.org/D68999


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375414 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 14:06:49 +00:00
Guillaume Chatelet
471eaccd51 [Alignment][NFC] Add a helper function to DataLayout
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69258

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375413 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 13:58:33 +00:00
Owen Reynolds
d00dbb86c0 [docs][llvm-ar] Update llvm-ar command guide
The llvm-ar command guide had not been updated in some time, it was
missing current functionality and contained information that was out
of date. This change:
- Updates the use of reStructuredText directives, as seen in other tools
  command guides.
- Updates the command synopsis.
- Updates the descriptions of the tool behaviour.
- Updates the options section.
- Adds details of MRI script functionality.
- Removes the sections "Standards" and "File Format"

Differential Revision: https://reviews.llvm.org/D68998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375412 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 13:13:31 +00:00
David Green
68b7d2e092 [ARM] Add qadd lowering from a sadd_sat
This lowers a sadd_sat to a qadd by treating it as legal. Also adds qsub at the
same time.

The qadd instruction sets the q flag, but we already have many cases where we
do not model this in llvm.

Differential Revision: https://reviews.llvm.org/D68976


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375411 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 12:33:46 +00:00
Guillaume Chatelet
0e61c30e7d [Alignment][NFC] TargetCallingConv::setByValAlign
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69248

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375410 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 12:05:33 +00:00
Jay Foad
91d68c5d93 Simplify usage of setFPAttrs.
In some cases using the return value of setFPAttrs simplifies the code.
In other cases it complicates the code with ugly casts, so stop doing
it. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375409 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 11:32:41 +00:00
George Rimar
cc870b19ca [llvm/Object] - Make ELFObjectFile::getRelocatedSection return Expected<section_iterator>
It returns just a section_iterator currently and have a report_fatal_error call inside.
This change adds a way to return errors and handle them on caller sides.

The patch also changes/improves current users and adds test cases.

Differential revision: https://reviews.llvm.org/D69167

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375408 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 11:06:38 +00:00
Guillaume Chatelet
f69d71733b [Alignment][NFC] TargetCallingConv::setOrigAlign and TargetLowering::getABIAlignmentForCallingConv
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: sdardis, hiraditya, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375407 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 11:01:55 +00:00
David Carlier
db084dfbfd Fix llvm signal tests build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375406 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 10:44:20 +00:00
George Rimar
685ae98920 [obj2yaml] - Fix a comment. NFC.
I forgot to address this nit before committing..

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375405 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 10:40:43 +00:00
George Rimar
63b9649758 [obj2yaml] - Stop triggering UB when dumping corrupted strings.
We have a following code to find quote type:

if (isspace(S.front()) || isspace(S.back()))
...

Problem is that:

"int isspace( int ch ): The behavior is undefined if the value of
ch is not representable as unsigned char and is not equal to EOF."
(https://en.cppreference.com/w/cpp/string/byte/isspace)

This patch shows how this UB can be triggered and fixes an issue.

Differential revision: https://reviews.llvm.org/D69160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375404 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 10:38:03 +00:00
Sam Elliott
7fc698b06a [MemCpyOpt] Fixing Incorrect Code Motion while Handling Aggregate Type Values
Summary:
When MemCpyOpt is handling aggregate type values, if an instruction (let's call it P) between the targeting load (L) and store (S) clobbers the source pointer of L, it will try to hoist S before P. This process will also hoist S's data dependency instructions.

However, the current implementation has a bug that if one of S's dependency instructions is //also// a user of P, MemCpyOpt will not prevent it from being hoisted above P and cause a use-before-define error. For example, in the newly added test file (i.e. `aggregate-type-crash.ll`), it will try to hoist both `store %my_struct %1, %my_struct* %3` and its dependent, `%3 = bitcast i8* %2 to %my_struct*`, above `%2 = call i8* @my_malloc(%my_struct* %0)`. Creating the following BB:
```
entry:
  %1 = bitcast i8* %4 to %my_struct*
  %2 = bitcast %my_struct* %1 to i8*
  %3 = bitcast %my_struct* %0 to i8*
  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %2, i8* align 4 %3, i64 8, i1 false)
  %4 = call i8* @my_malloc(%my_struct* %0)
  ret void
```
Where there is a use-before-define error between `%1` and `%4`.

Update: The compiler for the Pony Programming Language [also encounter the same bug](https://github.com/ponylang/ponyc/issues/3140)

Patch by Min-Yih Hsu (myhsu)

Reviewers: eugenis, pcc, dblaikie, dneilson, t.p.northover, lattner

Reviewed By: eugenis

Subscribers: lenary, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66060

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375403 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 10:00:34 +00:00
David Green
32893f0502 [ARM] Lower sadd_sat to qadd8 and qadd16
Lower the target independent signed saturating intrinsics to qadd8 and qadd16.
This custom lowers them from a sadd_sat, catching the node early before it is
promoted. It also adds a QADD8b and QADD16b node to mean the bottom "lane" of a
qadd8/qadd16, so that we can call demand bits on it to show that it does not
use the upper bits.

Also handles QSUB8 and QSUB16.

Differential Revision: https://reviews.llvm.org/D68974


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375402 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 09:53:38 +00:00
David Green
7f7fc30ded [ARM] Add and adjust saturation tests for upcoming qadd changes. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375401 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 09:43:37 +00:00
Guillaume Chatelet
2bcdb486dd Use Align for TFL::TransientStackAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: arsenm, dschuff, jyknight, sdardis, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, fedor.sergeev, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375398 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 08:31:25 +00:00
Roman Lebedev
475d7dd7ac [NFC][InstCombine] Fixup comments
As noted in post-commit review of rL375378375378.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375397 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 08:21:54 +00:00
Roman Lebedev
3ddad0b0b1 [CVP] Deduce no-wrap on mul
Summary:
`ConstantRange::makeGuaranteedNoWrapRegion()` knows how to deal with `mul`
since rL335646, there is exhaustive test coverage.
This is already used by CVP's `processOverflowIntrinsic()`,
and by SCEV's `StrengthenNoWrapFlags()`

That being said, currently, this doesn't help much in the end:
| statistic                              |     old |     new | delta | percentage |
| correlated-value-propagation.NumMulNSW |       4 |     275 |   271 |   6775.00% |
| correlated-value-propagation.NumMulNUW |       4 |    1323 |  1319 |  32975.00% |
| correlated-value-propagation.NumMulNW  |       8 |    1598 |  1590 |  19875.00% |
| correlated-value-propagation.NumNSW    |    5715 |    5986 |   271 |      4.74% |
| correlated-value-propagation.NumNUW    |    9193 |   10512 |  1319 |     14.35% |
| correlated-value-propagation.NumNW     |   14908 |   16498 |  1590 |     10.67% |
| instcount.NumAddInst                   |  275871 |  275869 |    -2 |      0.00% |
| instcount.NumBrInst                    |  708234 |  708232 |    -2 |      0.00% |
| instcount.NumMulInst                   |   43812 |   43810 |    -2 |      0.00% |
| instcount.NumPHIInst                   |  316786 |  316784 |    -2 |      0.00% |
| instcount.NumTruncInst                 |   62165 |   62167 |     2 |      0.00% |
| instcount.NumUDivInst                  |    2528 |    2526 |    -2 |     -0.08% |
| instcount.TotalBlocks                  |  842995 |  842993 |    -2 |      0.00% |
| instcount.TotalInsts                   | 7376486 | 7376478 |    -8 |      0.00% |
(^ test-suite plain, tests still pass)

Reviewers: nikic, reames, luqmana, sanjoy, timshen

Reviewed By: reames

Subscribers: hiraditya, javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69203

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375396 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 08:21:44 +00:00
Piotr Sobczak
ec10cb25d9 [InstCombine] Allow values with multiple users in SimplifyDemandedVectorElts
Summary:
Allow for ignoring the check for a single use in SimplifyDemandedVectorElts
to be able to simplify operands if DemandedElts is known to contain
the union of elements used by all users.
It is a responsibility of a caller of SimplifyDemandedVectorElts to
supply correct DemandedElts.

Simplify a series of extractelement instructions if only a subset of
elements is used.

Reviewers: reames, arsenm, majnemer, nhaehnle

Reviewed By: nhaehnle

Subscribers: wdng, jvesely, nhaehnle, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375395 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 08:12:47 +00:00
GN Sync Bot
919bed3ee7 gn build: Merge r375390
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375393 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 08:06:38 +00:00
Martin Storsjo
9cc8630a80 [LLDB] [Windows] Initial support for ARM register contexts
Differential Revision: https://reviews.llvm.org/D69226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375392 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 08:02:34 +00:00
Yevgeny Rouban
53fb41197c [IR] Fix mayReadFromMemory() for writeonly calls
Current implementation of Instruction::mayReadFromMemory()
returns !doesNotAccessMemory() which is !ReadNone. This
does not take into account that the writeonly attribute
also indicates that the call does not read from memory.

The patch changes the predicate to !doesNotReadMemory()
that reflects the intended behavior.

Differential Revision: https://reviews.llvm.org/D69086

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375389 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 06:52:08 +00:00
Yonghong Song
adc79ba5db [BPF] fix indirect call assembly code
Currently, for indirect call, the assembly code printed out as
  callx <imm>
This is not right, it should be
  callx <reg>

Fixed the issue with proper format.

Differential Revision: https://reviews.llvm.org/D69229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375386 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 03:22:03 +00:00
Johannes Doerfert
cd2c099476 [Attributor][FIX] Silence sign-compare warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375384 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 01:29:10 +00:00
Johannes Doerfert
463d8212b2 [Attributor] Teach AANoCapture to use information in-flight more aggressively
AAReturnedValues, AAMemoryBehavior, and AANoUnwind, can provide
information that helps during the tracking or even justifies no-capture.
We now use this information and enable no-capture in some test cases
designed a long while a ago for these cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375382 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 00:48:42 +00:00
Craig Topper
f5c1edb2b9 [X86] Check Subtarget.hasSSE3() before calling shouldUseHorizontalOp and emitting X86ISD::FHADD in LowerUINT_TO_FP_i64.
This was a regression from r375341.

Fixes PR43729.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375381 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 23:54:19 +00:00
Philip Reames
d1d5cb7698 [IndVars] Add a todo to reflect a further oppurtunity identified in D69009
Nikita pointed out an oppurtunity, might as well document it in the code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375380 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 23:44:01 +00:00
Philip Reames
9efd72ad02 [IndVars] Eliminate loop exits with equivalent exit counts
We can end up with two loop exits whose exit counts are equivalent, but whose textual representation is different and non-obvious. For the sub-case where we have a series of exits which dominate one another (common), eliminate any exits which would iterate *after* a previous exit on the exiting iteration.

As noted in the TODO being removed, I'd always thought this was a good idea, but I've now seen this in a real workload as well.

Interestingly, in review, Nikita pointed out there's let another oppurtunity to leverage SCEV's reasoning.  If we kept track of the min of dominanting exits so far, we could discharge exits with EC >= MDE.  This is less powerful than the existing transform (since later exits aren't considered), but potentially more powerful for any case where SCEV can prove a >= b, but neither a == b or a > b.  I don't have an example to illustrate that oppurtunity, but won't be suprised if we find one and return to handle that case as well.  

Differential Revision: https://reviews.llvm.org/D69009



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375379 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 23:38:02 +00:00
Roman Lebedev
b93a52f5fe [InstCombine] conditional sign-extend of high-bit-extract: 'or' pattern.
In this pattern, all the "magic" bits that we'd `add` are all
high sign bits, and in the value we'd be adding to they are all unset,
not unexpectedly, so we can have an `or` there:
https://rise4fun.com/Alive/ups

It is possible that `haveNoCommonBitsSet()` should be taught about this
pattern so that we never have an `add` variant, but the reasoning would
need to be recursive (because of that `select`), so i'm not really sure
that would be worth it just yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375378 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 20:52:06 +00:00
Roman Lebedev
150b0bedb7 [NFC][InstCombine] conditional sign-extend of high-bit-extract: 'and' pat. can be 'or' pattern.
In this pattern, all the "magic" bits that we'd add are all
high sign bits, and in the value we'd be adding to they are all unset,
not unexpectedly, so we can have an `or` there:
https://rise4fun.com/Alive/ups

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375377 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 20:51:37 +00:00
GN Sync Bot
b7aa2ef391 gn build: Merge r375375
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375376 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 20:44:56 +00:00
Vladimir Vereschaka
eec7ef7443 Reverted r375254 as it has broken some build bots for a long time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375375 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 20:39:33 +00:00
Nikita Popov
e568120da3 [InstCombine] Fold uadd.sat(a, b) == 0 and usub.sat(a, b) == 0
This adds folds for comparing uadd.sat/usub.sat with zero:

 * uadd.sat(a, b) == 0 => a == 0 && b == 0 => (a | b) == 0
 * usub.sat(a, b) == 0 => a <= b

And inverted forms for !=.

Differential Revision: https://reviews.llvm.org/D69224

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375374 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 20:19:42 +00:00
Zinovy Nis
2b0c82a99f Fix buildbot error in SIRegisterInfo.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375373 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 20:01:16 +00:00
Nikita Popov
3ab0cb15c0 [InstCombine] Add tests for uadd/sub.sat(a, b) == 0; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375372 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 19:50:31 +00:00
Roman Lebedev
32d24a3249 [InstCombine] Shift amount reassociation in shifty sign bit test (PR43595)
Summary:
This problem consists of several parts:
* Basic sign bit extraction - `trunc? (?shr %x, (bitwidth(x)-1))`.
  This is trivial, and easy to do, we have a fold for it.
* Shift amount reassociation - if we have two identical shifts,
  and we can simplify-add their shift amounts together,
  then we likely can just perform them as a single shift.
  But this is finicky, has one-use restrictions,
  and shift opcodes must be identical.

But there is a super-pattern where both of these work together.
to produce sign bit test from two shifts + comparison.
We do indeed already handle this in most cases.
But since we get that fold transitively, it has one-use restrictions.
And what's worse, in this case the right-shifts aren't required to be
identical, and we can't handle that transitively:

If the total shift amount is bitwidth-1, only a sign bit will remain
in the output value. But if we look at this from the perspective of
two shifts, we can't fold - we can't possibly know what bit pattern
we'd produce via two shifts, it will be *some* kind of a mask
produced from original sign bit, but we just can't tell it's shape:
https://rise4fun.com/Alive/cM0 https://rise4fun.com/Alive/9IN

But it will *only* contain sign bit and zeros.
So from the perspective of sign bit test, we're good:
https://rise4fun.com/Alive/FRz https://rise4fun.com/Alive/qBU
Superb!

So the simplest solution is to extend `reassociateShiftAmtsOfTwoSameDirectionShifts()` to also have a
sudo-analysis mode that will ignore extra-uses, and will only check
whether a) those are two right shifts and b) they end up with bitwidth(x)-1
shift amount and return either the original value that we sign-checking,
or null.

This does not have any functionality change for
the existing `reassociateShiftAmtsOfTwoSameDirectionShifts()`.

All that being said, as disscussed in the review, this yet again
increases usage of instsimplify in instcombine as utility.
Some day that may need to be reevaluated.

https://bugs.llvm.org/show_bug.cgi?id=43595

Reviewers: spatel, efriedma, vsk

Reviewed By: spatel

Subscribers: xbolva00, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68930

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375371 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 19:38:50 +00:00
Roman Lebedev
7bd6e166d9 [ConstantRange] makeGuaranteedNoWrapRegion(): shl support
Summary:
If all the shifts amount are already poison-producing,
then we can add more poison-producing flags ontop:
https://rise4fun.com/Alive/Ocwi

Otherwise, we should only consider the possible range of shift amts that don't result in poison.

For unsigned range not not overflow, we must not shift out any set bits,
and the actual limit for `x` can be computed by backtransforming
the maximal value we could ever get out of the `shl` - `-1` through
`lshr`. If the `x` is any larger than that then it will overflow.

Likewise for signed range, but just in signed domain..

This is based on the general idea outlined by @nikic in https://reviews.llvm.org/D68672#1714990

Reviewers: nikic, sanjoy

Reviewed By: nikic

Subscribers: hiraditya, llvm-commits, nikic

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375370 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 19:36:55 +00:00
Nikita Popov
467514942a [ConstantRange] Optimize nowrap region test, remove redundant tests; NFC
Enumerate one less constant range in TestNoWrapRegionExhaustive,
which was unnecessary. This allows us to bump the bit count from
3 to 5 while keeping reasonable timing.

Drop four tests for multiply nowrap regions, as these cover subsets
of the exhaustive test. They do use a wider bitwidth, but I don't
think it's worthwhile to have them additionally now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375369 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 18:59:14 +00:00
Matt Arsenault
2df5f8ca5d AMDGPU: Increase vcc liveness scan threshold
Avoids a test regression in a future patch. Also add debug printing on
this case, so I waste less time debugging folds in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375367 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 17:44:17 +00:00
Matt Arsenault
f154896069 AMDGPU: Split flat offsets that don't fit in DAG
We handle it this way for some other address spaces.

Since r349196, SILoadStoreOptimizer has been trying to do this. This
is after SIFoldOperands runs, which can change the addressing
patterns. It's simpler to just split this earlier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375366 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 17:34:44 +00:00
Matt Arsenault
d8b4d6f7e1 AMDGPU: Fix missing OPERAND_IMMEDIATE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375365 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-20 16:56:10 +00:00