Commit Graph

20547 Commits

Author SHA1 Message Date
Peter Collingbourne
ef8136dda1 DataFlowSanitizer: Instrumentation for memset.
Differential Revision: http://llvm-reviews.chandlerc.com/D1395

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188412 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 20:51:38 +00:00
Hal Finkel
341c1a50ad Actually fix PPC64 64-bit GPR inline asm constraint matching
This is a follow-up to r187693, correcting that code to request the correct
register class. The previous version, with the wrong register class, was not
really correcting the constraints, but rather was removing them. Coincidentally,
this fixed the failing test case in r187693, but obviously created other
problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 20:05:04 +00:00
Peter Collingbourne
fdb1a6c341 DataFlowSanitizer: greylist is now ABI list.
This replaces the old incomplete greylist functionality with an ABI
list, which can provide more detailed information about the ABI and
semantics of specific functions.  The pass treats every function in
the "uninstrumented" category in the ABI list file as conforming to
the "native" (i.e. unsanitized) ABI.  Unless the ABI list contains
additional categories for those functions, a call to one of those
functions will produce a warning message, as the labelling behaviour
of the function is unknown.  The other supported categories are
"functional", "discard" and "custom".

- "discard" -- This function does not write to (user-accessible) memory,
  and its return value is unlabelled.
- "functional" -- This function does not write to (user-accessible)
  memory, and the label of its return value is the union of the label of
  its arguments.
- "custom" -- Instead of calling the function, a custom wrapper __dfsw_F
  is called, where F is the name of the function.  This function may wrap
  the original function or provide its own implementation.

Differential Revision: http://llvm-reviews.chandlerc.com/D1345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188402 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 18:54:12 +00:00
Alexey Samsonov
6889483ca4 llvm-symbolizer: add support for .gnu_debuglink section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 17:09:30 +00:00
Renato Golin
dd34dc99fd Let t2LDRBi8 and t2LDRBi12 have same Base Pointer
When determining if two different loads are from the same base address,
this patch allows one load to use a t2LDRi8 address mode and another to
use a t2LDRi12 address mode. The current implementation is very
conservative and this allows the case of differing Thumb2 byte loads to
be considered. Allowing these differing modes instead of forcing the exact
same opcode is useful for situations where one opcodes loads from a base
address+1 and a second opcode loads for a base address-1.

Patch by Daniel Stewart.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188385 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 16:35:29 +00:00
Tim Northover
73cd0c844b Add test-case for hex floating-literals
Somehow I forgot to test one of the error conditions I'd added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188372 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 14:55:54 +00:00
Tim Northover
337439d12d Support C99 hexadecimal floating-point literals in assembly
It's useful to be able to write down floating-point numbers without having to
worry about what they'll be rounded to (as C99 discovered), this extends that
ability to the MC assembly parsers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188370 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 14:23:31 +00:00
Akira Hatanaka
899ee589f5 [mips] Fix bug in parsing accumulator registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188344 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 01:15:52 +00:00
NAKAMURA Takumi
7cd85b7492 llvm/test/CodeGen/X86/setcc-sentinals.ll: Relax expressions for x86_64-win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188340 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 00:46:00 +00:00
Matt Arsenault
fdc2660214 Fix always creating GEP with i32 indices
Use the pointer size if datalayout is available.
Use i64 if it's not, which is consistent with what other
places do when the pointer size is unknown.

The test doesn't really test this in a useful way
since it will be transformed to that later anyway,
but this now tests it for non-zero arrays and when
datalayout isn't available. The cases in
visitGetElementPtrInst should save an extra re-visit to
the newly created GEP since it won't need to cleanup after
itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188339 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 00:24:38 +00:00
Akira Hatanaka
bfb07b1054 [mips] Properly parse registers that appear in inline-asm constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-14 00:21:25 +00:00
Hal Finkel
eaa8f5533f BBVectorize: Add initial stores to the write set when tracking uses
When computing the use set of a store, we need to add the store to the write
set prior to iterating over later instructions. Otherwise, if there is a later
aliasing load of that store, that load will not be tagged as a use, and bad
things will happen.

trackUsesOfI still adds later dependent stores of an instruction to that
instruction's write set, but it never sees the original instruction, and so
when tracking uses of a store, the store must be added to the write set by the
caller.

Fixes PR16834.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188329 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 23:34:32 +00:00
Nick Lewycky
fc2fc08b49 Remove duplicate copy of testcase in r188327.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 22:55:05 +00:00
Nick Lewycky
6c1fa7caae Revert r187191, which broke opt -mem2reg on the testcases included in PR16867.
However, opt -O2 doesn't run mem2reg directly so nobody noticed until r188146
when SROA started sending more things directly down the PromoteMemToReg path.

In order to revert r187191, I also revert dependent revisions r187296, r187322
and r188146. Fixes PR16867. Does not add the testcases from that PR, but both
of them should get added for both mem2reg and sroa when this revert gets
unreverted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188327 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 22:51:58 +00:00
Jim Grosbach
51a0280d29 DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
A common idiom is to use zero and all-ones as sentinal values and to
check for both in a single conditional ("x != 0 && x != (unsigned)-1").
That generates code, for i32, like:
  testl %edi, %edi
  setne %al
  cmpl  $-1, %edi
  setne %cl
  andb  %al, %cl

With this transform, we generate the simpler:
  incl  %edi
  cmpl  $1, %edi
  seta  %al

Similar improvements for other integer sizes and on other platforms. In
general, combining the two setcc instructions into one is better.

rdar://14689217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188315 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 21:30:58 +00:00
Jack Carter
da0860f78e [Mips] Support for unaligned load/store microMips instructions
This includes instructions lwl, lwr, swl and swr.

Patch by Zoran Jovnovic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188312 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 20:19:16 +00:00
Carlo Kok
46f0b6f10a Output DW_AT_stmt_list dwarf debug info as DW_FORM_sec_offset instead of DW_FORM_data4 as it is a section offset (fixes the coff/dwarf debug info statement locations)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188297 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 17:46:57 +00:00
Joey Gouly
3f87f2510c ARMv8: SWP and SWPB are obsoleted on ARMv8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188288 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 16:40:47 +00:00
Mihai Popa
ea8ddd86b1 Fix signed overflow in when computing encodings for ADR instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 14:02:13 +00:00
Elena Demikhovsky
4d36bd80e6 AVX-512: Added CMP and BLEND instructions.
Lowering for SETCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 13:24:07 +00:00
Evgeniy Stepanov
15ab9f4aaa Pass DIEHash::collectAttributes output argument by-pointer instead of by-value.
Before this, collectAttributes() was operating on a local object.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188254 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 07:57:01 +00:00
David Majnemer
6aa9315353 [-cxx-abi microsoft] Stick zero initialized symbols into the .bss section for COFF
Summary:
We need to do two things:

- Initialize BSSSection in MCObjectFileInfo::InitCOFFMCObjectFileInfo
- Teach TargetLoweringObjectFileCOFF::SelectSectionForGlobal what to do
  with it

This fixes PR16861.

Reviewers: rnk

Reviewed By: rnk

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1361

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188244 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 01:23:53 +00:00
Eric Christopher
0710bfa866 Add the start of DIE hashing for DWARF4 type units and split dwarf
CUs.

Currently only hashes the name of CUs and the names of any children,
but it's an obvious first step to show the framework. The testcase
should continue to be correct, however, as it's an empty TU.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188243 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-13 01:21:55 +00:00
Eric Christopher
b58bddf258 Add comment and source to testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188234 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 23:59:26 +00:00
Rui Ueyama
d9a84efe44 [FileCheck] Fix a bug that cause FileCheck to misidentify check-prefix
FileCheck should check to make sure the prefix was found, and not a word
containing it (e.g -check-prefix=BASEREL shouldn't match NOBASEREL).

Patch by Ron Ofir.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188221 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 23:05:59 +00:00
Kevin Enderby
ebc573ed5b Fix a crash with X86 Mach-O and a subtraction expression where both symbols are
undefined and produce an error message instead as this is a non-relocatable
expression with X86 Mach-O.

rdar://8920876


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188218 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 22:45:44 +00:00
Peter Collingbourne
4f96b7e147 Reapply r188119 now that the bug it exposed is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188217 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 22:38:43 +00:00
Tom Stellard
f15dfe4eb4 R600: Set scheduling preference to Sched::Source
R600 doesn't need to do any scheduling on the SelectionDAG now that it
has a very good MachineScheduler.  Also, using the VLIW SelectionDAG
scheduler was having a major impact on compile times. For example with
the phatk kernel here are the LLVM IR to machine code compile times:

With Sched::VLIW

Total Compile Time:                  1.4890 Seconds (User + System)
SelectionDAG Instruction Scheduling: 1.1670 Seconds (User + System)

With Sched::Source

Total Compile Time:                  0.3330 Seconds (User + System)
SelectionDAG Instruction Scheduling: 0.0070 Seconds (User + System)

The code ouput was identical with both schedulers.  This may not be true
for all programs, but it gives me confidence that there won't be much
reduction, if any, in code quality by using Sched::Source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 22:33:21 +00:00
Eric Christopher
f962c02b80 Move the addition of the dwo_id as late as possible after everything
has been finalized except for sizes and offsets. Update test accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188199 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 20:27:48 +00:00
Nadav Rotem
353476cbbb Fix PR16797 - Support PHINodes with multiple inputs from the same basic block.
Do not generate new vector values for the same entries because we know that the incoming values
from the same block must be identical.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188185 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 17:46:44 +00:00
Vladimir Medic
809313970f This patch implements ei and di instructions for mips. Test cases are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 13:07:23 +00:00
Tim Northover
dcef6a7400 Fix FileCheck --check-prefix lines.
Various tests had sprung up over the years which had --check-prefix=ABC on the
RUN line, but "CHECK-ABC:" later on. This happened to work before, but was
strictly incorrect. FileCheck is getting stricter soon though.

Patch by Ron Ofir.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188173 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 12:43:26 +00:00
Richard Sandiford
ac168b8bc8 [SystemZ] Use CLC and IPM to implement memcmp
For now this is restricted to fixed-length comparisons with a length
in the range [1, 256], as for memcpy() and MVC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188163 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 10:28:10 +00:00
Richard Sandiford
e03a56d62f [SystemZ] Add a definition of the CLC instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188162 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 10:17:33 +00:00
Richard Sandiford
f37c8feb46 [SystemZ] Add a definition of the IPM instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188161 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 10:05:58 +00:00
Tim Northover
6a4e44f0de Allow compatible extension attributes for tail calls
If the tail-callee and caller give the same bits via the same signext/zeroext
attribute then a tail-call should be allowed, since the extension has already
been done by the callee.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188159 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 09:45:46 +00:00
Richard Sandiford
23331c30ae Fix big-endian handling of integer-to-vector bitcasts in InstCombine
These functions used to assume that the lsb of an integer corresponds
to vector element 0, whereas for big-endian it's the other way around:
the msb is in the first element and the lsb is in the last element.

Fixes MultiSource/Benchmarks/mediabench/gsm/toast for z.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188155 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 07:26:09 +00:00
Reed Kotler
5e4b95b3fe Don't generate floating point stubs for mips16 code if the function
is actually an instrinsic that will not occur in libc. This list here
is not exhaustive but fixes the one places in test-suite where this occurs.
I have filed a bug against myself to research the full list and add them
to the array of such cases. In the future, actual stub generation will occur
in a later phase and we won't need this code because we will know at that time
during the compilation that in fact no helper function was even needed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188149 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-11 21:30:27 +00:00
Elena Demikhovsky
55db69c97e AVX-512: Added more tests for BROADCAST
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188148 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-11 12:29:16 +00:00
Elena Demikhovsky
fac4a4eb7d AVX-512: Added VPERM* instructons and MOV* zmm-to-zmm instructions.
Added a test for shuffles using VPERM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188147 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-11 07:55:09 +00:00
Arnold Schwaighofer
5cf14916c3 Revert r188119 "Kill some duplicated code for removing unreachable BBs."
It is breaking builbots with libgmalloc enabled on Mac OS X.

$ cd llvm ; mkdir release ; cd release
$ ../configure --enable-optimized —prefix=$PWD/install
$ make
$ make check
$ Release+Asserts/bin/llvm-lit -v --param use_gmalloc=1 --param \
  gmalloc_path=/usr/lib/libgmalloc.dylib \
  ../test/Instrumentation/DataFlowSanitizer/args-unreachable-bb.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188142 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-10 20:16:06 +00:00
Niels Ole Salscheider
6e4dbcd115 R600/SI: FMA is faster than fmul and fadd for f64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188136 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-10 10:38:54 +00:00
Niels Ole Salscheider
4ab92e4d4b R600/SI: Add FMA pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188135 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-10 10:38:47 +00:00
Rafael Espindola
0a69bac396 Check for $PWD in llvm::sys::current_path.
Some users (clang, libTooling) require this. After this patch we can remove
the calls to getenv("PWD") from clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188125 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-10 00:50:57 +00:00
Michael Gottesman
3ed7576a3b [objc-arc] Track if we encountered an additive overflow while computing {TopDown,BottomUp}PathCounts and do nothing if it occurred.
I fixed the aforementioned problems that came up on some of the linux boxes.
Major thanks to Nick Lewycky for his help debugging!

rdar://14590914

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188122 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 23:22:27 +00:00
Peter Collingbourne
835738ce54 Kill some duplicated code for removing unreachable BBs.
This moves removeUnreachableBlocksFromFn from SimplifyCFGPass.cpp
to Utils/Local.cpp and uses it to replace the implementation of
llvm::removeUnreachableBlocks, which appears to do a strict subset
of what removeUnreachableBlocksFromFn does.

Differential Revision: http://llvm-reviews.chandlerc.com/D1334

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188119 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 22:47:24 +00:00
Peter Collingbourne
aaae6e9cb8 DataFlowSanitizer: Remove unreachable BBs so IR continues to verify
under the args ABI.

Differential Revision: http://llvm-reviews.chandlerc.com/D1316

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 21:42:53 +00:00
Reed Kotler
1e07de3529 Add another intrinsic that LLVM gives an incorrect prototype to.
I need to go through all the runtime routine list and see if there
are any more I need to add for mips16 floating point. Prototypes must
be correct or else I don't know to add a helper function call.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188106 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 21:33:41 +00:00
Michael Gottesman
236e389be4 [stackprotector] Simplify SP Pass so that we emit different fail basic blocks for each fail condition.
This patch decouples the stack protector pass so that we can support stack
protector implementations that do not use the IR level generated stack protector
fail basic block.

No codesize increase is caused by this change since the MI level tail merge pass
properly merges together the fail condition blocks (see the updated test).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188105 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 21:26:18 +00:00
Stephen Lin
02f0799d84 CHECK-LABEL-ify tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188087 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 17:50:15 +00:00
Daniel Dunbar
27c35d980a [tests] Update to use lit_config and lit package, as appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188076 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 16:22:05 +00:00
Mihai Popa
04b03fac11 This fixes the Thumb2 CPS assembly syntax.
In Thumb1, only one variant is supported: CPS{effect} {flags}

Thumb2 supports three:
CPS{effect}.W {flags}
CPS{effect} {flags} {mode}
CPS {mode}

Canonically, .W should be used only when ambiguity is present between encodings of different width.
The wide suffix is still accepted for the latter two forms via aliases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188071 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 13:52:32 +00:00
Mihai Popa
e921f32353 Fix assembling of Thumb2 branch instructions.
The long encoding for Thumb2 unconditional branches is broken.
Additionally, there is no range checking for target operands; as such 
for instructions originating in assembly code, only short Thumb encodings
are generated, regardless of the bitsize needed for the offset.

Adding range checking is non trivial due to the representation of Thumb
branch instructions. There is no true difference between conditional and
unconditional branches in terms of operands and syntax - even unconditional
branches have a predicate which is expected to match that of the IT block
they are in. Yet, the encodings and the permitted size of the offset differ.

Due to this, for any mnemonic there are really 4 encodings to choose for.

The problem cannot be handled in the parser alone or by manipulating td files.
Because the parser builds first a set of match candidates and then checks them
one by one, whatever tablegen-only solution might be found will ultimately be
dependent of the parser's evaluation order. What's worse is that due to the fact
that all branches have the same syntax and the same kinds of operands, that 
order is governed by the lexicographical ordering of the names of operand 
classes...

To circumvent all this, any necessary disambiguation is added to the instruction
validation pass.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188067 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 10:38:32 +00:00
Craig Topper
4f75d9b31b Add missing 'v' prefix in front of palignr on one of checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 05:41:12 +00:00
Hal Finkel
3d7f79a02e Set ISD::FROUND to Expand by default for all types
For most libm ISD nodes, TargetLoweringBase::initActions sets the default
scalar-type action to Expand, and leaves the vector-type action default as
Legal. This is not appropriate for the new ISD::FROUND node (which no backend
but PowerPC handles explicitly).

Fixes PR16842.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188048 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 04:13:44 +00:00
Lang Hames
623f2025a7 Optimistically ignore scattered relocations in MachO in RuntimeDyld. This
un-breaks simple use cases while I work on more general support.

<rdar://problem/14487667>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188044 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 00:57:01 +00:00
Jack Carter
d12fce1a27 Mips ELF: MicroMips direct object Little endian support.
Test included.

Patch by Zoran Jovanovich


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188024 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 23:30:40 +00:00
Michael J. Spencer
081a1941b5 [Object] Split the ELF interface into 3 parts.
* ELFTypes.h contains template magic for defining types based on endianess, size, and alignment.
* ELFFile.h defines the ELFFile class which provides low level ELF specific access.
* ELFObjectFile.h contains ELFObjectFile which uses ELFFile to implement the ObjectFile interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188022 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 22:27:13 +00:00
Arnold Schwaighofer
9b19dfc2e0 Revert "Reapply r185872 now that the address sanitizer has been changed to support this."
This reverts commit r187939. It broke an O0 build of a spec benchmark.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188012 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 21:04:16 +00:00
Daniel Dunbar
81e8f39858 [tests] Remove dead VALGRIND and CLEANED_TESTSUITE makefile variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188010 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 20:59:27 +00:00
Daniel Dunbar
9d11edb416 [lit] Remove on_clone member, which is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 20:59:13 +00:00
David Fang
d4f9d05fde initial draft of PPCMachObjectWriter.cpp
this records relocation entries in the mach-o object file
for PIC code generation.
tested on powerpc-darwin8, validated against darwin otool -rvV

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188004 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 20:14:40 +00:00
Niels Ole Salscheider
014773626d R600/SI: Implement fp32<->fp64 conversions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 16:06:15 +00:00
Niels Ole Salscheider
7114e2e7cf R600/SI: Implement sint<->fp64 conversions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187987 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 16:06:08 +00:00
Andrea Di Biagio
b1dc93913f test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187974 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 10:46:36 +00:00
Eric Christopher
13aeceb861 DISubprogram metadata have an MDNode representing which base type
contains the vtable pointer for the class as the operand at index
12. Replace the i32 0 with a null MDNode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187970 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 08:35:37 +00:00
Evgeniy Stepanov
35d2102133 Disable inlining between sanitized and non-sanitized functions.
Inlining between functions with different values of sanitize_* attributes
leads to over- or under-sanitizing, which is always bad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 08:22:39 +00:00
Eric Christopher
76ef79f410 For DW_TAG_template_type_parameter the actual passed in type could
be void and therefore not have a type entry. Only add the type if
it is non-void and provide a testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187966 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 08:09:43 +00:00
Eric Christopher
dc1363f5af Make sure that if we're going to attempt to add a type to a DIE that
the type exists.

Fix up cases where we weren't checking for optional types and add
an assert to addType to make sure we catch this in the future.

Fix up a testcase that was using the tag for DW_TAG_array_type
when it meant DW_TAG_enumeration_type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187963 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 07:40:37 +00:00
Hal Finkel
05a4d2642b PPC: Map frin to round() not nearbyint() and rint()
Making use of the recently-added ISD::FROUND, which allows for custom lowering
of round(), the PPC backend will now map frin to round(). Previously, we had
been using frin to lower nearbyint() (and rint() via some custom lowering to
handle the extra fenv flags requirements), but only in fast-math mode because
frin does not tie-to-even. Several users had complained about this behavior,
and this new mapping of frin to round is certainly more appropriate (and does
not require fast-math mode).

In effect, this reverts r178362 (and part of r178337, replacing the nearbyint
mapping with the round mapping).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187960 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 04:31:34 +00:00
David Majnemer
9706d43b56 Revert "coff also doesn't have a ReadOnlySection yet, (!)"
This reverts commit r77814.

We were sticking global constants in the .data section instead of in the
.rdata section when emitting for COFF.

This fixes PR16831.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 01:50:52 +00:00
Michael Gottesman
35b6edfbea Revert "[objc-arc] Track if we encountered an additive overflow while computing {TopDown,BottomUp}PathCounts and do nothing if it occured."
This reverts commit r187941.

The commit was passing on my os x box, but it is failing on some non-osx
platforms. I do not have time to look into it now, so I am reverting and will
recommit after I figure this out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187946 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-08 00:41:18 +00:00
Michael Gottesman
7f1a7d4137 [objc-arc] Track if we encountered an additive overflow while computing {TopDown,BottomUp}PathCounts and do nothing if it occured.
rdar://14590914

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 23:56:41 +00:00
Bill Wendling
d3a9510264 Reapply r185872 now that the address sanitizer has been changed to support this.
Original commit message:

Stop emitting weak symbols into the "coal" sections.

The Mach-O linker has been able to support the weak-def bit on any symbol for
quite a while now. The compiler however continued to place these symbols into a
"coal" section, which required the linker to map them back to the base section
name.

Replace the sections like this:

  __TEXT/__textcoal_nt   instead use  __TEXT/__text
  __TEXT/__const_coal    instead use  __TEXT/__const
  __DATA/__datacoal_nt   instead use  __DATA/__data

<rdar://problem/14265330>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 23:42:09 +00:00
Daniel Dunbar
f34117d849 [tests] Make string encoding issues explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 23:09:24 +00:00
Daniel Dunbar
4229b95d66 [tests] Avoid deprecated except syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 23:09:10 +00:00
Hal Finkel
41418d17cc Add ISD::FROUND for libm round()
All libm floating-point rounding functions, except for round(), had their own
ISD nodes. Recent PowerPC cores have an instruction for round(), and so here I'm
adding ISD::FROUND so that round() can be custom lowered as well.

For the most part, this is straightforward. I've added an intrinsic
and a matching ISD node just like those for nearbyint() and friends. The
SelectionDAG pattern I've named frnd (because ISD::FP_ROUND has already claimed
fround).

This will be used by the PowerPC backend in a follow-up commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 22:49:12 +00:00
Peter Collingbourne
6fa33f5dd9 DataFlowSanitizer; LLVM changes.
DataFlowSanitizer is a generalised dynamic data flow analysis.

Unlike other Sanitizer tools, this tool is not designed to detect a
specific class of bugs on its own.  Instead, it provides a generic
dynamic data flow analysis framework to be used by clients to help
detect application-specific issues within their own code.

Differential Revision: http://llvm-reviews.chandlerc.com/D965

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187923 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 22:47:18 +00:00
Eric Christopher
10251753b6 Using the integrated assembler we'd fail to change section to the
.tbss section for zerofill thread locals. Make sure we do this
before emitting the zerofills.

Fixes PR15972.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187913 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 21:13:06 +00:00
Elena Demikhovsky
207600d2cf AVX-512 set: Added BROADCAST instructions
with lowering logic and a test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187884 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 12:34:55 +00:00
Richard Sandiford
29e873ddb6 [SystemZ] Optimize floating-point comparisons with zero
This follows the same lines as the integer code.  In the end it seemed
easier to have a second 4-bit mask in TSFlags to specify the compare-like
CC values.  That eats one more TSFlags bit than adding a CCHasUnordered
would have done, but it feels more concise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187883 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 11:10:06 +00:00
Richard Sandiford
e0bbf7288c [SystemZ] Add floating-point load-and-test instructions
These instructions can also be used as comparisons with zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187882 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 11:03:34 +00:00
Benjamin Kramer
c11b107f21 JumpThreading: Turn a select instruction into branching if it allows to thread one half of the select.
This is a common pattern coming out of simplifycfg generating gross code.

a:                                       ; preds = %entry
  %sel = select i1 %cmp1, double %add, double 0.000000e+00
  br label %b

b:
  %cond5 = phi double [ %sel, %a ], [ %sub, %entry ]
  %cmp6 = fcmp oeq double %cond5, 0.000000e+00
  br i1 %cmp6, label %if.then, label %if.end

becomes

a:
  br i1 %cmp1, label %b, label %if.then

b:
  %cond5 = phi double [ %sub, %entry ], [ %add, %a ]
  %cmp6 = fcmp oeq double %cond5, 0.000000e+00
  br i1 %cmp6, label %if.then, label %if.end

Skipping block b completely if possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187880 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 10:29:38 +00:00
Elena Demikhovsky
aefdc04b2b LLVM Interpreter: MIPS tests should pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187867 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 06:13:21 +00:00
Reed Kotler
51c9043f3b Create a pattern for the "trap" instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187863 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 04:00:26 +00:00
Tom Stellard
3492eefa4b R600/SI: Use VSrc_* register classes as the default classes for types
Since the VSrc_* register classes contain both VGPRs and SGPRs, copies
that used be emitted by isel like this:

SGPR = COPY VGPR

Will now be emitted like this:

VSrC = COPY VGPR

This patch also adds a pass that tries to identify and fix situations where
a VGPR to SGPR copy may occur.  Hopefully, these changes will make it
impossible for the compiler to generate illegal VGPR to SGPR copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187831 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 23:08:28 +00:00
Tom Stellard
3406d882c0 R600/SI: Add more special cases for opcodes to ensureSRegLimit()
Also factor out the register class lookup to its own function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187830 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 23:08:18 +00:00
Bill Wendling
55a1a590bf Change the linkage of these global values to 'internal'.
The globals being generated here were given the 'private' linkage type. However,
this caused them to end up in different sections with the wrong prefix. E.g.,
they would be in the __TEXT,__const section with an 'L' prefix instead of an 'l'
(lowercase ell) prefix.

The problem is that the linker will eat a literal label with 'L'. If a weak
symbol is then placed into the __TEXT,__const section near that literal, then it
cannot distinguish between the literal and the weak symbol.

Part of the problems here was introduced because the address sanitizer converted
some C strings into constant initializers with trailing nuls. (Thus putting them
in the __const section with the wrong prefix.) The others were variables that
the address sanitizer created but simply had the wrong linkage type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187827 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 22:52:42 +00:00
Arnold Schwaighofer
2d66d4cf42 LoopVectorize: Allow vectorization of loops with lifetime markers
Patch by Marc Jessome!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187825 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 22:37:52 +00:00
Manman Ren
f40d578d7e Debug Info Finder|Verifier: handle DbgLoc attached to instructions.
Also remove checking of llvm.dbg.sp since it is not used in generating dwarf.

Current state of Finder:
DebugInfoFinder tries to list all debug info MDNodes used in a module. To
list debug info MDNodes used by an instruction, DebugInfoFinder provides
processDeclare, processValue and processLocation to handle DbgDeclareInst,
DbgValueInst and DbgLoc attached to instructions. processModule will go
through all DICompileUnits in llvm.dbg.cu and list debug info MDNodes
used by the CUs.

TODO:
1> Finder has a list of CUs, SPs, Types, Scopes and global variables. We
need to add a list of variables that are used by DbgDeclareInst and
DbgValueInst.
2> MDString fields should be null or isa<MDString> and MDNode fields should be
null or isa<MDNode>. We currently use empty string or int 0 to represent null.
3> Go though Verify functions and make sure that they check field types.
4> Clean up existing testing cases to remove llvm.dbg.sp and make sure each
testing case has a llvm.dbg.cu.

Re-apply r187609 with fix to pass ocaml binding. vmcore.ml generates a debug
location with scope being metadata !{}, in verifier we treat this as a null
scope.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187812 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 19:38:43 +00:00
Hal Finkel
0e910d2cb5 Add PPC64 mulli pattern
The PPC backend had been missing a pattern to generate mulli for 64-bit
multiples. We had been generating it only for 32-bit multiplies. Unfortunately,
generating li + mulld unnecessarily increases register pressure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187807 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 17:03:03 +00:00
Mihai Popa
4f7092176c This corrects creation of operands for t2PLDW. It also removes the definition of t2PLDWpci,
as pldw does not have a literal variant (i.e. pc relative version)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187804 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 16:07:46 +00:00
Mihai Popa
4a378b95aa Support APSR_nzcv as operand for Thumb2 mrc. Deprecate pre-UAL syntax (pc instead of apsr_nzcv)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187803 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 15:52:36 +00:00
Justin Holewinski
df66ff09bc [NVPTX] Add missing patterns for i1 [s,u]int_to_fp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187800 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 14:13:34 +00:00
Justin Holewinski
a3635eefc7 [NVPTX] Fix bug in stack code generation causes by MC conversion
We do use a very small set of physical registers, so account for
them in the virtual register encoding between MachineInstr and MC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187799 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 14:13:31 +00:00
Justin Holewinski
82767327c5 [NVPTX] Start conversion to MC infrastructure
This change converts the NVPTX target to use the MC infrastructure
instead of directly emitting MachineInstr instances. This brings
the target more up-to-date with LLVM TOT, and should fix PR15175
and PR15958 (libNVPTXInstPrinter is empty) as a side-effect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187798 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 14:13:27 +00:00
Tim Northover
8775a51d94 ARM: implement allowTruncateForTailCall
Now that it's in place, it seems silly not to let ARM make use of the extra
tail call opportunities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187795 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 13:58:03 +00:00
Elena Demikhovsky
7398c774f6 LLVM Interpreter: fixed bug 16694
fix for: Bug 16694 - ExecutionEngine/test-interp-vec-loadstore.ll failing on powerpc-darwin8 (http://llvm.org/bugs/show_bug.cgi?id=16694)
The ExecutionEngine/test-interp-vec-loadstore.ll test has been failing on powerpc-darwin8 (on other platforms it passed)

the reason of fail was wrong output by printf. this output is checked by FileCheck, but on little-endian powerpc the output numeric data were printed inside out and FileCheck reported fail.
the printfs have been replaced by checking data inside test and numeric output has been replaced by the text output like : "int test passed, float test passed". The text output is checked by FileCheck.
the dependency on data layout has been removed.

done by Yuri Veselov (Intel)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187791 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 10:40:45 +00:00
Tim Northover
d113448c1d Refactor isInTailCallPosition handling
This change came about primarily because of two issues in the existing code.
Niether of:

define i64 @test1(i64 %val) {
  %in = trunc i64 %val to i32
  tail call i32 @ret32(i32 returned %in)
  ret i64 %val
}

define i64 @test2(i64 %val) {
  tail call i32 @ret32(i32 returned undef)
  ret i32 42
}

should be tail calls, and the function sameNoopInput is responsible. The main
problem is that it is completely symmetric in the "tail call" and "ret" value,
but in reality different things are allowed on each side.

For these cases:
1. Any truncation should lead to a larger value being generated by "tail call"
   than needed by "ret".
2. Undef should only be allowed as a source for ret, not as a result of the
   call.

Along the way I noticed that a mismatch between what this function treats as a
valid truncation and what the backends see can lead to invalid calls as well
(see x86-32 test case).

This patch refactors the code so that instead of being based primarily on
values which it recurses into when necessary, it starts by inspecting the type
and considers each fundamental slot that the backend will see in turn. For
example, given a pathological function that returned {{}, {{}, i32, {}}, i32}
we would consider each "real" i32 in turn, and ask if it passes through
unchanged. This is much closer to what the backend sees as a result of
ComputeValueVTs.

Aside from the bug fixes, this eliminates the recursion that's going on and, I
believe, makes the bulk of the code significantly easier to understand. The
trade-off is the nasty iterators needed to find the real types inside a
returned value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187787 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 09:12:35 +00:00
Tom Stellard
01d7203ef8 Factor FlattenCFG out from SimplifyCFG
Patch by: Mei Ye

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 02:43:45 +00:00
Bill Wendling
ac838d1c14 FileCheckize some of the testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187756 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 23:43:18 +00:00
Tom Stellard
c1ad37e5cd R600/SI: Add missing test for r187749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187754 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 22:45:56 +00:00
Elena Demikhovsky
cf21d155ed LLVM Interpreter: This patch implements vector support for cast operations (zext, sext, uitofp, sitofp, trunc, fpext, fptosi, fptrunc, bitcast) and shift operations (shl, ashr, lshr) for integer and floating point data types.
Added tests.

Done by Yuri Veselov (mailto:Yuri.Veselov@intel.com).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187724 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 12:17:06 +00:00
Richard Sandiford
9379557478 [SystemZ] Use BRCT and BRCTG to eliminate add-&-compare sequences
This patch just uses a peephole test for "add; compare; branch" sequences
within a single block.  The IR optimizers already convert loops to
decrement-and-branch-on-nonzero form in some cases, so even this
simplistic test triggers many times during a clang bootstrap and
projects/test-suite run.  It looks like there are still cases where we
need to more strongly prefer branches on nonzero though.  E.g. I saw a
case where a loop that started out with a check for 0 ended up with a
check for -1.  I'll try to look at that sometime.

I ended up adding the Reference class because MachineInstr::readsRegister()
doesn't check for subregisters (by design, as far as I could tell).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187723 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 11:23:46 +00:00
Richard Sandiford
ccdf5cc7bc [SystemZ] Add definitions for BRCT and BRCTG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187721 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 11:07:38 +00:00
Richard Sandiford
9b05c709c6 [SystemZ] Use LOAD AND TEST to eliminate comparisons against zero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187720 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 11:03:20 +00:00
Richard Sandiford
0e4044c233 [SystemZ] Add LOAD AND TEST instructions
Just the definitions and MC support.  The next patch uses them for codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187719 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 11:00:53 +00:00
Elena Demikhovsky
13e6e9171f AVX-512 set: added mask operations, lowering BUILD_VECTOR for i1 vector types.
Added intrinsics and tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187717 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 08:52:21 +00:00
Reed Kotler
25278aa26f Add the saving of S2. This is needed for some of the floating point
helper functions. This can be optimized out later when the remaining
parts of the helper function work is moved into the Mips16HardFloat pass.
For now it forces us to use the 32 bit save/restore instructions instead
of the 16 bit ones.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187712 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 23:56:53 +00:00
Bob Wilson
9c6d857c61 Remove "lto_on_osx" xfails, now that -rdynamic works on Darwin.
Note that this will require a recent version of the linker for Darwin
builds with LTO to pass these tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187711 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 23:55:24 +00:00
Benjamin Kramer
75311b7b4d X86: Turn fp selects into mask operations.
double test(double a, double b, double c, double d) { return a<b ? c : d; }

before:
_test:
	ucomisd	%xmm0, %xmm1
	ja	LBB0_2
	movaps	%xmm3, %xmm2
LBB0_2:
	movaps	%xmm2, %xmm0

after:
_test:
	cmpltsd	%xmm1, %xmm0
	andpd	%xmm0, %xmm2
	andnpd	%xmm3, %xmm0
	orpd	%xmm2, %xmm0

Small speedup on Benchmarks/SmallPT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187706 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 12:05:16 +00:00
Elena Demikhovsky
f3e3417e65 AVX-512 set: added VEXTRACTPS instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187705 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 10:46:07 +00:00
Tim Northover
b04578c21b X86: specify CPU on new test to fix atom buildbot
Apparently Atoms use lea for stack adjustment, which we weren't
looking for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187704 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 10:00:45 +00:00
Tim Northover
a54b66277e X86: correct tail return address calculation
Due to the weird and wondeful usual arithmetic conversions, some
calculations involving negative values were getting performed in
uint32_t and then promoted to int64_t, which is really not a good
idea.

Patch by Katsuhiro Ueno.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187703 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 09:35:57 +00:00
Reed Kotler
8a7f9de9d4 Clean up code for Mips16 large frame handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 01:13:25 +00:00
Hal Finkel
5cad12d12a Fix PPC64 64-bit GPR inline asm constraint matching
Internally, the PowerPC backend names the 32-bit GPRs R[0-9]+, and names the
64-bit parent GPRs X[0-9]+. When matching inline assembly constraints with
explicit register names, on PPC64 when an i64 MVT has been requested, we need
to follow gcc's convention of using r[0-9]+ to refer to the 64-bit (parent)
registers.

At some point, we'll probably want to arrange things so that the generic code
in TargetLowering uses the AsmName fields declared in *RegisterInfo.td in order
to match these inline asm register constraints. If we do that, this change can
be reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187693 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-03 12:25:10 +00:00
Akira Hatanaka
5e795097b0 [mips] Expand vector truncating stores and extending loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187667 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-02 19:23:33 +00:00
Joey Gouly
787fdb86a7 [ARMv8] Add an assembler warning for the deprecated 'setend' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187666 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-02 19:18:12 +00:00
Nadav Rotem
f2855f8886 SLPVectorizer: Fix PR16777. PHInodes may use multiple extracted values that come from different blocks.
Thanks Alexey Samsonov.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187663 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-02 18:40:24 +00:00
Renato Golin
38ffffeebc Fixes ARM LNT bot from SLP change in O3
This patch fixes the multiple breakages on ARM test-suite after the SLP
vectorizer was introduced by default on O3. The problem was an illegal
vector type on ARMTTI::getCmpSelInstrCost() <3 x i1> which is not simple.

The guard protects this code from breaking (cause of the problems) but
doesn't fix the issue that is generating the odd vector in the first
place, which also needs to be investigated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187658 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-02 17:10:04 +00:00
Carlo Kok
fdabd9f391 Bugfix for making the DWARF debug strings and labels to code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB (with fix for 64bits msvc)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187656 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-02 16:14:15 +00:00
Tim Northover
e57343b636 Fix handling of CHECK-DAG combined with CHECK-NOT
Patch by Daniel Sanders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187651 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-02 11:32:50 +00:00
NAKAMURA Takumi
ee1d7db74b Revert r187597, "Bugfix for making the DWARF debug strings and labels to code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB."
It broke x86_64-win32 builder in llvm/test/DebugInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187642 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-02 03:46:05 +00:00
Eric Christopher
be9f508aec Temporarily revert "Debug Info Finder|Verifier: handle DbgLoc attached to
instructions." in an attempt to bring back some bots.

This reverts commit r187609.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187638 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-02 00:49:44 +00:00
Carlo Kok
cfe855d658 fix for LLVM debug info on llvm-mips-linux where the label name uses % instead of L as a prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187623 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 22:15:34 +00:00
Bill Wendling
61fc8d670f Use function attributes to indicate that we don't want to realign the stack.
Function attributes are the future! So just query whether we want to realign the
stack directly from the function instead of through a random target options
structure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187618 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 21:42:05 +00:00
Reed Kotler
b1fa7d4d26 Fix some issues with Mips16 floating when certain intrinsics are present.
This is actually an LLVM bug in the way it generates signatures for these
when soft float is enabled. For example, floor ends up having the signature
of int64(int64). The signature part is not the same as where the actual
parameter types are recorded, and those ARE of course int64(int64) when
soft float is enabled. (Yes, Mips16 hard float uses soft float but with
different runtime rounes but then has to interoperate with Mips32 using
normal floating point). This logic will eventually be moved to the 
Mips16HardFloat pass so it's not worth sorting out these issues in LLVM
since nobody but Mips16 cares about these signatures, as far as I know,
and even I won't eventually either.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187613 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 21:17:53 +00:00
Carlo Kok
e18804ecd0 ARM/Hexagon testcases can't compile x86 only testcase. Reverting change to testcase & fixing check for all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187610 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 20:53:57 +00:00
Manman Ren
f589eef864 Debug Info Finder|Verifier: handle DbgLoc attached to instructions.
Also remove checking of llvm.dbg.sp since it is not used in generating dwarf.

Current state of Finder:
DebugInfoFinder tries to list all debug info MDNodes used in a module. To
list debug info MDNodes used by an instruction, DebugInfoFinder provides
processDeclare, processValue and processLocation to handle DbgDeclareInst,
DbgValueInst and DbgLoc attached to instructions. processModule will go
through all DICompileUnits in llvm.dbg.cu and list debug info MDNodes
used by the CUs.

TODO:
1> Finder has a list of CUs, SPs, Types, Scopes and global variables. We
need to add a list of variables that are used by DbgDeclareInst and
DbgValueInst.
2> MDString fields should be null or isa<MDString> and MDNode fields should be
null or isa<MDNode>. We currently use empty string or int 0 to represent null.
3> Go though Verify functions and make sure that they check field types.
4> Clean up existing testing cases to remove llvm.dbg.sp and make sure each
testing case has a llvm.dbg.cu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187609 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 20:52:39 +00:00
David Blaikie
c8b93557da DebugInfo: Emit definitions for types with no members.
The absence of members was a poor/incorrect proxy for "is definition".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187607 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 20:30:22 +00:00
Carlo Kok
70cf72e092 change the inlinefnlocalvar testcase so it uses a triple that's not coff (doesn't seem to matter for the testcase itself, what it tests isn't triple specific), as coff has a slightly different way of emitting what it checks for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187604 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 20:17:37 +00:00
Bob Wilson
c8c344b26e Temporarily xfail a test that breaks on OS X when building with LTO.
This is another case where internalize hides a symbol that is needed by
a loadable module.  I am currently investigating a proper fix but this patch
will get our buildbot to pass in the meantime. <rdar://problem/14578094>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187601 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 19:29:26 +00:00
Carlo Kok
5b25082ddb Bugfix for making the DWARF debug strings and labels to code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB.
fixes Bug 16249 - LLVM generates broken debug info on Windows 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187597 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 18:38:14 +00:00
Tom Stellard
692ee102eb R600: Add 64-bit float load/store support
* Added R600_Reg64 class
* Added T#Index#.XY registers definition
* Added v2i32 register reads from parameter and global space
* Added f32 and i32 elements extraction from v2f32 and v2i32
* Added v2i32 -> v2f32 conversions

Tom Stellard:
  - Mark vec2 operations as expand.  The addition of a vec2 register
    class made them all legal.

Patch by: Dmitry Cherkassov

Signed-off-by: Dmitry Cherkassov <dcherkassov@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187582 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 15:23:42 +00:00
Tom Stellard
98b357e1cd R600: Use 64-bit alignment for 64-bit kernel arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187581 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 15:23:31 +00:00
Tom Stellard
8cd70d3a5b R600/SI: Custom lower i64 ZERO_EXTEND
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187580 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 15:23:26 +00:00
Elena Demikhovsky
0780179d53 EVEX and compressed displacement encoding for AVX512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187576 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 13:34:06 +00:00
Richard Sandiford
8f0ad5ae8f [SystemZ] Reuse CC results for integer comparisons with zero
This also fixes a bug in the predication of LR to LOCR: I'd forgotten
that with these in-place instruction builds, the implicit operands need
to be added manually.  I think this was latent until now, but is tested
by int-cmp-45.c.  It also adds a CC valid mask to STOC, again tested by
int-cmp-45.c.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187573 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 10:39:40 +00:00
Richard Sandiford
3237f88882 [SystemZ] Prefer comparisons with zero
Convert >= 1 to > 0, etc.  Using comparison with zero isn't a win on its own,
but it exposes more opportunities for CC reuse (the next patch).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187571 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 10:29:45 +00:00
Vladimir Medic
a701de8d24 Add tests for Mips DSP instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187570 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 09:35:25 +00:00
Tim Northover
87773c318f AArch64: add initial NEON support
Patch by Ana Pazos.

- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise

- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic

- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same

- Intial implementation of instruction class:
Scalar Arithmetic

- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.

- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 09:20:35 +00:00
Robert Lytton
dd1cfe2129 XCore target: Fix Vararg handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187565 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 08:29:44 +00:00
Robert Lytton
f2617291e3 XCore target: Add byval handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187563 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 08:18:55 +00:00
Robert Lytton
98369fb0e7 Xcore target
Fix emitArrayBound() calling OutStreamer.Emit*() multiple times when trying to print a single line

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187562 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 07:52:05 +00:00
Reed Kotler
f71698747e Fix some misc. issues with Mips16 fp stubs.
1) They should never be inlined.
2) A naming inconsistency with gcc mips16
3) Stubs should not have the global attribute



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187555 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 02:26:31 +00:00
Kevin Enderby
e38070fc32 Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.
While the .td entry is nice and all, it takes a pretty gross hack in
ARMAsmParser::ParseInstruction() because of handling of other "subs"
instructions to get it to match.  Ran it by Jim Grosbach and he said it was
about what he expected to make this work given the existing code.

rdar://14214063


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187530 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 21:05:30 +00:00
Tom Stellard
6b3f6a744a Revert "R600: Non vector only instruction can be scheduled on trans unit"
This reverts commit 98ce62780e.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187526 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 20:43:27 +00:00
Vincent Lejeune
8e37705a73 R600: Avoid more than 4 literals in the same instruction group at scheduling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187515 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 19:32:07 +00:00
Vincent Lejeune
98ce62780e R600: Non vector only instruction can be scheduled on trans unit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187514 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 19:31:56 +00:00
Matt Arsenault
16e4ed5879 Reject bitcasts between address spaces with different sizes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187506 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 17:49:08 +00:00
Richard Sandiford
04ded924f3 [SystemZ] Implement isLegalAddressingMode()
The loop optimizers were assuming that scales > 1 were OK.  I think this
is actually a bug in TargetLoweringBase::isLegalAddressingMode(),
since it seems to be trying to reject anything that isn't r+i or r+r,
but it has no default case for scales other than 0, 1 or 2.  Implementing
the hook for z means that z can no longer test any change there though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187497 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 12:58:26 +00:00
Richard Sandiford
15715fb689 [SystemZ] Be more careful about inverting CC masks (conditional loads)
Extend r187495 to conditional loads.  I split this out because the
easiest way seemed to be to force a particular operand order in
SystemZISelDAGToDAG.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187496 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 12:38:08 +00:00
Richard Sandiford
6824f127f9 [SystemZ] Be more careful about inverting CC masks
System z branches have a mask to select which of the 4 CC values should
cause the branch to be taken.  We can invert a branch by inverting the mask.
However, not all instructions can produce all 4 CC values, so inverting
the branch like this can lead to some oddities.  For example, integer
comparisons only produce a CC of 0 (equal), 1 (less) or 2 (greater).
If an integer EQ is reversed to NE before instruction selection,
the branch will test for 1 or 2.  If instead the branch is reversed
after instruction selection (by inverting the mask), it will test for
1, 2 or 3.  Both are correct, but the second isn't really canonical.
This patch therefore keeps track of which CC values are possible
and uses this when inverting a mask.

Although this is mostly cosmestic, it fixes undefined behavior
for the CIJNLH in branch-08.ll.  Another fix would have been
to mask out bit 0 when generating the fused compare and branch,
but the point of this patch is that we shouldn't need to do that
in the first place.

The patch also makes it easier to reuse CC results from other instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187495 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 12:30:20 +00:00
Richard Sandiford
0416e3c599 [SystemZ] Move compare-and-branch generation even later
r187116 moved compare-and-branch generation from the instruction-selection
pass to the peephole optimizer (via optimizeCompare).  It turns out that even
this is a bit too early.  Fused compare-and-branch instructions don't
interact well with predication, where a CC result is needed.  They also
make it harder to reuse the CC side-effects of earlier instructions
(not yet implemented, but the subject of a later patch).

Another problem was that the AnalyzeBranch family of routines weren't
handling compares and branches, so we weren't able to reverse the fused
form in cases where we would reverse a separate branch.  This could have
been fixed by extending AnalyzeBranch, but given the other problems,
I've instead moved the fusing to the long-branch pass, which is also
responsible for the opposite transformation: splitting out-of-range
compares and branches into separate compares and long branches.

I've added a test for the AnalyzeBranch problem.  A test for the
predication problem is included in the next patch, which fixes a bug
in the choice of CC mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187494 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 12:11:07 +00:00
Richard Sandiford
b3f912b510 [SystemZ] Postpone NI->RISBG conversion to convertToThreeAddress()
r186399 aggressively used the RISBG instruction for immediate ANDs,
both because it can handle some values that AND IMMEDIATE can't,
and because it allows the destination register to be different from
the source.  I realized later while implementing the distinct-ops
support that it would be better to leave the choice up to
convertToThreeAddress() instead.  The AND IMMEDIATE form is shorter
and is less likely to be cracked.

This is a problem for 32-bit ANDs because we assume that all 32-bit
operations will leave the high word untouched, whereas RISBG used in
this way will either clear the high word or copy it from the source
register.  The patch uses the z196 instruction RISBLG for this instead.

This means that z10 will be restricted to NILL, NILH and NILF for
32-bit ANDs, but I think that should be OK for now.  Although we're
using z10 as the base architecture, the optimization work is going
to be focused more on z196 and zEC12.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187492 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 11:36:35 +00:00
Elena Demikhovsky
8395251c0a Added INSERT and EXTRACT intructions from AVX-512 ISA.
All insertf*/extractf* functions replaced with insert/extract since we have insertf and inserti forms.
Added lowering for INSERT_VECTOR_ELT / EXTRACT_VECTOR_ELT for 512-bit vectors.
Added lowering for EXTRACT/INSERT subvector for 512-bit vectors.
Added a test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187491 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 11:35:14 +00:00
Richard Sandiford
f3068d02e5 [SystemZ] Add RISBLG and RISBHG instruction definitions
The next patch will make use of RISBLG for codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187490 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 11:17:35 +00:00
Craig Topper
418eb3df74 Changed register names (and pointer keywords) to be lower case when using Intel X86 assembler syntax.
Patch by Richard Mitton.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187476 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 02:47:52 +00:00
Owen Anderson
605b3427a9 Preserve fast-math flags when folding (fsub x, (fneg y)) to (fadd x, y).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187462 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 23:53:17 +00:00
David Majnemer
36850ad779 isKnownToBeAPowerOfTwo: Strengthen isKnownToBeAPowerOfTwo's analysis on add instructions
Call into ComputeMaskedBits to figure out which bits are set on both add
operands and determine if the value is a power-of-two-or-zero or not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 21:01:36 +00:00
Matt Arsenault
f34dc428fa Change behavior of calling bitcasted alias functions.
It will now only convert the arguments / return value and call
the underlying function if the types are able to be bitcasted.
This avoids using fp<->int conversions that would occur before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:45:05 +00:00
Andrew Trick
e4049f66a4 This test may have been sensitive to the ARM ABI...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187442 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:34:59 +00:00
Andrew Trick
1e46fcd989 MI Sched fix: assert "Disconnected LRG within the scheduling region."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187435 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 19:59:08 +00:00
Tom Stellard
e3d60ac334 R600/SI: Expand vector fp <-> int conversions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187421 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 14:31:03 +00:00
Vladimir Medic
b67775df0c This patch implements parsing of mips FCC register operands. The example instructions have been added to test files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187410 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 10:12:14 +00:00
Saleem Abdulrasool
f7f22a64df [ARM] check bitwidth in PerformORCombine
When simplifying a (or (and B A) (and C ~A)) to a (VBSL A B C) ensure that the
bitwidth of the second operands to both ands match before comparing the negation
of the values.

Split the check of the value of the second operands to the ands.  Move the cast
and variable declaration slightly higher to make it slightly easier to follow.

Bug-Id: 16700
Signed-off-by: Saleem Abdulrasool <compnerd@compnerd.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187404 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 04:43:08 +00:00
Quentin Colombet
15d1b85094 [R600] Replicate old DAGCombiner behavior in target specific DAG combine.
build_vector is lowered to REG_SEQUENCE, which is something the register
allocator does a good job at optimizing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:27:16 +00:00
Quentin Colombet
75c9433b49 [DAGCombiner] insert_vector_elt: Avoid building a vector twice.
This patch prevents the following combine when the input vector is used more
than once.
insert_vector_elt (build_vector elt0, ..., eltN), NewEltIdx, idx
=>
build_vector elt0, ..., NewEltIdx, ..., eltN 

The reasons are:
- Building a vector may be expensive, so try to reuse the existing part of a
  vector instead of creating a new one (think big vectors).
- elt0 to eltN now have two users instead of one. This may prevent some other
  optimizations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187396 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:24:09 +00:00
Eric Christopher
3466fb11b7 Move file to X86 and add a triple to fix darwin bots for now.
The problem is due to the section name being explicitly mentioned in
the IR and differing between the two platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:20:06 +00:00
Eric Christopher
86aa03d5f9 Fix a truly egregious thinko in anonymous namespace check,
update testcase to make sure we generate debug info for walrus
by adding a non-trivial constructor and verify that we don't
emit an ODR signature for the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 23:53:08 +00:00
Eric Christopher
944aa2b784 Make sure we don't emit an ODR hash for types with no name and make
sure the comments for each testcase are a bit easier to distinguish.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 23:53:05 +00:00
Eric Christopher
407ec1422a Clarify comments for types contained in anonymous namespaces and
odr hashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 23:53:01 +00:00
Manman Ren
096880b590 Debug Info: enable verifier for testing cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 20:18:19 +00:00
Nadav Rotem
1aaa5cbab9 Add the C source code to the test to make it easier to update when debug info changes.
Thanks Eric.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187368 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 18:47:36 +00:00
Nadav Rotem
79c6bee7a9 SLPVectorier: update the debug location for the new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 18:18:46 +00:00
Manman Ren
d513b4033f Debug Info: update testing cases to pass verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 18:12:58 +00:00
Nico Rieck
fdbea5107b Use proper section suffix for COFF weak symbols
32-bit symbols have "_" as global prefix, but when forming the name of
COMDAT sections this prefix is ignored. The current behavior assumes that
this prefix is always present which is not the case for 64-bit and names
are truncated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 13:58:39 +00:00
Nico Rieck
944061c4e1 Proper va_arg/va_copy lowering on win64
Win64 uses CharPtrBuiltinVaList instead of X86_64ABIBuiltinVaList like
other 64-bit targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 13:07:06 +00:00
Rafael Espindola
cf48cf23de Add support for the 's' operation to llvm-ar.
If no other operation is specified, 's' becomes an operation instead of an
modifier. The s operation just creates a symbol table. It is the same as
running ranlib.

We assume the archive was created by a sane ar (like llvm-ar or gnu ar) and
if the symbol table is present, then it is current. We use that to optimize
the most common case: a broken build system that thinks it has to run ranlib.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187353 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 12:40:31 +00:00
Nico Rieck
c63dce3c59 MC: Support larger COFF string tables
Single-slash encoded entries do not require a terminating null. This bumps
the maximum table size from ~1MB to ~9.5MB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 12:30:12 +00:00
Silviu Baranga
fd79485dfa Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patch also adds the VFP4 feature to Cortex-A15 and fixes the DontUseFusedMAC predicate so that we can still generate vmla.f32 instructions on non-darwin targets with VFP4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187349 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 09:25:50 +00:00
Nadav Rotem
3202f6cdb9 Don't vectorize when the attribute NoImplicitFloat is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187340 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 05:13:00 +00:00
Benjamin Kramer
1faea8f086 DwarfDebug: MD5 is always little endian, bswap on big endian platforms.
This makes LLVM emit the same signature regardless of host and target endianess.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187304 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 14:14:43 +00:00
Tom Stellard
20f5541e01 SimplifyCFG: Add missing tests from r187278
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187291 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 02:54:44 +00:00
Manman Ren
2d69cc4bae Debug Info Verifier: verify SPs in llvm.dbg.sp.
Also always add DIType, DISubprogram and DIGlobalVariable to the list
in DebugInfoFinder without checking them, so we can verify them later
on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187285 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 01:26:08 +00:00
Nadav Rotem
67a38a2875 SLP Vectorier: Don't vectorize really short chains because they are already handled by the SelectionDAG store-vectorizer, which does a better job in deciding when to vectorize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187267 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 23:07:55 +00:00
Nadav Rotem
a629c3a4f0 SLP Vectorizer: Disable the vectorization of non power of two chains, such as <3 x float>, because we dont have a good cost model for these types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:53:11 +00:00
Rafael Espindola
c1bb2d4325 Use pipefail when available.
This change makes test with RUN lines like
RUN: opt ... | FileCheck

fail if opt fails, even if it prints what FileCheck wants. Enabling this
found some interesting cases of broken tests that were not being noticed
because opt (or some other tool) was crashing late.

Pipefail is used when the shell supports it or when using the internal
python based tester.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187261 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:32:58 +00:00
Rafael Espindola
e7e612f22f next batch of -disable-debug-info-verifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187260 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:31:26 +00:00
Owen Anderson
0c326f07ca When InstCombine tries to fold away (fsub x, (fneg y)) into (fadd x, y), it is
also worthwhile for it to look through FP extensions and truncations, whose
application commutes with fneg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 21:40:29 +00:00
Akira Hatanaka
9758562aa7 [mips] Implement llvm.trap intrinsic.
Patch by Sasa Stankovic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187244 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:58:55 +00:00
Akira Hatanaka
407883b69b [mips] Fix FP conditional move instructions to have explicit FP condition code
register operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187242 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:51:20 +00:00
Akira Hatanaka
83d8ef133b [mips] Fix FP branch instructions to have explicit FP condition code register
operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187238 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:13:47 +00:00
Manman Ren
ce0a12399c Debug Info Verifier: enable verification of DICompileUnit.
We used to call Verify before adding DICompileUnit to the list, and now we
remove the check and always add DICompileUnit to the list in DebugInfoFinder,
so we can verify them later on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187237 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:04:30 +00:00
Akira Hatanaka
9b06dd6ca2 [mips] Print instructions "beq", "bne" and "or" using assembler pseudo
instructions "beqz", "bnez" and "move", when possible.

beq $2, $zero, $L1 => beqz $2, $L1
bne $2, $zero, $L1 => bnez $2, $L1
or  $2, $3, $zero  => move $2, $3



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 18:34:25 +00:00
Eric Christopher
2dd272f896 Move this to the X86 directory, unfortunately the hashes are not
endian independent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:35:47 +00:00
Eric Christopher
3dee575b8d Add preliminary support for hashing DIEs and breaking them into
type units.

Initially this support is used in the computation of an ODR checker
for C++. For now we're attaching it to the DIE, but in the future
it will be attached to the type unit.

This also starts breaking out types into the separation for type
units, but without actually splitting the DIEs.

In preparation for hashing the DIEs this adds a DIEString type
that contains a StringRef with the string contained at the label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187213 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:02:41 +00:00
Rafael Espindola
16a0de5b4a Next batch of -disable-debug-info-verifier.
These tests fail without it if pipefail is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187205 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 14:16:30 +00:00
Justin Holewinski
320185fa5f Add a target legalize hook for SplitVectorOperand (again)
CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.

This also adds a test case for NVPTX that depends on this custom
legalization.

Differential Revision: http://llvm-reviews.chandlerc.com/D1195

Attempt to fix the buildbots by making the X86 test I just added platform independent

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187202 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 13:28:29 +00:00
Rafael Espindola
c735c1c2ae Revert "Add a target legalize hook for SplitVectorOperand"
This reverts commit 187198. It broke the bots.

The soft float test probably needs a -triple because of name differences.
On the hard float test I am getting a "roundss $1, %xmm0, %xmm0", instead of
"vroundss $1, %xmm0, %xmm0, %xmm0".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187201 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 13:18:16 +00:00