Commit Graph

21403 Commits

Author SHA1 Message Date
Chris Lattner
abfc2a7363 Tighten up some checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24817 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 06:40:34 +00:00
Jim Laskey
bd2b621486 Fix a bug Sabre was having where the DAG root was a group. The group dominator
needed to be added to the ordering list, not the first member of the group.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24816 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 04:40:52 +00:00
Jim Laskey
9022ed955a Groups were not emitted if the dominator node and the node in the ordering list
were not the same node.  Ultimately the test was bogus.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24815 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 03:59:21 +00:00
Nate Begeman
6aa45292c6 Since extload can also be used by FP, split STDIntExtLoad into two parts,
one for use with extload, one for use with sextload and zextload, which
are integer only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24814 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:48:48 +00:00
Chris Lattner
76acc872b3 Add constant pool support, including folding into addresses.
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:37:35 +00:00
Chris Lattner
e1389ad43a Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes,
allowing us to compile this:

to this:

%G1 = external global int
%G2 = external global int
void %test() {
        %X = load int* %G1
        store int %X, int* %G2
        ret void
}

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        ld [%l0+%lo(G1)], %l0
        sethi %hi(G2), %l1
        st %l0, [%l1+%lo(G2)]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        or %g0, %lo(G1), %l1
        ld [%l1+%l0], %l0
        sethi %hi(G2), %l1
        or %g0, %lo(G2), %l2
        st %l0, [%l2+%l1]
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24812 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:27:00 +00:00
Chris Lattner
e357246c6b Add initial support for global variables, and fix a bug in addr mode selection
where we didn't select the operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:10:39 +00:00
Chris Lattner
04dd673aea Claiming that branch targets are registers is not very wholesome. Change them
to be basic blocks.  Also, add uncond branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24810 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:46:58 +00:00
Chris Lattner
456b9400dc Add unordered comparisons
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24809 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:41:39 +00:00
Chris Lattner
5b2dfc7cc1 Add patterns to the rest of the int condbranches and some of the fp branches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24808 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:38:19 +00:00
Chris Lattner
4d55aca87a Add initial conditional branch support. This doesn't actually work yet due
to a bug in the scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24807 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:20:35 +00:00
Chris Lattner
a5282d8df2 Simplify code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24806 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:03:46 +00:00
Chris Lattner
38abcb500f Eliminate CMPri, which is a synonym for SUBCCri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:52:08 +00:00
Chris Lattner
181b7a382f allow custom expansion of BR_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24804 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:46:46 +00:00
Chris Lattner
294974bd57 add fneg,fabs,fsqrt instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24803 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:20:27 +00:00
Chris Lattner
b4d5172af9 Add patterns for fround/fextend and the funny fsmuld instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24802 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:14:30 +00:00
Chris Lattner
10c6aed73c Add FP +,-,*,/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24801 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:10:46 +00:00
Chris Lattner
558bfe0cf5 Give patterns to F3_3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24800 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:05:35 +00:00
Chris Lattner
d19fc65345 Implement 64-bit add/sub, make sure to receive and return 64-bit args with
the right halves in the right regs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24799 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:55:57 +00:00
Chris Lattner
7087e57872 implement div and rem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24798 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:39:19 +00:00
Chris Lattner
ee3d5fba54 implement MULHU/MULHS for 64-bit multiplies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24797 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:30:00 +00:00
Chris Lattner
37949f5c2b Add patterns for multiply, simplify Y register handling stuff, add RDY instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24796 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:22:53 +00:00
Chris Lattner
9034b883a4 Make the addressing modes smarter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24795 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:25:27 +00:00
Chris Lattner
87a63f812c remove some unused instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24794 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:13:50 +00:00
Chris Lattner
2cfdbb2716 add andn/orn/xorn patterns. This allows us to compile this:
long %test(ubyte, short, long %X, long %Y) {
  %A = xor long %X, -1
  %B = and long %Y, %A
  ret long %B
}

to this:

test:
        save -96, %sp, %sp
        andn %i4, %i2, %i0
        andn %i5, %i3, %i1
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        xor %i2, -1, %l0
        xor %i3, -1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

The simpleisel emits:  :(

test:
        save -96, %sp, %sp
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l1
        xor %i2, %l0, %l0
        xor %i3, %l1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24793 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:05:49 +00:00
Chris Lattner
217aabf89e Add support for 64-bit arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24792 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:59:06 +00:00
Chris Lattner
9a60ff654a Sparc doesn't have sext_inreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24791 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:50:42 +00:00
Chris Lattner
53ec2035eb add patterns for FP stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24790 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:47:16 +00:00
Chris Lattner
d55e1ca5ef Add [reg+reg] integer stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24789 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:44:36 +00:00
Chris Lattner
d30a630636 Add store patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:42:55 +00:00
Chris Lattner
0b218434cc add truncstore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:42:29 +00:00
Chris Lattner
b575baf57d add fp load patterns, switch rest of loads and stores to use addrmodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:32:47 +00:00
Chris Lattner
1963783fab Add integer load[r+r] forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:26:45 +00:00
Chris Lattner
331355cf7d Rename load/store instructions to include an RI suffix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24784 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:18:49 +00:00
Chris Lattner
84e2abf116 Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24783 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:18:24 +00:00
Chris Lattner
bc83fd9672 Add basic addressing mode support and one load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24782 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:04:49 +00:00
Chris Lattner
4543251834 eliminate some redundancy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24781 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:47:05 +00:00
Chris Lattner
b71f9f8488 Use a combination of sethi and or to build arbitrary immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24780 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:41:43 +00:00
Chris Lattner
57dd3bc460 Use sethi to build large immediates with zeros at the bottom
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24779 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:37:00 +00:00
Chris Lattner
d2cd46676c Add shift and small immediate support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:07:57 +00:00
Chris Lattner
f83cee6ac1 Add some basic reg-reg instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24777 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 18:53:33 +00:00
Chris Lattner
e33a3ff942 Add empty patterns to all F3_1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24776 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 18:49:14 +00:00
Evan Cheng
bdce7b4090 Darwin API issue: indirect load of external and weak symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24775 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 09:13:43 +00:00
Chris Lattner
7b0902dcf8 Add some simple integer patterns. This allows us to compile this:
int %test(int %A) {
  %B = add int %A, 1
  %C = xor int %B, 123
  ret int %C
}

into this:

test:
        save -96, %sp, %sp
        add %i0, 1, %l0
        xor %l0, 123, %i0
        restore %g0, %g0, %g0
        retl
        nop

for example.  I guess it would make sense to add reg/reg versions too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24774 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:26:38 +00:00
Chris Lattner
4b4863188f Implement ret with operand, giving us this:
int %test(int %A) {
  ret int %A
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24773 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:15:09 +00:00
Chris Lattner
bc3d362d5b Add a pattern for 'ret'. This now compiles:
void %test() { ret void }

:)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24772 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:08:42 +00:00
Chris Lattner
f3bf50d2c8 Add empty patterns for F3_2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24771 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:06:43 +00:00
Chris Lattner
a01b75758c Implement LowerArguments, at least for the first 6 integer args
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24770 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:03:24 +00:00
Chris Lattner
6c18b10ad4 Add the framework for a dag-dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24769 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:47:01 +00:00
Evan Cheng
433dbdaa63 Remove a few lines of dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24768 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:18:44 +00:00