127624 Commits

Author SHA1 Message Date
David Majnemer
c1bf0b56b5 Remove unused variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260722 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 20:33:51 +00:00
Benjamin Kramer
06016cc257 Remove LLVMGetTargetMachineData leftovers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260720 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 20:26:46 +00:00
Argyrios Kyrtzidis
f365222ef2 [ADT] Revert the llvm/ADT/OptionSet.h header and unit test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260714 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 19:47:35 +00:00
Philip Reames
3d165deba8 [GVN] Common code for local and non-local load availability [NFCI]
The attached patch removes all of the block local code for performing X-load forwarding by reusing the code used in the non-local case.

The motivation here is to remove duplication and in the process increase our test coverage of some fairly tricky code. I have some upcoming changes I'll be proposing in this area and wanted to have the code cleaned up a bit first.

Note: The review for this mostly happened in email which didn't make it to phabricator on the 258882 commit thread.

Differential Revision: http://reviews.llvm.org/D16608



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260711 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 19:24:57 +00:00
Chad Rosier
90baf3317e [LIR] Partially revert r252926(NFC), which introduced a very subtle change.
In short, before r252926 we were comparing an unsigned (StoreSize) against an a
APInt (Stride), which is fine and well.  After we were zero extending the Stride
and then converting to an unsigned, which is not the same thing.  Obviously,
Stides can also be negative.  This commit just restores the original behavior.

AFAICT, it's not possible to write a test case to expose the issue because
the code already has checks to make sure the StoreSize can't overflow an
unsigned (which prevents the Stride from overflowing an unsigned as well).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260706 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 19:05:27 +00:00
Philip Reames
2f2bedcc23 [LVI] Exploit nsw/nuw when computing constant ranges
As the title says. Modelled after similar code in SCEV.

This is useful when analysing induction variables in loops which have been canonicalized by other passes. I wrote the tests as non-loops specifically to avoid the generality introduced in http://reviews.llvm.org/D17174. While that can handle many induction variables without *needing* to exploit nsw, there's no reason not to use it if we've already proven it.

Differential Revision: http://reviews.llvm.org/D17177



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260705 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 19:05:16 +00:00
Hans Wennborg
178153ae7a [CMake] don't build libLTO when LLVM_ENABLE_PIC is OFF
When cmake is run with -DLLVM_ENABLE_PIC=OFF, build fails while
linking shared library libLTO.so, because its dependencies are built
with -fno-PIC. More details here: https://llvm.org/bugs/show_bug.cgi?id=26484.
This diff reverts r252652 (git 9fd4377ddb83aee3c049dc8757e7771edbb8ee71),
which removed check NOT LLVM_ENABLE_PIC before disabling build for libLTO.so.

Patch by Igor Sugak!

Differential Revision: http://reviews.llvm.org/D17049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260703 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 19:02:39 +00:00
Mehdi Amini
32bf97b2b6 GlobalISel is always built since r260566, reflect it in LLVMBuild.txt
Other component could not depends on an optional library in llvm-config

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260701 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 18:43:14 +00:00
Mehdi Amini
1b8de27709 llvm-config: replace assertions with a helpful error message
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260700 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 18:43:10 +00:00
Krzysztof Parzyszek
d832030ace [Hexagon] Add utility functions to detect sign- and zero-extending loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260698 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 18:37:23 +00:00
Krzysztof Parzyszek
c006b1e101 [Hexagon] Replace expansion of spill pseudo-instructions in frame lowering
Rewrite the code to handle all pseudo-instructions in a single pass.

This temporarily reverts spill slot optimization that used general-
purpose registers to hold values of spilled predicate registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260696 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 18:19:53 +00:00
David Majnemer
e049aa6ae3 [InstCombine] Don't aggressively replace xor with icmp
For some cases, InstCombine replaces the sequence of xor/sub instruction
followed by cmp instruction into a single cmp instruction.

However, this replacement may result suboptimal result especially when
the xor/sub has more than one use, as discussed in
bug 26465 (https://llvm.org/bugs/show_bug.cgi?id=26465).

This patch make the replacement happen only when xor/sub has only one
use.

Differential Revision: http://reviews.llvm.org/D16915

Patch by Taewook Oh!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260695 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 18:12:38 +00:00
Tom Stellard
abf168408a [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler
Historically, AMD internal sp3 assembler has flat_store* addr, data
format. To match existing code and to enable reuse, change LLVM
definitions to match.  Also update MC and CodeGen tests.

Differential Revision: http://reviews.llvm.org/D16927

Patch by: Nikolay Haustov

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260694 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 17:57:54 +00:00
Changpeng Fang
3a0161ac77 AMDGPU/SI: Annotate Loops with Constant Condition in SIAnnotateControlFlow pass.
Summary:
  It is possible that the loop condition can be a boolean constant (infinite loop,
for example). So we sould handle constant condition in annotating a loop. This
patch adds this functionality to support annotating constant condition.

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits, arsenm

Differential Revision: http://reviews.llvm.org/D15093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260692 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 17:11:04 +00:00
Krzysztof Parzyszek
626f833ad8 [Hexagon] Remove HexagonExpandPredSpillCode pass
This code is dead. The expansion is now done in HexagonFrameLowering.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260691 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 17:09:58 +00:00
Krzysztof Parzyszek
b92f69441a [Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
We can generate the actual instructions from the intrinsics without the
need for pseudo-instructions. Also, since the intrinsics have a side-
effect in a form of a store, attempt to optimize away loads from the
store location.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260690 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 17:01:51 +00:00
Geoff Berry
83d0e325e4 [AArch64] Reduce number of callee-save save/restores.
Summary:
Before this change, callee-save registers would be rounded up to even
pairs of GPRs and FPRs.  This change eliminates these extra padding
load/stores, though it does keep the stack allocation the same size
unless both the GPR and FPR sets have an odd size, in which case one
full pair stack slot (16 bytes) is saved.

This optimization cannot currently be done for MachO targets since they
rely on a fast-path .debug_frame equivalent that can only encode
callee-save registers as pairs.

Reviewers: t.p.northover, rengolin, mcrosier, jmolloy

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17000

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260689 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 16:31:41 +00:00
Krzysztof Parzyszek
2762ff0f76 [Hexagon] Handle out-of-range offsets in eliminateFrameIndex
Create a virtual register that will hold the actual address and use it
with the offset of 0 in the place of the original FI.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260688 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 16:27:23 +00:00
Chad Rosier
1f88b2d0b7 [AArch64] Add support for Qualcomm Kryo CPU.
Machine model description by Dave Estes <cestes@codeaurora.org>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260686 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 15:51:51 +00:00
Rafael Espindola
9234391598 Delete the deprecated LLVMLinkModules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260683 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 15:28:45 +00:00
Jun Bum Lim
844cafe1c8 [AArch64] Merge two adjacent str WZR into str XZR
Summary:
This change merges adjacent 32 bit zero stores into a 64 bit zero store.
e.g.,
  str wzr, [x0]
  str wzr, [x0, #4]
becomes
  str xzr, [x0]

Therefore, four adjacent 32 bit zero stores will be a single stp.
e.g.,
  str wzr, [x0]
  str wzr, [x0, #4]
  str wzr, [x0, #8]
  str wzr, [x0, #12]
becomes
  stp xzr, xzr, [x0]

Reviewers: mcrosier, jmolloy, gberry, t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16933

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260682 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 15:25:39 +00:00
Krzysztof Parzyszek
9f34dc17fe [Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment
of the element type and the number of elements. In fact, it is the product
of these two values. The problem is that for vectors of N x i1, this will
return the alignment of N bytes, since the alignment of i1 is 8 bits. The
vector types of vNi1 should be aligned to N bits instead. Provide explicit
alignment for HVX vectors to avoid such complications.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260678 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 14:47:38 +00:00
Benjamin Kramer
ed899defb0 Fix uninitialized memory read.
Found by msan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260676 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 12:37:21 +00:00
Hrvoje Varga
a2c5fcb5e5 [mips][micromips] Written missing test for CEIL.L.S, CEIL.L.D, FLOOR.L.S and FLOOR.L.D instructions
Differential Revision: http://reviews.llvm.org/D17192


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260673 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 12:11:26 +00:00
Haojian Wu
268499a1a2 Remove LLVMGetTargetMachineData in go-binding.
Summary:
LLVMGetTargetMachineData has been removed, and LLVMGetDataLayout is
suggested to use. The LLVMGetDataLayout is exposed in go bindings.
So it's safe to remove the function.

Reviewers: bkramer

Subscribers: llvm-commits, axw

Differential Revision: http://reviews.llvm.org/D17193

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260670 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 11:35:11 +00:00
Chandler Carruth
5403bca6ae [attrs] Simplify the convergent removal to directly use the pre-built
node set rather than walking the SCC directly.

This directly exposes the functions and has already had null entries
filtered out. We also don't need need to handle optnone as it has
already been handled in the caller -- we never try to remove convergent
when there are optnone functions in the SCC.

With this change, the code for removing convergent should work with the
new pass manager and a different SCC analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260668 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 09:47:49 +00:00
Chandler Carruth
3f89873441 [attrs] Consolidate the test for a non-SCC, non-convergent function call
with the test for a non-convergent intrinsic call.

While it is possible to use the call records to search for function
calls, we're going to do an instruction scan anyways to find the
intrinsics, we can handle both cases while scanning instructions. This
will also make the logic more amenable to the new pass manager which
doesn't use the same call graph structure.

My next patch will remove use of CallGraphNode entirely and allow this
code to work with both the old and new pass manager. Fortunately, it
should also get strictly simpler without changing functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260666 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 09:23:53 +00:00
Argyrios Kyrtzidis
c305a2458d [unittests/ADT] OptionSetTest: ifdef out for now a specific test that fails on MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260663 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 07:50:01 +00:00
Matt Arsenault
c3aa2775c2 AMDGPU: Set flat_scratch from flat_scratch_init reg
This was hardcoded to the static private size, but this
would be missing the offset and additional size for someday
when we have dynamic sizing.

Also stops always initializing flat_scratch even when unused.

In the future we should stop emitting this unless flat instructions
are used to access private memory. For example this will initialize
it almost always on VI because flat is used for global access.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260658 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 06:31:30 +00:00
Mehdi Amini
0090eb9d61 C API: Remove LLVMGetDataLayout that was deprecated in 3.7
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260657 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 06:22:00 +00:00
Mark Lacey
0ff839adc1 Fix minor error with debug info doc.
Replace 'third' with 'fourth' in the description of the fourth argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260656 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 06:19:16 +00:00
Argyrios Kyrtzidis
6ca1d413cb [unittests/ADT] OptionSetTest: ifdef out a part that fails to compile on MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260655 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 05:52:37 +00:00
Argyrios Kyrtzidis
382c6490fe [ADT] OptionSet: ifdef out some code that seems to be crashing MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260654 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 04:36:48 +00:00
Chandler Carruth
5dce6a869b [attrs] Run clang-format over a newly added routine in function-attrs
before I update it to be friendly with the new pass manager.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260653 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 03:07:50 +00:00
Argyrios Kyrtzidis
ac79468ce8 [ADT] Introduce ‘OptionSet’ in llvm/ADT headers, which is a utility class that makes it convenient to work with enumerators representing bit options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260652 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 02:48:26 +00:00
Matt Arsenault
e3601c75c9 AMDGPU: Set element_size in private resource descriptor
Introduce a subtarget feature for this, and leave the default with
the current behavior which assumes up to 16-byte loads/stores can
be used. The field also seems to have the ability to be set to 2 bytes,
but I'm not sure what that would be used for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260651 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 02:40:47 +00:00
Kostya Serebryany
14c6007ab2 [libFuzzer] make -runs=N flag also affect the simple runner (will execute every input N times)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260649 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 02:32:03 +00:00
Matt Arsenault
197cdba264 AMDGPU: Fix mishandling alignment when scalarizing vector loads/stores
I don't think this was causing any real problems, so I'm not sure
how to test for this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260646 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 02:22:21 +00:00
Matt Arsenault
85b3e06674 AMDGPU: Initialize SILowerControlFlow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260645 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 02:16:10 +00:00
Matt Arsenault
cf344bf8c1 AMDGPU: Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260644 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 02:16:07 +00:00
Andrew Wilkins
724b31e65d Avoid linking LLVM component libraries with libLLVM
Patch by Jack Howarth.

When linking to libLLVM, don't also link to the component
libraries that constitute libLLVM.

Differential Revision: http://reviews.llvm.org/D16945



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260641 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 01:42:43 +00:00
Evgeniy Stepanov
84dedd3a11 [msan] Put msan constructor in a comdat.
MSan adds a constructor to each translation unit that calls
__msan_init, and does nothing else. The idea is to run __msan_init
before any instrumented code. This results in multiple constructors
and multiple .init_array entries in the final binary, one per
translation unit. This is absolutely unnecessary; one would be
enough.

This change moves the constructors to a comdat group in order to drop
the extra ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260632 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 00:37:52 +00:00
Mike Aizatsky
4c8093a71a [sancov] improved object files handling.
Multi-dso programs result in multiple coverage files dumped of the form
'<module_name>.<pid>.sancov'. When analyzing these coverage files it is
important to use correct corresponding object file.

This change removes the "-obj" sancov flag and lets user specify object
file names alongside coverage files. Sancov tool would match them using
<module_name> part of coverage file and short file name of the object
file.

Corresponding changes:
- compiler-rt: http://reviews.llvm.org/D17171
- docs: http://reviews.llvm.org/D17175

Differential Revision: http://reviews.llvm.org/D17169

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260628 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 00:29:07 +00:00
Philip Reames
29f3f95d1e [LVI] Improve select handling to use condition
This patches teaches LVI to recognize clamp idioms (e.g. select(a > 5, a, 5) will always produce something greater than 5.

The tests end up being somewhat simplistic because trying to exercise the case I actually care about (a loop with a range check on a clamped secondary induction variable) ends up tripping across a couple of other imprecisions in the analysis. Ah, the joys of LVI...

Differential Revision: http://reviews.llvm.org/D16827



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260627 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 00:09:18 +00:00
Nicolai Haehnle
e22674efca AMDGPU: Quick fix for extreme slowness in spill-scavenge-offset.ll test
Summary: Also, some cosmetic fixes.

Reviewers: arsenm, tstellarAMD

Subscribers: qcolombet, llvm-commits

Differential Revision: http://reviews.llvm.org/D17161

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260625 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-12 00:05:34 +00:00
NAKAMURA Takumi
2b8ce6721c llvm/test/CodeGen/NVPTX/debug-file-loc.ll: Tweak expressions for dos path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260623 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-11 23:59:43 +00:00
Tim Northover
aee93e78d1 ARMv7k: use Cortex-A7 by default even for tvOS
Also actually test the default CPU from those triples.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260621 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-11 23:49:08 +00:00
Reid Kleckner
f7640fe2c1 [codeview] Dump def range lengths in hex
It makes it easier to correlate with assembly dumps, which are typically
given with hex offsets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260619 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-11 23:40:14 +00:00
Matthew Simpson
267497cc5c [SLP] Add debug output for extract cost (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260614 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-11 23:06:40 +00:00
Quentin Colombet
e5eb067cda Re-apply r238452, the bug was in clang and was fixed in r260567.
Original commit message:
[InstCombine] Fold IntToPtr and PtrToInt into preceding loads.

Currently we only fold a BitCast into a Load when the BitCast is its
only user.

Do the same for any no-op cast.

Patch by Philip Pfaffe!

Differential Revision: http://reviews.llvm.org/D9152


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260612 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-11 22:30:41 +00:00