Commit Graph

147113 Commits

Author SHA1 Message Date
Caio Oliveira
015383d1d7 gtest: Add mesa-gtest-extras.h with array ASSERT/EXPECT macros
There are no similar macros in gtest.  They do recommend pulling
another library (gmock) and use that, but having our own let us
control the output more precisely.  Extracted the code from a similar
existing macro in blob_test.cpp, making changes to the output.

A check like

   ASSERT_U8_ARRAY_EQUAL(expected_u8, result_u8, 32);

that fails will output

```
Expected 32 values to be equal but found 1 that differ:

expected_u8 values are:

  [000]  29  44  00  00  44  60  cb  80  93  65  07  c0  08  00  40  29
  [016]  03  81  00  00  5c  a0  21  87 *b0  31  00  00  00  00  00  60

result_u8 values are:

  [000]  29  44  00  00  44  60  cb  80  93  65  07  c0  08  00  40  29
  [016]  03  81  00  00  5c  a0  21  87 *af  31  00  00  00  00  00  60
```

and a check like

   ASSERT_U64_ARRAY_EQUAL(expected_u64, result_u64, 4);

```
Expected 4 values to be equal but found 1 that differ:

expected_u64 values are:

  [000]  80cb604400004429  29400008c0076593
  [002]  8721a05c00008103 *60000000000031b0

result_u64 values are:

  [000]  80cb604400004429  29400008c0076593
  [002]  8721a05c00008103 *60000000000031af
```

Note the asterisk indicating wrong values.

The new header for extra macros is in src/gtest/include/ so it
doesn't get in the way when updating the real gtest headers that are
in src/gtest/include/gtest/.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13672>
2021-11-08 17:42:18 +00:00
Pierre-Eric Pelloux-Prayer
5358d8a110 radeonsi/sqtt: reserve a vmid when sqtt is enabled
Based on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13695

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13696>
2021-11-08 17:16:11 +00:00
Pierre-Eric Pelloux-Prayer
e26dd92957 radeonsi/sqtt: fix FINISH_DONE / BUSY usage
They're using more than a single bit so use the proper mask.

Based on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13694

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13696>
2021-11-08 17:16:11 +00:00
Pierre-Eric Pelloux-Prayer
3de072aaec radeonsi/sqtt: fix shader stage values
shader_stages_mask and others expect MESA_SHADER_* based values,
not PIPE_SHADER_*...

Without this the fragment shader wouldn't appear in the "Pipelines"
pane of RGP.

Fixes: c276bde34a ("radeonsi/sqtt: export shader code to RGP")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13696>
2021-11-08 17:16:11 +00:00
Lionel Landwerlin
c572adceaa intel/dev: also test crocus & i915 pci-ids
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>
2021-11-08 16:48:06 +00:00
Lionel Landwerlin
361b3fee3c intel: move away from booleans to identify platforms
v2: Drop changes around GFX_VERx10 == 75 (Luis)

v3: Replace
   (GFX_VERx10 < 75 && devinfo->platform != INTEL_PLATFORM_BYT)
   by
   (devinfo->platform == INTEL_PLATFORM_IVB)
   Replace
   (devinfo->ver >= 5 || devinfo->platform == INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 >= 45)
   Replace
   (devinfo->platform != INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 != 45)

v4: Fix crocus typo

v5: Rebase

v6: Add GFX3, ILK & I965 platforms (Jordan)
    Move ifdef to code expressions (Jordan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>
2021-11-08 16:48:06 +00:00
Lionel Landwerlin
3b1a5b8f2b intel: remove 2 preproduction pci-id for ADLS
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d399c3e861 ("intel/dev: Add device info for ADL-S")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13476>
2021-11-08 16:09:55 +00:00
Filip Gawin
f32dcb6fe1 nir: assert that variables in optimize_atomic are initialized
If you gonna view context of function parse_atomic_op,
then you gonna know that index for array (data_src)
can be unitialized. Imho this approach is cleaner
than doing stuff inside parse_atomic_op.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12995>
2021-11-08 15:10:07 +00:00
Mike Blumenkrantz
fbd61d2b02 zink: set new point/line caps
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Marek Olšák
8bbebc7e9f st/mesa: use new point and line CAPs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Marek Olšák
78337728d1 radeonsi: set correct point and line limits
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Marek Olšák
cf9afc7b0c gallium: add missing point and line CAPs
The returned values are the same as the GL frontend.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Marek Olšák
b80dca86c3 gallium: rename PIPE_CAPF_MAX_POINT_WIDTH -> MAX_POINT_SIZE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Marek Olšák
10ee261c38 driconf: disallow 10-bit pbuffers for viewperf2020/maya due to X errors
Cc: 21.2 21.3 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13472>
2021-11-08 14:00:45 +00:00
Daniel Stone
f8ea4c9e1d Revert "CI: Disable Windows jobs"
They're fixed now, just in time.

This reverts commit 7b44e7d7bb.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13708>
2021-11-08 13:08:48 +00:00
Daniel Stone
7b44e7d7bb CI: Disable Windows jobs
The runner is broken, perhaps after an upgrade.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13707>
2021-11-08 12:29:14 +00:00
Mike Blumenkrantz
c4d904101c aux/trace: add pipe_context::render_condition_mem
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>
2021-11-05 14:37:25 -04:00
Mike Blumenkrantz
f579401099 aux/trace: fix vertex state tracing
Fixes: e8cad57aa7 ("gallium/trace: add pipe_vertex_state support")

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>
2021-11-05 14:37:25 -04:00
Mike Blumenkrantz
810305fbed aux/trace: trace pipe_screen::is_format_supported better
storage_sample_count is important

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>
2021-11-05 14:37:25 -04:00
Mike Blumenkrantz
d2f3aba5f0 aux/trace: support pipe_context::get_query_result_resource
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>
2021-11-05 14:37:24 -04:00
Mike Blumenkrantz
58ba18474b aux/trace: fix PIPE_QUERY_PIPELINE_STATISTICS_SINGLE tracing
don't just crash, dump!

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>
2021-11-05 14:36:54 -04:00
Kostiantyn Lazukin
78b613db23 util/u_trace: Replace Flag with IntEnum to support python3.5
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5586

Fixes: cefaa73909

Signed-off-by: Kostiantyn Lazukin <kostiantyn.lazukin@globallogic.com>

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13643>
2021-11-05 11:54:30 +00:00
Lionel Landwerlin
349bfb7275 intel/devinfo: fix wrong offset computation
A bit difficult to find what commit introduced the issue because of
all the renaming, but it was my bug :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
2021-11-05 10:22:18 +00:00
Lionel Landwerlin
718c97d525 intel/devinfo: use compatible type for ARRAY_SIZE
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
2021-11-05 10:22:18 +00:00
Lionel Landwerlin
67619d8153 intel/perf: fix perf equation subslice mask generation for gfx12+
v2: Fix comment change (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
2021-11-05 10:22:18 +00:00
Lionel Landwerlin
a543a94404 intel/dev: fix subslice/eu total computations with some fused configurations
When a device has its first slice/subslice fused off, we can't use the
number of slices/subslices to iterate the mask array.

v2: Fix spelling (Marcin)
    Use size_t for iterator (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Matt Roper <matthew.d.roper@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5601
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
2021-11-05 10:22:18 +00:00
Lionel Landwerlin
e10c641f00 intel/dev: reuse internal functions to set mask
Rather than having 2 paths to set the slice/subslice/eu masks, reuse
the other internal functions. This simplifies finding bugs within this
code :

  * If we have i915 query topology support, update_from_topology() is
    called.

  * If we don't have query topology support but we have getparam for
    slice/subslice/EU, we generate a topology data and call
    update_from_topology()

  * If we have no kernel support to query any kind of topology, we
    generate the values return by the kernel for slice/subslice/EU and
    call update_from_masks() which in turns calls
    update_from_topology()

v2: Fixup typo (Adam)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
2021-11-05 10:22:18 +00:00
Lionel Landwerlin
d7c6a90c26 intel/dev: don't forget to set max_eu_per_subslice in generated topology
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
2021-11-05 10:22:18 +00:00
Lionel Landwerlin
d1db5d562a intel/dev: fix HSW GT3 number of subslices in slice1
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
2021-11-05 10:22:18 +00:00
Rhys Perry
12294026d5 nir/algebraic: optimize Cyberpunk 2077's open-coded bitfieldReverse()
fossil-db (Sienna Cichlid):
Totals from 9 (0.01% of 128647) affected shaders:
CodeSize: 29900 -> 28640 (-4.21%)
Instrs: 5677 -> 5443 (-4.12%)
Latency: 96561 -> 95025 (-1.59%)
Copies: 571 -> 544 (-4.73%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13673>
2021-11-05 09:31:04 +00:00
Pierre-Eric Pelloux-Prayer
9b8bc712b2 mesa: remove NEW_COPY_TEX_STATE
Since _NEW_PIXEL isn't handled in _mesa_update_state anymore, we can
replace NEW_COPY_TEX_STATE by _NEW_BUFFERS.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13596>
2021-11-05 10:03:04 +01:00
Pierre-Eric Pelloux-Prayer
1ee3fbd703 mesa: always call _mesa_update_pixel
10c75ae4 moved handling of this state to the functions that
depend on ctx->_ImageTransferState.

So we can't depend on _NEW_PIXEL being set to call this function,
since it'll be always clear earlier by _mesa_update_state_locked.

Example sequence that would trigger the issue:
  glPixelTransferi(...)
  glClear(...)
  glTexSubImage2D(...) <-- won't use the new value set by
                           glPixelTransferi because glClear caused
                           _NEW_PIXEL to be cleared.

_NEW_PIXEL itself is kept because st_update_pixel_transfer depends
on it.

Fixes: 10c75ae4 ("mesa: move _mesa_update_pixel out of _mesa_update_state")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5273
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13596>
2021-11-05 10:02:59 +01:00
Samuel Pitoiset
6b002d2549 Revert "radv: only enable VK_EXT_display_control for vrcompositor (SteamVR)"
It's fixed now.

This reverts commit db7ad0c170.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13682>
2021-11-05 08:27:54 +01:00
orbea
0a6f079afe build: add sha1_h for lp_texture.c
../mesa-9999/src/gallium/drivers/llvmpipe/lp_texture.c:55:10: fatal error: git_sha1.h: No such file or directory

Fixes: 1608a815e3 ("llvmpipe: add support for EXT_memory_object(_fd)")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: orbea <orbea@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13665>
2021-11-05 05:54:20 +00:00
Jordan Justen
6ffdcc335e iris: Use mi_builder in iris_load_indirect_location()
For example, this allows us to take advantage of command-streamer
based register offsets in mi_builder.

Ref: 06cf838cbd ("intel/mi_builder: Support gen11 command-streamer based register offsets")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13652>
2021-11-04 21:23:21 -07:00
Mike Blumenkrantz
833c0394e0 Revert "gallium/u_blitter: work around broken sample shading in llvmpipe and zink"
This reverts commit 8b287c3f92.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13679>
2021-11-05 02:36:32 +00:00
Mike Blumenkrantz
60a8d68285 gallivm: handle TGSI SampleId sysval
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13679>
2021-11-05 02:36:32 +00:00
Mike Blumenkrantz
64cee33984 lavapipe: add some asserts for descriptor dynamic offsets
ensure that this explodes if there aren't enough offsets

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13677>
2021-11-05 02:21:01 +00:00
Mike Blumenkrantz
8c37cd8860 zink: rework cached fbfetch descriptor fallback
this ended up being a little trickier than I thought; lazy
descriptors don't use dynamic ubo types for the push set,
which means drivers that (correctly) assert dynamic offset existence
explode because the descriptor template will never work with the
push set

the better, though slightly more annoying, option here is to use the
lazy manager's faster descriptor allocation and lesser complexity to
quickly grab a push set, then tweak the existing cached codepath slightly
in order to update a raw vkdescriptorset

Fixes: 417477f60e ("zink: always use lazy (non-push) updating for fbfetch descriptors")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13677>
2021-11-05 02:21:01 +00:00
Jesse Natalie
2d1f5e3dcb d3d12: Don't accumulate timestamp queries
If an app re-issues a timestamp query a lot, but doesn't ever ask
for the results, we could end up running off the end of our query
heap. But we don't actually need to advance/accumulate, so just
use a single entry in the heap.

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12920>
2021-11-05 00:44:15 +00:00
Emma Anholt
34739cb6e2 freedreno/ir3: Fix off-by-one in prefetch safety assert.
This looks like just a typo, we allow up to == 0xf in the lowering pass.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Emma Anholt
b0f2b0e980 freedreno/a5xx: Clean up a little bit of blitter array pitch setup.
We have a nice helper function for determining an array pitch.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Emma Anholt
b26e0cdf44 freedreno/a5xx: Try to fix drawing to z/s miplevel/layer offsets.
Terrifyingly, no testcases are fixed by this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Emma Anholt
99f5b7ba1e freedreno/a5xx: Remove bogus assertion about BO size.
The slice->size0 temp is being used as both the array stride (incorrectly)
and as the size of the slice (for this assert).  This assert doesn't seem
to be in the right place to me, if you want to check that offset+slice
size is < bo size, you could just do that at the end of layout setup.

This caused troubles when fixing the temp to be the actual array stride
for filling out the HW state, since then rendering to nonzero levels would
think that the rendering overflowed the BO when it doesn't.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Emma Anholt
03d8677bca freedreno/a6xx: Try to fix drawing to z/s miplevel/layer offsets.
Terrifyingly, no testcases are fixed by this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Emma Anholt
35f56ad856 freedreno/a5xx: Diff reduction in fd5_layout to fd6_layout.
This should be exactly equivalent code, except for the is_3d "level <= 1"
which doesn't bring over 6c19d37331 ("freedreno/a6xx: fix 3d tex
layout") due to it failing our unit tests where we compare to the blob's
behavior.  The layer_stride setup is pulling in what freedreno_resource.c
was doing after the layout setup, so we match fd6 and so that it could
potentially be checked in unit testing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Caio Oliveira
8fc6a11f0e intel/blorp: Add option to emit packets that disable Mesh
If a driver doesn't support Mesh, don't emit anything.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13660>
2021-11-04 14:41:06 -07:00
Caio Oliveira
ecba8178bd intel/dev: Add an intel_device_info::has_mesh_shading bit
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13660>
2021-11-04 14:41:06 -07:00
Marcin Ślusarz
bba26939b1 intel/decoder: Dump Task/Mesh shaders
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13657>
2021-11-04 21:01:13 +00:00
Caio Oliveira
3567d47f3e intel/genxml: Inline the BODY structs into the instructions
Follows the convention used in other instructions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13657>
2021-11-04 21:01:13 +00:00