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563 Commits

Author SHA1 Message Date
Sacha
5a134243a7 Armjit: Fix lwl, lwr and enable again. Thanks Sonic. 2013-03-06 03:28:28 +10:00
Sacha
7e67de3334 Armjit: Implement lwl, lwr, swl, swr in ARM JIT. lwr is currently disabled as it isn't working. 2013-03-06 02:11:36 +10:00
Sacha
9152d2f2bb Armjit: Optimise swl+swr and lwl+lwr cases that can be combined to a single sw or lw. Add shift flags to STR/LDR. Add EatInstruction to ArmJit. 2013-03-06 02:11:36 +10:00
Sacha
33c6df55db Build fix 2013-03-05 15:20:14 +10:00
Sacha
65a83d70c7 Armjit: Implement clo as well. Fix up the reg usage in div/divu comment. 2013-03-05 15:14:22 +10:00
Sacha
60b84e71d5 Armjit: Re-enable reg shifts. Thanks [Unknown] for finding the issue. 2013-03-05 14:55:33 +10:00
Sacha
4641cf376f Armjit: Implement CLZ instruction. Disable reg shifts for now (breaks Wipeout Pure). 2013-03-05 14:16:35 +10:00
Sacha
4a56ebd0a0 Armjit: Add sllv, srlv, srav instructions (reg shift). 2013-03-05 13:52:03 +10:00
Sacha
10ad797c6d Armjit stubs. 
Add a double encoding for VCVT. Implement integer divide (but not working yet). Stubs for msub/msubu. Don't detect vfpv3 on Symbian.
 2013-03-05 13:16:08 +10:00
Henrik Rydgard
3714eebbbe Actually register scePspNpDrm_user 2013-03-04 23:54:03 +01:00
Henrik Rydgard
062c975b46 Ignore cache function 24. 2013-03-04 23:51:19 +01:00
Sacha
d5feb4d3ff Quick build fix 2013-03-05 03:13:33 +10:00
Sacha
1089a31a45 Armjit: add reverse bit instruction. 2013-03-05 02:58:51 +10:00
Sacha
bce3295950 Fix graphical issues. DISABLE INS instruction for now. Fix OR (it was doing AND). 2013-03-04 22:09:45 +10:00
Unknown W. Brackets
f4bde1a263 Android / iOS buildfix. 2013-03-04 00:09:37 -08:00
Unknown W. Brackets
ac1209204c Add some reporting for CPU related stuff. 2013-03-04 00:01:41 -08:00
Sacha
0fc6b60874 Fix Lit Pools for cases where offset goes out of range. For example: Zero no Kiseki has a block that is 7K large. 2013-03-04 14:36:23 +10:00
Sacha
9633239f18 Update for lit pools. Works in some games now thanks to [Unknown]. 2013-03-04 14:29:17 +10:00
Sacha
bdfe24a86b ARMv6 literal pool method. 2013-03-04 14:26:45 +10:00
Henrik Rydgard
165cfe53a3 Quick ins bugfix 2013-03-04 00:06:33 +01:00
Henrik Rydgard
7dc75d87b5 armjit: Re-enable ext/ins, safer implementation. arm7 path disabled for now. 2013-03-03 23:17:21 +01:00
Henrik Rydgard
1cddc86e05 armjit: Temporarily disable ext/ins as they appear to have broken Persona 3 somehow. 2013-03-03 22:26:20 +01:00
Henrik Rydgard
1e3a00ee9d armjit: implement vzero, vone. Use vmla for dot product. 2013-03-03 20:56:22 +01:00
Henrik Rydgard
650c02c3a5 Some more armjit work (ext, ins) and VFPU prefix clamps (not enabled) 2013-03-03 17:36:22 +01:00
Henrik Rydgard
3c640a0f1e armjit: seb and seh instructions 2013-03-03 15:29:13 +01:00
Henrik Rydgard
bc15617392 Make un-buffered rendering much smarter, removing flicker. 
This turns it into a very viable option for many games. You do lose some FX
but it can as a result even be used as a workaround for the massive glow
in Wipeout...
 2013-03-03 13:00:21 +01:00
Unknown W. Brackets
ab05149dbf Add a few more CONDITIONAL_DISABLEs. 2013-03-03 01:44:33 -08:00
Unknown W. Brackets
d647816d10 Add CONDITIONAL_DISABLE to all armjit funcs. 2013-03-03 01:40:55 -08:00
Unknown W. Brackets
a3f93ed203 Fix some printf size warnings, signed warnings. 2013-03-02 15:34:15 -08:00
Sacha
f8d7c024e5 Fix for 'sf' 2013-03-03 06:53:39 +10:00
Henrik Rydgård
3ec581b624 Merge pull request #838 from xsacha/master 
Armjit update
 2013-03-02 12:46:46 -08:00
Sacha
2d5783eb7f ARMJIT: Compare functions are now jitted. 2013-03-03 06:45:21 +10:00
Unknown W. Brackets
a2aa5fe23e Fix iOS / debug ARM build. 2013-03-02 11:27:11 -08:00
Henrik Rydgard
f5581caccc Some work on ARMJIT FPU compares, still not quite working. 2013-03-02 19:09:24 +01:00
Sacha
6c23e1b6d5 Use flags instead of bools for VCVT. Fix up some spacing. Only Android has ArmEmitterTest. 2013-03-02 11:34:03 +10:00
Henrik Rydgard
253396666c Merge branch 'armjit-fpu' of github.com:hrydgard/ppsspp into armjit-fpu 2013-03-01 18:26:36 +01:00
Sacha
0ca7b2a794 The cvt.s.w has to be signed (as it was before). Also, implement f,sf but untested so it is left commented out. 2013-03-01 16:55:10 +10:00
Sacha
26ebdb4f11 Improve VCMP instruction with option for E. 
Add comment to le JIT about how the VCMP crashes on ARM11, with commented code.
 2013-03-01 15:41:45 +10:00
Sacha
6d3c89e354 Fix up VCVT function to recognise the difference in encoding for to_int and to_float. There is no 'round to zero' option for to_float. cvt.s.w and cvt.w.s should be unsigned. 2013-03-01 13:45:22 +10:00
Henrik Rydgard
516ca8a0c4 Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/ARM/ArmJit.h
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/Framebuffer.cpp
 2013-02-28 23:56:28 +01:00
Henrik Rydgard
28575d4672 Fix the avoidLoad flag in the arm regalloc 2013-02-28 23:45:47 +01:00
Sacha
35a57be115 ARMJIT: Implement MADD, MADDU. Do bitrev if it takes an immediate. Fix a bug where MULTU was being passed through to the interpreter. 2013-02-28 23:45:46 +01:00
Henrik Rydgård
f311bfba9d Merge pull request #818 from xsacha/cmp-jit 
ARMJIT: min, max implementations.
 2013-02-28 12:01:07 -08:00
Sacha
d3f7def328 ARMJIT: min, max implementations. 2013-03-01 02:17:39 +10:00
Sacha
059abc0d69 ARMJIT: Add floor, ceil, round. Introducing a rounding mode for VCVT. 
The cvt and trunc are tested heavily. Floor, ceil, round aren't tested as much as there are very few games that use it.
 2013-03-01 01:10:07 +10:00
Sacha
61f5fb35bd ARMJIT: Implement cvt.w.s, cvt.s.w and trunc.w.s that are used heavily in Dragonball. 
May need to keep note of FCR to get correct rounding mode? Interpreter doesn't do this either.
 2013-02-28 19:46:07 +10:00
Sacha
fe90d5cd06 Add VNEG and VABS implementations and use in FPU2op. 2013-02-27 23:33:59 +10:00
Sacha
8d4400fba1 ARMJIT: Clean up for load/stores 2013-02-27 22:17:38 +10:00
Sacha
ff14815fda ARMJIT: Combine to one instruction for load/stores. 2013-02-27 19:45:01 +10:00
Sacha
2c59de95e9 JIT the signed load/store variants too 2013-02-27 18:05:45 +10:00
Sacha
fe8b80c12e ARM JIT: Add and simplify some half-word load/store instructions. 2013-02-27 17:09:47 +10:00
Unknown W. Brackets
d3a66d0a90 Android buildfix. 2013-02-25 10:48:32 -08:00
Unknown W. Brackets
4e8359bae2 Fix Comp_ShiftType not using ROR. 
Untested but looks right?  Reported by @xsacha.
 2013-02-24 22:58:31 -08:00
Unknown W. Brackets
06425ae9e7 Correct the more obscure vcmp cases. 2013-02-24 15:07:29 -08:00
Unknown W. Brackets
4d1f07990a Fix some NaN handling in a few funcs. 2013-02-24 14:39:13 -08:00
Unknown W. Brackets
84c95526bc Mark more instructions which eat prefixes. 2013-02-24 14:38:37 -08:00
Unknown W. Brackets
64c42ffaf2 Fix some warnings generated by clang. 2013-02-24 10:23:31 -08:00
Unknown W. Brackets
3fbb5d4388 Avoid using CALL() directly in case of far calls. 
This mainly matters for x64.
 2013-02-24 00:12:55 -08:00
Unknown W. Brackets
7eb9af271b Fix downcount check without fastmem in jr. 2013-02-23 14:30:24 -08:00
Henrik Rydgård
2891576549 Merge pull request #774 from unknownbrackets/savestates 
Wait for jit to exit the runloop in debug, quit, and savestates
 2013-02-23 14:27:05 -08:00
Henrik Rydgård
796a19dfe2 Merge pull request #772 from unknownbrackets/change-reg 
Fix change register feature
 2013-02-23 13:56:42 -08:00
Unknown W. Brackets
2164a7fdf9 Keep track of whether we're in the runloop or not. 2013-02-23 13:01:00 -08:00
Unknown W. Brackets
0c1b6fecfe Allow changing fpu/vfpu regs. 2013-02-23 12:30:18 -08:00
Unknown W. Brackets
608fb85f0d Make changing register values actually work. 2013-02-23 12:25:51 -08:00
Unknown W. Brackets
6c6bd0bd9c Correct prefix handling in vf2h/vh2f. 2013-02-23 12:16:03 -08:00
Unknown W. Brackets
42c2313893 Initial implementation of vf2h. 
Fixes Fat Princess and possibly other stuff.
 2013-02-23 12:16:03 -08:00
Unknown W. Brackets
313ffdb495 Add a stub for clz/clo in x86 jit. 2013-02-21 01:25:02 -08:00
Unknown W. Brackets
08923c092b Implement ins and ext in the x86 jit. 2013-02-21 01:25:01 -08:00
Unknown W. Brackets
dede852c03 Optimize out slti in the x86 jit. 
I'm kinda surprised this actually happens...
 2013-02-21 01:25:01 -08:00
Unknown W. Brackets
abde404c00 Optimize out some addu/etc. calls against imms. 2013-02-21 01:25:01 -08:00
Unknown W. Brackets
9e479b4391 Optimize addi/addiu to just LEA when possible. 2013-02-21 01:25:00 -08:00
Unknown W. Brackets
2db368c29a Add more imm handling for shifts in x86 jit. 
This is actually hit, and propagates more imms through.
 2013-02-21 01:25:00 -08:00
Henrik Rydgård
4511b11c5a Merge pull request #750 from unknownbrackets/jit-minor 
Some minor x86 jitting
 2013-02-20 14:02:04 -08:00
Unknown W. Brackets
958d95a029 Make bitrev use less instructions in the x86 jit. 
Much less.
 2013-02-20 13:43:17 -08:00
StorMyu
282e5be93e Update Core/MIPS/MIPSDis.cpp 2013-02-20 22:10:54 +01:00
Unknown W. Brackets
7b612cf28d Don't need this with the imm code path. 2013-02-20 12:16:57 -08:00
Unknown W. Brackets
f1f48e26e4 Merge branch 'cpu-minor' into jit-minor 2013-02-20 12:10:29 -08:00
Unknown W. Brackets
2bdc9dc491 Reset llBit on thread switch. 
Never actually seen ll used, though... but this way it should
work as advertized, as long as a syscall doesn't happen in between...
 2013-02-20 12:09:13 -08:00
Unknown W. Brackets
3a365fef64 Protect against some writes to $0. 2013-02-20 12:09:12 -08:00
Unknown W. Brackets
c8f85ace41 Implement bitrev in x86 jit + some imms. 2013-02-20 12:09:02 -08:00
Unknown W. Brackets
c3be50acbb Implement movz/movn in the x86 jit. 2013-02-20 12:09:01 -08:00
Unknown W. Brackets
0d6d58fed4 Add min and max to the x86 jit portfolio. 2013-02-20 12:09:01 -08:00
StorMyu
43da6672bc Merge branch 'master' of https://github.com/StorMyu/ppsspp 2013-02-20 21:06:40 +01:00
StorMyu
197e5fc630 Change %i/%d to %X 
Cause it's just an easier read for every instruction to do Hexadecimal operation on Hexadecimal Immediate.
 2013-02-20 21:04:19 +01:00
Henrik Rydgard
620603c236 Fix bug in Vh2f (this instr needs more testing) 2013-02-20 00:24:21 +01:00
Henrik Rydgard
5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
Unknown W. Brackets
de7e18982c Buildfix for ARM, darn. 2013-02-19 08:01:10 -08:00
Unknown W. Brackets
01f3c4ecde Log an error if we hit a 1x1 matrix. 2013-02-19 07:46:29 -08:00
Unknown W. Brackets
038394b081 Divide from -1.0 directly in x86 jit vnrcp. 2013-02-19 00:35:15 -08:00
Unknown W. Brackets
a438791e7c Initial (very inefficient) vmmov for x86 jit. 
This makes #464 work (at least LittleBigPlanet), but only in x86 jit.
 2013-02-18 23:21:18 -08:00
Unknown W. Brackets
b8e2177591 Jit vzero/vone, which are easy and common (x86.) 2013-02-18 22:15:47 -08:00
Unknown W. Brackets
a001b8b6f0 Tweak and note vsat0/vsat1 NaN handling. 2013-02-18 22:06:49 -08:00
Unknown W. Brackets
40b2a8dec1 Drop the sign in vsqrt, but not vrsq. 2013-02-18 21:46:33 -08:00
Unknown W. Brackets
2e6f0006fd Oops, correct the bounds check. 2013-02-18 20:43:43 -08:00
Unknown W. Brackets
a3eba1e96e Fix typo, should definitely be VX(). 2013-02-18 20:43:43 -08:00
Unknown W. Brackets
2dfdf3ffeb Implement Comp_VV2Op vfpu ops in the x86 jit. 
Also, some cleanup.  No need for this extra boilerplate, simplify...

This makes the Bink video issue slightly better, in jit only.
 2013-02-18 20:43:28 -08:00
Henrik Rydgard
e32721c72a Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/MIPSVFPUUtils.cpp
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/VertexDecoder.cpp
 2013-02-19 00:50:33 +01:00
Henrik Rydgard
f8058e4bae Disable warning for bad prefix as it floods in Wipeout Pulse. Cleanups. 2013-02-19 00:45:25 +01:00
Unknown W. Brackets
653443070d Add a few more OUT_EAT_PREFIX flags to VFPU. 2013-02-18 15:13:46 -08:00
Unknown W. Brackets
d89a32e99f Mark a bunch of VFPU functions which eat prefixes. 2013-02-18 14:37:53 -08:00
Unknown W. Brackets
0e0b70bb8e vi2uc, etc. should apply the D prefix as float. 
So say tests on an actual PSP.
 2013-02-18 13:38:29 -08:00
Unknown W. Brackets
179fccaff7 Tests say matrices apply mask to last col (kinda.) 
It seems inconsistent but probably better than before.  Also add an error.
 2013-02-18 13:19:16 -08:00
Unknown W. Brackets
51d5b84108 Fix some misc HLE warnings. 2013-02-18 09:04:43 -08:00
Unknown W. Brackets
9d490a8b50 Proper ARM buildfix. 2013-02-18 08:03:45 -08:00
Unknown W. Brackets
33c1a2b4fa ARM buildfix. 2013-02-18 01:54:25 -08:00
Unknown W. Brackets
dacbcbdf2b Add a MIPSTables flag for ignoring the prefix. 2013-02-18 01:23:15 -08:00
Unknown W. Brackets
afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
Unknown W. Brackets
0bfc380575 Try to reuse temp regs for better caching. 2013-02-18 00:32:42 -08:00
Unknown W. Brackets
6855398add Support known prefixes in the vfpu jit. 2013-02-18 00:11:58 -08:00
Unknown W. Brackets
8ea59990ab Make applying prefixes mostly automatic. 
And implement (hopefully) D prefixes.
 2013-02-18 00:11:57 -08:00
Unknown W. Brackets
18c03d0816 Handle temp regs better, no need for direct access. 2013-02-18 00:11:57 -08:00
Unknown W. Brackets
27942606ad Use prefixD directly in jit, just like interp now. 2013-02-17 22:46:34 -08:00
Unknown W. Brackets
08a42a1aaf Preserve orig regs when applying vfpu prefixes. 2013-02-17 22:37:56 -08:00
Unknown W. Brackets
d63548799b Add more temp regs, allow swapping if necessary. 2013-02-17 22:18:46 -08:00
Unknown W. Brackets
25c42c3532 Mark more instructions that eat prefixes. 2013-02-17 17:53:54 -08:00
Unknown W. Brackets
7fee4dfd13 Re-enable vdot and vadd/etc. in x86 jit. 2013-02-17 17:53:53 -08:00
Unknown W. Brackets
f532951331 Automatically eat prefixes in x86 jit. 
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
 2013-02-17 17:53:53 -08:00
Unknown W. Brackets
6b223cf7d7 Add a flag for eating prefixes to the MIPS tables. 
Still incomplete, just filled in ones I've tested so far.
 2013-02-17 17:53:00 -08:00
Unknown W. Brackets
b4fb06f51c Respect the writemask in VDot. 
Although it's basically a no-op in that case...
 2013-02-17 17:52:59 -08:00
Unknown W. Brackets
6191017a2c Fix jit VDot mapping vd incorrectly to a quad. 2013-02-17 17:52:59 -08:00
Unknown W. Brackets
be631dea64 Disasm transposed vectors properly. 2013-02-17 17:52:58 -08:00
Henrik Rydgård
04c27cbe73 Merge pull request #722 from unknownbrackets/jit-vfpu 
Fix an overlap issue with vdot
 2013-02-17 01:59:26 -08:00
Unknown W. Brackets
106cbcfc5d Fix possible overlap issue in VDot. 2013-02-16 21:26:32 -08:00
Sacha
d99c9fb2ff Fix Symbian JIT + FastMem by using a mapped virtual address RChunk. 2013-02-17 15:23:56 +10:00
Unknown W. Brackets
0fdc975fde Fix wrong type in x86 jit fpu/vfpu load store. 2013-02-16 20:22:08 -08:00
Unknown W. Brackets
6eae8ed36a Disable VDot and Vec3 in x86 jit, broke things. 2013-02-16 19:57:35 -08:00
Unknown W. Brackets
b27701ac7d Fix VDot returning -0.0 in x86 jit. 2013-02-16 10:37:42 -08:00
Unknown W. Brackets
1c4c5e718b Optimize VDot and VecDo3 to avoid temporaries. 2013-02-16 10:19:05 -08:00
Unknown W. Brackets
0bd382c518 Discard temp regs right away, some helper funcs. 2013-02-16 10:18:13 -08:00
Unknown W. Brackets
0d5da967eb Enable VDot and Vec3 in x86 jit. 2013-02-16 03:27:48 -08:00
Unknown W. Brackets
35537b3c97 Add TEMP0 fpu regs to x86 like in armjit. 
But... will probably need more and the ability to swap into memory
if we want to deal with prefixes.
 2013-02-16 03:27:03 -08:00
Unknown W. Brackets
1ef4ccc5a1 Log an error when vfpu swizzle is used badly. 2013-02-16 02:04:04 -08:00
Henrik Rydgard
37f998407b Replace "Core" with "Jit" in ini. Don't show Open dialog by default (use Ctrl+A or Ctrl+O to open it). 
Delete "Slightly Faster Interpreter".
 2013-02-16 09:49:33 +01:00
Henrik Rydgard
159f423135 VFPUutil style & simplification 2013-02-16 09:28:56 +01:00
Henrik Rydgard
909b768f47 Don't need separate variables for writemask. Some optimizations. 2013-02-16 09:28:55 +01:00
Henrik Rydgard
b8abb77eee More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too. 2013-02-16 09:27:48 +01:00
Unknown W. Brackets
be8ddf12aa Don't go out of bounds applying vfpu swizzle. 2013-02-15 23:43:40 -08:00
Unknown W. Brackets
b1f31f052e Apply prefixes on vscl to t. 
It seems to do so with bugs on a real PSP.
 2013-02-15 23:43:25 -08:00
Unknown W. Brackets
e65e551f52 Fix VFPU D prefix handling for -0.0f. 2013-02-15 20:40:00 -08:00
Henrik Rydgard
81589b67e5 Save one instruction on jal, shorten block exits by one instruction (moved to dispatcher). 2013-02-15 23:37:59 +01:00
Henrik Rydgard
fdee111bca armjit-fpu: Compile VFPU prefix setting 2013-02-15 23:18:59 +01:00
Henrik Rydgard
0ee7578d68 Merge branch 'master' into armjit-fpu 2013-02-15 23:09:59 +01:00
Henrik Rydgard
526335cacf VFPUutil style & simplification 2013-02-15 23:09:02 +01:00
Henrik Rydgard
d22e258943 Don't need separate variables for writemask. Some optimizations. 2013-02-15 22:56:38 +01:00
Henrik Rydgard
23cddab1d7 Some mostly disabled armjit VFPU stuff. 2013-02-15 22:38:39 +01:00
Henrik Rydgard
44e4ba8772 Merge branch 'master' into armjit-fpu 2013-02-15 21:42:44 +01:00
Unknown W. Brackets
e42e7bf22e Don't flush all regs in mfvc, just prefixes. 2013-02-15 09:50:07 -08:00
Unknown W. Brackets
f95e66eb98 Forget cached prefixes when calling generic. 
It may eat them, or maybe always does?
 2013-02-15 08:35:34 -08:00
Unknown W. Brackets
2b441f1638 Initial implementation of jit vadd/vsub/vdiv/vmul. 2013-02-15 08:35:34 -08:00
Unknown W. Brackets
b9506c9568 Minor cleanup for vdot in x86 jit. 2013-02-15 08:35:34 -08:00
Unknown W. Brackets
ccad259ae5 Keep track of VFPU prefixes and flush them in jit. 2013-02-15 08:35:33 -08:00
Unknown W. Brackets
f6f2927526 Add curlies around DISABLE/CONDITIONAL_DISABLE. 2013-02-15 08:35:33 -08:00
Unknown W. Brackets
4eca76e0cc Check for s/t/d prefix reg changes in jit. 2013-02-14 00:27:09 -08:00
Unknown W. Brackets
3b58cc27bd Oops, vfpu was missing CONDITIONAL_DISABLEs. 2013-02-14 00:27:09 -08:00
Unknown W. Brackets
abe390e6f3 Add some checks for fpu/vfpu writing to $0. 2013-02-14 00:27:09 -08:00
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4789a8e5eb Oops, can't have CONDITIONAL_DISABLE here, no op. 2013-02-14 00:27:08 -08:00
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b0690f6ab8 Enable Comp_VPFX. 2013-02-14 00:27:08 -08:00
Henrik Rydgard
048cf35922 More ARMJit FPU work - some instructions and optimizations. 2013-02-14 00:02:09 +01:00
Henrik Rydgard
c850bca8a2 Delete leftover FlushAll call 2013-02-13 21:15:47 +01:00
Henrik Rydgard
b0c160fa93 Fix armjit fpu load / store 2013-02-13 21:07:06 +01:00
Henrik Rydgard
30318a4a4d Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/x86/CompFPU.cpp
 2013-02-13 20:47:41 +01:00
Unknown W. Brackets
f1386dfca1 Add a quick optimization to the x86 fpu comps. 2013-02-13 02:21:26 -08:00
Unknown W. Brackets
19cc652a37 Correct NaN handling in fpu comparisons. 2013-02-13 01:54:07 -08:00
Unknown W. Brackets
3cab6986c5 Jit the FPU comparisons on x86. 
Probably not too fast.  Also, NaN handling seems wrong?
 2013-02-13 00:55:10 -08:00
Henrik Rydgard
2c01b36585 Some FPU optimization 2013-02-12 00:58:31 +01:00
Henrik Rydgard
af4c7be086 mul.s div.s 2013-02-11 23:58:06 +01:00
Henrik Rydgard
ba1171f15d Couple more armjit-fpu instructions. Turn down logging a bit. 2013-02-11 23:39:30 +01:00
Henrik Rydgard
69c3c91d7e add.s/sub.s now appear to work 2013-02-11 23:23:42 +01:00
Henrik Rydgard
4bdb2045a7 Armjit-FPU: Fix lots of bugs, impl some stuff. Still nothing working. 2013-02-11 23:10:11 +01:00
Henrik Rydgard
4eb89e6aec Merge branch 'master' into armjit-fpu 2013-02-11 19:22:14 +01:00
Henrik Rydgard
3ce4a8a719 Allow switching 2xSSAA on and off ingame. Add Show FPS menu option. 2013-02-11 19:02:38 +01:00
Henrik Rydgård
815d69af44 Merge pull request #642 from Xele02/qt_work 
[Qt-desktop] Add debug dialogs
 2013-02-10 13:07:10 -08:00
Unknown W. Brackets
7c428bfeba Fix immediate div CMP. 2013-02-10 10:02:55 -08:00
Unknown W. Brackets
e0ebfd2211 Jit div/divu in x86. 2013-02-10 09:36:41 -08:00
Unknown W. Brackets
9bb78ce2ec Jit madd/msub in x86. 2013-02-10 08:45:35 -08:00
Xele02
69b837f18b Add debug dialogs (DisAsm, Memory, VFPU). 
New features : Breakpoint display, thread status, display list status
Update translation and start french translation
 2013-02-10 17:33:34 +01:00
Henrik Rydgard
3a11b030d6 Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/ARM/ArmCompFPU.cpp
	Core/MIPS/x86/CompFPU.cpp
 2013-02-10 15:57:16 +01:00
Henrik Rydgard
f75d14d3b5 ARM FPU jit work 2013-02-10 15:53:56 +01:00
Henrik Rydgard
78923f5538 Jit a little more (vfpu single load/store, transfer instructions) 2013-02-10 12:14:55 +01:00
Unknown W. Brackets
eb84c2f00a Validate jumps in jit slowmem mode. 
This makes it easier to see what is going on in the emulator debugger.
 2013-02-09 23:11:26 -08:00
Unknown W. Brackets
71c85ccf33 In jit slowmem, verify actual address. 
Oops, it could crash if it was near the boundary.
Well, it still could if it were very near, but that's rare.
 2013-02-09 23:08:57 -08:00
Henrik Rydgard
021736c533 Initial FPU regcache 2013-02-09 18:18:32 +01:00
Henrik Rydgard
6d3c851d03 armjit: Fix and enable sltiu, correct this time I think... 2013-02-06 23:35:24 +01:00
Henrik Rydgard
377c94b125 JIT x86: cvt.s.w 2013-02-06 20:29:49 +01:00
Lewis Robbins
442e64cd84 compiler warning and const top-level const 2013-02-05 17:54:29 +00:00
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2a6457b6ab Cut down on h files including PointerWrap. 
This makes changes to it a bit faster to build.
 2013-02-04 08:26:59 -08:00
lioncash
025a1351b4 Get rid of unused iterators. 
Also fix the formatting in 3 sprintf calls.
 2013-02-04 08:49:58 -05:00
Henrik Rydgard
7a22b4694b Prefixes are allowed on vcst, not that it makes much sense to use them. 2013-02-03 09:47:56 +01:00
Henrik Rydgård
b7cf57b79c Merge pull request #568 from unknownbrackets/jit-minor 
Jit: lwl/lwr/swl/swr, shift var
 2013-02-02 15:46:40 -08:00
Henrik Rydgard
d44c5bff45 Add some stubs to remember to implement these VFPU ops... 2013-02-02 23:48:22 +01:00
Unknown W. Brackets
6bee870ac9 Fix CompShiftVar for x86 jit. 
In case rd == rs, need to load ECX first.  I can't find anything
else wrong with it for it to be disabled.
 2013-02-02 14:02:07 -08:00
Unknown W. Brackets
f777c872e6 Jit unaligned reads/writes. 
This mostly just improves perf on debug, not really on the map for release.
 2013-02-02 13:12:34 -08:00
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bab7947be6 Read delay slots as instructions not mem. 
Just in case - could be a jump target, maybe?  Never seen it, though.
 2013-02-02 11:46:35 -08:00
Unknown W. Brackets
44b5adeaac Properly jit the break instruction. 
Otherwise, it just keeps on going past it.
We never want to hit this anyway, but it's good to know if we do.
 2013-02-01 00:49:14 -08:00
Sacha
7bba8c68c4 Fix JIT on Symbian (HACK). 2013-02-01 09:01:00 +10:00
Henrik Rydgard
d8f4e27926 Rename ARMABI_MOVI2R to MOVI2R 2013-01-31 23:41:05 +01:00
Henrik Rydgard
d44a731991 armjit: sltiu causes mysterious crashes, disable again. 2013-01-30 21:46:06 +01:00
Henrik Rydgard
c97f63a9d9 Minor armjit opt 2013-01-30 20:01:42 +01:00
Henrik Rydgard
1b4394ac5e ARM jit: jit integer multiplies. ARM is so nice, very clean. 2013-01-30 01:06:14 +01:00
Henrik Rydgard
739b76a55a Armjit: branch code cleanup #1 2013-01-30 01:05:36 +01:00