Commit Graph

106518 Commits

Author SHA1 Message Date
Joerg Sonnenberger
e2f9c8d663 Add TCR register access
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214826 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 23:53:42 +00:00
Joerg Sonnenberger
7c5b978254 Add PPC 603's tlbld and tlbli instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214825 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 23:49:45 +00:00
Renato Golin
94a1af55ba Allow CP10/CP11 operations on ARMv5/v6
Those registers are VFP/NEON and vector instructions should be used instead,
but old cores rely on those co-processors to enable VFP unwinding. This change
was prompted by the libc++abi's unwinding routine and is also present in many
legacy low-level bare-metal code that we ought to compile/assemble.

Fixing bug PR20025 and allowing PR20529 to proceed with a fix in libc++abi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214802 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 23:21:56 +00:00
Bill Schmidt
84fef1f55d [PPC64LE] Fix wrong IR for vec_sld and vec_vsldoi
My original LE implementation of the vsldoi instruction, with its
altivec.h interfaces vec_sld and vec_vsldoi, produces incorrect
shufflevector operations in the LLVM IR.  Correct code is generated
because the back end handles the incorrect shufflevector in a
consistent manner.

This patch and a companion patch for Clang correct this problem by
removing the fixup from altivec.h and the corresponding fixup from the
PowerPC back end.  Several test cases are also modified to reflect the
now-correct LLVM IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214800 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 23:21:01 +00:00
Kevin Enderby
2a78a0cd47 Enable Darwin vararg parameters support in assembler macros.
Duplicate the vararg tests for linux and add a tests which mixed
vararg arguments with darwin positional parameters.

Patch by: Janne Grunau <j@jannau.net>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214799 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 23:14:37 +00:00
Pedro Artigas
3da024594f Changed the liveness tracking in the RegisterScavenger
to use register units instead of registers.

reviewed by Jakob Stoklund Olesen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214798 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 23:07:49 +00:00
Joerg Sonnenberger
db3ce56a58 Add simplified aliases for access to DCCR, ICCR, DEAR and ESR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214797 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 22:56:42 +00:00
Andrew Trick
e85047ea0a Fix SmallDenseMap assignment operator.
Self assignment would lead to buckets of garbage, causing quadratic probing to hang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214790 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 22:18:25 +00:00
Juergen Ributzka
2c68cde701 [FastISel][AArch64] Fix shift lowering for i8 and i16 value types.
This fix changes the parameters #r and #s that are passed to the UBFM/SBFM
instruction to get the zero/sign-extension for free.

The original problem was that the shift left would use the 32-bit shift even for
i8/i16 value types, which could leave the upper bits set with "garbage" values.

The arithmetic shift right on the other side would use the wrong MSB as sign-bit
to determine what bits to shift into the value.

This fixes <rdar://problem/17907720>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214788 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:49:51 +00:00
Justin Bogner
3bc3e03f74 IR: Fix up doxygen comment for LLVMContext::diagnose
This comment was referring to the DiagnosticSeverity with RS_
prefixes, but they're actually DS_. I've also modernized the comment
style since I was changing it anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:49:15 +00:00
Chandler Carruth
8a74e2fc07 [SDAG] Fix a really, really terrible bug in the DAG combiner.
This code is completely wrong. It is also dead, as if it were to *ever*
run, it would crash. Fortunately, after my work to the combiner, it is
at least *possible* to reach the code, and llvm-stress has found a test
case. Thanks to Patrick for reporting.

It would be really good if anyone who remembers how this code works and
what it was intended to do could add some more obvious test coverage
instead of my completely contrived and reduced test case. My test case
was so brittle I left a bread crumb comment in it to help the next
person to stumble on it and not know what it was actually testing for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214785 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:29:59 +00:00
Joerg Sonnenberger
25c8b4774b tlbre / tlbwe / tlbsx / tlbsx. variants for the PPC 4xx CPUs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214784 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:28:22 +00:00
Eric Christopher
5b08f1626b Reorder to keep data and routines separate and to keep a couple of
similar routines close to each other.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214782 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:25:44 +00:00
Eric Christopher
9f85dccfc6 Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:25:23 +00:00
Eric Christopher
ffa13eafbf Reimplement the temporary non-const getSubtargetImpl routine so
that we can avoid implementing it on every target. Thanks to Richard
Smith for the suggestions!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:24:07 +00:00
Chad Rosier
82c93451f3 [AArch64] Extend the number of scalar instructions supported in the AdvSIMD
scalar integer instruction pass.

This is a patch I had lying around from a few months ago.  The pass is
currently disabled by default, so nothing to interesting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214779 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:20:25 +00:00
Joerg Sonnenberger
a770bd6cae MC uses .lcomm now, so adjust.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214776 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:06:00 +00:00
Reid Kleckner
0b04cf6e71 Fix failure to invoke exception handler on Win64
When the last instruction prior to a function epilogue is a call, we
need to emit a nop so that the return address is not in the epilogue IP
range.  This is consistent with MSVC's behavior, and may be a workaround
for a bug in the Win64 unwinder.

Differential Revision: http://reviews.llvm.org/D4751

Patch by Vadim Chugunov!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214775 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:05:27 +00:00
David Blaikie
1bb69f17d8 Correct the emission kind constants committed in r214771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214772 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 20:36:00 +00:00
David Blaikie
b00cca00f4 Document the "emission kind" field of the DICompileUnit in LLVM's Source Level Debugging metadata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214771 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 20:32:48 +00:00
Joerg Sonnenberger
355845b437 Recognize mftbl as alias for mftb, for symmetry with mttb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214769 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 20:28:34 +00:00
Joerg Sonnenberger
6d6454ed38 Add a sentence that all entries should include an email address.
Add one for Greg Clayton, Peter Collingbourne, Tobias Grosser and
Jakob Olesen based on recent commits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214762 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 19:33:25 +00:00
David Blaikie
df5eef292d Reapply "DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself."
Originally reverted in r213432 with flakey failures on an ASan self-host
build. After reduction it seems to be the same issue fixed in r213805
(ArgPromo + DebugInfo: Handle updating debug info over multiple
applications of argument promotion) and r213952 (by having
LiveDebugVariables strip dbg_value intrinsics in functions that are not
described by debug info). Though I cannot explain why this failure was
flakey...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214761 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 19:30:08 +00:00
Matt Arsenault
fa76ba82f2 R600/SI: Fix definitions for ds_read2 / ds_write2 instructions.
These were just wrong, using the wrong register classes
and store2 was missing an operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214756 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 18:49:22 +00:00
Joerg Sonnenberger
d6c23bed52 Rename PPCLinuxMCAsmInfo to PPCELFMCAsmInfo to better reflect the
systems it represents.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214755 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 18:46:13 +00:00
Joerg Sonnenberger
e8f23a8a5d Allow .lcomm with alignment on ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214754 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 18:45:10 +00:00
Alex Lorenz
aafa4b5c86 Coverage: add HasCodeBefore flag to a mapping region.
This flag will be used by the coverage tool to help 
compute the execution counts for each line in a source file.

Differential Revision: http://reviews.llvm.org/D4746


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214740 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 18:00:51 +00:00
Eric Christopher
b88bbc0e9d Move the R600 intrinsic support back to the target machine - there's
nothing subtarget dependent about the intrinsic support in any
backend as far as I can tell.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214738 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 17:37:43 +00:00
Justin Bogner
981eb59138 Path: Stop claiming path::const_iterator is bidirectional
path::const_iterator claims that it's a bidirectional iterator, but it
doesn't satisfy all of the contracts for a bidirectional iterator.
For example, n3376 24.2.5 p6 says "If a and b are both dereferenceable,
then a == b if and only if *a and *b are bound to the same object",
but this doesn't work with how we stash and recreate Components.

This means that our use of reverse_iterator on this type is invalid
and leads to many of the valgrind errors we're hitting, as explained
by Tilmann Scheller here:

    http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140728/228654.html

Instead, we admit that path::const_iterator is only an input_iterator,
and implement a second input_iterator for path::reverse_iterator (by
changing const_iterator::operator-- to reverse_iterator::operator++).
All of the uses of this just traverse once over the path in one
direction or the other anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214737 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 17:36:41 +00:00
Joerg Sonnenberger
93bbddf1f2 Refactor SPRG instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214733 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 17:26:15 +00:00
Akira Hatanaka
93a454952b [X86] Place parentheses around "isMask_32(STReturns) && N <= 2".
This corrects r214672, which was committed to silence a gcc warning.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214732 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 17:23:38 +00:00
Joerg Sonnenberger
df64464ad2 Add support for m[ft][di]bat[ul] instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214731 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 17:07:41 +00:00
Matt Arsenault
b47e0f1d8b Use the known address space constant rather than checking it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214729 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 16:55:35 +00:00
Matt Arsenault
0ce8757b56 R600: Remove unused include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214728 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 16:55:33 +00:00
Eric Christopher
986a9fa1b9 Add a dummy subtarget to the CPP backend target machine. This will
allow us to forward all of the standard TargetMachine calls to the
subtarget and still return null as we were before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214727 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 16:40:55 +00:00
Joerg Sonnenberger
977b978f93 Add features for PPC 4xx and e500/e500mc instructions.
Move the test cases for them into separate files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214724 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 15:47:38 +00:00
Ulrich Weigand
29ec7479a1 [PowerPC] Add target triple to vec_urem_const.ll test case
This should hopefully fix build bots on other architectures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214721 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 14:55:26 +00:00
Robert Khasanov
7017934668 [SKX] Enabling load/store instructions: encoding
Instructions: VMOVAPD, VMOVAPS, VMOVDQA8, VMOVDQA16, VMOVDQA32,VMOVDQA64, VMOVDQU8, VMOVDQU16, VMOVDQU32,VMOVDQU64, VMOVUPD, VMOVUPS,

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214719 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 14:35:15 +00:00
Ulrich Weigand
c568629589 [PowerPC] Swap arguments to vpkuhum/vpkuwum on little-endian
In commit r213915, Bill fixed little-endian usage of vmrgh* and vmrgl*
by swapping the input arguments.  As it turns out, the exact same fix
is also required for the vpkuhum/vpkuwum patterns.

This fixes another regression in llvmpipe when vector support is
enabled.

Reviewed by Bill Schmidt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214718 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 13:53:40 +00:00
Aaron Ballman
c245c18ba3 Improving the name of the function parameter, which happens to solve two likely-less-than-useful MSVC warnings: warning C4258: 'I' : definition from the for loop is ignored; the definition from the enclosing scope is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214717 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 13:51:27 +00:00
Ulrich Weigand
d5e9497c88 [PowerPC] MULHU/MULHS are not legal for vector types
I ran into some test failures where common code changed vector division
by constant into a multiply-high operation (MULHU).  But these are not
implemented by the back-end, so we failed to recognize the insn.

Fixed by marking MULHU/MULHS as Expand for vector types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214716 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 13:27:12 +00:00
Daniel Sanders
c8be3734a3 Fixed accidental use of reserved identifier in r214709.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214715 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 13:27:03 +00:00
Ulrich Weigand
3b7a193521 [PowerPC] Fix and improve vector comparisons
This patch refactors code generation of vector comparisons.

This fixes a wrong code-gen bug for ISD::SETGE for floating-point types,
and improves generated code for vector comparisons in general.

Specifically, the patch moves all logic deciding how to implement vector
comparisons into getVCmpInst, which gets two extra boolean outputs
indicating to its caller whether its needs to swap the input operands
and/or negate the result of the comparison.  Apart from implementing
these two modifications as directed by getVCmpInst, there is no need
to ever implement vector comparisons in any other manner; in particular,
there is never a need to perform two separate comparisons (e.g. one for
equal and one for greater-than, as code used to do before this patch).

Reviewed by Bill Schmidt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214714 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 13:13:57 +00:00
Daniel Sanders
98b419bff7 [mips] Add assembler support for '.set mipsX'.
Summary:
This patch also fixes an issue with the way the Mips assembler enables/disables architecture
features. Before this patch, the assembler never disabled feature bits. For example,
.set mips64
.set mips32r2

would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right.
Unfortunately this isn't trivial to fix because there's not an easy way to clear
feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits
that imply the feature being cleared and not the implied bits by the feature (there's a
better explanation to the code I added).

Patch by Matheus Almeida and updated by Toma Tabacu

Reviewers: vmedic, matheusalmeida, dsanders

Reviewed By: dsanders

Subscribers: tomatabacu, llvm-commits

Differential Revision: http://reviews.llvm.org/D4123


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214709 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 12:20:00 +00:00
NAKAMURA Takumi
12d4f9f4e4 TargetInstrInfo::genAlternativeCodeSequence(): Fix a couple of \param(s). [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214708 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 10:23:22 +00:00
Chandler Carruth
48593d7934 [x86] Just unilaterally prefer SSSE3-style PSHUFB lowerings over clever
use of PACKUS. It's cleaner that way.

I looked at implementing clever combine-based folding of PACKUS chains
into PSHUFB but it is quite hard and doesn't seem likely to be worth it.
The most annoying part would be detecting that the correct masking had
been done to use PACKUS-style instructions as a blend operation rather
than there being any saturating as is indicated by its name. We generate
really nice code for what few test cases I've come up with that aren't
completely contrived for this by just directly prefering PSHUFB and so
let's go with that strategy for now. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214707 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 10:17:35 +00:00
Chandler Carruth
93f5d9f093 [x86] Implement more aggressive use of PACKUS chains for lowering common
patterns of v16i8 shuffles.

This implements one of the more important FIXMEs for the SSE2 support in
the new shuffle lowering. We now generate the optimal shuffle sequence
for truncate-derived shuffles which show up essentially everywhere.

Unfortunately, this exposes a weakness in other parts of the shuffle
logic -- we can no longer form PSHUFB here. I'll add the necessary
support for that and other things in a subsequent commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214702 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 09:40:02 +00:00
Benjamin Kramer
a6a0f12942 Update links to the gcc and java documentation that 404'd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 09:26:40 +00:00
Kevin Qin
534100b31e Revert "r214669 - MachineCombiner Pass for selecting faster instruction"
This commit broke "make check" for several hours, so get it reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214697 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 05:10:33 +00:00
NAKAMURA Takumi
499befab31 MemoryBuffer: Don't use mmap when FileSize is multiple of 4k on Cygwin.
On Cygwin, getpagesize() returns 64k(AllocationGranularity).

In r214580, the size of X86GenInstrInfo.inc became 1499136.

FIXME: We should reorganize again getPageSize() on Win32.
MapFile allocates address along AllocationGranularity but view is mapped by physical page.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214681 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 01:43:37 +00:00