Files
llvm/test/CodeGen/AMDGPU
Stanislav Mekhanoshin 60eeded1a4 [AMDGPU] Fix illegal agpr use by VALU
When SIFixSGPRCopies attempts to fix an illegal copy from vector to
scalar register it calls moveToVALU(). A copy from an agpr to sgpr
becomes a copy from agpr to agpr, which may result in the illegal
register class at a use of this copy.

Solution is to copy it always into a vgpr. This may result in a
subsequent copy into an agpr if that is what really needed, however
should not happen too often and likely will be folded later.

The opposite situation may not happen because an sgpr is always
illegal where agpr is legal, so such user instructions may not
exist.

Differential Revision: https://reviews.llvm.org/D68358

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373544 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-02 23:23:46 +00:00
..
2019-07-11 21:19:33 +00:00
2019-06-20 15:08:34 +00:00
2019-06-20 15:08:34 +00:00
2019-05-08 22:09:57 +00:00
2019-06-20 15:08:34 +00:00
2019-03-29 17:35:56 +00:00
2017-08-07 18:30:35 +00:00
2019-09-02 10:02:54 +00:00
2017-08-07 18:30:35 +00:00
2019-05-13 19:30:06 +00:00
2019-06-14 00:33:31 +00:00
2019-09-25 18:50:34 +00:00
2019-03-19 15:50:24 +00:00
2018-04-30 19:08:16 +00:00
2019-07-01 17:17:45 +00:00
2019-03-21 12:01:21 +00:00
2019-07-09 18:10:06 +00:00
2019-06-20 16:29:40 +00:00
2019-07-11 10:37:58 +00:00
2019-07-08 19:03:38 +00:00
2019-03-12 21:02:54 +00:00
2019-03-12 21:02:54 +00:00
2017-08-07 18:30:35 +00:00
2019-07-11 21:19:33 +00:00
2019-07-08 19:03:38 +00:00
2019-03-21 12:01:21 +00:00
2019-07-11 21:19:33 +00:00
2019-03-19 15:50:24 +00:00
2019-04-26 16:37:51 +00:00
2019-03-19 15:50:24 +00:00
2019-07-15 17:50:31 +00:00
2019-06-20 15:08:34 +00:00
2019-05-08 22:09:57 +00:00
2019-05-03 15:37:07 +00:00
2018-06-27 15:33:33 +00:00
2019-07-24 19:40:13 +00:00
2019-07-27 14:32:23 +00:00
2018-06-27 15:33:33 +00:00
2017-08-07 18:30:35 +00:00
2017-08-07 18:30:35 +00:00
2019-06-20 15:08:34 +00:00
2019-06-20 15:08:34 +00:00
2019-06-20 15:08:34 +00:00
2019-05-03 15:37:07 +00:00
2019-07-27 14:32:23 +00:00
2017-08-07 18:30:35 +00:00
2019-03-21 12:01:21 +00:00
2019-06-20 15:08:34 +00:00

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.